2 * C-Media CMI8788 driver - PCM code
4 * Copyright (c) Clemens Ladisch <clemens@ladisch.de>
7 * This driver is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License, version 2.
10 * This driver is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this driver; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 #include <linux/pci.h>
21 #include <sound/control.h>
22 #include <sound/core.h>
23 #include <sound/pcm.h>
24 #include <sound/pcm_params.h>
27 static struct snd_pcm_hardware oxygen_hardware[PCM_COUNT] = {
29 .info = SNDRV_PCM_INFO_MMAP |
30 SNDRV_PCM_INFO_MMAP_VALID |
31 SNDRV_PCM_INFO_INTERLEAVED |
32 SNDRV_PCM_INFO_PAUSE |
33 SNDRV_PCM_INFO_SYNC_START,
34 .formats = SNDRV_PCM_FMTBIT_S16_LE |
35 SNDRV_PCM_FMTBIT_S32_LE,
36 .rates = SNDRV_PCM_RATE_32000 |
37 SNDRV_PCM_RATE_44100 |
38 SNDRV_PCM_RATE_48000 |
39 SNDRV_PCM_RATE_64000 |
40 SNDRV_PCM_RATE_88200 |
41 SNDRV_PCM_RATE_96000 |
42 SNDRV_PCM_RATE_176400 |
43 SNDRV_PCM_RATE_192000,
48 .buffer_bytes_max = 256 * 1024,
49 .period_bytes_min = 128,
50 .period_bytes_max = 128 * 1024,
55 .info = SNDRV_PCM_INFO_MMAP |
56 SNDRV_PCM_INFO_MMAP_VALID |
57 SNDRV_PCM_INFO_INTERLEAVED |
58 SNDRV_PCM_INFO_PAUSE |
59 SNDRV_PCM_INFO_SYNC_START,
60 .formats = SNDRV_PCM_FMTBIT_S16_LE |
61 SNDRV_PCM_FMTBIT_S32_LE,
62 .rates = SNDRV_PCM_RATE_32000 |
63 SNDRV_PCM_RATE_44100 |
64 SNDRV_PCM_RATE_48000 |
65 SNDRV_PCM_RATE_64000 |
66 SNDRV_PCM_RATE_88200 |
67 SNDRV_PCM_RATE_96000 |
68 SNDRV_PCM_RATE_176400 |
69 SNDRV_PCM_RATE_192000,
74 .buffer_bytes_max = 256 * 1024,
75 .period_bytes_min = 128,
76 .period_bytes_max = 128 * 1024,
81 .info = SNDRV_PCM_INFO_MMAP |
82 SNDRV_PCM_INFO_MMAP_VALID |
83 SNDRV_PCM_INFO_INTERLEAVED |
84 SNDRV_PCM_INFO_PAUSE |
85 SNDRV_PCM_INFO_SYNC_START,
86 .formats = SNDRV_PCM_FMTBIT_S16_LE |
87 SNDRV_PCM_FMTBIT_S32_LE,
88 .rates = SNDRV_PCM_RATE_44100 |
89 SNDRV_PCM_RATE_48000 |
90 SNDRV_PCM_RATE_88200 |
96 .buffer_bytes_max = 256 * 1024,
97 .period_bytes_min = 128,
98 .period_bytes_max = 128 * 1024,
103 .info = SNDRV_PCM_INFO_MMAP |
104 SNDRV_PCM_INFO_MMAP_VALID |
105 SNDRV_PCM_INFO_INTERLEAVED |
106 SNDRV_PCM_INFO_PAUSE |
107 SNDRV_PCM_INFO_SYNC_START,
108 .formats = SNDRV_PCM_FMTBIT_S16_LE |
109 SNDRV_PCM_FMTBIT_S32_LE,
110 .rates = SNDRV_PCM_RATE_32000 |
111 SNDRV_PCM_RATE_44100 |
112 SNDRV_PCM_RATE_48000 |
113 SNDRV_PCM_RATE_64000 |
114 SNDRV_PCM_RATE_88200 |
115 SNDRV_PCM_RATE_96000 |
116 SNDRV_PCM_RATE_176400 |
117 SNDRV_PCM_RATE_192000,
122 .buffer_bytes_max = 256 * 1024,
123 .period_bytes_min = 128,
124 .period_bytes_max = 128 * 1024,
129 .info = SNDRV_PCM_INFO_MMAP |
130 SNDRV_PCM_INFO_MMAP_VALID |
131 SNDRV_PCM_INFO_INTERLEAVED |
132 SNDRV_PCM_INFO_PAUSE |
133 SNDRV_PCM_INFO_SYNC_START,
134 .formats = SNDRV_PCM_FMTBIT_S16_LE |
135 SNDRV_PCM_FMTBIT_S32_LE,
136 .rates = SNDRV_PCM_RATE_32000 |
137 SNDRV_PCM_RATE_44100 |
138 SNDRV_PCM_RATE_48000 |
139 SNDRV_PCM_RATE_64000 |
140 SNDRV_PCM_RATE_88200 |
141 SNDRV_PCM_RATE_96000 |
142 SNDRV_PCM_RATE_176400 |
143 SNDRV_PCM_RATE_192000,
148 .buffer_bytes_max = 2048 * 1024,
149 .period_bytes_min = 128,
150 .period_bytes_max = 256 * 1024,
152 .periods_max = 16384,
155 .info = SNDRV_PCM_INFO_MMAP |
156 SNDRV_PCM_INFO_MMAP_VALID |
157 SNDRV_PCM_INFO_INTERLEAVED |
158 SNDRV_PCM_INFO_PAUSE |
159 SNDRV_PCM_INFO_SYNC_START,
160 .formats = SNDRV_PCM_FMTBIT_S16_LE,
161 .rates = SNDRV_PCM_RATE_48000,
166 .buffer_bytes_max = 256 * 1024,
167 .period_bytes_min = 128,
168 .period_bytes_max = 128 * 1024,
174 static inline unsigned int
175 oxygen_substream_channel(struct snd_pcm_substream *substream)
177 return (unsigned int)(uintptr_t)substream->runtime->private_data;
180 static int oxygen_open(struct snd_pcm_substream *substream,
181 unsigned int channel)
183 struct oxygen *chip = snd_pcm_substream_chip(substream);
184 struct snd_pcm_runtime *runtime = substream->runtime;
187 runtime->private_data = (void *)(uintptr_t)channel;
188 runtime->hw = oxygen_hardware[channel];
189 if (chip->model->pcm_hardware_filter)
190 chip->model->pcm_hardware_filter(channel, &runtime->hw);
191 err = snd_pcm_hw_constraint_step(runtime, 0,
192 SNDRV_PCM_HW_PARAM_PERIOD_BYTES, 32);
195 err = snd_pcm_hw_constraint_step(runtime, 0,
196 SNDRV_PCM_HW_PARAM_BUFFER_BYTES, 32);
199 if (runtime->hw.formats & SNDRV_PCM_FMTBIT_S32_LE) {
200 err = snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
204 if (runtime->hw.channels_max > 2) {
205 err = snd_pcm_hw_constraint_step(runtime, 0,
206 SNDRV_PCM_HW_PARAM_CHANNELS,
211 snd_pcm_set_sync(substream);
212 chip->streams[channel] = substream;
214 mutex_lock(&chip->mutex);
215 chip->pcm_active |= 1 << channel;
216 if (channel == PCM_SPDIF) {
217 chip->spdif_pcm_bits = chip->spdif_bits;
218 chip->controls[CONTROL_SPDIF_PCM]->vd[0].access &=
219 ~SNDRV_CTL_ELEM_ACCESS_INACTIVE;
220 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE |
221 SNDRV_CTL_EVENT_MASK_INFO,
222 &chip->controls[CONTROL_SPDIF_PCM]->id);
224 mutex_unlock(&chip->mutex);
229 static int oxygen_rec_a_open(struct snd_pcm_substream *substream)
231 return oxygen_open(substream, PCM_A);
234 static int oxygen_rec_b_open(struct snd_pcm_substream *substream)
236 return oxygen_open(substream, PCM_B);
239 static int oxygen_rec_c_open(struct snd_pcm_substream *substream)
241 return oxygen_open(substream, PCM_C);
244 static int oxygen_spdif_open(struct snd_pcm_substream *substream)
246 return oxygen_open(substream, PCM_SPDIF);
249 static int oxygen_multich_open(struct snd_pcm_substream *substream)
251 return oxygen_open(substream, PCM_MULTICH);
254 static int oxygen_ac97_open(struct snd_pcm_substream *substream)
256 return oxygen_open(substream, PCM_AC97);
259 static int oxygen_close(struct snd_pcm_substream *substream)
261 struct oxygen *chip = snd_pcm_substream_chip(substream);
262 unsigned int channel = oxygen_substream_channel(substream);
264 mutex_lock(&chip->mutex);
265 chip->pcm_active &= ~(1 << channel);
266 if (channel == PCM_SPDIF) {
267 chip->controls[CONTROL_SPDIF_PCM]->vd[0].access |=
268 SNDRV_CTL_ELEM_ACCESS_INACTIVE;
269 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE |
270 SNDRV_CTL_EVENT_MASK_INFO,
271 &chip->controls[CONTROL_SPDIF_PCM]->id);
273 if (channel == PCM_SPDIF || channel == PCM_MULTICH)
274 oxygen_update_spdif_source(chip);
275 mutex_unlock(&chip->mutex);
277 chip->streams[channel] = NULL;
281 static unsigned int oxygen_format(struct snd_pcm_hw_params *hw_params)
283 if (params_format(hw_params) == SNDRV_PCM_FORMAT_S32_LE)
284 return OXYGEN_FORMAT_24;
286 return OXYGEN_FORMAT_16;
289 static unsigned int oxygen_rate(struct snd_pcm_hw_params *hw_params)
291 switch (params_rate(hw_params)) {
293 return OXYGEN_RATE_32000;
295 return OXYGEN_RATE_44100;
297 return OXYGEN_RATE_48000;
299 return OXYGEN_RATE_64000;
301 return OXYGEN_RATE_88200;
303 return OXYGEN_RATE_96000;
305 return OXYGEN_RATE_176400;
307 return OXYGEN_RATE_192000;
311 static unsigned int oxygen_i2s_mclk(struct snd_pcm_hw_params *hw_params)
313 return params_rate(hw_params) <= 96000
314 ? OXYGEN_I2S_MCLK_256 : OXYGEN_I2S_MCLK_128;
317 static unsigned int oxygen_i2s_bits(struct snd_pcm_hw_params *hw_params)
319 if (params_format(hw_params) == SNDRV_PCM_FORMAT_S32_LE)
320 return OXYGEN_I2S_BITS_24;
322 return OXYGEN_I2S_BITS_16;
325 static unsigned int oxygen_play_channels(struct snd_pcm_hw_params *hw_params)
327 switch (params_channels(hw_params)) {
329 return OXYGEN_PLAY_CHANNELS_2;
331 return OXYGEN_PLAY_CHANNELS_4;
333 return OXYGEN_PLAY_CHANNELS_6;
335 return OXYGEN_PLAY_CHANNELS_8;
339 static const unsigned int channel_base_registers[PCM_COUNT] = {
340 [PCM_A] = OXYGEN_DMA_A_ADDRESS,
341 [PCM_B] = OXYGEN_DMA_B_ADDRESS,
342 [PCM_C] = OXYGEN_DMA_C_ADDRESS,
343 [PCM_SPDIF] = OXYGEN_DMA_SPDIF_ADDRESS,
344 [PCM_MULTICH] = OXYGEN_DMA_MULTICH_ADDRESS,
345 [PCM_AC97] = OXYGEN_DMA_AC97_ADDRESS,
348 static int oxygen_hw_params(struct snd_pcm_substream *substream,
349 struct snd_pcm_hw_params *hw_params)
351 struct oxygen *chip = snd_pcm_substream_chip(substream);
352 unsigned int channel = oxygen_substream_channel(substream);
355 err = snd_pcm_lib_malloc_pages(substream,
356 params_buffer_bytes(hw_params));
360 oxygen_write32(chip, channel_base_registers[channel],
361 (u32)substream->runtime->dma_addr);
362 if (channel == PCM_MULTICH) {
363 oxygen_write32(chip, OXYGEN_DMA_MULTICH_COUNT,
364 params_buffer_bytes(hw_params) / 4 - 1);
365 oxygen_write32(chip, OXYGEN_DMA_MULTICH_TCOUNT,
366 params_period_bytes(hw_params) / 4 - 1);
368 oxygen_write16(chip, channel_base_registers[channel] + 4,
369 params_buffer_bytes(hw_params) / 4 - 1);
370 oxygen_write16(chip, channel_base_registers[channel] + 6,
371 params_period_bytes(hw_params) / 4 - 1);
376 static int oxygen_rec_a_hw_params(struct snd_pcm_substream *substream,
377 struct snd_pcm_hw_params *hw_params)
379 struct oxygen *chip = snd_pcm_substream_chip(substream);
382 err = oxygen_hw_params(substream, hw_params);
386 spin_lock_irq(&chip->reg_lock);
387 oxygen_write8_masked(chip, OXYGEN_REC_FORMAT,
388 oxygen_format(hw_params) << OXYGEN_REC_FORMAT_A_SHIFT,
389 OXYGEN_REC_FORMAT_A_MASK);
390 oxygen_write16_masked(chip, OXYGEN_I2S_A_FORMAT,
391 oxygen_rate(hw_params) |
392 oxygen_i2s_mclk(hw_params) |
393 chip->model->adc_i2s_format |
394 oxygen_i2s_bits(hw_params),
395 OXYGEN_I2S_RATE_MASK |
396 OXYGEN_I2S_FORMAT_MASK |
397 OXYGEN_I2S_MCLK_MASK |
398 OXYGEN_I2S_BITS_MASK);
399 oxygen_write8_masked(chip, OXYGEN_REC_ROUTING,
400 OXYGEN_REC_A_ROUTE_I2S_ADC_1,
401 OXYGEN_REC_A_ROUTE_MASK);
402 spin_unlock_irq(&chip->reg_lock);
404 mutex_lock(&chip->mutex);
405 chip->model->set_adc_params(chip, hw_params);
406 mutex_unlock(&chip->mutex);
410 static int oxygen_rec_b_hw_params(struct snd_pcm_substream *substream,
411 struct snd_pcm_hw_params *hw_params)
413 struct oxygen *chip = snd_pcm_substream_chip(substream);
416 err = oxygen_hw_params(substream, hw_params);
420 spin_lock_irq(&chip->reg_lock);
421 oxygen_write8_masked(chip, OXYGEN_REC_FORMAT,
422 oxygen_format(hw_params) << OXYGEN_REC_FORMAT_B_SHIFT,
423 OXYGEN_REC_FORMAT_B_MASK);
424 oxygen_write16_masked(chip, OXYGEN_I2S_B_FORMAT,
425 oxygen_rate(hw_params) |
426 oxygen_i2s_mclk(hw_params) |
427 chip->model->adc_i2s_format |
428 oxygen_i2s_bits(hw_params),
429 OXYGEN_I2S_RATE_MASK |
430 OXYGEN_I2S_FORMAT_MASK |
431 OXYGEN_I2S_MCLK_MASK |
432 OXYGEN_I2S_BITS_MASK);
433 oxygen_write8_masked(chip, OXYGEN_REC_ROUTING,
434 OXYGEN_REC_B_ROUTE_I2S_ADC_2,
435 OXYGEN_REC_B_ROUTE_MASK);
436 spin_unlock_irq(&chip->reg_lock);
438 mutex_lock(&chip->mutex);
439 chip->model->set_adc_params(chip, hw_params);
440 mutex_unlock(&chip->mutex);
444 static int oxygen_rec_c_hw_params(struct snd_pcm_substream *substream,
445 struct snd_pcm_hw_params *hw_params)
447 struct oxygen *chip = snd_pcm_substream_chip(substream);
450 err = oxygen_hw_params(substream, hw_params);
454 spin_lock_irq(&chip->reg_lock);
455 oxygen_write8_masked(chip, OXYGEN_REC_FORMAT,
456 oxygen_format(hw_params) << OXYGEN_REC_FORMAT_C_SHIFT,
457 OXYGEN_REC_FORMAT_C_MASK);
458 oxygen_write8_masked(chip, OXYGEN_REC_ROUTING,
459 OXYGEN_REC_C_ROUTE_SPDIF,
460 OXYGEN_REC_C_ROUTE_MASK);
461 spin_unlock_irq(&chip->reg_lock);
465 static int oxygen_spdif_hw_params(struct snd_pcm_substream *substream,
466 struct snd_pcm_hw_params *hw_params)
468 struct oxygen *chip = snd_pcm_substream_chip(substream);
471 err = oxygen_hw_params(substream, hw_params);
475 spin_lock_irq(&chip->reg_lock);
476 oxygen_clear_bits32(chip, OXYGEN_SPDIF_CONTROL,
477 OXYGEN_SPDIF_OUT_ENABLE);
478 oxygen_write8_masked(chip, OXYGEN_PLAY_FORMAT,
479 oxygen_format(hw_params) << OXYGEN_SPDIF_FORMAT_SHIFT,
480 OXYGEN_SPDIF_FORMAT_MASK);
481 oxygen_write32_masked(chip, OXYGEN_SPDIF_CONTROL,
482 oxygen_rate(hw_params) << OXYGEN_SPDIF_OUT_RATE_SHIFT,
483 OXYGEN_SPDIF_OUT_RATE_MASK);
484 oxygen_update_spdif_source(chip);
485 spin_unlock_irq(&chip->reg_lock);
489 static int oxygen_multich_hw_params(struct snd_pcm_substream *substream,
490 struct snd_pcm_hw_params *hw_params)
492 struct oxygen *chip = snd_pcm_substream_chip(substream);
495 err = oxygen_hw_params(substream, hw_params);
499 spin_lock_irq(&chip->reg_lock);
500 oxygen_write8_masked(chip, OXYGEN_PLAY_CHANNELS,
501 oxygen_play_channels(hw_params),
502 OXYGEN_PLAY_CHANNELS_MASK);
503 oxygen_write8_masked(chip, OXYGEN_PLAY_FORMAT,
504 oxygen_format(hw_params) << OXYGEN_MULTICH_FORMAT_SHIFT,
505 OXYGEN_MULTICH_FORMAT_MASK);
506 oxygen_write16_masked(chip, OXYGEN_I2S_MULTICH_FORMAT,
507 oxygen_rate(hw_params) |
508 chip->model->dac_i2s_format |
509 oxygen_i2s_bits(hw_params),
510 OXYGEN_I2S_RATE_MASK |
511 OXYGEN_I2S_FORMAT_MASK |
512 OXYGEN_I2S_BITS_MASK);
513 oxygen_write16_masked(chip, OXYGEN_PLAY_ROUTING,
514 OXYGEN_PLAY_MULTICH_I2S_DAC,
515 OXYGEN_PLAY_MUTE01 | OXYGEN_PLAY_MUTE23 |
516 OXYGEN_PLAY_MUTE45 | OXYGEN_PLAY_MUTE67 |
517 OXYGEN_PLAY_MULTICH_MASK);
518 oxygen_update_dac_routing(chip);
519 oxygen_update_spdif_source(chip);
520 spin_unlock_irq(&chip->reg_lock);
522 mutex_lock(&chip->mutex);
523 chip->model->set_dac_params(chip, hw_params);
524 mutex_unlock(&chip->mutex);
528 static int oxygen_hw_free(struct snd_pcm_substream *substream)
530 struct oxygen *chip = snd_pcm_substream_chip(substream);
531 unsigned int channel = oxygen_substream_channel(substream);
533 spin_lock_irq(&chip->reg_lock);
534 chip->interrupt_mask &= ~(1 << channel);
535 oxygen_write16(chip, OXYGEN_INTERRUPT_MASK, chip->interrupt_mask);
536 spin_unlock_irq(&chip->reg_lock);
538 return snd_pcm_lib_free_pages(substream);
541 static int oxygen_spdif_hw_free(struct snd_pcm_substream *substream)
543 struct oxygen *chip = snd_pcm_substream_chip(substream);
545 spin_lock_irq(&chip->reg_lock);
546 oxygen_clear_bits32(chip, OXYGEN_SPDIF_CONTROL,
547 OXYGEN_SPDIF_OUT_ENABLE);
548 spin_unlock_irq(&chip->reg_lock);
549 return oxygen_hw_free(substream);
552 static int oxygen_prepare(struct snd_pcm_substream *substream)
554 struct oxygen *chip = snd_pcm_substream_chip(substream);
555 unsigned int channel = oxygen_substream_channel(substream);
556 unsigned int channel_mask = 1 << channel;
558 spin_lock_irq(&chip->reg_lock);
559 oxygen_set_bits8(chip, OXYGEN_DMA_FLUSH, channel_mask);
560 oxygen_clear_bits8(chip, OXYGEN_DMA_FLUSH, channel_mask);
562 chip->interrupt_mask |= channel_mask;
563 oxygen_write16(chip, OXYGEN_INTERRUPT_MASK, chip->interrupt_mask);
564 spin_unlock_irq(&chip->reg_lock);
568 static int oxygen_trigger(struct snd_pcm_substream *substream, int cmd)
570 struct oxygen *chip = snd_pcm_substream_chip(substream);
571 struct snd_pcm_substream *s;
572 unsigned int mask = 0;
576 case SNDRV_PCM_TRIGGER_STOP:
577 case SNDRV_PCM_TRIGGER_START:
580 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
581 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
588 snd_pcm_group_for_each_entry(s, substream) {
589 if (snd_pcm_substream_chip(s) == chip) {
590 mask |= 1 << oxygen_substream_channel(s);
591 snd_pcm_trigger_done(s, substream);
595 spin_lock(&chip->reg_lock);
597 if (cmd == SNDRV_PCM_TRIGGER_START)
598 chip->pcm_running |= mask;
600 chip->pcm_running &= ~mask;
601 oxygen_write8(chip, OXYGEN_DMA_STATUS, chip->pcm_running);
603 if (cmd == SNDRV_PCM_TRIGGER_PAUSE_PUSH)
604 oxygen_set_bits8(chip, OXYGEN_DMA_PAUSE, mask);
606 oxygen_clear_bits8(chip, OXYGEN_DMA_PAUSE, mask);
608 spin_unlock(&chip->reg_lock);
612 static snd_pcm_uframes_t oxygen_pointer(struct snd_pcm_substream *substream)
614 struct oxygen *chip = snd_pcm_substream_chip(substream);
615 struct snd_pcm_runtime *runtime = substream->runtime;
616 unsigned int channel = oxygen_substream_channel(substream);
619 /* no spinlock, this read should be atomic */
620 curr_addr = oxygen_read32(chip, channel_base_registers[channel]);
621 return bytes_to_frames(runtime, curr_addr - (u32)runtime->dma_addr);
624 static struct snd_pcm_ops oxygen_rec_a_ops = {
625 .open = oxygen_rec_a_open,
626 .close = oxygen_close,
627 .ioctl = snd_pcm_lib_ioctl,
628 .hw_params = oxygen_rec_a_hw_params,
629 .hw_free = oxygen_hw_free,
630 .prepare = oxygen_prepare,
631 .trigger = oxygen_trigger,
632 .pointer = oxygen_pointer,
635 static struct snd_pcm_ops oxygen_rec_b_ops = {
636 .open = oxygen_rec_b_open,
637 .close = oxygen_close,
638 .ioctl = snd_pcm_lib_ioctl,
639 .hw_params = oxygen_rec_b_hw_params,
640 .hw_free = oxygen_hw_free,
641 .prepare = oxygen_prepare,
642 .trigger = oxygen_trigger,
643 .pointer = oxygen_pointer,
646 static struct snd_pcm_ops oxygen_rec_c_ops = {
647 .open = oxygen_rec_c_open,
648 .close = oxygen_close,
649 .ioctl = snd_pcm_lib_ioctl,
650 .hw_params = oxygen_rec_c_hw_params,
651 .hw_free = oxygen_hw_free,
652 .prepare = oxygen_prepare,
653 .trigger = oxygen_trigger,
654 .pointer = oxygen_pointer,
657 static struct snd_pcm_ops oxygen_spdif_ops = {
658 .open = oxygen_spdif_open,
659 .close = oxygen_close,
660 .ioctl = snd_pcm_lib_ioctl,
661 .hw_params = oxygen_spdif_hw_params,
662 .hw_free = oxygen_spdif_hw_free,
663 .prepare = oxygen_prepare,
664 .trigger = oxygen_trigger,
665 .pointer = oxygen_pointer,
668 static struct snd_pcm_ops oxygen_multich_ops = {
669 .open = oxygen_multich_open,
670 .close = oxygen_close,
671 .ioctl = snd_pcm_lib_ioctl,
672 .hw_params = oxygen_multich_hw_params,
673 .hw_free = oxygen_hw_free,
674 .prepare = oxygen_prepare,
675 .trigger = oxygen_trigger,
676 .pointer = oxygen_pointer,
679 static struct snd_pcm_ops oxygen_ac97_ops = {
680 .open = oxygen_ac97_open,
681 .close = oxygen_close,
682 .ioctl = snd_pcm_lib_ioctl,
683 .hw_params = oxygen_hw_params,
684 .hw_free = oxygen_hw_free,
685 .prepare = oxygen_prepare,
686 .trigger = oxygen_trigger,
687 .pointer = oxygen_pointer,
690 static void oxygen_pcm_free(struct snd_pcm *pcm)
692 snd_pcm_lib_preallocate_free_for_all(pcm);
695 int __devinit oxygen_pcm_init(struct oxygen *chip)
701 outs = 1; /* OXYGEN_CHANNEL_MULTICH is always used */
702 ins = !!(chip->model->used_channels & (OXYGEN_CHANNEL_A |
704 err = snd_pcm_new(chip->card, "Analog", 0, outs, ins, &pcm);
707 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &oxygen_multich_ops);
708 if (chip->model->used_channels & OXYGEN_CHANNEL_A)
709 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE,
711 else if (chip->model->used_channels & OXYGEN_CHANNEL_B)
712 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE,
714 pcm->private_data = chip;
715 pcm->private_free = oxygen_pcm_free;
716 strcpy(pcm->name, "Analog");
717 snd_pcm_lib_preallocate_pages(pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream,
719 snd_dma_pci_data(chip->pci),
720 512 * 1024, 2048 * 1024);
722 snd_pcm_lib_preallocate_pages(pcm->streams[SNDRV_PCM_STREAM_CAPTURE].substream,
724 snd_dma_pci_data(chip->pci),
725 128 * 1024, 256 * 1024);
727 outs = !!(chip->model->used_channels & OXYGEN_CHANNEL_SPDIF);
728 ins = !!(chip->model->used_channels & OXYGEN_CHANNEL_C);
730 err = snd_pcm_new(chip->card, "Digital", 1, outs, ins, &pcm);
734 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK,
737 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE,
739 pcm->private_data = chip;
740 pcm->private_free = oxygen_pcm_free;
741 strcpy(pcm->name, "Digital");
742 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
743 snd_dma_pci_data(chip->pci),
744 128 * 1024, 256 * 1024);
747 outs = chip->has_ac97_1 &&
748 (chip->model->used_channels & OXYGEN_CHANNEL_AC97);
749 ins = (chip->model->used_channels & (OXYGEN_CHANNEL_A |
751 == (OXYGEN_CHANNEL_A | OXYGEN_CHANNEL_B);
753 err = snd_pcm_new(chip->card, ins ? "Analog2" : "AC97",
758 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK,
761 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE,
763 pcm->private_data = chip;
764 pcm->private_free = oxygen_pcm_free;
765 strcpy(pcm->name, ins ? "Analog 2" : "Front Panel");
766 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
767 snd_dma_pci_data(chip->pci),
768 128 * 1024, 256 * 1024);