err.no Git - linux-2.6/blob - sound/pci/oxygen/oxygen_pcm.c

   1 /*
   2  * C-Media CMI8788 driver - PCM code
   3  *
   4  * Copyright (c) Clemens Ladisch <clemens@ladisch.de>
   5  *
   6  *
   7  *  This driver is free software; you can redistribute it and/or modify
   8  *  it under the terms of the GNU General Public License, version 2.
   9  *
  10  *  This driver is distributed in the hope that it will be useful,
  11  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
  12  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13  *  GNU General Public License for more details.
  14  *
  15  *  You should have received a copy of the GNU General Public License
  16  *  along with this driver; if not, write to the Free Software
  17  *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
  18  */
  19
  20 #include <linux/pci.h>
  21 #include <sound/control.h>
  22 #include <sound/core.h>
  23 #include <sound/pcm.h>
  24 #include <sound/pcm_params.h>
  25 #include "oxygen.h"
  26
  27 static struct snd_pcm_hardware oxygen_hardware[PCM_COUNT] = {
  28         [PCM_A] = {
  29                 .info = SNDRV_PCM_INFO_MMAP |
  30                         SNDRV_PCM_INFO_MMAP_VALID |
  31                         SNDRV_PCM_INFO_INTERLEAVED |
  32                         SNDRV_PCM_INFO_PAUSE |
  33                         SNDRV_PCM_INFO_SYNC_START,
  34                 .formats = SNDRV_PCM_FMTBIT_S16_LE |
  35                            SNDRV_PCM_FMTBIT_S32_LE,
  36                 .rates = SNDRV_PCM_RATE_32000 |
  37                          SNDRV_PCM_RATE_44100 |
  38                          SNDRV_PCM_RATE_48000 |
  39                          SNDRV_PCM_RATE_64000 |
  40                          SNDRV_PCM_RATE_88200 |
  41                          SNDRV_PCM_RATE_96000 |
  42                          SNDRV_PCM_RATE_176400 |
  43                          SNDRV_PCM_RATE_192000,
  44                 .rate_min = 32000,
  45                 .rate_max = 192000,
  46                 .channels_min = 2,
  47                 .channels_max = 2,
  48                 .buffer_bytes_max = 256 * 1024,
  49                 .period_bytes_min = 128,
  50                 .period_bytes_max = 128 * 1024,
  51                 .periods_min = 2,
  52                 .periods_max = 2048,
  53         },
  54         [PCM_B] = {
  55                 .info = SNDRV_PCM_INFO_MMAP |
  56                         SNDRV_PCM_INFO_MMAP_VALID |
  57                         SNDRV_PCM_INFO_INTERLEAVED |
  58                         SNDRV_PCM_INFO_PAUSE |
  59                         SNDRV_PCM_INFO_SYNC_START,
  60                 .formats = SNDRV_PCM_FMTBIT_S16_LE |
  61                            SNDRV_PCM_FMTBIT_S32_LE,
  62                 .rates = SNDRV_PCM_RATE_32000 |
  63                          SNDRV_PCM_RATE_44100 |
  64                          SNDRV_PCM_RATE_48000 |
  65                          SNDRV_PCM_RATE_64000 |
  66                          SNDRV_PCM_RATE_88200 |
  67                          SNDRV_PCM_RATE_96000 |
  68                          SNDRV_PCM_RATE_176400 |
  69                          SNDRV_PCM_RATE_192000,
  70                 .rate_min = 32000,
  71                 .rate_max = 192000,
  72                 .channels_min = 2,
  73                 .channels_max = 2,
  74                 .buffer_bytes_max = 256 * 1024,
  75                 .period_bytes_min = 128,
  76                 .period_bytes_max = 128 * 1024,
  77                 .periods_min = 2,
  78                 .periods_max = 2048,
  79         },
  80         [PCM_C] = {
  81                 .info = SNDRV_PCM_INFO_MMAP |
  82                         SNDRV_PCM_INFO_MMAP_VALID |
  83                         SNDRV_PCM_INFO_INTERLEAVED |
  84                         SNDRV_PCM_INFO_PAUSE |
  85                         SNDRV_PCM_INFO_SYNC_START,
  86                 .formats = SNDRV_PCM_FMTBIT_S16_LE |
  87                            SNDRV_PCM_FMTBIT_S32_LE,
  88                 .rates = SNDRV_PCM_RATE_44100 |
  89                          SNDRV_PCM_RATE_48000 |
  90                          SNDRV_PCM_RATE_88200 |
  91                          SNDRV_PCM_RATE_96000,
  92                 .rate_min = 44100,
  93                 .rate_max = 96000,
  94                 .channels_min = 2,
  95                 .channels_max = 2,
  96                 .buffer_bytes_max = 256 * 1024,
  97                 .period_bytes_min = 128,
  98                 .period_bytes_max = 128 * 1024,
  99                 .periods_min = 2,
 100                 .periods_max = 2048,
 101         },
 102         [PCM_SPDIF] = {
 103                 .info = SNDRV_PCM_INFO_MMAP |
 104                         SNDRV_PCM_INFO_MMAP_VALID |
 105                         SNDRV_PCM_INFO_INTERLEAVED |
 106                         SNDRV_PCM_INFO_PAUSE |
 107                         SNDRV_PCM_INFO_SYNC_START,
 108                 .formats = SNDRV_PCM_FMTBIT_S16_LE |
 109                            SNDRV_PCM_FMTBIT_S32_LE,
 110                 .rates = SNDRV_PCM_RATE_32000 |
 111                          SNDRV_PCM_RATE_44100 |
 112                          SNDRV_PCM_RATE_48000 |
 113                          SNDRV_PCM_RATE_64000 |
 114                          SNDRV_PCM_RATE_88200 |
 115                          SNDRV_PCM_RATE_96000 |
 116                          SNDRV_PCM_RATE_176400 |
 117                          SNDRV_PCM_RATE_192000,
 118                 .rate_min = 32000,
 119                 .rate_max = 192000,
 120                 .channels_min = 2,
 121                 .channels_max = 2,
 122                 .buffer_bytes_max = 256 * 1024,
 123                 .period_bytes_min = 128,
 124                 .period_bytes_max = 128 * 1024,
 125                 .periods_min = 2,
 126                 .periods_max = 2048,
 127         },
 128         [PCM_MULTICH] = {
 129                 .info = SNDRV_PCM_INFO_MMAP |
 130                         SNDRV_PCM_INFO_MMAP_VALID |
 131                         SNDRV_PCM_INFO_INTERLEAVED |
 132                         SNDRV_PCM_INFO_PAUSE |
 133                         SNDRV_PCM_INFO_SYNC_START,
 134                 .formats = SNDRV_PCM_FMTBIT_S16_LE |
 135                            SNDRV_PCM_FMTBIT_S32_LE,
 136                 .rates = SNDRV_PCM_RATE_32000 |
 137                          SNDRV_PCM_RATE_44100 |
 138                          SNDRV_PCM_RATE_48000 |
 139                          SNDRV_PCM_RATE_64000 |
 140                          SNDRV_PCM_RATE_88200 |
 141                          SNDRV_PCM_RATE_96000 |
 142                          SNDRV_PCM_RATE_176400 |
 143                          SNDRV_PCM_RATE_192000,
 144                 .rate_min = 32000,
 145                 .rate_max = 192000,
 146                 .channels_min = 2,
 147                 .channels_max = 8,
 148                 .buffer_bytes_max = 2048 * 1024,
 149                 .period_bytes_min = 128,
 150                 .period_bytes_max = 256 * 1024,
 151                 .periods_min = 2,
 152                 .periods_max = 16384,
 153         },
 154         [PCM_AC97] = {
 155                 .info = SNDRV_PCM_INFO_MMAP |
 156                         SNDRV_PCM_INFO_MMAP_VALID |
 157                         SNDRV_PCM_INFO_INTERLEAVED |
 158                         SNDRV_PCM_INFO_PAUSE |
 159                         SNDRV_PCM_INFO_SYNC_START,
 160                 .formats = SNDRV_PCM_FMTBIT_S16_LE,
 161                 .rates = SNDRV_PCM_RATE_48000,
 162                 .rate_min = 48000,
 163                 .rate_max = 48000,
 164                 .channels_min = 2,
 165                 .channels_max = 2,
 166                 .buffer_bytes_max = 256 * 1024,
 167                 .period_bytes_min = 128,
 168                 .period_bytes_max = 128 * 1024,
 169                 .periods_min = 2,
 170                 .periods_max = 2048,
 171         },
 172 };
 173
 174 static inline unsigned int
 175 oxygen_substream_channel(struct snd_pcm_substream *substream)
 176 {
 177         return (unsigned int)(uintptr_t)substream->runtime->private_data;
 178 }
 179
 180 static int oxygen_open(struct snd_pcm_substream *substream,
 181                        unsigned int channel)
 182 {
 183         struct oxygen *chip = snd_pcm_substream_chip(substream);
 184         struct snd_pcm_runtime *runtime = substream->runtime;
 185         int err;
 186
 187         runtime->private_data = (void *)(uintptr_t)channel;
 188         runtime->hw = oxygen_hardware[channel];
 189         if (chip->model->pcm_hardware_filter)
 190                 chip->model->pcm_hardware_filter(channel, &runtime->hw);
 191         err = snd_pcm_hw_constraint_step(runtime, 0,
 192                                          SNDRV_PCM_HW_PARAM_PERIOD_BYTES, 32);
 193         if (err < 0)
 194                 return err;
 195         err = snd_pcm_hw_constraint_step(runtime, 0,
 196                                          SNDRV_PCM_HW_PARAM_BUFFER_BYTES, 32);
 197         if (err < 0)
 198                 return err;
 199         if (runtime->hw.formats & SNDRV_PCM_FMTBIT_S32_LE) {
 200                 err = snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
 201                 if (err < 0)
 202                         return err;
 203         }
 204         if (runtime->hw.channels_max > 2) {
 205                 err = snd_pcm_hw_constraint_step(runtime, 0,
 206                                                  SNDRV_PCM_HW_PARAM_CHANNELS,
 207                                                  2);
 208                 if (err < 0)
 209                         return err;
 210         }
 211         snd_pcm_set_sync(substream);
 212         chip->streams[channel] = substream;
 213
 214         mutex_lock(&chip->mutex);
 215         chip->pcm_active |= 1 << channel;
 216         if (channel == PCM_SPDIF) {
 217                 chip->spdif_pcm_bits = chip->spdif_bits;
 218                 chip->controls[CONTROL_SPDIF_PCM]->vd[0].access &=
 219                         ~SNDRV_CTL_ELEM_ACCESS_INACTIVE;
 220                 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE |
 221                                SNDRV_CTL_EVENT_MASK_INFO,
 222                                &chip->controls[CONTROL_SPDIF_PCM]->id);
 223         }
 224         mutex_unlock(&chip->mutex);
 225
 226         return 0;
 227 }
 228
 229 static int oxygen_rec_a_open(struct snd_pcm_substream *substream)
 230 {
 231         return oxygen_open(substream, PCM_A);
 232 }
 233
 234 static int oxygen_rec_b_open(struct snd_pcm_substream *substream)
 235 {
 236         return oxygen_open(substream, PCM_B);
 237 }
 238
 239 static int oxygen_rec_c_open(struct snd_pcm_substream *substream)
 240 {
 241         return oxygen_open(substream, PCM_C);
 242 }
 243
 244 static int oxygen_spdif_open(struct snd_pcm_substream *substream)
 245 {
 246         return oxygen_open(substream, PCM_SPDIF);
 247 }
 248
 249 static int oxygen_multich_open(struct snd_pcm_substream *substream)
 250 {
 251         return oxygen_open(substream, PCM_MULTICH);
 252 }
 253
 254 static int oxygen_ac97_open(struct snd_pcm_substream *substream)
 255 {
 256         return oxygen_open(substream, PCM_AC97);
 257 }
 258
 259 static int oxygen_close(struct snd_pcm_substream *substream)
 260 {
 261         struct oxygen *chip = snd_pcm_substream_chip(substream);
 262         unsigned int channel = oxygen_substream_channel(substream);
 263
 264         mutex_lock(&chip->mutex);
 265         chip->pcm_active &= ~(1 << channel);
 266         if (channel == PCM_SPDIF) {
 267                 chip->controls[CONTROL_SPDIF_PCM]->vd[0].access |=
 268                         SNDRV_CTL_ELEM_ACCESS_INACTIVE;
 269                 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE |
 270                                SNDRV_CTL_EVENT_MASK_INFO,
 271                                &chip->controls[CONTROL_SPDIF_PCM]->id);
 272         }
 273         if (channel == PCM_SPDIF || channel == PCM_MULTICH)
 274                 oxygen_update_spdif_source(chip);
 275         mutex_unlock(&chip->mutex);
 276
 277         chip->streams[channel] = NULL;
 278         return 0;
 279 }
 280
 281 static unsigned int oxygen_format(struct snd_pcm_hw_params *hw_params)
 282 {
 283         if (params_format(hw_params) == SNDRV_PCM_FORMAT_S32_LE)
 284                 return OXYGEN_FORMAT_24;
 285         else
 286                 return OXYGEN_FORMAT_16;
 287 }
 288
 289 static unsigned int oxygen_rate(struct snd_pcm_hw_params *hw_params)
 290 {
 291         switch (params_rate(hw_params)) {
 292         case 32000:
 293                 return OXYGEN_RATE_32000;
 294         case 44100:
 295                 return OXYGEN_RATE_44100;
 296         default: /* 48000 */
 297                 return OXYGEN_RATE_48000;
 298         case 64000:
 299                 return OXYGEN_RATE_64000;
 300         case 88200:
 301                 return OXYGEN_RATE_88200;
 302         case 96000:
 303                 return OXYGEN_RATE_96000;
 304         case 176400:
 305                 return OXYGEN_RATE_176400;
 306         case 192000:
 307                 return OXYGEN_RATE_192000;
 308         }
 309 }
 310
 311 static unsigned int oxygen_i2s_mclk(struct snd_pcm_hw_params *hw_params)
 312 {
 313         return params_rate(hw_params) <= 96000
 314                 ? OXYGEN_I2S_MCLK_256 : OXYGEN_I2S_MCLK_128;
 315 }
 316
 317 static unsigned int oxygen_i2s_bits(struct snd_pcm_hw_params *hw_params)
 318 {
 319         if (params_format(hw_params) == SNDRV_PCM_FORMAT_S32_LE)
 320                 return OXYGEN_I2S_BITS_24;
 321         else
 322                 return OXYGEN_I2S_BITS_16;
 323 }
 324
 325 static unsigned int oxygen_play_channels(struct snd_pcm_hw_params *hw_params)
 326 {
 327         switch (params_channels(hw_params)) {
 328         default: /* 2 */
 329                 return OXYGEN_PLAY_CHANNELS_2;
 330         case 4:
 331                 return OXYGEN_PLAY_CHANNELS_4;
 332         case 6:
 333                 return OXYGEN_PLAY_CHANNELS_6;
 334         case 8:
 335                 return OXYGEN_PLAY_CHANNELS_8;
 336         }
 337 }
 338
 339 static const unsigned int channel_base_registers[PCM_COUNT] = {
 340         [PCM_A] = OXYGEN_DMA_A_ADDRESS,
 341         [PCM_B] = OXYGEN_DMA_B_ADDRESS,
 342         [PCM_C] = OXYGEN_DMA_C_ADDRESS,
 343         [PCM_SPDIF] = OXYGEN_DMA_SPDIF_ADDRESS,
 344         [PCM_MULTICH] = OXYGEN_DMA_MULTICH_ADDRESS,
 345         [PCM_AC97] = OXYGEN_DMA_AC97_ADDRESS,
 346 };
 347
 348 static int oxygen_hw_params(struct snd_pcm_substream *substream,
 349                             struct snd_pcm_hw_params *hw_params)
 350 {
 351         struct oxygen *chip = snd_pcm_substream_chip(substream);
 352         unsigned int channel = oxygen_substream_channel(substream);
 353         int err;
 354
 355         err = snd_pcm_lib_malloc_pages(substream,
 356                                        params_buffer_bytes(hw_params));
 357         if (err < 0)
 358                 return err;
 359
 360         oxygen_write32(chip, channel_base_registers[channel],
 361                        (u32)substream->runtime->dma_addr);
 362         if (channel == PCM_MULTICH) {
 363                 oxygen_write32(chip, OXYGEN_DMA_MULTICH_COUNT,
 364                                params_buffer_bytes(hw_params) / 4 - 1);
 365                 oxygen_write32(chip, OXYGEN_DMA_MULTICH_TCOUNT,
 366                                params_period_bytes(hw_params) / 4 - 1);
 367         } else {
 368                 oxygen_write16(chip, channel_base_registers[channel] + 4,
 369                                params_buffer_bytes(hw_params) / 4 - 1);
 370                 oxygen_write16(chip, channel_base_registers[channel] + 6,
 371                                params_period_bytes(hw_params) / 4 - 1);
 372         }
 373         return 0;
 374 }
 375
 376 static int oxygen_rec_a_hw_params(struct snd_pcm_substream *substream,
 377                                   struct snd_pcm_hw_params *hw_params)
 378 {
 379         struct oxygen *chip = snd_pcm_substream_chip(substream);
 380         int err;
 381
 382         err = oxygen_hw_params(substream, hw_params);
 383         if (err < 0)
 384                 return err;
 385
 386         spin_lock_irq(&chip->reg_lock);
 387         oxygen_write8_masked(chip, OXYGEN_REC_FORMAT,
 388                              oxygen_format(hw_params) << OXYGEN_REC_FORMAT_A_SHIFT,
 389                              OXYGEN_REC_FORMAT_A_MASK);
 390         oxygen_write16_masked(chip, OXYGEN_I2S_A_FORMAT,
 391                               oxygen_rate(hw_params) |
 392                               oxygen_i2s_mclk(hw_params) |
 393                               chip->model->adc_i2s_format |
 394                               oxygen_i2s_bits(hw_params),
 395                               OXYGEN_I2S_RATE_MASK |
 396                               OXYGEN_I2S_FORMAT_MASK |
 397                               OXYGEN_I2S_MCLK_MASK |
 398                               OXYGEN_I2S_BITS_MASK);
 399         oxygen_clear_bits8(chip, OXYGEN_REC_ROUTING, 0x08);
 400         spin_unlock_irq(&chip->reg_lock);
 401
 402         mutex_lock(&chip->mutex);
 403         chip->model->set_adc_params(chip, hw_params);
 404         mutex_unlock(&chip->mutex);
 405         return 0;
 406 }
 407
 408 static int oxygen_rec_b_hw_params(struct snd_pcm_substream *substream,
 409                                   struct snd_pcm_hw_params *hw_params)
 410 {
 411         struct oxygen *chip = snd_pcm_substream_chip(substream);
 412         int err;
 413
 414         err = oxygen_hw_params(substream, hw_params);
 415         if (err < 0)
 416                 return err;
 417
 418         spin_lock_irq(&chip->reg_lock);
 419         oxygen_write8_masked(chip, OXYGEN_REC_FORMAT,
 420                              oxygen_format(hw_params) << OXYGEN_REC_FORMAT_B_SHIFT,
 421                              OXYGEN_REC_FORMAT_B_MASK);
 422         oxygen_write16_masked(chip, OXYGEN_I2S_B_FORMAT,
 423                               oxygen_rate(hw_params) |
 424                               oxygen_i2s_mclk(hw_params) |
 425                               chip->model->adc_i2s_format |
 426                               oxygen_i2s_bits(hw_params),
 427                               OXYGEN_I2S_RATE_MASK |
 428                               OXYGEN_I2S_FORMAT_MASK |
 429                               OXYGEN_I2S_MCLK_MASK |
 430                               OXYGEN_I2S_BITS_MASK);
 431         oxygen_clear_bits8(chip, OXYGEN_REC_ROUTING, 0x10);
 432         spin_unlock_irq(&chip->reg_lock);
 433
 434         mutex_lock(&chip->mutex);
 435         chip->model->set_adc_params(chip, hw_params);
 436         mutex_unlock(&chip->mutex);
 437         return 0;
 438 }
 439
 440 static int oxygen_rec_c_hw_params(struct snd_pcm_substream *substream,
 441                                   struct snd_pcm_hw_params *hw_params)
 442 {
 443         struct oxygen *chip = snd_pcm_substream_chip(substream);
 444         int err;
 445
 446         err = oxygen_hw_params(substream, hw_params);
 447         if (err < 0)
 448                 return err;
 449
 450         spin_lock_irq(&chip->reg_lock);
 451         oxygen_write8_masked(chip, OXYGEN_REC_FORMAT,
 452                              oxygen_format(hw_params) << OXYGEN_REC_FORMAT_C_SHIFT,
 453                              OXYGEN_REC_FORMAT_C_MASK);
 454         oxygen_clear_bits8(chip, OXYGEN_REC_ROUTING, 0x20);
 455         spin_unlock_irq(&chip->reg_lock);
 456         return 0;
 457 }
 458
 459 static int oxygen_spdif_hw_params(struct snd_pcm_substream *substream,
 460                                   struct snd_pcm_hw_params *hw_params)
 461 {
 462         struct oxygen *chip = snd_pcm_substream_chip(substream);
 463         int err;
 464
 465         err = oxygen_hw_params(substream, hw_params);
 466         if (err < 0)
 467                 return err;
 468
 469         spin_lock_irq(&chip->reg_lock);
 470         oxygen_clear_bits32(chip, OXYGEN_SPDIF_CONTROL,
 471                             OXYGEN_SPDIF_OUT_ENABLE);
 472         oxygen_write8_masked(chip, OXYGEN_PLAY_FORMAT,
 473                              oxygen_format(hw_params) << OXYGEN_SPDIF_FORMAT_SHIFT,
 474                              OXYGEN_SPDIF_FORMAT_MASK);
 475         oxygen_write32_masked(chip, OXYGEN_SPDIF_CONTROL,
 476                               oxygen_rate(hw_params) << OXYGEN_SPDIF_OUT_RATE_SHIFT,
 477                               OXYGEN_SPDIF_OUT_RATE_MASK);
 478         oxygen_update_spdif_source(chip);
 479         spin_unlock_irq(&chip->reg_lock);
 480         return 0;
 481 }
 482
 483 static int oxygen_multich_hw_params(struct snd_pcm_substream *substream,
 484                                     struct snd_pcm_hw_params *hw_params)
 485 {
 486         struct oxygen *chip = snd_pcm_substream_chip(substream);
 487         int err;
 488
 489         err = oxygen_hw_params(substream, hw_params);
 490         if (err < 0)
 491                 return err;
 492
 493         spin_lock_irq(&chip->reg_lock);
 494         oxygen_write8_masked(chip, OXYGEN_PLAY_CHANNELS,
 495                              oxygen_play_channels(hw_params),
 496                              OXYGEN_PLAY_CHANNELS_MASK);
 497         oxygen_write8_masked(chip, OXYGEN_PLAY_FORMAT,
 498                              oxygen_format(hw_params) << OXYGEN_MULTICH_FORMAT_SHIFT,
 499                              OXYGEN_MULTICH_FORMAT_MASK);
 500         oxygen_write16_masked(chip, OXYGEN_I2S_MULTICH_FORMAT,
 501                               oxygen_rate(hw_params) |
 502                               chip->model->dac_i2s_format |
 503                               oxygen_i2s_bits(hw_params),
 504                               OXYGEN_I2S_RATE_MASK |
 505                               OXYGEN_I2S_FORMAT_MASK |
 506                               OXYGEN_I2S_BITS_MASK);
 507         oxygen_clear_bits16(chip, OXYGEN_PLAY_ROUTING, 0x001f);
 508         oxygen_update_dac_routing(chip);
 509         oxygen_update_spdif_source(chip);
 510         spin_unlock_irq(&chip->reg_lock);
 511
 512         mutex_lock(&chip->mutex);
 513         chip->model->set_dac_params(chip, hw_params);
 514         mutex_unlock(&chip->mutex);
 515         return 0;
 516 }
 517
 518 static int oxygen_hw_free(struct snd_pcm_substream *substream)
 519 {
 520         struct oxygen *chip = snd_pcm_substream_chip(substream);
 521         unsigned int channel = oxygen_substream_channel(substream);
 522
 523         spin_lock_irq(&chip->reg_lock);
 524         chip->interrupt_mask &= ~(1 << channel);
 525         oxygen_write16(chip, OXYGEN_INTERRUPT_MASK, chip->interrupt_mask);
 526         spin_unlock_irq(&chip->reg_lock);
 527
 528         return snd_pcm_lib_free_pages(substream);
 529 }
 530
 531 static int oxygen_spdif_hw_free(struct snd_pcm_substream *substream)
 532 {
 533         struct oxygen *chip = snd_pcm_substream_chip(substream);
 534
 535         spin_lock_irq(&chip->reg_lock);
 536         oxygen_clear_bits32(chip, OXYGEN_SPDIF_CONTROL,
 537                             OXYGEN_SPDIF_OUT_ENABLE);
 538         spin_unlock_irq(&chip->reg_lock);
 539         return oxygen_hw_free(substream);
 540 }
 541
 542 static int oxygen_prepare(struct snd_pcm_substream *substream)
 543 {
 544         struct oxygen *chip = snd_pcm_substream_chip(substream);
 545         unsigned int channel = oxygen_substream_channel(substream);
 546         unsigned int channel_mask = 1 << channel;
 547
 548         spin_lock_irq(&chip->reg_lock);
 549         oxygen_set_bits8(chip, OXYGEN_DMA_FLUSH, channel_mask);
 550         oxygen_clear_bits8(chip, OXYGEN_DMA_FLUSH, channel_mask);
 551
 552         chip->interrupt_mask |= channel_mask;
 553         oxygen_write16(chip, OXYGEN_INTERRUPT_MASK, chip->interrupt_mask);
 554         spin_unlock_irq(&chip->reg_lock);
 555         return 0;
 556 }
 557
 558 static int oxygen_trigger(struct snd_pcm_substream *substream, int cmd)
 559 {
 560         struct oxygen *chip = snd_pcm_substream_chip(substream);
 561         struct snd_pcm_substream *s;
 562         unsigned int mask = 0;
 563         int running;
 564
 565         switch (cmd) {
 566         case SNDRV_PCM_TRIGGER_STOP:
 567         case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
 568                 running = 0;
 569                 break;
 570         case SNDRV_PCM_TRIGGER_START:
 571         case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
 572                 running = 1;
 573                 break;
 574         default:
 575                 return -EINVAL;
 576         }
 577
 578         snd_pcm_group_for_each_entry(s, substream) {
 579                 if (snd_pcm_substream_chip(s) == chip) {
 580                         mask |= 1 << oxygen_substream_channel(s);
 581                         snd_pcm_trigger_done(s, substream);
 582                 }
 583         }
 584
 585         spin_lock(&chip->reg_lock);
 586         if (running)
 587                 chip->pcm_running |= mask;
 588         else
 589                 chip->pcm_running &= ~mask;
 590         oxygen_write8(chip, OXYGEN_DMA_STATUS, chip->pcm_running);
 591         spin_unlock(&chip->reg_lock);
 592         return 0;
 593 }
 594
 595 static snd_pcm_uframes_t oxygen_pointer(struct snd_pcm_substream *substream)
 596 {
 597         struct oxygen *chip = snd_pcm_substream_chip(substream);
 598         struct snd_pcm_runtime *runtime = substream->runtime;
 599         unsigned int channel = oxygen_substream_channel(substream);
 600         u32 curr_addr;
 601
 602         /* no spinlock, this read should be atomic */
 603         curr_addr = oxygen_read32(chip, channel_base_registers[channel]);
 604         return bytes_to_frames(runtime, curr_addr - (u32)runtime->dma_addr);
 605 }
 606
 607 static struct snd_pcm_ops oxygen_rec_a_ops = {
 608         .open      = oxygen_rec_a_open,
 609         .close     = oxygen_close,
 610         .ioctl     = snd_pcm_lib_ioctl,
 611         .hw_params = oxygen_rec_a_hw_params,
 612         .hw_free   = oxygen_hw_free,
 613         .prepare   = oxygen_prepare,
 614         .trigger   = oxygen_trigger,
 615         .pointer   = oxygen_pointer,
 616 };
 617
 618 static struct snd_pcm_ops oxygen_rec_b_ops = {
 619         .open      = oxygen_rec_b_open,
 620         .close     = oxygen_close,
 621         .ioctl     = snd_pcm_lib_ioctl,
 622         .hw_params = oxygen_rec_b_hw_params,
 623         .hw_free   = oxygen_hw_free,
 624         .prepare   = oxygen_prepare,
 625         .trigger   = oxygen_trigger,
 626         .pointer   = oxygen_pointer,
 627 };
 628
 629 static struct snd_pcm_ops oxygen_rec_c_ops = {
 630         .open      = oxygen_rec_c_open,
 631         .close     = oxygen_close,
 632         .ioctl     = snd_pcm_lib_ioctl,
 633         .hw_params = oxygen_rec_c_hw_params,
 634         .hw_free   = oxygen_hw_free,
 635         .prepare   = oxygen_prepare,
 636         .trigger   = oxygen_trigger,
 637         .pointer   = oxygen_pointer,
 638 };
 639
 640 static struct snd_pcm_ops oxygen_spdif_ops = {
 641         .open      = oxygen_spdif_open,
 642         .close     = oxygen_close,
 643         .ioctl     = snd_pcm_lib_ioctl,
 644         .hw_params = oxygen_spdif_hw_params,
 645         .hw_free   = oxygen_spdif_hw_free,
 646         .prepare   = oxygen_prepare,
 647         .trigger   = oxygen_trigger,
 648         .pointer   = oxygen_pointer,
 649 };
 650
 651 static struct snd_pcm_ops oxygen_multich_ops = {
 652         .open      = oxygen_multich_open,
 653         .close     = oxygen_close,
 654         .ioctl     = snd_pcm_lib_ioctl,
 655         .hw_params = oxygen_multich_hw_params,
 656         .hw_free   = oxygen_hw_free,
 657         .prepare   = oxygen_prepare,
 658         .trigger   = oxygen_trigger,
 659         .pointer   = oxygen_pointer,
 660 };
 661
 662 static struct snd_pcm_ops oxygen_ac97_ops = {
 663         .open      = oxygen_ac97_open,
 664         .close     = oxygen_close,
 665         .ioctl     = snd_pcm_lib_ioctl,
 666         .hw_params = oxygen_hw_params,
 667         .hw_free   = oxygen_hw_free,
 668         .prepare   = oxygen_prepare,
 669         .trigger   = oxygen_trigger,
 670         .pointer   = oxygen_pointer,
 671 };
 672
 673 static void oxygen_pcm_free(struct snd_pcm *pcm)
 674 {
 675         snd_pcm_lib_preallocate_free_for_all(pcm);
 676 }
 677
 678 int __devinit oxygen_pcm_init(struct oxygen *chip)
 679 {
 680         struct snd_pcm *pcm;
 681         int outs, ins;
 682         int err;
 683
 684         outs = 1; /* OXYGEN_CHANNEL_MULTICH is always used */
 685         ins = !!(chip->model->used_channels & (OXYGEN_CHANNEL_A |
 686                                                OXYGEN_CHANNEL_B));
 687         err = snd_pcm_new(chip->card, "Analog", 0, outs, ins, &pcm);
 688         if (err < 0)
 689                 return err;
 690         snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &oxygen_multich_ops);
 691         if (chip->model->used_channels & OXYGEN_CHANNEL_A)
 692                 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE,
 693                                 &oxygen_rec_a_ops);
 694         else if (chip->model->used_channels & OXYGEN_CHANNEL_B)
 695                 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE,
 696                                 &oxygen_rec_b_ops);
 697         pcm->private_data = chip;
 698         pcm->private_free = oxygen_pcm_free;
 699         strcpy(pcm->name, "Analog");
 700         snd_pcm_lib_preallocate_pages(pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream,
 701                                       SNDRV_DMA_TYPE_DEV,
 702                                       snd_dma_pci_data(chip->pci),
 703                                       512 * 1024, 2048 * 1024);
 704         if (ins)
 705                 snd_pcm_lib_preallocate_pages(pcm->streams[SNDRV_PCM_STREAM_CAPTURE].substream,
 706                                               SNDRV_DMA_TYPE_DEV,
 707                                               snd_dma_pci_data(chip->pci),
 708                                               128 * 1024, 256 * 1024);
 709
 710         outs = !!(chip->model->used_channels & OXYGEN_CHANNEL_SPDIF);
 711         ins = !!(chip->model->used_channels & OXYGEN_CHANNEL_C);
 712         if (outs | ins) {
 713                 err = snd_pcm_new(chip->card, "Digital", 1, outs, ins, &pcm);
 714                 if (err < 0)
 715                         return err;
 716                 if (outs)
 717                         snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK,
 718                                         &oxygen_spdif_ops);
 719                 if (ins)
 720                         snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE,
 721                                         &oxygen_rec_c_ops);
 722                 pcm->private_data = chip;
 723                 pcm->private_free = oxygen_pcm_free;
 724                 strcpy(pcm->name, "Digital");
 725                 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
 726                                                       snd_dma_pci_data(chip->pci),
 727                                                       128 * 1024, 256 * 1024);
 728         }
 729
 730         outs = chip->has_ac97_1 &&
 731                 (chip->model->used_channels & OXYGEN_CHANNEL_AC97);
 732         ins = (chip->model->used_channels & (OXYGEN_CHANNEL_A |
 733                                              OXYGEN_CHANNEL_B))
 734                 == (OXYGEN_CHANNEL_A | OXYGEN_CHANNEL_B);
 735         if (outs | ins) {
 736                 err = snd_pcm_new(chip->card, ins ? "Analog2" : "AC97",
 737                                   2, outs, ins, &pcm);
 738                 if (err < 0)
 739                         return err;
 740                 if (outs)
 741                         snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK,
 742                                         &oxygen_ac97_ops);
 743                 if (ins)
 744                         snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE,
 745                                         &oxygen_rec_b_ops);
 746                 pcm->private_data = chip;
 747                 pcm->private_free = oxygen_pcm_free;
 748                 strcpy(pcm->name, ins ? "Analog 2" : "Front Panel");
 749                 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
 750                                                       snd_dma_pci_data(chip->pci),
 751                                                       128 * 1024, 256 * 1024);
 752         }
 753         return 0;
 754 }