2 * The driver for the ForteMedia FM801 based soundcards
3 * Copyright (c) by Jaroslav Kysela <perex@suse.cz>
5 * Support FM only card by Andy Shevchenko <andy@smile.org.ua>
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
23 #include <sound/driver.h>
24 #include <linux/delay.h>
25 #include <linux/init.h>
26 #include <linux/interrupt.h>
27 #include <linux/pci.h>
28 #include <linux/slab.h>
29 #include <linux/moduleparam.h>
30 #include <sound/core.h>
31 #include <sound/pcm.h>
32 #include <sound/ac97_codec.h>
33 #include <sound/mpu401.h>
34 #include <sound/opl3.h>
35 #include <sound/initval.h>
39 #ifdef CONFIG_SND_FM801_TEA575X_BOOL
40 #include <sound/tea575x-tuner.h>
41 #define TEA575X_RADIO 1
44 MODULE_AUTHOR("Jaroslav Kysela <perex@suse.cz>");
45 MODULE_DESCRIPTION("ForteMedia FM801");
46 MODULE_LICENSE("GPL");
47 MODULE_SUPPORTED_DEVICE("{{ForteMedia,FM801},"
48 "{Genius,SoundMaker Live 5.1}}");
50 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */
51 static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */
52 static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; /* Enable this card */
54 * Enable TEA575x tuner
55 * 1 = MediaForte 256-PCS
56 * 2 = MediaForte 256-PCPR
57 * 3 = MediaForte 64-PCR
58 * 16 = setup tuner only (this is additional bit), i.e. SF-64-PCR FM card
59 * High 16-bits are video (radio) device number + 1
61 static int tea575x_tuner[SNDRV_CARDS];
63 module_param_array(index, int, NULL, 0444);
64 MODULE_PARM_DESC(index, "Index value for the FM801 soundcard.");
65 module_param_array(id, charp, NULL, 0444);
66 MODULE_PARM_DESC(id, "ID string for the FM801 soundcard.");
67 module_param_array(enable, bool, NULL, 0444);
68 MODULE_PARM_DESC(enable, "Enable FM801 soundcard.");
69 module_param_array(tea575x_tuner, int, NULL, 0444);
70 MODULE_PARM_DESC(tea575x_tuner, "Enable TEA575x tuner.");
76 #define FM801_REG(chip, reg) (chip->port + FM801_##reg)
78 #define FM801_PCM_VOL 0x00 /* PCM Output Volume */
79 #define FM801_FM_VOL 0x02 /* FM Output Volume */
80 #define FM801_I2S_VOL 0x04 /* I2S Volume */
81 #define FM801_REC_SRC 0x06 /* Record Source */
82 #define FM801_PLY_CTRL 0x08 /* Playback Control */
83 #define FM801_PLY_COUNT 0x0a /* Playback Count */
84 #define FM801_PLY_BUF1 0x0c /* Playback Bufer I */
85 #define FM801_PLY_BUF2 0x10 /* Playback Buffer II */
86 #define FM801_CAP_CTRL 0x14 /* Capture Control */
87 #define FM801_CAP_COUNT 0x16 /* Capture Count */
88 #define FM801_CAP_BUF1 0x18 /* Capture Buffer I */
89 #define FM801_CAP_BUF2 0x1c /* Capture Buffer II */
90 #define FM801_CODEC_CTRL 0x22 /* Codec Control */
91 #define FM801_I2S_MODE 0x24 /* I2S Mode Control */
92 #define FM801_VOLUME 0x26 /* Volume Up/Down/Mute Status */
93 #define FM801_I2C_CTRL 0x29 /* I2C Control */
94 #define FM801_AC97_CMD 0x2a /* AC'97 Command */
95 #define FM801_AC97_DATA 0x2c /* AC'97 Data */
96 #define FM801_MPU401_DATA 0x30 /* MPU401 Data */
97 #define FM801_MPU401_CMD 0x31 /* MPU401 Command */
98 #define FM801_GPIO_CTRL 0x52 /* General Purpose I/O Control */
99 #define FM801_GEN_CTRL 0x54 /* General Control */
100 #define FM801_IRQ_MASK 0x56 /* Interrupt Mask */
101 #define FM801_IRQ_STATUS 0x5a /* Interrupt Status */
102 #define FM801_OPL3_BANK0 0x68 /* OPL3 Status Read / Bank 0 Write */
103 #define FM801_OPL3_DATA0 0x69 /* OPL3 Data 0 Write */
104 #define FM801_OPL3_BANK1 0x6a /* OPL3 Bank 1 Write */
105 #define FM801_OPL3_DATA1 0x6b /* OPL3 Bank 1 Write */
106 #define FM801_POWERDOWN 0x70 /* Blocks Power Down Control */
109 #define FM801_AC97_READ (1<<7) /* read=1, write=0 */
110 #define FM801_AC97_VALID (1<<8) /* port valid=1 */
111 #define FM801_AC97_BUSY (1<<9) /* busy=1 */
112 #define FM801_AC97_ADDR_SHIFT 10 /* codec id (2bit) */
114 /* playback and record control register bits */
115 #define FM801_BUF1_LAST (1<<1)
116 #define FM801_BUF2_LAST (1<<2)
117 #define FM801_START (1<<5)
118 #define FM801_PAUSE (1<<6)
119 #define FM801_IMMED_STOP (1<<7)
120 #define FM801_RATE_SHIFT 8
121 #define FM801_RATE_MASK (15 << FM801_RATE_SHIFT)
122 #define FM801_CHANNELS_4 (1<<12) /* playback only */
123 #define FM801_CHANNELS_6 (2<<12) /* playback only */
124 #define FM801_CHANNELS_6MS (3<<12) /* playback only */
125 #define FM801_CHANNELS_MASK (3<<12)
126 #define FM801_16BIT (1<<14)
127 #define FM801_STEREO (1<<15)
129 /* IRQ status bits */
130 #define FM801_IRQ_PLAYBACK (1<<8)
131 #define FM801_IRQ_CAPTURE (1<<9)
132 #define FM801_IRQ_VOLUME (1<<14)
133 #define FM801_IRQ_MPU (1<<15)
135 /* GPIO control register */
136 #define FM801_GPIO_GP0 (1<<0) /* read/write */
137 #define FM801_GPIO_GP1 (1<<1)
138 #define FM801_GPIO_GP2 (1<<2)
139 #define FM801_GPIO_GP3 (1<<3)
140 #define FM801_GPIO_GP(x) (1<<(0+(x)))
141 #define FM801_GPIO_GD0 (1<<8) /* directions: 1 = input, 0 = output*/
142 #define FM801_GPIO_GD1 (1<<9)
143 #define FM801_GPIO_GD2 (1<<10)
144 #define FM801_GPIO_GD3 (1<<11)
145 #define FM801_GPIO_GD(x) (1<<(8+(x)))
146 #define FM801_GPIO_GS0 (1<<12) /* function select: */
147 #define FM801_GPIO_GS1 (1<<13) /* 1 = GPIO */
148 #define FM801_GPIO_GS2 (1<<14) /* 0 = other (S/PDIF, VOL) */
149 #define FM801_GPIO_GS3 (1<<15)
150 #define FM801_GPIO_GS(x) (1<<(12+(x)))
159 unsigned long port; /* I/O port number */
160 unsigned int multichannel: 1, /* multichannel support */
161 secondary: 1; /* secondary codec */
162 unsigned char secondary_addr; /* address of the secondary codec */
164 unsigned short ply_ctrl; /* playback control */
165 unsigned short cap_ctrl; /* capture control */
167 unsigned long ply_buffer;
168 unsigned int ply_buf;
169 unsigned int ply_count;
170 unsigned int ply_size;
171 unsigned int ply_pos;
173 unsigned long cap_buffer;
174 unsigned int cap_buf;
175 unsigned int cap_count;
176 unsigned int cap_size;
177 unsigned int cap_pos;
179 struct snd_ac97_bus *ac97_bus;
180 struct snd_ac97 *ac97;
181 struct snd_ac97 *ac97_sec;
184 struct snd_card *card;
186 struct snd_rawmidi *rmidi;
187 struct snd_pcm_substream *playback_substream;
188 struct snd_pcm_substream *capture_substream;
189 unsigned int p_dma_size;
190 unsigned int c_dma_size;
193 struct snd_info_entry *proc_entry;
196 struct snd_tea575x tea;
200 u16 saved_regs[0x20];
204 static struct pci_device_id snd_fm801_ids[] = {
205 { 0x1319, 0x0801, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_MULTIMEDIA_AUDIO << 8, 0xffff00, 0, }, /* FM801 */
206 { 0x5213, 0x0510, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_MULTIMEDIA_AUDIO << 8, 0xffff00, 0, }, /* Gallant Odyssey Sound 4 */
210 MODULE_DEVICE_TABLE(pci, snd_fm801_ids);
213 * common I/O routines
216 static int snd_fm801_update_bits(struct fm801 *chip, unsigned short reg,
217 unsigned short mask, unsigned short value)
221 unsigned short old, new;
223 spin_lock_irqsave(&chip->reg_lock, flags);
224 old = inw(chip->port + reg);
225 new = (old & ~mask) | value;
228 outw(new, chip->port + reg);
229 spin_unlock_irqrestore(&chip->reg_lock, flags);
233 static void snd_fm801_codec_write(struct snd_ac97 *ac97,
237 struct fm801 *chip = ac97->private_data;
241 * Wait until the codec interface is not ready..
243 for (idx = 0; idx < 100; idx++) {
244 if (!(inw(FM801_REG(chip, AC97_CMD)) & FM801_AC97_BUSY))
248 snd_printk(KERN_ERR "AC'97 interface is busy (1)\n");
252 /* write data and address */
253 outw(val, FM801_REG(chip, AC97_DATA));
254 outw(reg | (ac97->addr << FM801_AC97_ADDR_SHIFT), FM801_REG(chip, AC97_CMD));
256 * Wait until the write command is not completed..
258 for (idx = 0; idx < 1000; idx++) {
259 if (!(inw(FM801_REG(chip, AC97_CMD)) & FM801_AC97_BUSY))
263 snd_printk(KERN_ERR "AC'97 interface #%d is busy (2)\n", ac97->num);
266 static unsigned short snd_fm801_codec_read(struct snd_ac97 *ac97, unsigned short reg)
268 struct fm801 *chip = ac97->private_data;
272 * Wait until the codec interface is not ready..
274 for (idx = 0; idx < 100; idx++) {
275 if (!(inw(FM801_REG(chip, AC97_CMD)) & FM801_AC97_BUSY))
279 snd_printk(KERN_ERR "AC'97 interface is busy (1)\n");
284 outw(reg | (ac97->addr << FM801_AC97_ADDR_SHIFT) | FM801_AC97_READ,
285 FM801_REG(chip, AC97_CMD));
286 for (idx = 0; idx < 100; idx++) {
287 if (!(inw(FM801_REG(chip, AC97_CMD)) & FM801_AC97_BUSY))
291 snd_printk(KERN_ERR "AC'97 interface #%d is busy (2)\n", ac97->num);
295 for (idx = 0; idx < 1000; idx++) {
296 if (inw(FM801_REG(chip, AC97_CMD)) & FM801_AC97_VALID)
300 snd_printk(KERN_ERR "AC'97 interface #%d is not valid (2)\n", ac97->num);
304 return inw(FM801_REG(chip, AC97_DATA));
307 static unsigned int rates[] = {
308 5500, 8000, 9600, 11025,
309 16000, 19200, 22050, 32000,
313 static struct snd_pcm_hw_constraint_list hw_constraints_rates = {
314 .count = ARRAY_SIZE(rates),
319 static unsigned int channels[] = {
323 #define CHANNELS sizeof(channels) / sizeof(channels[0])
325 static struct snd_pcm_hw_constraint_list hw_constraints_channels = {
332 * Sample rate routines
335 static unsigned short snd_fm801_rate_bits(unsigned int rate)
339 for (idx = 0; idx < ARRAY_SIZE(rates); idx++)
340 if (rates[idx] == rate)
343 return ARRAY_SIZE(rates) - 1;
350 static int snd_fm801_playback_trigger(struct snd_pcm_substream *substream,
353 struct fm801 *chip = snd_pcm_substream_chip(substream);
355 spin_lock(&chip->reg_lock);
357 case SNDRV_PCM_TRIGGER_START:
358 chip->ply_ctrl &= ~(FM801_BUF1_LAST |
361 chip->ply_ctrl |= FM801_START |
364 case SNDRV_PCM_TRIGGER_STOP:
365 chip->ply_ctrl &= ~(FM801_START | FM801_PAUSE);
367 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
368 case SNDRV_PCM_TRIGGER_SUSPEND:
369 chip->ply_ctrl |= FM801_PAUSE;
371 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
372 case SNDRV_PCM_TRIGGER_RESUME:
373 chip->ply_ctrl &= ~FM801_PAUSE;
376 spin_unlock(&chip->reg_lock);
380 outw(chip->ply_ctrl, FM801_REG(chip, PLY_CTRL));
381 spin_unlock(&chip->reg_lock);
385 static int snd_fm801_capture_trigger(struct snd_pcm_substream *substream,
388 struct fm801 *chip = snd_pcm_substream_chip(substream);
390 spin_lock(&chip->reg_lock);
392 case SNDRV_PCM_TRIGGER_START:
393 chip->cap_ctrl &= ~(FM801_BUF1_LAST |
396 chip->cap_ctrl |= FM801_START |
399 case SNDRV_PCM_TRIGGER_STOP:
400 chip->cap_ctrl &= ~(FM801_START | FM801_PAUSE);
402 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
403 case SNDRV_PCM_TRIGGER_SUSPEND:
404 chip->cap_ctrl |= FM801_PAUSE;
406 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
407 case SNDRV_PCM_TRIGGER_RESUME:
408 chip->cap_ctrl &= ~FM801_PAUSE;
411 spin_unlock(&chip->reg_lock);
415 outw(chip->cap_ctrl, FM801_REG(chip, CAP_CTRL));
416 spin_unlock(&chip->reg_lock);
420 static int snd_fm801_hw_params(struct snd_pcm_substream *substream,
421 struct snd_pcm_hw_params *hw_params)
423 return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
426 static int snd_fm801_hw_free(struct snd_pcm_substream *substream)
428 return snd_pcm_lib_free_pages(substream);
431 static int snd_fm801_playback_prepare(struct snd_pcm_substream *substream)
433 struct fm801 *chip = snd_pcm_substream_chip(substream);
434 struct snd_pcm_runtime *runtime = substream->runtime;
436 chip->ply_size = snd_pcm_lib_buffer_bytes(substream);
437 chip->ply_count = snd_pcm_lib_period_bytes(substream);
438 spin_lock_irq(&chip->reg_lock);
439 chip->ply_ctrl &= ~(FM801_START | FM801_16BIT |
440 FM801_STEREO | FM801_RATE_MASK |
441 FM801_CHANNELS_MASK);
442 if (snd_pcm_format_width(runtime->format) == 16)
443 chip->ply_ctrl |= FM801_16BIT;
444 if (runtime->channels > 1) {
445 chip->ply_ctrl |= FM801_STEREO;
446 if (runtime->channels == 4)
447 chip->ply_ctrl |= FM801_CHANNELS_4;
448 else if (runtime->channels == 6)
449 chip->ply_ctrl |= FM801_CHANNELS_6;
451 chip->ply_ctrl |= snd_fm801_rate_bits(runtime->rate) << FM801_RATE_SHIFT;
453 outw(chip->ply_ctrl, FM801_REG(chip, PLY_CTRL));
454 outw(chip->ply_count - 1, FM801_REG(chip, PLY_COUNT));
455 chip->ply_buffer = runtime->dma_addr;
457 outl(chip->ply_buffer, FM801_REG(chip, PLY_BUF1));
458 outl(chip->ply_buffer + (chip->ply_count % chip->ply_size), FM801_REG(chip, PLY_BUF2));
459 spin_unlock_irq(&chip->reg_lock);
463 static int snd_fm801_capture_prepare(struct snd_pcm_substream *substream)
465 struct fm801 *chip = snd_pcm_substream_chip(substream);
466 struct snd_pcm_runtime *runtime = substream->runtime;
468 chip->cap_size = snd_pcm_lib_buffer_bytes(substream);
469 chip->cap_count = snd_pcm_lib_period_bytes(substream);
470 spin_lock_irq(&chip->reg_lock);
471 chip->cap_ctrl &= ~(FM801_START | FM801_16BIT |
472 FM801_STEREO | FM801_RATE_MASK);
473 if (snd_pcm_format_width(runtime->format) == 16)
474 chip->cap_ctrl |= FM801_16BIT;
475 if (runtime->channels > 1)
476 chip->cap_ctrl |= FM801_STEREO;
477 chip->cap_ctrl |= snd_fm801_rate_bits(runtime->rate) << FM801_RATE_SHIFT;
479 outw(chip->cap_ctrl, FM801_REG(chip, CAP_CTRL));
480 outw(chip->cap_count - 1, FM801_REG(chip, CAP_COUNT));
481 chip->cap_buffer = runtime->dma_addr;
483 outl(chip->cap_buffer, FM801_REG(chip, CAP_BUF1));
484 outl(chip->cap_buffer + (chip->cap_count % chip->cap_size), FM801_REG(chip, CAP_BUF2));
485 spin_unlock_irq(&chip->reg_lock);
489 static snd_pcm_uframes_t snd_fm801_playback_pointer(struct snd_pcm_substream *substream)
491 struct fm801 *chip = snd_pcm_substream_chip(substream);
494 if (!(chip->ply_ctrl & FM801_START))
496 spin_lock(&chip->reg_lock);
497 ptr = chip->ply_pos + (chip->ply_count - 1) - inw(FM801_REG(chip, PLY_COUNT));
498 if (inw(FM801_REG(chip, IRQ_STATUS)) & FM801_IRQ_PLAYBACK) {
499 ptr += chip->ply_count;
500 ptr %= chip->ply_size;
502 spin_unlock(&chip->reg_lock);
503 return bytes_to_frames(substream->runtime, ptr);
506 static snd_pcm_uframes_t snd_fm801_capture_pointer(struct snd_pcm_substream *substream)
508 struct fm801 *chip = snd_pcm_substream_chip(substream);
511 if (!(chip->cap_ctrl & FM801_START))
513 spin_lock(&chip->reg_lock);
514 ptr = chip->cap_pos + (chip->cap_count - 1) - inw(FM801_REG(chip, CAP_COUNT));
515 if (inw(FM801_REG(chip, IRQ_STATUS)) & FM801_IRQ_CAPTURE) {
516 ptr += chip->cap_count;
517 ptr %= chip->cap_size;
519 spin_unlock(&chip->reg_lock);
520 return bytes_to_frames(substream->runtime, ptr);
523 static irqreturn_t snd_fm801_interrupt(int irq, void *dev_id, struct pt_regs *regs)
525 struct fm801 *chip = dev_id;
526 unsigned short status;
529 status = inw(FM801_REG(chip, IRQ_STATUS));
530 status &= FM801_IRQ_PLAYBACK|FM801_IRQ_CAPTURE|FM801_IRQ_MPU|FM801_IRQ_VOLUME;
534 outw(status, FM801_REG(chip, IRQ_STATUS));
535 if (chip->pcm && (status & FM801_IRQ_PLAYBACK) && chip->playback_substream) {
536 spin_lock(&chip->reg_lock);
538 chip->ply_pos += chip->ply_count;
539 chip->ply_pos %= chip->ply_size;
540 tmp = chip->ply_pos + chip->ply_count;
541 tmp %= chip->ply_size;
542 outl(chip->ply_buffer + tmp,
543 (chip->ply_buf & 1) ?
544 FM801_REG(chip, PLY_BUF1) :
545 FM801_REG(chip, PLY_BUF2));
546 spin_unlock(&chip->reg_lock);
547 snd_pcm_period_elapsed(chip->playback_substream);
549 if (chip->pcm && (status & FM801_IRQ_CAPTURE) && chip->capture_substream) {
550 spin_lock(&chip->reg_lock);
552 chip->cap_pos += chip->cap_count;
553 chip->cap_pos %= chip->cap_size;
554 tmp = chip->cap_pos + chip->cap_count;
555 tmp %= chip->cap_size;
556 outl(chip->cap_buffer + tmp,
557 (chip->cap_buf & 1) ?
558 FM801_REG(chip, CAP_BUF1) :
559 FM801_REG(chip, CAP_BUF2));
560 spin_unlock(&chip->reg_lock);
561 snd_pcm_period_elapsed(chip->capture_substream);
563 if (chip->rmidi && (status & FM801_IRQ_MPU))
564 snd_mpu401_uart_interrupt(irq, chip->rmidi->private_data, regs);
565 if (status & FM801_IRQ_VOLUME)
571 static struct snd_pcm_hardware snd_fm801_playback =
573 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
574 SNDRV_PCM_INFO_BLOCK_TRANSFER |
575 SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_RESUME |
576 SNDRV_PCM_INFO_MMAP_VALID),
577 .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
578 .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_48000,
583 .buffer_bytes_max = (128*1024),
584 .period_bytes_min = 64,
585 .period_bytes_max = (128*1024),
591 static struct snd_pcm_hardware snd_fm801_capture =
593 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
594 SNDRV_PCM_INFO_BLOCK_TRANSFER |
595 SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_RESUME |
596 SNDRV_PCM_INFO_MMAP_VALID),
597 .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
598 .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_48000,
603 .buffer_bytes_max = (128*1024),
604 .period_bytes_min = 64,
605 .period_bytes_max = (128*1024),
611 static int snd_fm801_playback_open(struct snd_pcm_substream *substream)
613 struct fm801 *chip = snd_pcm_substream_chip(substream);
614 struct snd_pcm_runtime *runtime = substream->runtime;
617 chip->playback_substream = substream;
618 runtime->hw = snd_fm801_playback;
619 snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
620 &hw_constraints_rates);
621 if (chip->multichannel) {
622 runtime->hw.channels_max = 6;
623 snd_pcm_hw_constraint_list(runtime, 0,
624 SNDRV_PCM_HW_PARAM_CHANNELS,
625 &hw_constraints_channels);
627 if ((err = snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS)) < 0)
632 static int snd_fm801_capture_open(struct snd_pcm_substream *substream)
634 struct fm801 *chip = snd_pcm_substream_chip(substream);
635 struct snd_pcm_runtime *runtime = substream->runtime;
638 chip->capture_substream = substream;
639 runtime->hw = snd_fm801_capture;
640 snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
641 &hw_constraints_rates);
642 if ((err = snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS)) < 0)
647 static int snd_fm801_playback_close(struct snd_pcm_substream *substream)
649 struct fm801 *chip = snd_pcm_substream_chip(substream);
651 chip->playback_substream = NULL;
655 static int snd_fm801_capture_close(struct snd_pcm_substream *substream)
657 struct fm801 *chip = snd_pcm_substream_chip(substream);
659 chip->capture_substream = NULL;
663 static struct snd_pcm_ops snd_fm801_playback_ops = {
664 .open = snd_fm801_playback_open,
665 .close = snd_fm801_playback_close,
666 .ioctl = snd_pcm_lib_ioctl,
667 .hw_params = snd_fm801_hw_params,
668 .hw_free = snd_fm801_hw_free,
669 .prepare = snd_fm801_playback_prepare,
670 .trigger = snd_fm801_playback_trigger,
671 .pointer = snd_fm801_playback_pointer,
674 static struct snd_pcm_ops snd_fm801_capture_ops = {
675 .open = snd_fm801_capture_open,
676 .close = snd_fm801_capture_close,
677 .ioctl = snd_pcm_lib_ioctl,
678 .hw_params = snd_fm801_hw_params,
679 .hw_free = snd_fm801_hw_free,
680 .prepare = snd_fm801_capture_prepare,
681 .trigger = snd_fm801_capture_trigger,
682 .pointer = snd_fm801_capture_pointer,
685 static int __devinit snd_fm801_pcm(struct fm801 *chip, int device, struct snd_pcm ** rpcm)
692 if ((err = snd_pcm_new(chip->card, "FM801", device, 1, 1, &pcm)) < 0)
695 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_fm801_playback_ops);
696 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_fm801_capture_ops);
698 pcm->private_data = chip;
700 strcpy(pcm->name, "FM801");
703 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
704 snd_dma_pci_data(chip->pci),
705 chip->multichannel ? 128*1024 : 64*1024, 128*1024);
718 /* 256PCS GPIO numbers */
719 #define TEA_256PCS_DATA 1
720 #define TEA_256PCS_WRITE_ENABLE 2 /* inverted */
721 #define TEA_256PCS_BUS_CLOCK 3
723 static void snd_fm801_tea575x_256pcs_write(struct snd_tea575x *tea, unsigned int val)
725 struct fm801 *chip = tea->private_data;
729 spin_lock_irq(&chip->reg_lock);
730 reg = inw(FM801_REG(chip, GPIO_CTRL));
731 /* use GPIO lines and set write enable bit */
732 reg |= FM801_GPIO_GS(TEA_256PCS_DATA) |
733 FM801_GPIO_GS(TEA_256PCS_WRITE_ENABLE) |
734 FM801_GPIO_GS(TEA_256PCS_BUS_CLOCK);
735 /* all of lines are in the write direction */
736 /* clear data and clock lines */
737 reg &= ~(FM801_GPIO_GD(TEA_256PCS_DATA) |
738 FM801_GPIO_GD(TEA_256PCS_WRITE_ENABLE) |
739 FM801_GPIO_GD(TEA_256PCS_BUS_CLOCK) |
740 FM801_GPIO_GP(TEA_256PCS_DATA) |
741 FM801_GPIO_GP(TEA_256PCS_BUS_CLOCK) |
742 FM801_GPIO_GP(TEA_256PCS_WRITE_ENABLE));
743 outw(reg, FM801_REG(chip, GPIO_CTRL));
748 reg |= FM801_GPIO_GP(TEA_256PCS_DATA);
750 reg &= ~FM801_GPIO_GP(TEA_256PCS_DATA);
751 outw(reg, FM801_REG(chip, GPIO_CTRL));
753 reg |= FM801_GPIO_GP(TEA_256PCS_BUS_CLOCK);
754 outw(reg, FM801_REG(chip, GPIO_CTRL));
755 reg &= ~FM801_GPIO_GP(TEA_256PCS_BUS_CLOCK);
756 outw(reg, FM801_REG(chip, GPIO_CTRL));
760 /* and reset the write enable bit */
761 reg |= FM801_GPIO_GP(TEA_256PCS_WRITE_ENABLE) |
762 FM801_GPIO_GP(TEA_256PCS_DATA);
763 outw(reg, FM801_REG(chip, GPIO_CTRL));
764 spin_unlock_irq(&chip->reg_lock);
767 static unsigned int snd_fm801_tea575x_256pcs_read(struct snd_tea575x *tea)
769 struct fm801 *chip = tea->private_data;
771 unsigned int val = 0;
774 spin_lock_irq(&chip->reg_lock);
775 reg = inw(FM801_REG(chip, GPIO_CTRL));
776 /* use GPIO lines, set data direction to input */
777 reg |= FM801_GPIO_GS(TEA_256PCS_DATA) |
778 FM801_GPIO_GS(TEA_256PCS_WRITE_ENABLE) |
779 FM801_GPIO_GS(TEA_256PCS_BUS_CLOCK) |
780 FM801_GPIO_GD(TEA_256PCS_DATA) |
781 FM801_GPIO_GP(TEA_256PCS_DATA) |
782 FM801_GPIO_GP(TEA_256PCS_WRITE_ENABLE);
783 /* all of lines are in the write direction, except data */
784 /* clear data, write enable and clock lines */
785 reg &= ~(FM801_GPIO_GD(TEA_256PCS_WRITE_ENABLE) |
786 FM801_GPIO_GD(TEA_256PCS_BUS_CLOCK) |
787 FM801_GPIO_GP(TEA_256PCS_BUS_CLOCK));
789 for (i = 0; i < 24; i++) {
790 reg &= ~FM801_GPIO_GP(TEA_256PCS_BUS_CLOCK);
791 outw(reg, FM801_REG(chip, GPIO_CTRL));
793 reg |= FM801_GPIO_GP(TEA_256PCS_BUS_CLOCK);
794 outw(reg, FM801_REG(chip, GPIO_CTRL));
797 if (inw(FM801_REG(chip, GPIO_CTRL)) & FM801_GPIO_GP(TEA_256PCS_DATA))
801 spin_unlock_irq(&chip->reg_lock);
806 /* 256PCPR GPIO numbers */
807 #define TEA_256PCPR_BUS_CLOCK 0
808 #define TEA_256PCPR_DATA 1
809 #define TEA_256PCPR_WRITE_ENABLE 2 /* inverted */
811 static void snd_fm801_tea575x_256pcpr_write(struct snd_tea575x *tea, unsigned int val)
813 struct fm801 *chip = tea->private_data;
817 spin_lock_irq(&chip->reg_lock);
818 reg = inw(FM801_REG(chip, GPIO_CTRL));
819 /* use GPIO lines and set write enable bit */
820 reg |= FM801_GPIO_GS(TEA_256PCPR_DATA) |
821 FM801_GPIO_GS(TEA_256PCPR_WRITE_ENABLE) |
822 FM801_GPIO_GS(TEA_256PCPR_BUS_CLOCK);
823 /* all of lines are in the write direction */
824 /* clear data and clock lines */
825 reg &= ~(FM801_GPIO_GD(TEA_256PCPR_DATA) |
826 FM801_GPIO_GD(TEA_256PCPR_WRITE_ENABLE) |
827 FM801_GPIO_GD(TEA_256PCPR_BUS_CLOCK) |
828 FM801_GPIO_GP(TEA_256PCPR_DATA) |
829 FM801_GPIO_GP(TEA_256PCPR_BUS_CLOCK) |
830 FM801_GPIO_GP(TEA_256PCPR_WRITE_ENABLE));
831 outw(reg, FM801_REG(chip, GPIO_CTRL));
836 reg |= FM801_GPIO_GP(TEA_256PCPR_DATA);
838 reg &= ~FM801_GPIO_GP(TEA_256PCPR_DATA);
839 outw(reg, FM801_REG(chip, GPIO_CTRL));
841 reg |= FM801_GPIO_GP(TEA_256PCPR_BUS_CLOCK);
842 outw(reg, FM801_REG(chip, GPIO_CTRL));
843 reg &= ~FM801_GPIO_GP(TEA_256PCPR_BUS_CLOCK);
844 outw(reg, FM801_REG(chip, GPIO_CTRL));
848 /* and reset the write enable bit */
849 reg |= FM801_GPIO_GP(TEA_256PCPR_WRITE_ENABLE) |
850 FM801_GPIO_GP(TEA_256PCPR_DATA);
851 outw(reg, FM801_REG(chip, GPIO_CTRL));
852 spin_unlock_irq(&chip->reg_lock);
855 static unsigned int snd_fm801_tea575x_256pcpr_read(struct snd_tea575x *tea)
857 struct fm801 *chip = tea->private_data;
859 unsigned int val = 0;
862 spin_lock_irq(&chip->reg_lock);
863 reg = inw(FM801_REG(chip, GPIO_CTRL));
864 /* use GPIO lines, set data direction to input */
865 reg |= FM801_GPIO_GS(TEA_256PCPR_DATA) |
866 FM801_GPIO_GS(TEA_256PCPR_WRITE_ENABLE) |
867 FM801_GPIO_GS(TEA_256PCPR_BUS_CLOCK) |
868 FM801_GPIO_GD(TEA_256PCPR_DATA) |
869 FM801_GPIO_GP(TEA_256PCPR_DATA) |
870 FM801_GPIO_GP(TEA_256PCPR_WRITE_ENABLE);
871 /* all of lines are in the write direction, except data */
872 /* clear data, write enable and clock lines */
873 reg &= ~(FM801_GPIO_GD(TEA_256PCPR_WRITE_ENABLE) |
874 FM801_GPIO_GD(TEA_256PCPR_BUS_CLOCK) |
875 FM801_GPIO_GP(TEA_256PCPR_BUS_CLOCK));
877 for (i = 0; i < 24; i++) {
878 reg &= ~FM801_GPIO_GP(TEA_256PCPR_BUS_CLOCK);
879 outw(reg, FM801_REG(chip, GPIO_CTRL));
881 reg |= FM801_GPIO_GP(TEA_256PCPR_BUS_CLOCK);
882 outw(reg, FM801_REG(chip, GPIO_CTRL));
885 if (inw(FM801_REG(chip, GPIO_CTRL)) & FM801_GPIO_GP(TEA_256PCPR_DATA))
889 spin_unlock_irq(&chip->reg_lock);
894 /* 64PCR GPIO numbers */
895 #define TEA_64PCR_BUS_CLOCK 0
896 #define TEA_64PCR_WRITE_ENABLE 1 /* inverted */
897 #define TEA_64PCR_DATA 2
899 static void snd_fm801_tea575x_64pcr_write(struct snd_tea575x *tea, unsigned int val)
901 struct fm801 *chip = tea->private_data;
905 spin_lock_irq(&chip->reg_lock);
906 reg = inw(FM801_REG(chip, GPIO_CTRL));
907 /* use GPIO lines and set write enable bit */
908 reg |= FM801_GPIO_GS(TEA_64PCR_DATA) |
909 FM801_GPIO_GS(TEA_64PCR_WRITE_ENABLE) |
910 FM801_GPIO_GS(TEA_64PCR_BUS_CLOCK);
911 /* all of lines are in the write direction */
912 /* clear data and clock lines */
913 reg &= ~(FM801_GPIO_GD(TEA_64PCR_DATA) |
914 FM801_GPIO_GD(TEA_64PCR_WRITE_ENABLE) |
915 FM801_GPIO_GD(TEA_64PCR_BUS_CLOCK) |
916 FM801_GPIO_GP(TEA_64PCR_DATA) |
917 FM801_GPIO_GP(TEA_64PCR_BUS_CLOCK) |
918 FM801_GPIO_GP(TEA_64PCR_WRITE_ENABLE));
919 outw(reg, FM801_REG(chip, GPIO_CTRL));
924 reg |= FM801_GPIO_GP(TEA_64PCR_DATA);
926 reg &= ~FM801_GPIO_GP(TEA_64PCR_DATA);
927 outw(reg, FM801_REG(chip, GPIO_CTRL));
929 reg |= FM801_GPIO_GP(TEA_64PCR_BUS_CLOCK);
930 outw(reg, FM801_REG(chip, GPIO_CTRL));
931 reg &= ~FM801_GPIO_GP(TEA_64PCR_BUS_CLOCK);
932 outw(reg, FM801_REG(chip, GPIO_CTRL));
936 /* and reset the write enable bit */
937 reg |= FM801_GPIO_GP(TEA_64PCR_WRITE_ENABLE) |
938 FM801_GPIO_GP(TEA_64PCR_DATA);
939 outw(reg, FM801_REG(chip, GPIO_CTRL));
940 spin_unlock_irq(&chip->reg_lock);
943 static unsigned int snd_fm801_tea575x_64pcr_read(struct snd_tea575x *tea)
945 struct fm801 *chip = tea->private_data;
947 unsigned int val = 0;
950 spin_lock_irq(&chip->reg_lock);
951 reg = inw(FM801_REG(chip, GPIO_CTRL));
952 /* use GPIO lines, set data direction to input */
953 reg |= FM801_GPIO_GS(TEA_64PCR_DATA) |
954 FM801_GPIO_GS(TEA_64PCR_WRITE_ENABLE) |
955 FM801_GPIO_GS(TEA_64PCR_BUS_CLOCK) |
956 FM801_GPIO_GD(TEA_64PCR_DATA) |
957 FM801_GPIO_GP(TEA_64PCR_DATA) |
958 FM801_GPIO_GP(TEA_64PCR_WRITE_ENABLE);
959 /* all of lines are in the write direction, except data */
960 /* clear data, write enable and clock lines */
961 reg &= ~(FM801_GPIO_GD(TEA_64PCR_WRITE_ENABLE) |
962 FM801_GPIO_GD(TEA_64PCR_BUS_CLOCK) |
963 FM801_GPIO_GP(TEA_64PCR_BUS_CLOCK));
965 for (i = 0; i < 24; i++) {
966 reg &= ~FM801_GPIO_GP(TEA_64PCR_BUS_CLOCK);
967 outw(reg, FM801_REG(chip, GPIO_CTRL));
969 reg |= FM801_GPIO_GP(TEA_64PCR_BUS_CLOCK);
970 outw(reg, FM801_REG(chip, GPIO_CTRL));
973 if (inw(FM801_REG(chip, GPIO_CTRL)) & FM801_GPIO_GP(TEA_64PCR_DATA))
977 spin_unlock_irq(&chip->reg_lock);
982 static struct snd_tea575x_ops snd_fm801_tea_ops[3] = {
984 /* 1 = MediaForte 256-PCS */
985 .write = snd_fm801_tea575x_256pcs_write,
986 .read = snd_fm801_tea575x_256pcs_read,
989 /* 2 = MediaForte 256-PCPR */
990 .write = snd_fm801_tea575x_256pcpr_write,
991 .read = snd_fm801_tea575x_256pcpr_read,
994 /* 3 = MediaForte 64-PCR */
995 .write = snd_fm801_tea575x_64pcr_write,
996 .read = snd_fm801_tea575x_64pcr_read,
1005 #define FM801_SINGLE(xname, reg, shift, mask, invert) \
1006 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .info = snd_fm801_info_single, \
1007 .get = snd_fm801_get_single, .put = snd_fm801_put_single, \
1008 .private_value = reg | (shift << 8) | (mask << 16) | (invert << 24) }
1010 static int snd_fm801_info_single(struct snd_kcontrol *kcontrol,
1011 struct snd_ctl_elem_info *uinfo)
1013 int mask = (kcontrol->private_value >> 16) & 0xff;
1015 uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
1017 uinfo->value.integer.min = 0;
1018 uinfo->value.integer.max = mask;
1022 static int snd_fm801_get_single(struct snd_kcontrol *kcontrol,
1023 struct snd_ctl_elem_value *ucontrol)
1025 struct fm801 *chip = snd_kcontrol_chip(kcontrol);
1026 int reg = kcontrol->private_value & 0xff;
1027 int shift = (kcontrol->private_value >> 8) & 0xff;
1028 int mask = (kcontrol->private_value >> 16) & 0xff;
1029 int invert = (kcontrol->private_value >> 24) & 0xff;
1031 ucontrol->value.integer.value[0] = (inw(chip->port + reg) >> shift) & mask;
1033 ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0];
1037 static int snd_fm801_put_single(struct snd_kcontrol *kcontrol,
1038 struct snd_ctl_elem_value *ucontrol)
1040 struct fm801 *chip = snd_kcontrol_chip(kcontrol);
1041 int reg = kcontrol->private_value & 0xff;
1042 int shift = (kcontrol->private_value >> 8) & 0xff;
1043 int mask = (kcontrol->private_value >> 16) & 0xff;
1044 int invert = (kcontrol->private_value >> 24) & 0xff;
1047 val = (ucontrol->value.integer.value[0] & mask);
1050 return snd_fm801_update_bits(chip, reg, mask << shift, val << shift);
1053 #define FM801_DOUBLE(xname, reg, shift_left, shift_right, mask, invert) \
1054 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .info = snd_fm801_info_double, \
1055 .get = snd_fm801_get_double, .put = snd_fm801_put_double, \
1056 .private_value = reg | (shift_left << 8) | (shift_right << 12) | (mask << 16) | (invert << 24) }
1058 static int snd_fm801_info_double(struct snd_kcontrol *kcontrol,
1059 struct snd_ctl_elem_info *uinfo)
1061 int mask = (kcontrol->private_value >> 16) & 0xff;
1063 uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
1065 uinfo->value.integer.min = 0;
1066 uinfo->value.integer.max = mask;
1070 static int snd_fm801_get_double(struct snd_kcontrol *kcontrol,
1071 struct snd_ctl_elem_value *ucontrol)
1073 struct fm801 *chip = snd_kcontrol_chip(kcontrol);
1074 int reg = kcontrol->private_value & 0xff;
1075 int shift_left = (kcontrol->private_value >> 8) & 0x0f;
1076 int shift_right = (kcontrol->private_value >> 12) & 0x0f;
1077 int mask = (kcontrol->private_value >> 16) & 0xff;
1078 int invert = (kcontrol->private_value >> 24) & 0xff;
1080 spin_lock_irq(&chip->reg_lock);
1081 ucontrol->value.integer.value[0] = (inw(chip->port + reg) >> shift_left) & mask;
1082 ucontrol->value.integer.value[1] = (inw(chip->port + reg) >> shift_right) & mask;
1083 spin_unlock_irq(&chip->reg_lock);
1085 ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0];
1086 ucontrol->value.integer.value[1] = mask - ucontrol->value.integer.value[1];
1091 static int snd_fm801_put_double(struct snd_kcontrol *kcontrol,
1092 struct snd_ctl_elem_value *ucontrol)
1094 struct fm801 *chip = snd_kcontrol_chip(kcontrol);
1095 int reg = kcontrol->private_value & 0xff;
1096 int shift_left = (kcontrol->private_value >> 8) & 0x0f;
1097 int shift_right = (kcontrol->private_value >> 12) & 0x0f;
1098 int mask = (kcontrol->private_value >> 16) & 0xff;
1099 int invert = (kcontrol->private_value >> 24) & 0xff;
1100 unsigned short val1, val2;
1102 val1 = ucontrol->value.integer.value[0] & mask;
1103 val2 = ucontrol->value.integer.value[1] & mask;
1108 return snd_fm801_update_bits(chip, reg,
1109 (mask << shift_left) | (mask << shift_right),
1110 (val1 << shift_left ) | (val2 << shift_right));
1113 static int snd_fm801_info_mux(struct snd_kcontrol *kcontrol,
1114 struct snd_ctl_elem_info *uinfo)
1116 static char *texts[5] = {
1117 "AC97 Primary", "FM", "I2S", "PCM", "AC97 Secondary"
1120 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1122 uinfo->value.enumerated.items = 5;
1123 if (uinfo->value.enumerated.item > 4)
1124 uinfo->value.enumerated.item = 4;
1125 strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
1129 static int snd_fm801_get_mux(struct snd_kcontrol *kcontrol,
1130 struct snd_ctl_elem_value *ucontrol)
1132 struct fm801 *chip = snd_kcontrol_chip(kcontrol);
1135 val = inw(FM801_REG(chip, REC_SRC)) & 7;
1138 ucontrol->value.enumerated.item[0] = val;
1142 static int snd_fm801_put_mux(struct snd_kcontrol *kcontrol,
1143 struct snd_ctl_elem_value *ucontrol)
1145 struct fm801 *chip = snd_kcontrol_chip(kcontrol);
1148 if ((val = ucontrol->value.enumerated.item[0]) > 4)
1150 return snd_fm801_update_bits(chip, FM801_REC_SRC, 7, val);
1153 #define FM801_CONTROLS ARRAY_SIZE(snd_fm801_controls)
1155 static struct snd_kcontrol_new snd_fm801_controls[] __devinitdata = {
1156 FM801_DOUBLE("Wave Playback Volume", FM801_PCM_VOL, 0, 8, 31, 1),
1157 FM801_SINGLE("Wave Playback Switch", FM801_PCM_VOL, 15, 1, 1),
1158 FM801_DOUBLE("I2S Playback Volume", FM801_I2S_VOL, 0, 8, 31, 1),
1159 FM801_SINGLE("I2S Playback Switch", FM801_I2S_VOL, 15, 1, 1),
1160 FM801_DOUBLE("FM Playback Volume", FM801_FM_VOL, 0, 8, 31, 1),
1161 FM801_SINGLE("FM Playback Switch", FM801_FM_VOL, 15, 1, 1),
1163 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1164 .name = "Digital Capture Source",
1165 .info = snd_fm801_info_mux,
1166 .get = snd_fm801_get_mux,
1167 .put = snd_fm801_put_mux,
1171 #define FM801_CONTROLS_MULTI ARRAY_SIZE(snd_fm801_controls_multi)
1173 static struct snd_kcontrol_new snd_fm801_controls_multi[] __devinitdata = {
1174 FM801_SINGLE("AC97 2ch->4ch Copy Switch", FM801_CODEC_CTRL, 7, 1, 0),
1175 FM801_SINGLE("AC97 18-bit Switch", FM801_CODEC_CTRL, 10, 1, 0),
1176 FM801_SINGLE(SNDRV_CTL_NAME_IEC958("",CAPTURE,SWITCH), FM801_I2S_MODE, 8, 1, 0),
1177 FM801_SINGLE(SNDRV_CTL_NAME_IEC958("Raw Data ",PLAYBACK,SWITCH), FM801_I2S_MODE, 9, 1, 0),
1178 FM801_SINGLE(SNDRV_CTL_NAME_IEC958("Raw Data ",CAPTURE,SWITCH), FM801_I2S_MODE, 10, 1, 0),
1179 FM801_SINGLE(SNDRV_CTL_NAME_IEC958("",PLAYBACK,SWITCH), FM801_GEN_CTRL, 2, 1, 0),
1182 static void snd_fm801_mixer_free_ac97_bus(struct snd_ac97_bus *bus)
1184 struct fm801 *chip = bus->private_data;
1185 chip->ac97_bus = NULL;
1188 static void snd_fm801_mixer_free_ac97(struct snd_ac97 *ac97)
1190 struct fm801 *chip = ac97->private_data;
1191 if (ac97->num == 0) {
1194 chip->ac97_sec = NULL;
1198 static int __devinit snd_fm801_mixer(struct fm801 *chip)
1200 struct snd_ac97_template ac97;
1203 static struct snd_ac97_bus_ops ops = {
1204 .write = snd_fm801_codec_write,
1205 .read = snd_fm801_codec_read,
1208 if ((err = snd_ac97_bus(chip->card, 0, &ops, chip, &chip->ac97_bus)) < 0)
1210 chip->ac97_bus->private_free = snd_fm801_mixer_free_ac97_bus;
1212 memset(&ac97, 0, sizeof(ac97));
1213 ac97.private_data = chip;
1214 ac97.private_free = snd_fm801_mixer_free_ac97;
1215 if ((err = snd_ac97_mixer(chip->ac97_bus, &ac97, &chip->ac97)) < 0)
1217 if (chip->secondary) {
1219 ac97.addr = chip->secondary_addr;
1220 if ((err = snd_ac97_mixer(chip->ac97_bus, &ac97, &chip->ac97_sec)) < 0)
1223 for (i = 0; i < FM801_CONTROLS; i++)
1224 snd_ctl_add(chip->card, snd_ctl_new1(&snd_fm801_controls[i], chip));
1225 if (chip->multichannel) {
1226 for (i = 0; i < FM801_CONTROLS_MULTI; i++)
1227 snd_ctl_add(chip->card, snd_ctl_new1(&snd_fm801_controls_multi[i], chip));
1233 * initialization routines
1236 static int wait_for_codec(struct fm801 *chip, unsigned int codec_id,
1237 unsigned short reg, unsigned long waits)
1239 unsigned long timeout = jiffies + waits;
1241 outw(FM801_AC97_READ | (codec_id << FM801_AC97_ADDR_SHIFT) | reg,
1242 FM801_REG(chip, AC97_CMD));
1245 if ((inw(FM801_REG(chip, AC97_CMD)) & (FM801_AC97_VALID|FM801_AC97_BUSY))
1246 == FM801_AC97_VALID)
1248 schedule_timeout_uninterruptible(1);
1249 } while (time_after(timeout, jiffies));
1253 static int snd_fm801_chip_init(struct fm801 *chip, int resume)
1256 unsigned short cmdw;
1258 if (tea575x_tuner & 0x0010)
1261 /* codec cold reset + AC'97 warm reset */
1262 outw((1<<5) | (1<<6), FM801_REG(chip, CODEC_CTRL));
1263 inw(FM801_REG(chip, CODEC_CTRL)); /* flush posting data */
1265 outw(0, FM801_REG(chip, CODEC_CTRL));
1267 if (wait_for_codec(chip, 0, AC97_RESET, msecs_to_jiffies(750)) < 0) {
1268 snd_printk(KERN_ERR "Primary AC'97 codec not found\n");
1273 if (chip->multichannel) {
1274 if (chip->secondary_addr) {
1275 wait_for_codec(chip, chip->secondary_addr,
1276 AC97_VENDOR_ID1, msecs_to_jiffies(50));
1278 /* my card has the secondary codec */
1279 /* at address #3, so the loop is inverted */
1280 for (id = 3; id > 0; id--) {
1281 if (! wait_for_codec(chip, id, AC97_VENDOR_ID1,
1282 msecs_to_jiffies(50))) {
1283 cmdw = inw(FM801_REG(chip, AC97_DATA));
1284 if (cmdw != 0xffff && cmdw != 0) {
1285 chip->secondary = 1;
1286 chip->secondary_addr = id;
1293 /* the recovery phase, it seems that probing for non-existing codec might */
1294 /* cause timeout problems */
1295 wait_for_codec(chip, 0, AC97_VENDOR_ID1, msecs_to_jiffies(750));
1299 outw(0x0808, FM801_REG(chip, PCM_VOL));
1300 outw(0x9f1f, FM801_REG(chip, FM_VOL));
1301 outw(0x8808, FM801_REG(chip, I2S_VOL));
1303 /* I2S control - I2S mode */
1304 outw(0x0003, FM801_REG(chip, I2S_MODE));
1306 /* interrupt setup - unmask MPU, PLAYBACK & CAPTURE */
1307 cmdw = inw(FM801_REG(chip, IRQ_MASK));
1309 outw(cmdw, FM801_REG(chip, IRQ_MASK));
1311 /* interrupt clear */
1312 outw(FM801_IRQ_PLAYBACK|FM801_IRQ_CAPTURE|FM801_IRQ_MPU, FM801_REG(chip, IRQ_STATUS));
1318 static int snd_fm801_free(struct fm801 *chip)
1320 unsigned short cmdw;
1325 /* interrupt setup - mask everything */
1326 cmdw = inw(FM801_REG(chip, IRQ_MASK));
1328 outw(cmdw, FM801_REG(chip, IRQ_MASK));
1331 #ifdef TEA575X_RADIO
1332 snd_tea575x_exit(&chip->tea);
1335 free_irq(chip->irq, chip);
1336 pci_release_regions(chip->pci);
1337 pci_disable_device(chip->pci);
1343 static int snd_fm801_dev_free(struct snd_device *device)
1345 struct fm801 *chip = device->device_data;
1346 return snd_fm801_free(chip);
1349 static int __devinit snd_fm801_create(struct snd_card *card,
1350 struct pci_dev * pci,
1352 struct fm801 ** rchip)
1357 static struct snd_device_ops ops = {
1358 .dev_free = snd_fm801_dev_free,
1362 if ((err = pci_enable_device(pci)) < 0)
1364 chip = kzalloc(sizeof(*chip), GFP_KERNEL);
1366 pci_disable_device(pci);
1369 spin_lock_init(&chip->reg_lock);
1373 if ((err = pci_request_regions(pci, "FM801")) < 0) {
1375 pci_disable_device(pci);
1378 chip->port = pci_resource_start(pci, 0);
1379 if (request_irq(pci->irq, snd_fm801_interrupt, IRQF_DISABLED|IRQF_SHARED,
1381 snd_printk(KERN_ERR "unable to grab IRQ %d\n", chip->irq);
1382 snd_fm801_free(chip);
1385 chip->irq = pci->irq;
1386 pci_set_master(pci);
1388 pci_read_config_byte(pci, PCI_REVISION_ID, &rev);
1389 if (rev >= 0xb1) /* FM801-AU */
1390 chip->multichannel = 1;
1392 snd_fm801_chip_init(chip, 0);
1394 if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) {
1395 snd_fm801_free(chip);
1399 snd_card_set_dev(card, &pci->dev);
1401 #ifdef TEA575X_RADIO
1402 if (tea575x_tuner > 0 && (tea575x_tuner & 0x000f) < 4) {
1403 chip->tea.dev_nr = tea575x_tuner >> 16;
1404 chip->tea.card = card;
1405 chip->tea.freq_fixup = 10700;
1406 chip->tea.private_data = chip;
1407 chip->tea.ops = &snd_fm801_tea_ops[(tea575x_tuner & 0x000f) - 1];
1408 snd_tea575x_init(&chip->tea);
1411 outw(0xf800, FM801_REG(chip, GPIO_CTRL));
1419 static int __devinit snd_card_fm801_probe(struct pci_dev *pci,
1420 const struct pci_device_id *pci_id)
1423 struct snd_card *card;
1425 struct snd_opl3 *opl3;
1428 if (dev >= SNDRV_CARDS)
1435 card = snd_card_new(index[dev], id[dev], THIS_MODULE, 0);
1438 if ((err = snd_fm801_create(card, pci, tea575x_tuner[dev], &chip)) < 0) {
1439 snd_card_free(card);
1442 card->private_data = chip;
1444 strcpy(card->driver, "FM801");
1445 strcpy(card->shortname, "ForteMedia FM801-");
1446 strcat(card->shortname, chip->multichannel ? "AU" : "AS");
1447 sprintf(card->longname, "%s at 0x%lx, irq %i",
1448 card->shortname, chip->port, chip->irq);
1450 if (tea575x_tuner[dev] & 0x0010)
1451 goto __fm801_tuner_only;
1453 if ((err = snd_fm801_pcm(chip, 0, NULL)) < 0) {
1454 snd_card_free(card);
1457 if ((err = snd_fm801_mixer(chip)) < 0) {
1458 snd_card_free(card);
1461 if ((err = snd_mpu401_uart_new(card, 0, MPU401_HW_FM801,
1462 FM801_REG(chip, MPU401_DATA),
1463 MPU401_INFO_INTEGRATED,
1464 chip->irq, 0, &chip->rmidi)) < 0) {
1465 snd_card_free(card);
1468 if ((err = snd_opl3_create(card, FM801_REG(chip, OPL3_BANK0),
1469 FM801_REG(chip, OPL3_BANK1),
1470 OPL3_HW_OPL3_FM801, 1, &opl3)) < 0) {
1471 snd_card_free(card);
1474 if ((err = snd_opl3_hwdep_new(opl3, 0, 1, NULL)) < 0) {
1475 snd_card_free(card);
1480 if ((err = snd_card_register(card)) < 0) {
1481 snd_card_free(card);
1484 pci_set_drvdata(pci, card);
1489 static void __devexit snd_card_fm801_remove(struct pci_dev *pci)
1491 snd_card_free(pci_get_drvdata(pci));
1492 pci_set_drvdata(pci, NULL);
1496 static unsigned char saved_regs[] = {
1497 FM801_PCM_VOL, FM801_I2S_VOL, FM801_FM_VOL, FM801_REC_SRC,
1498 FM801_PLY_CTRL, FM801_PLY_COUNT, FM801_PLY_BUF1, FM801_PLY_BUF2,
1499 FM801_CAP_CTRL, FM801_CAP_COUNT, FM801_CAP_BUF1, FM801_CAP_BUF2,
1500 FM801_CODEC_CTRL, FM801_I2S_MODE, FM801_VOLUME, FM801_GEN_CTRL,
1503 static int snd_fm801_suspend(struct pci_dev *pci, pm_message_t state)
1505 struct snd_card *card = pci_get_drvdata(pci);
1506 struct fm801 *chip = card->private_data;
1509 snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);
1510 snd_pcm_suspend_all(chip->pcm);
1511 snd_ac97_suspend(chip->ac97);
1512 snd_ac97_suspend(chip->ac97_sec);
1513 for (i = 0; i < ARRAY_SIZE(saved_regs); i++)
1514 chip->saved_regs[i] = inw(chip->port + saved_regs[i]);
1515 /* FIXME: tea575x suspend */
1517 pci_set_power_state(pci, PCI_D3hot);
1518 pci_disable_device(pci);
1519 pci_save_state(pci);
1523 static int snd_fm801_resume(struct pci_dev *pci)
1525 struct snd_card *card = pci_get_drvdata(pci);
1526 struct fm801 *chip = card->private_data;
1529 pci_restore_state(pci);
1530 pci_enable_device(pci);
1531 pci_set_power_state(pci, PCI_D0);
1532 pci_set_master(pci);
1534 snd_fm801_chip_init(chip, 1);
1535 snd_ac97_resume(chip->ac97);
1536 snd_ac97_resume(chip->ac97_sec);
1537 for (i = 0; i < ARRAY_SIZE(saved_regs); i++)
1538 outw(chip->saved_regs[i], chip->port + saved_regs[i]);
1540 snd_power_change_state(card, SNDRV_CTL_POWER_D0);
1545 static struct pci_driver driver = {
1547 .id_table = snd_fm801_ids,
1548 .probe = snd_card_fm801_probe,
1549 .remove = __devexit_p(snd_card_fm801_remove),
1551 .suspend = snd_fm801_suspend,
1552 .resume = snd_fm801_resume,
1556 static int __init alsa_card_fm801_init(void)
1558 return pci_register_driver(&driver);
1561 static void __exit alsa_card_fm801_exit(void)
1563 pci_unregister_driver(&driver);
1566 module_init(alsa_card_fm801_init)
1567 module_exit(alsa_card_fm801_exit)