err.no Git - linux-2.6/blob - sound/pci/emu10k1/emu10k1_main.c

   1 /*
   2  *  Copyright (c) by Jaroslav Kysela <perex@perex.cz>
   3  *                   Creative Labs, Inc.
   4  *  Routines for control of EMU10K1 chips
   5  *
   6  *  Copyright (c) by James Courtier-Dutton <James@superbug.co.uk>
   7  *      Added support for Audigy 2 Value.
   8  *      Added EMU 1010 support.
   9  *      General bug fixes and enhancements.
  10  *
  11  *
  12  *  BUGS:
  13  *    --
  14  *
  15  *  TODO:
  16  *    --
  17  *
  18  *   This program is free software; you can redistribute it and/or modify
  19  *   it under the terms of the GNU General Public License as published by
  20  *   the Free Software Foundation; either version 2 of the License, or
  21  *   (at your option) any later version.
  22  *
  23  *   This program is distributed in the hope that it will be useful,
  24  *   but WITHOUT ANY WARRANTY; without even the implied warranty of
  25  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  26  *   GNU General Public License for more details.
  27  *
  28  *   You should have received a copy of the GNU General Public License
  29  *   along with this program; if not, write to the Free Software
  30  *   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
  31  *
  32  */
  33
  34 #include <linux/sched.h>
  35 #include <linux/kthread.h>
  36 #include <linux/delay.h>
  37 #include <linux/init.h>
  38 #include <linux/interrupt.h>
  39 #include <linux/pci.h>
  40 #include <linux/slab.h>
  41 #include <linux/vmalloc.h>
  42 #include <linux/mutex.h>
  43
  44
  45 #include <sound/core.h>
  46 #include <sound/emu10k1.h>
  47 #include <linux/firmware.h>
  48 #include "p16v.h"
  49 #include "tina2.h"
  50 #include "p17v.h"
  51
  52
  53 #define HANA_FILENAME "emu/hana.fw"
  54 #define DOCK_FILENAME "emu/audio_dock.fw"
  55 #define EMU1010B_FILENAME "emu/emu1010b.fw"
  56 #define MICRO_DOCK_FILENAME "emu/micro_dock.fw"
  57 #define EMU0404_FILENAME "emu/emu0404.fw"
  58 #define EMU1010_NOTEBOOK_FILENAME "emu/emu1010_notebook.fw"
  59
  60 MODULE_FIRMWARE(HANA_FILENAME);
  61 MODULE_FIRMWARE(DOCK_FILENAME);
  62 MODULE_FIRMWARE(EMU1010B_FILENAME);
  63 MODULE_FIRMWARE(MICRO_DOCK_FILENAME);
  64 MODULE_FIRMWARE(EMU0404_FILENAME);
  65 MODULE_FIRMWARE(EMU1010_NOTEBOOK_FILENAME);
  66
  67
  68 /*************************************************************************
  69  * EMU10K1 init / done
  70  *************************************************************************/
  71
  72 void snd_emu10k1_voice_init(struct snd_emu10k1 * emu, int ch)
  73 {
  74         snd_emu10k1_ptr_write(emu, DCYSUSV, ch, 0);
  75         snd_emu10k1_ptr_write(emu, IP, ch, 0);
  76         snd_emu10k1_ptr_write(emu, VTFT, ch, 0xffff);
  77         snd_emu10k1_ptr_write(emu, CVCF, ch, 0xffff);
  78         snd_emu10k1_ptr_write(emu, PTRX, ch, 0);
  79         snd_emu10k1_ptr_write(emu, CPF, ch, 0);
  80         snd_emu10k1_ptr_write(emu, CCR, ch, 0);
  81
  82         snd_emu10k1_ptr_write(emu, PSST, ch, 0);
  83         snd_emu10k1_ptr_write(emu, DSL, ch, 0x10);
  84         snd_emu10k1_ptr_write(emu, CCCA, ch, 0);
  85         snd_emu10k1_ptr_write(emu, Z1, ch, 0);
  86         snd_emu10k1_ptr_write(emu, Z2, ch, 0);
  87         snd_emu10k1_ptr_write(emu, FXRT, ch, 0x32100000);
  88
  89         snd_emu10k1_ptr_write(emu, ATKHLDM, ch, 0);
  90         snd_emu10k1_ptr_write(emu, DCYSUSM, ch, 0);
  91         snd_emu10k1_ptr_write(emu, IFATN, ch, 0xffff);
  92         snd_emu10k1_ptr_write(emu, PEFE, ch, 0);
  93         snd_emu10k1_ptr_write(emu, FMMOD, ch, 0);
  94         snd_emu10k1_ptr_write(emu, TREMFRQ, ch, 24);    /* 1 Hz */
  95         snd_emu10k1_ptr_write(emu, FM2FRQ2, ch, 24);    /* 1 Hz */
  96         snd_emu10k1_ptr_write(emu, TEMPENV, ch, 0);
  97
  98         /*** these are last so OFF prevents writing ***/
  99         snd_emu10k1_ptr_write(emu, LFOVAL2, ch, 0);
 100         snd_emu10k1_ptr_write(emu, LFOVAL1, ch, 0);
 101         snd_emu10k1_ptr_write(emu, ATKHLDV, ch, 0);
 102         snd_emu10k1_ptr_write(emu, ENVVOL, ch, 0);
 103         snd_emu10k1_ptr_write(emu, ENVVAL, ch, 0);
 104
 105         /* Audigy extra stuffs */
 106         if (emu->audigy) {
 107                 snd_emu10k1_ptr_write(emu, 0x4c, ch, 0); /* ?? */
 108                 snd_emu10k1_ptr_write(emu, 0x4d, ch, 0); /* ?? */
 109                 snd_emu10k1_ptr_write(emu, 0x4e, ch, 0); /* ?? */
 110                 snd_emu10k1_ptr_write(emu, 0x4f, ch, 0); /* ?? */
 111                 snd_emu10k1_ptr_write(emu, A_FXRT1, ch, 0x03020100);
 112                 snd_emu10k1_ptr_write(emu, A_FXRT2, ch, 0x3f3f3f3f);
 113                 snd_emu10k1_ptr_write(emu, A_SENDAMOUNTS, ch, 0);
 114         }
 115 }
 116
 117 static unsigned int spi_dac_init[] = {
 118                 0x00ff,
 119                 0x02ff,
 120                 0x0400,
 121                 0x0520,
 122                 0x0600,
 123                 0x08ff,
 124                 0x0aff,
 125                 0x0cff,
 126                 0x0eff,
 127                 0x10ff,
 128                 0x1200,
 129                 0x1400,
 130                 0x1480,
 131                 0x1800,
 132                 0x1aff,
 133                 0x1cff,
 134                 0x1e00,
 135                 0x0530,
 136                 0x0602,
 137                 0x0622,
 138                 0x1400,
 139 };
 140
 141 static unsigned int i2c_adc_init[][2] = {
 142         { 0x17, 0x00 }, /* Reset */
 143         { 0x07, 0x00 }, /* Timeout */
 144         { 0x0b, 0x22 },  /* Interface control */
 145         { 0x0c, 0x22 },  /* Master mode control */
 146         { 0x0d, 0x08 },  /* Powerdown control */
 147         { 0x0e, 0xcf },  /* Attenuation Left  0x01 = -103dB, 0xff = 24dB */
 148         { 0x0f, 0xcf },  /* Attenuation Right 0.5dB steps */
 149         { 0x10, 0x7b },  /* ALC Control 1 */
 150         { 0x11, 0x00 },  /* ALC Control 2 */
 151         { 0x12, 0x32 },  /* ALC Control 3 */
 152         { 0x13, 0x00 },  /* Noise gate control */
 153         { 0x14, 0xa6 },  /* Limiter control */
 154         { 0x15, ADC_MUX_2 },  /* ADC Mixer control. Mic for Audigy 2 ZS Notebook */
 155 };
 156
 157 static int snd_emu10k1_init(struct snd_emu10k1 *emu, int enable_ir, int resume)
 158 {
 159         unsigned int silent_page;
 160         int ch;
 161         u32 tmp;
 162
 163         /* disable audio and lock cache */
 164         outl(HCFG_LOCKSOUNDCACHE | HCFG_LOCKTANKCACHE_MASK | HCFG_MUTEBUTTONENABLE,
 165              emu->port + HCFG);
 166
 167         /* reset recording buffers */
 168         snd_emu10k1_ptr_write(emu, MICBS, 0, ADCBS_BUFSIZE_NONE);
 169         snd_emu10k1_ptr_write(emu, MICBA, 0, 0);
 170         snd_emu10k1_ptr_write(emu, FXBS, 0, ADCBS_BUFSIZE_NONE);
 171         snd_emu10k1_ptr_write(emu, FXBA, 0, 0);
 172         snd_emu10k1_ptr_write(emu, ADCBS, 0, ADCBS_BUFSIZE_NONE);
 173         snd_emu10k1_ptr_write(emu, ADCBA, 0, 0);
 174
 175         /* disable channel interrupt */
 176         outl(0, emu->port + INTE);
 177         snd_emu10k1_ptr_write(emu, CLIEL, 0, 0);
 178         snd_emu10k1_ptr_write(emu, CLIEH, 0, 0);
 179         snd_emu10k1_ptr_write(emu, SOLEL, 0, 0);
 180         snd_emu10k1_ptr_write(emu, SOLEH, 0, 0);
 181
 182         if (emu->audigy){
 183                 /* set SPDIF bypass mode */
 184                 snd_emu10k1_ptr_write(emu, SPBYPASS, 0, SPBYPASS_FORMAT);
 185                 /* enable rear left + rear right AC97 slots */
 186                 snd_emu10k1_ptr_write(emu, AC97SLOT, 0, AC97SLOT_REAR_RIGHT |
 187                                       AC97SLOT_REAR_LEFT);
 188         }
 189
 190         /* init envelope engine */
 191         for (ch = 0; ch < NUM_G; ch++)
 192                 snd_emu10k1_voice_init(emu, ch);
 193
 194         snd_emu10k1_ptr_write(emu, SPCS0, 0, emu->spdif_bits[0]);
 195         snd_emu10k1_ptr_write(emu, SPCS1, 0, emu->spdif_bits[1]);
 196         snd_emu10k1_ptr_write(emu, SPCS2, 0, emu->spdif_bits[2]);
 197
 198         if (emu->card_capabilities->ca0151_chip) { /* audigy2 */
 199                 /* Hacks for Alice3 to work independent of haP16V driver */
 200                 //Setup SRCMulti_I2S SamplingRate
 201                 tmp = snd_emu10k1_ptr_read(emu, A_SPDIF_SAMPLERATE, 0);
 202                 tmp &= 0xfffff1ff;
 203                 tmp |= (0x2<<9);
 204                 snd_emu10k1_ptr_write(emu, A_SPDIF_SAMPLERATE, 0, tmp);
 205
 206                 /* Setup SRCSel (Enable Spdif,I2S SRCMulti) */
 207                 snd_emu10k1_ptr20_write(emu, SRCSel, 0, 0x14);
 208                 /* Setup SRCMulti Input Audio Enable */
 209                 /* Use 0xFFFFFFFF to enable P16V sounds. */
 210                 snd_emu10k1_ptr20_write(emu, SRCMULTI_ENABLE, 0, 0xFFFFFFFF);
 211
 212                 /* Enabled Phased (8-channel) P16V playback */
 213                 outl(0x0201, emu->port + HCFG2);
 214                 /* Set playback routing. */
 215                 snd_emu10k1_ptr20_write(emu, CAPTURE_P16V_SOURCE, 0, 0x78e4);
 216         }
 217         if (emu->card_capabilities->ca0108_chip) { /* audigy2 Value */
 218                 /* Hacks for Alice3 to work independent of haP16V driver */
 219                 snd_printk(KERN_INFO "Audigy2 value: Special config.\n");
 220                 //Setup SRCMulti_I2S SamplingRate
 221                 tmp = snd_emu10k1_ptr_read(emu, A_SPDIF_SAMPLERATE, 0);
 222                 tmp &= 0xfffff1ff;
 223                 tmp |= (0x2<<9);
 224                 snd_emu10k1_ptr_write(emu, A_SPDIF_SAMPLERATE, 0, tmp);
 225
 226                 /* Setup SRCSel (Enable Spdif,I2S SRCMulti) */
 227                 outl(0x600000, emu->port + 0x20);
 228                 outl(0x14, emu->port + 0x24);
 229
 230                 /* Setup SRCMulti Input Audio Enable */
 231                 outl(0x7b0000, emu->port + 0x20);
 232                 outl(0xFF000000, emu->port + 0x24);
 233
 234                 /* Setup SPDIF Out Audio Enable */
 235                 /* The Audigy 2 Value has a separate SPDIF out,
 236                  * so no need for a mixer switch
 237                  */
 238                 outl(0x7a0000, emu->port + 0x20);
 239                 outl(0xFF000000, emu->port + 0x24);
 240                 tmp = inl(emu->port + A_IOCFG) & ~0x8; /* Clear bit 3 */
 241                 outl(tmp, emu->port + A_IOCFG);
 242         }
 243         if (emu->card_capabilities->spi_dac) { /* Audigy 2 ZS Notebook with DAC Wolfson WM8768/WM8568 */
 244                 int size, n;
 245
 246                 size = ARRAY_SIZE(spi_dac_init);
 247                 for (n = 0; n < size; n++)
 248                         snd_emu10k1_spi_write(emu, spi_dac_init[n]);
 249
 250                 snd_emu10k1_ptr20_write(emu, 0x60, 0, 0x10);
 251                 /* Enable GPIOs
 252                  * GPIO0: Unknown
 253                  * GPIO1: Speakers-enabled.
 254                  * GPIO2: Unknown
 255                  * GPIO3: Unknown
 256                  * GPIO4: IEC958 Output on.
 257                  * GPIO5: Unknown
 258                  * GPIO6: Unknown
 259                  * GPIO7: Unknown
 260                  */
 261                 outl(0x76, emu->port + A_IOCFG); /* Windows uses 0x3f76 */
 262
 263         }
 264         if (emu->card_capabilities->i2c_adc) { /* Audigy 2 ZS Notebook with ADC Wolfson WM8775 */
 265                 int size, n;
 266
 267                 snd_emu10k1_ptr20_write(emu, P17V_I2S_SRC_SEL, 0, 0x2020205f);
 268                 tmp = inl(emu->port + A_IOCFG);
 269                 outl(tmp | 0x4, emu->port + A_IOCFG);  /* Set bit 2 for mic input */
 270                 tmp = inl(emu->port + A_IOCFG);
 271                 size = ARRAY_SIZE(i2c_adc_init);
 272                 for (n = 0; n < size; n++)
 273                         snd_emu10k1_i2c_write(emu, i2c_adc_init[n][0], i2c_adc_init[n][1]);
 274                 for (n=0; n < 4; n++) {
 275                         emu->i2c_capture_volume[n][0]= 0xcf;
 276                         emu->i2c_capture_volume[n][1]= 0xcf;
 277                 }
 278
 279         }
 280
 281
 282         snd_emu10k1_ptr_write(emu, PTB, 0, emu->ptb_pages.addr);
 283         snd_emu10k1_ptr_write(emu, TCB, 0, 0);  /* taken from original driver */
 284         snd_emu10k1_ptr_write(emu, TCBS, 0, 4); /* taken from original driver */
 285
 286         silent_page = (emu->silent_page.addr << 1) | MAP_PTI_MASK;
 287         for (ch = 0; ch < NUM_G; ch++) {
 288                 snd_emu10k1_ptr_write(emu, MAPA, ch, silent_page);
 289                 snd_emu10k1_ptr_write(emu, MAPB, ch, silent_page);
 290         }
 291
 292         if (emu->card_capabilities->emu_model) {
 293                 outl(HCFG_AUTOMUTE_ASYNC |
 294                         HCFG_EMU32_SLAVE |
 295                         HCFG_AUDIOENABLE, emu->port + HCFG);
 296         /*
 297          *  Hokay, setup HCFG
 298          *   Mute Disable Audio = 0
 299          *   Lock Tank Memory = 1
 300          *   Lock Sound Memory = 0
 301          *   Auto Mute = 1
 302          */
 303         } else if (emu->audigy) {
 304                 if (emu->revision == 4) /* audigy2 */
 305                         outl(HCFG_AUDIOENABLE |
 306                              HCFG_AC3ENABLE_CDSPDIF |
 307                              HCFG_AC3ENABLE_GPSPDIF |
 308                              HCFG_AUTOMUTE | HCFG_JOYENABLE, emu->port + HCFG);
 309                 else
 310                         outl(HCFG_AUTOMUTE | HCFG_JOYENABLE, emu->port + HCFG);
 311         /* FIXME: Remove all these emu->model and replace it with a card recognition parameter,
 312          * e.g. card_capabilities->joystick */
 313         } else if (emu->model == 0x20 ||
 314             emu->model == 0xc400 ||
 315             (emu->model == 0x21 && emu->revision < 6))
 316                 outl(HCFG_LOCKTANKCACHE_MASK | HCFG_AUTOMUTE, emu->port + HCFG);
 317         else
 318                 // With on-chip joystick
 319                 outl(HCFG_LOCKTANKCACHE_MASK | HCFG_AUTOMUTE | HCFG_JOYENABLE, emu->port + HCFG);
 320
 321         if (enable_ir) {        /* enable IR for SB Live */
 322                 if (emu->card_capabilities->emu_model) {
 323                         ;  /* Disable all access to A_IOCFG for the emu1010 */
 324                 } else if (emu->card_capabilities->i2c_adc) {
 325                         ;  /* Disable A_IOCFG for Audigy 2 ZS Notebook */
 326                 } else if (emu->audigy) {
 327                         unsigned int reg = inl(emu->port + A_IOCFG);
 328                         outl(reg | A_IOCFG_GPOUT2, emu->port + A_IOCFG);
 329                         udelay(500);
 330                         outl(reg | A_IOCFG_GPOUT1 | A_IOCFG_GPOUT2, emu->port + A_IOCFG);
 331                         udelay(100);
 332                         outl(reg, emu->port + A_IOCFG);
 333                 } else {
 334                         unsigned int reg = inl(emu->port + HCFG);
 335                         outl(reg | HCFG_GPOUT2, emu->port + HCFG);
 336                         udelay(500);
 337                         outl(reg | HCFG_GPOUT1 | HCFG_GPOUT2, emu->port + HCFG);
 338                         udelay(100);
 339                         outl(reg, emu->port + HCFG);
 340                 }
 341         }
 342
 343         if (emu->card_capabilities->emu_model) {
 344                 ;  /* Disable all access to A_IOCFG for the emu1010 */
 345         } else if (emu->card_capabilities->i2c_adc) {
 346                 ;  /* Disable A_IOCFG for Audigy 2 ZS Notebook */
 347         } else if (emu->audigy) {       /* enable analog output */
 348                 unsigned int reg = inl(emu->port + A_IOCFG);
 349                 outl(reg | A_IOCFG_GPOUT0, emu->port + A_IOCFG);
 350         }
 351
 352         return 0;
 353 }
 354
 355 static void snd_emu10k1_audio_enable(struct snd_emu10k1 *emu)
 356 {
 357         /*
 358          *  Enable the audio bit
 359          */
 360         outl(inl(emu->port + HCFG) | HCFG_AUDIOENABLE, emu->port + HCFG);
 361
 362         /* Enable analog/digital outs on audigy */
 363         if (emu->card_capabilities->emu_model) {
 364                 ;  /* Disable all access to A_IOCFG for the emu1010 */
 365         } else if (emu->card_capabilities->i2c_adc) {
 366                 ;  /* Disable A_IOCFG for Audigy 2 ZS Notebook */
 367         } else if (emu->audigy) {
 368                 outl(inl(emu->port + A_IOCFG) & ~0x44, emu->port + A_IOCFG);
 369
 370                 if (emu->card_capabilities->ca0151_chip) { /* audigy2 */
 371                         /* Unmute Analog now.  Set GPO6 to 1 for Apollo.
 372                          * This has to be done after init ALice3 I2SOut beyond 48KHz.
 373                          * So, sequence is important. */
 374                         outl(inl(emu->port + A_IOCFG) | 0x0040, emu->port + A_IOCFG);
 375                 } else if (emu->card_capabilities->ca0108_chip) { /* audigy2 value */
 376                         /* Unmute Analog now. */
 377                         outl(inl(emu->port + A_IOCFG) | 0x0060, emu->port + A_IOCFG);
 378                 } else {
 379                         /* Disable routing from AC97 line out to Front speakers */
 380                         outl(inl(emu->port + A_IOCFG) | 0x0080, emu->port + A_IOCFG);
 381                 }
 382         }
 383
 384 #if 0
 385         {
 386         unsigned int tmp;
 387         /* FIXME: the following routine disables LiveDrive-II !! */
 388         // TOSLink detection
 389         emu->tos_link = 0;
 390         tmp = inl(emu->port + HCFG);
 391         if (tmp & (HCFG_GPINPUT0 | HCFG_GPINPUT1)) {
 392                 outl(tmp|0x800, emu->port + HCFG);
 393                 udelay(50);
 394                 if (tmp != (inl(emu->port + HCFG) & ~0x800)) {
 395                         emu->tos_link = 1;
 396                         outl(tmp, emu->port + HCFG);
 397                 }
 398         }
 399         }
 400 #endif
 401
 402         snd_emu10k1_intr_enable(emu, INTE_PCIERRORENABLE);
 403 }
 404
 405 int snd_emu10k1_done(struct snd_emu10k1 * emu)
 406 {
 407         int ch;
 408
 409         outl(0, emu->port + INTE);
 410
 411         /*
 412          *  Shutdown the chip
 413          */
 414         for (ch = 0; ch < NUM_G; ch++)
 415                 snd_emu10k1_ptr_write(emu, DCYSUSV, ch, 0);
 416         for (ch = 0; ch < NUM_G; ch++) {
 417                 snd_emu10k1_ptr_write(emu, VTFT, ch, 0);
 418                 snd_emu10k1_ptr_write(emu, CVCF, ch, 0);
 419                 snd_emu10k1_ptr_write(emu, PTRX, ch, 0);
 420                 snd_emu10k1_ptr_write(emu, CPF, ch, 0);
 421         }
 422
 423         /* reset recording buffers */
 424         snd_emu10k1_ptr_write(emu, MICBS, 0, 0);
 425         snd_emu10k1_ptr_write(emu, MICBA, 0, 0);
 426         snd_emu10k1_ptr_write(emu, FXBS, 0, 0);
 427         snd_emu10k1_ptr_write(emu, FXBA, 0, 0);
 428         snd_emu10k1_ptr_write(emu, FXWC, 0, 0);
 429         snd_emu10k1_ptr_write(emu, ADCBS, 0, ADCBS_BUFSIZE_NONE);
 430         snd_emu10k1_ptr_write(emu, ADCBA, 0, 0);
 431         snd_emu10k1_ptr_write(emu, TCBS, 0, TCBS_BUFFSIZE_16K);
 432         snd_emu10k1_ptr_write(emu, TCB, 0, 0);
 433         if (emu->audigy)
 434                 snd_emu10k1_ptr_write(emu, A_DBG, 0, A_DBG_SINGLE_STEP);
 435         else
 436                 snd_emu10k1_ptr_write(emu, DBG, 0, EMU10K1_DBG_SINGLE_STEP);
 437
 438         /* disable channel interrupt */
 439         snd_emu10k1_ptr_write(emu, CLIEL, 0, 0);
 440         snd_emu10k1_ptr_write(emu, CLIEH, 0, 0);
 441         snd_emu10k1_ptr_write(emu, SOLEL, 0, 0);
 442         snd_emu10k1_ptr_write(emu, SOLEH, 0, 0);
 443
 444         /* disable audio and lock cache */
 445         outl(HCFG_LOCKSOUNDCACHE | HCFG_LOCKTANKCACHE_MASK | HCFG_MUTEBUTTONENABLE, emu->port + HCFG);
 446         snd_emu10k1_ptr_write(emu, PTB, 0, 0);
 447
 448         return 0;
 449 }
 450
 451 /*************************************************************************
 452  * ECARD functional implementation
 453  *************************************************************************/
 454
 455 /* In A1 Silicon, these bits are in the HC register */
 456 #define HOOKN_BIT               (1L << 12)
 457 #define HANDN_BIT               (1L << 11)
 458 #define PULSEN_BIT              (1L << 10)
 459
 460 #define EC_GDI1                 (1 << 13)
 461 #define EC_GDI0                 (1 << 14)
 462
 463 #define EC_NUM_CONTROL_BITS     20
 464
 465 #define EC_AC3_DATA_SELN        0x0001L
 466 #define EC_EE_DATA_SEL          0x0002L
 467 #define EC_EE_CNTRL_SELN        0x0004L
 468 #define EC_EECLK                0x0008L
 469 #define EC_EECS                 0x0010L
 470 #define EC_EESDO                0x0020L
 471 #define EC_TRIM_CSN             0x0040L
 472 #define EC_TRIM_SCLK            0x0080L
 473 #define EC_TRIM_SDATA           0x0100L
 474 #define EC_TRIM_MUTEN           0x0200L
 475 #define EC_ADCCAL               0x0400L
 476 #define EC_ADCRSTN              0x0800L
 477 #define EC_DACCAL               0x1000L
 478 #define EC_DACMUTEN             0x2000L
 479 #define EC_LEDN                 0x4000L
 480
 481 #define EC_SPDIF0_SEL_SHIFT     15
 482 #define EC_SPDIF1_SEL_SHIFT     17
 483 #define EC_SPDIF0_SEL_MASK      (0x3L << EC_SPDIF0_SEL_SHIFT)
 484 #define EC_SPDIF1_SEL_MASK      (0x7L << EC_SPDIF1_SEL_SHIFT)
 485 #define EC_SPDIF0_SELECT(_x)    (((_x) << EC_SPDIF0_SEL_SHIFT) & EC_SPDIF0_SEL_MASK)
 486 #define EC_SPDIF1_SELECT(_x)    (((_x) << EC_SPDIF1_SEL_SHIFT) & EC_SPDIF1_SEL_MASK)
 487 #define EC_CURRENT_PROM_VERSION 0x01    /* Self-explanatory.  This should
 488                                          * be incremented any time the EEPROM's
 489                                          * format is changed.  */
 490
 491 #define EC_EEPROM_SIZE          0x40    /* ECARD EEPROM has 64 16-bit words */
 492
 493 /* Addresses for special values stored in to EEPROM */
 494 #define EC_PROM_VERSION_ADDR    0x20    /* Address of the current prom version */
 495 #define EC_BOARDREV0_ADDR       0x21    /* LSW of board rev */
 496 #define EC_BOARDREV1_ADDR       0x22    /* MSW of board rev */
 497
 498 #define EC_LAST_PROMFILE_ADDR   0x2f
 499
 500 #define EC_SERIALNUM_ADDR       0x30    /* First word of serial number.  The
 501                                          * can be up to 30 characters in length
 502                                          * and is stored as a NULL-terminated
 503                                          * ASCII string.  Any unused bytes must be
 504                                          * filled with zeros */
 505 #define EC_CHECKSUM_ADDR        0x3f    /* Location at which checksum is stored */
 506
 507
 508 /* Most of this stuff is pretty self-evident.  According to the hardware
 509  * dudes, we need to leave the ADCCAL bit low in order to avoid a DC
 510  * offset problem.  Weird.
 511  */
 512 #define EC_RAW_RUN_MODE         (EC_DACMUTEN | EC_ADCRSTN | EC_TRIM_MUTEN | \
 513                                  EC_TRIM_CSN)
 514
 515
 516 #define EC_DEFAULT_ADC_GAIN     0xC4C4
 517 #define EC_DEFAULT_SPDIF0_SEL   0x0
 518 #define EC_DEFAULT_SPDIF1_SEL   0x4
 519
 520 /**************************************************************************
 521  * @func Clock bits into the Ecard's control latch.  The Ecard uses a
 522  *  control latch will is loaded bit-serially by toggling the Modem control
 523  *  lines from function 2 on the E8010.  This function hides these details
 524  *  and presents the illusion that we are actually writing to a distinct
 525  *  register.
 526  */
 527
 528 static void snd_emu10k1_ecard_write(struct snd_emu10k1 * emu, unsigned int value)
 529 {
 530         unsigned short count;
 531         unsigned int data;
 532         unsigned long hc_port;
 533         unsigned int hc_value;
 534
 535         hc_port = emu->port + HCFG;
 536         hc_value = inl(hc_port) & ~(HOOKN_BIT | HANDN_BIT | PULSEN_BIT);
 537         outl(hc_value, hc_port);
 538
 539         for (count = 0; count < EC_NUM_CONTROL_BITS; count++) {
 540
 541                 /* Set up the value */
 542                 data = ((value & 0x1) ? PULSEN_BIT : 0);
 543                 value >>= 1;
 544
 545                 outl(hc_value | data, hc_port);
 546
 547                 /* Clock the shift register */
 548                 outl(hc_value | data | HANDN_BIT, hc_port);
 549                 outl(hc_value | data, hc_port);
 550         }
 551
 552         /* Latch the bits */
 553         outl(hc_value | HOOKN_BIT, hc_port);
 554         outl(hc_value, hc_port);
 555 }
 556
 557 /**************************************************************************
 558  * @func Set the gain of the ECARD's CS3310 Trim/gain controller.  The
 559  * trim value consists of a 16bit value which is composed of two
 560  * 8 bit gain/trim values, one for the left channel and one for the
 561  * right channel.  The following table maps from the Gain/Attenuation
 562  * value in decibels into the corresponding bit pattern for a single
 563  * channel.
 564  */
 565
 566 static void snd_emu10k1_ecard_setadcgain(struct snd_emu10k1 * emu,
 567                                          unsigned short gain)
 568 {
 569         unsigned int bit;
 570
 571         /* Enable writing to the TRIM registers */
 572         snd_emu10k1_ecard_write(emu, emu->ecard_ctrl & ~EC_TRIM_CSN);
 573
 574         /* Do it again to insure that we meet hold time requirements */
 575         snd_emu10k1_ecard_write(emu, emu->ecard_ctrl & ~EC_TRIM_CSN);
 576
 577         for (bit = (1 << 15); bit; bit >>= 1) {
 578                 unsigned int value;
 579
 580                 value = emu->ecard_ctrl & ~(EC_TRIM_CSN | EC_TRIM_SDATA);
 581
 582                 if (gain & bit)
 583                         value |= EC_TRIM_SDATA;
 584
 585                 /* Clock the bit */
 586                 snd_emu10k1_ecard_write(emu, value);
 587                 snd_emu10k1_ecard_write(emu, value | EC_TRIM_SCLK);
 588                 snd_emu10k1_ecard_write(emu, value);
 589         }
 590
 591         snd_emu10k1_ecard_write(emu, emu->ecard_ctrl);
 592 }
 593
 594 static int snd_emu10k1_ecard_init(struct snd_emu10k1 * emu)
 595 {
 596         unsigned int hc_value;
 597
 598         /* Set up the initial settings */
 599         emu->ecard_ctrl = EC_RAW_RUN_MODE |
 600                           EC_SPDIF0_SELECT(EC_DEFAULT_SPDIF0_SEL) |
 601                           EC_SPDIF1_SELECT(EC_DEFAULT_SPDIF1_SEL);
 602
 603         /* Step 0: Set the codec type in the hardware control register
 604          * and enable audio output */
 605         hc_value = inl(emu->port + HCFG);
 606         outl(hc_value | HCFG_AUDIOENABLE | HCFG_CODECFORMAT_I2S, emu->port + HCFG);
 607         inl(emu->port + HCFG);
 608
 609         /* Step 1: Turn off the led and deassert TRIM_CS */
 610         snd_emu10k1_ecard_write(emu, EC_ADCCAL | EC_LEDN | EC_TRIM_CSN);
 611
 612         /* Step 2: Calibrate the ADC and DAC */
 613         snd_emu10k1_ecard_write(emu, EC_DACCAL | EC_LEDN | EC_TRIM_CSN);
 614
 615         /* Step 3: Wait for awhile;   XXX We can't get away with this
 616          * under a real operating system; we'll need to block and wait that
 617          * way. */
 618         snd_emu10k1_wait(emu, 48000);
 619
 620         /* Step 4: Switch off the DAC and ADC calibration.  Note
 621          * That ADC_CAL is actually an inverted signal, so we assert
 622          * it here to stop calibration.  */
 623         snd_emu10k1_ecard_write(emu, EC_ADCCAL | EC_LEDN | EC_TRIM_CSN);
 624
 625         /* Step 4: Switch into run mode */
 626         snd_emu10k1_ecard_write(emu, emu->ecard_ctrl);
 627
 628         /* Step 5: Set the analog input gain */
 629         snd_emu10k1_ecard_setadcgain(emu, EC_DEFAULT_ADC_GAIN);
 630
 631         return 0;
 632 }
 633
 634 static int snd_emu10k1_cardbus_init(struct snd_emu10k1 * emu)
 635 {
 636         unsigned long special_port;
 637         unsigned int value;
 638
 639         /* Special initialisation routine
 640          * before the rest of the IO-Ports become active.
 641          */
 642         special_port = emu->port + 0x38;
 643         value = inl(special_port);
 644         outl(0x00d00000, special_port);
 645         value = inl(special_port);
 646         outl(0x00d00001, special_port);
 647         value = inl(special_port);
 648         outl(0x00d0005f, special_port);
 649         value = inl(special_port);
 650         outl(0x00d0007f, special_port);
 651         value = inl(special_port);
 652         outl(0x0090007f, special_port);
 653         value = inl(special_port);
 654
 655         snd_emu10k1_ptr20_write(emu, TINA2_VOLUME, 0, 0xfefefefe); /* Defaults to 0x30303030 */
 656         return 0;
 657 }
 658
 659 static int snd_emu1010_load_firmware(struct snd_emu10k1 * emu, const char * filename)
 660 {
 661         int err;
 662         int n, i;
 663         int reg;
 664         int value;
 665         unsigned int write_post;
 666         unsigned long flags;
 667         const struct firmware *fw_entry;
 668
 669         if ((err = request_firmware(&fw_entry, filename, &emu->pci->dev)) != 0) {
 670                 snd_printk(KERN_ERR "firmware: %s not found. Err=%d\n",filename, err);
 671                 return err;
 672         }
 673         snd_printk(KERN_INFO "firmware size=0x%zx\n", fw_entry->size);
 674
 675         /* The FPGA is a Xilinx Spartan IIE XC2S50E */
 676         /* GPIO7 -> FPGA PGMN
 677          * GPIO6 -> FPGA CCLK
 678          * GPIO5 -> FPGA DIN
 679          * FPGA CONFIG OFF -> FPGA PGMN
 680          */
 681         spin_lock_irqsave(&emu->emu_lock, flags);
 682         outl(0x00, emu->port + A_IOCFG); /* Set PGMN low for 1uS. */
 683         write_post = inl(emu->port + A_IOCFG);
 684         udelay(100);
 685         outl(0x80, emu->port + A_IOCFG); /* Leave bit 7 set during netlist setup. */
 686         write_post = inl(emu->port + A_IOCFG);
 687         udelay(100); /* Allow FPGA memory to clean */
 688         for(n = 0; n < fw_entry->size; n++) {
 689                 value=fw_entry->data[n];
 690                 for(i = 0; i < 8; i++) {
 691                         reg = 0x80;
 692                         if (value & 0x1)
 693                                 reg = reg | 0x20;
 694                         value = value >> 1;
 695                         outl(reg, emu->port + A_IOCFG);
 696                         write_post = inl(emu->port + A_IOCFG);
 697                         outl(reg | 0x40, emu->port + A_IOCFG);
 698                         write_post = inl(emu->port + A_IOCFG);
 699                 }
 700         }
 701         /* After programming, set GPIO bit 4 high again. */
 702         outl(0x10, emu->port + A_IOCFG);
 703         write_post = inl(emu->port + A_IOCFG);
 704         spin_unlock_irqrestore(&emu->emu_lock, flags);
 705
 706         release_firmware(fw_entry);
 707         return 0;
 708 }
 709
 710 int emu1010_firmware_thread(void *data) {
 711         struct snd_emu10k1 * emu = data;
 712         int tmp,tmp2;
 713         int reg;
 714         int err;
 715
 716         for (;;) {
 717                 /* Delay to allow Audio Dock to settle */
 718                 msleep_interruptible(1000);
 719                 if (kthread_should_stop())
 720                         break;
 721                 snd_emu1010_fpga_read(emu, EMU_HANA_IRQ_STATUS, &tmp ); /* IRQ Status */
 722                 snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, &reg ); /* OPTIONS: Which cards are attached to the EMU */
 723                 if (reg & EMU_HANA_OPTION_DOCK_OFFLINE) {
 724                         /* Audio Dock attached */
 725                         /* Return to Audio Dock programming mode */
 726                         snd_printk(KERN_INFO "emu1010: Loading Audio Dock Firmware\n");
 727                         snd_emu1010_fpga_write(emu,  EMU_HANA_FPGA_CONFIG, EMU_HANA_FPGA_CONFIG_AUDIODOCK );
 728                         if (emu->card_capabilities->emu_model == 1) {
 729                                 if ((err = snd_emu1010_load_firmware(emu, DOCK_FILENAME)) != 0) {
 730                                         continue;
 731                                 }
 732                         } else if (emu->card_capabilities->emu_model == 2) {
 733                                 if ((err = snd_emu1010_load_firmware(emu, MICRO_DOCK_FILENAME)) != 0) {
 734                                         continue;
 735                                 }
 736                         } else if (emu->card_capabilities->emu_model == 3) {
 737                                 if ((err = snd_emu1010_load_firmware(emu, MICRO_DOCK_FILENAME)) != 0) {
 738                                         continue;
 739                                 }
 740                         }
 741
 742                         snd_emu1010_fpga_write(emu,  EMU_HANA_FPGA_CONFIG, 0 );
 743                         snd_emu1010_fpga_read(emu, EMU_HANA_IRQ_STATUS, &reg );
 744                         snd_printk(KERN_INFO "emu1010: EMU_HANA+DOCK_IRQ_STATUS=0x%x\n",reg);
 745                         /* ID, should read & 0x7f = 0x55 when FPGA programmed. */
 746                         snd_emu1010_fpga_read(emu, EMU_HANA_ID, &reg );
 747                         snd_printk(KERN_INFO "emu1010: EMU_HANA+DOCK_ID=0x%x\n",reg);
 748                         if ((reg & 0x1f) != 0x15) {
 749                                 /* FPGA failed to be programmed */
 750                                 snd_printk(KERN_INFO "emu1010: Loading Audio Dock Firmware file failed, reg=0x%x\n", reg);
 751                                 continue;
 752                         }
 753                         snd_printk(KERN_INFO "emu1010: Audio Dock Firmware loaded\n");
 754                         snd_emu1010_fpga_read(emu, EMU_DOCK_MAJOR_REV, &tmp );
 755                         snd_emu1010_fpga_read(emu, EMU_DOCK_MINOR_REV, &tmp2 );
 756                         snd_printk("Audio Dock ver:%d.%d\n",tmp ,tmp2);
 757                         /* Sync clocking between 1010 and Dock */
 758                         /* Allow DLL to settle */
 759                         msleep(10);
 760                         /* Unmute all. Default is muted after a firmware load */
 761                         snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, EMU_UNMUTE );
 762                 }
 763         }
 764         snd_printk(KERN_INFO "emu1010: firmware thread stopping\n");
 765         return 0;
 766 }
 767
 768 /*
 769  * EMU-1010 - details found out from this driver, official MS Win drivers,
 770  * testing the card:
 771  *
 772  * Audigy2 (aka Alice2):
 773  * ---------------------
 774  *      * communication over PCI
 775  *      * conversion of 32-bit data coming over EMU32 links from HANA FPGA
 776  *        to 2 x 16-bit, using internal DSP instructions
 777  *      * slave mode, clock supplied by HANA
 778  *      * linked to HANA using:
 779  *              32 x 32-bit serial EMU32 output channels
 780  *              16 x EMU32 input channels
 781  *              (?) x I2S I/O channels (?)
 782  *
 783  * FPGA (aka HANA):
 784  * ---------------
 785  *      * provides all (?) physical inputs and outputs of the card
 786  *              (ADC, DAC, SPDIF I/O, ADAT I/O, etc.)
 787  *      * provides clock signal for the card and Alice2
 788  *      * two crystals - for 44.1kHz and 48kHz multiples
 789  *      * provides internal routing of signal sources to signal destinations
 790  *      * inputs/outputs to Alice2 - see above
 791  *
 792  * Current status of the driver:
 793  * ----------------------------
 794  *      * only 44.1/48kHz supported (the MS Win driver supports up to 192 kHz)
 795  *      * PCM device nb. 2:
 796  *              16 x 16-bit playback - snd_emu10k1_fx8010_playback_ops
 797  *              16 x 32-bit capture - snd_emu10k1_capture_efx_ops
 798  */
 799 static int snd_emu10k1_emu1010_init(struct snd_emu10k1 * emu)
 800 {
 801         unsigned int i;
 802         int tmp,tmp2;
 803         int reg;
 804         int err;
 805         const char *filename = NULL;
 806
 807         snd_printk(KERN_INFO "emu1010: Special config.\n");
 808         /* AC97 2.1, Any 16Meg of 4Gig address, Auto-Mute, EMU32 Slave,
 809          * Lock Sound Memory Cache, Lock Tank Memory Cache,
 810          * Mute all codecs.
 811          */
 812         outl(0x0005a00c, emu->port + HCFG);
 813         /* AC97 2.1, Any 16Meg of 4Gig address, Auto-Mute, EMU32 Slave,
 814          * Lock Tank Memory Cache,
 815          * Mute all codecs.
 816          */
 817         outl(0x0005a004, emu->port + HCFG);
 818         /* AC97 2.1, Any 16Meg of 4Gig address, Auto-Mute, EMU32 Slave,
 819          * Mute all codecs.
 820          */
 821         outl(0x0005a000, emu->port + HCFG);
 822         /* AC97 2.1, Any 16Meg of 4Gig address, Auto-Mute, EMU32 Slave,
 823          * Mute all codecs.
 824          */
 825         outl(0x0005a000, emu->port + HCFG);
 826
 827         /* Disable 48Volt power to Audio Dock */
 828         snd_emu1010_fpga_write(emu,  EMU_HANA_DOCK_PWR,  0 );
 829
 830         /* ID, should read & 0x7f = 0x55. (Bit 7 is the IRQ bit) */
 831         snd_emu1010_fpga_read(emu, EMU_HANA_ID, &reg );
 832         snd_printdd("reg1=0x%x\n",reg);
 833         if ((reg & 0x3f) == 0x15) {
 834                 /* FPGA netlist already present so clear it */
 835                 /* Return to programming mode */
 836
 837                 snd_emu1010_fpga_write(emu,  EMU_HANA_FPGA_CONFIG, 0x02 );
 838         }
 839         snd_emu1010_fpga_read(emu, EMU_HANA_ID, &reg );
 840         snd_printdd("reg2=0x%x\n",reg);
 841         if ((reg & 0x3f) == 0x15) {
 842                 /* FPGA failed to return to programming mode */
 843                 snd_printk(KERN_INFO "emu1010: FPGA failed to return to programming mode\n");
 844                 return -ENODEV;
 845         }
 846         snd_printk(KERN_INFO "emu1010: EMU_HANA_ID=0x%x\n",reg);
 847         switch (emu->card_capabilities->emu_model) {
 848         case 1:
 849                 filename = HANA_FILENAME;
 850                 break;
 851         case 2:
 852                 filename = EMU1010B_FILENAME;
 853                 break;
 854         case 3:
 855                 filename = EMU1010_NOTEBOOK_FILENAME;
 856                 break;
 857         case 4:
 858                 filename = EMU0404_FILENAME;
 859                 break;
 860         default:
 861                 filename = NULL;
 862                 return -ENODEV;
 863                 break;
 864         }
 865         snd_printk(KERN_INFO "emu1010: filename %s testing\n", filename);
 866         err = snd_emu1010_load_firmware(emu, filename);
 867         if (err != 0) {
 868                 snd_printk(
 869                         KERN_INFO "emu1010: Loading Firmware file %s failed\n",
 870                         filename);
 871                 return err;
 872         }
 873
 874         /* ID, should read & 0x7f = 0x55 when FPGA programmed. */
 875         snd_emu1010_fpga_read(emu, EMU_HANA_ID, &reg );
 876         if ((reg & 0x3f) != 0x15) {
 877                 /* FPGA failed to be programmed */
 878                 snd_printk(KERN_INFO "emu1010: Loading Hana Firmware file failed, reg=0x%x\n", reg);
 879                 return -ENODEV;
 880         }
 881
 882         snd_printk(KERN_INFO "emu1010: Hana Firmware loaded\n");
 883         snd_emu1010_fpga_read(emu, EMU_HANA_MAJOR_REV, &tmp );
 884         snd_emu1010_fpga_read(emu, EMU_HANA_MINOR_REV, &tmp2 );
 885         snd_printk("Hana ver:%d.%d\n",tmp ,tmp2);
 886         /* Enable 48Volt power to Audio Dock */
 887         snd_emu1010_fpga_write(emu,  EMU_HANA_DOCK_PWR,  EMU_HANA_DOCK_PWR_ON );
 888
 889         snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, &reg );
 890         snd_printk(KERN_INFO "emu1010: Card options=0x%x\n",reg);
 891         snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, &reg );
 892         snd_printk(KERN_INFO "emu1010: Card options=0x%x\n",reg);
 893         snd_emu1010_fpga_read(emu, EMU_HANA_OPTICAL_TYPE, &tmp );
 894         /* Optical -> ADAT I/O  */
 895         /* 0 : SPDIF
 896          * 1 : ADAT
 897          */
 898         emu->emu1010.optical_in = 1; /* IN_ADAT */
 899         emu->emu1010.optical_out = 1; /* IN_ADAT */
 900         tmp = 0;
 901         tmp = (emu->emu1010.optical_in ? EMU_HANA_OPTICAL_IN_ADAT : 0) |
 902                 (emu->emu1010.optical_out ? EMU_HANA_OPTICAL_OUT_ADAT : 0);
 903         snd_emu1010_fpga_write(emu, EMU_HANA_OPTICAL_TYPE, tmp );
 904         snd_emu1010_fpga_read(emu, EMU_HANA_ADC_PADS, &tmp );
 905         /* Set no attenuation on Audio Dock pads. */
 906         snd_emu1010_fpga_write(emu, EMU_HANA_ADC_PADS, 0x00 );
 907         emu->emu1010.adc_pads = 0x00;
 908         snd_emu1010_fpga_read(emu, EMU_HANA_DOCK_MISC, &tmp );
 909         /* Unmute Audio dock DACs, Headphone source DAC-4. */
 910         snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_MISC, 0x30 );
 911         snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_LEDS_2, 0x12 );
 912         snd_emu1010_fpga_read(emu, EMU_HANA_DAC_PADS, &tmp );
 913         /* DAC PADs. */
 914         snd_emu1010_fpga_write(emu, EMU_HANA_DAC_PADS, 0x0f );
 915         emu->emu1010.dac_pads = 0x0f;
 916         snd_emu1010_fpga_read(emu, EMU_HANA_DOCK_MISC, &tmp );
 917         snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_MISC, 0x30 );
 918         snd_emu1010_fpga_read(emu, EMU_HANA_SPDIF_MODE, &tmp );
 919         /* SPDIF Format. Set Consumer mode, 24bit, copy enable */
 920         snd_emu1010_fpga_write(emu, EMU_HANA_SPDIF_MODE, 0x10 );
 921         /* MIDI routing */
 922         snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_IN, 0x19 );
 923         /* Unknown. */
 924         snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_OUT, 0x0c );
 925         /* snd_emu1010_fpga_write(emu, 0x09, 0x0f ); // IRQ Enable: All on */
 926         /* IRQ Enable: All off */
 927         snd_emu1010_fpga_write(emu, EMU_HANA_IRQ_ENABLE, 0x00 );
 928
 929         snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, &reg );
 930         snd_printk(KERN_INFO "emu1010: Card options3=0x%x\n",reg);
 931         /* Default WCLK set to 48kHz. */
 932         snd_emu1010_fpga_write(emu, EMU_HANA_DEFCLOCK, 0x00 );
 933         /* Word Clock source, Internal 48kHz x1 */
 934         snd_emu1010_fpga_write(emu, EMU_HANA_WCLOCK, EMU_HANA_WCLOCK_INT_48K );
 935         //snd_emu1010_fpga_write(emu, EMU_HANA_WCLOCK, EMU_HANA_WCLOCK_INT_48K | EMU_HANA_WCLOCK_4X );
 936         /* Audio Dock LEDs. */
 937         snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_LEDS_2, 0x12 );
 938
 939 #if 0
 940         /* For 96kHz */
 941         snd_emu1010_fpga_link_dst_src_write(emu,
 942                 EMU_DST_ALICE2_EMU32_0, EMU_SRC_HAMOA_ADC_LEFT1);
 943         snd_emu1010_fpga_link_dst_src_write(emu,
 944                 EMU_DST_ALICE2_EMU32_1, EMU_SRC_HAMOA_ADC_RIGHT1);
 945         snd_emu1010_fpga_link_dst_src_write(emu,
 946                 EMU_DST_ALICE2_EMU32_4, EMU_SRC_HAMOA_ADC_LEFT2);
 947         snd_emu1010_fpga_link_dst_src_write(emu,
 948                 EMU_DST_ALICE2_EMU32_5, EMU_SRC_HAMOA_ADC_RIGHT2);
 949 #endif
 950 #if 0
 951         /* For 192kHz */
 952         snd_emu1010_fpga_link_dst_src_write(emu,
 953                 EMU_DST_ALICE2_EMU32_0, EMU_SRC_HAMOA_ADC_LEFT1);
 954         snd_emu1010_fpga_link_dst_src_write(emu,
 955                 EMU_DST_ALICE2_EMU32_1, EMU_SRC_HAMOA_ADC_RIGHT1);
 956         snd_emu1010_fpga_link_dst_src_write(emu,
 957                 EMU_DST_ALICE2_EMU32_2, EMU_SRC_HAMOA_ADC_LEFT2);
 958         snd_emu1010_fpga_link_dst_src_write(emu,
 959                 EMU_DST_ALICE2_EMU32_3, EMU_SRC_HAMOA_ADC_RIGHT2);
 960         snd_emu1010_fpga_link_dst_src_write(emu,
 961                 EMU_DST_ALICE2_EMU32_4, EMU_SRC_HAMOA_ADC_LEFT3);
 962         snd_emu1010_fpga_link_dst_src_write(emu,
 963                 EMU_DST_ALICE2_EMU32_5, EMU_SRC_HAMOA_ADC_RIGHT3);
 964         snd_emu1010_fpga_link_dst_src_write(emu,
 965                 EMU_DST_ALICE2_EMU32_6, EMU_SRC_HAMOA_ADC_LEFT4);
 966         snd_emu1010_fpga_link_dst_src_write(emu,
 967                 EMU_DST_ALICE2_EMU32_7, EMU_SRC_HAMOA_ADC_RIGHT4);
 968 #endif
 969 #if 1
 970         /* For 48kHz */
 971         snd_emu1010_fpga_link_dst_src_write(emu,
 972                 EMU_DST_ALICE2_EMU32_0, EMU_SRC_DOCK_MIC_A1);
 973         snd_emu1010_fpga_link_dst_src_write(emu,
 974                 EMU_DST_ALICE2_EMU32_1, EMU_SRC_DOCK_MIC_B1);
 975         snd_emu1010_fpga_link_dst_src_write(emu,
 976                 EMU_DST_ALICE2_EMU32_2, EMU_SRC_HAMOA_ADC_LEFT2);
 977         snd_emu1010_fpga_link_dst_src_write(emu,
 978                 EMU_DST_ALICE2_EMU32_3, EMU_SRC_HAMOA_ADC_LEFT2);
 979         snd_emu1010_fpga_link_dst_src_write(emu,
 980                 EMU_DST_ALICE2_EMU32_4, EMU_SRC_DOCK_ADC1_LEFT1);
 981         snd_emu1010_fpga_link_dst_src_write(emu,
 982                 EMU_DST_ALICE2_EMU32_5, EMU_SRC_DOCK_ADC1_RIGHT1);
 983         snd_emu1010_fpga_link_dst_src_write(emu,
 984                 EMU_DST_ALICE2_EMU32_6, EMU_SRC_DOCK_ADC2_LEFT1);
 985         snd_emu1010_fpga_link_dst_src_write(emu,
 986                 EMU_DST_ALICE2_EMU32_7, EMU_SRC_DOCK_ADC2_RIGHT1);
 987         /* Pavel Hofman - setting defaults for 8 more capture channels
 988          * Defaults only, users will set their own values anyways, let's
 989          * just copy/paste.
 990          */
 991
 992         snd_emu1010_fpga_link_dst_src_write(emu,
 993                 EMU_DST_ALICE2_EMU32_8, EMU_SRC_DOCK_MIC_A1);
 994         snd_emu1010_fpga_link_dst_src_write(emu,
 995                 EMU_DST_ALICE2_EMU32_9, EMU_SRC_DOCK_MIC_B1);
 996         snd_emu1010_fpga_link_dst_src_write(emu,
 997                 EMU_DST_ALICE2_EMU32_A, EMU_SRC_HAMOA_ADC_LEFT2);
 998         snd_emu1010_fpga_link_dst_src_write(emu,
 999                 EMU_DST_ALICE2_EMU32_B, EMU_SRC_HAMOA_ADC_LEFT2);
1000         snd_emu1010_fpga_link_dst_src_write(emu,
1001                 EMU_DST_ALICE2_EMU32_C, EMU_SRC_DOCK_ADC1_LEFT1);
1002         snd_emu1010_fpga_link_dst_src_write(emu,
1003                 EMU_DST_ALICE2_EMU32_D, EMU_SRC_DOCK_ADC1_RIGHT1);
1004         snd_emu1010_fpga_link_dst_src_write(emu,
1005                 EMU_DST_ALICE2_EMU32_E, EMU_SRC_DOCK_ADC2_LEFT1);
1006         snd_emu1010_fpga_link_dst_src_write(emu,
1007                 EMU_DST_ALICE2_EMU32_F, EMU_SRC_DOCK_ADC2_RIGHT1);
1008 #endif
1009 #if 0
1010         /* Original */
1011         snd_emu1010_fpga_link_dst_src_write(emu,
1012                 EMU_DST_ALICE2_EMU32_4, EMU_SRC_HANA_ADAT);
1013         snd_emu1010_fpga_link_dst_src_write(emu,
1014                 EMU_DST_ALICE2_EMU32_5, EMU_SRC_HANA_ADAT + 1);
1015         snd_emu1010_fpga_link_dst_src_write(emu,
1016                 EMU_DST_ALICE2_EMU32_6, EMU_SRC_HANA_ADAT + 2);
1017         snd_emu1010_fpga_link_dst_src_write(emu,
1018                 EMU_DST_ALICE2_EMU32_7, EMU_SRC_HANA_ADAT + 3);
1019         snd_emu1010_fpga_link_dst_src_write(emu,
1020                 EMU_DST_ALICE2_EMU32_8, EMU_SRC_HANA_ADAT + 4);
1021         snd_emu1010_fpga_link_dst_src_write(emu,
1022                 EMU_DST_ALICE2_EMU32_9, EMU_SRC_HANA_ADAT + 5);
1023         snd_emu1010_fpga_link_dst_src_write(emu,
1024                 EMU_DST_ALICE2_EMU32_A, EMU_SRC_HANA_ADAT + 6);
1025         snd_emu1010_fpga_link_dst_src_write(emu,
1026                 EMU_DST_ALICE2_EMU32_B, EMU_SRC_HANA_ADAT + 7);
1027         snd_emu1010_fpga_link_dst_src_write(emu,
1028                 EMU_DST_ALICE2_EMU32_C, EMU_SRC_DOCK_MIC_A1);
1029         snd_emu1010_fpga_link_dst_src_write(emu,
1030                 EMU_DST_ALICE2_EMU32_D, EMU_SRC_DOCK_MIC_B1);
1031         snd_emu1010_fpga_link_dst_src_write(emu,
1032                 EMU_DST_ALICE2_EMU32_E, EMU_SRC_HAMOA_ADC_LEFT2);
1033         snd_emu1010_fpga_link_dst_src_write(emu,
1034                 EMU_DST_ALICE2_EMU32_F, EMU_SRC_HAMOA_ADC_LEFT2);
1035 #endif
1036         for (i = 0;i < 0x20; i++ ) {
1037                 /* AudioDock Elink <-  Silence */
1038                 snd_emu1010_fpga_link_dst_src_write(emu, 0x0100+i, EMU_SRC_SILENCE);
1039         }
1040         for (i = 0;i < 4; i++) {
1041                 /* Hana SPDIF Out <- Silence */
1042                 snd_emu1010_fpga_link_dst_src_write(emu, 0x0200+i, EMU_SRC_SILENCE);
1043         }
1044         for (i = 0;i < 7; i++) {
1045                 /* Hamoa DAC <- Silence */
1046                 snd_emu1010_fpga_link_dst_src_write(emu, 0x0300+i, EMU_SRC_SILENCE);
1047         }
1048         for (i = 0;i < 7; i++) {
1049                 /* Hana ADAT Out <- Silence */
1050                 snd_emu1010_fpga_link_dst_src_write(emu, EMU_DST_HANA_ADAT + i, EMU_SRC_SILENCE);
1051         }
1052         snd_emu1010_fpga_link_dst_src_write(emu,
1053                 EMU_DST_ALICE_I2S0_LEFT, EMU_SRC_DOCK_ADC1_LEFT1);
1054         snd_emu1010_fpga_link_dst_src_write(emu,
1055                 EMU_DST_ALICE_I2S0_RIGHT, EMU_SRC_DOCK_ADC1_RIGHT1);
1056         snd_emu1010_fpga_link_dst_src_write(emu,
1057                 EMU_DST_ALICE_I2S1_LEFT, EMU_SRC_DOCK_ADC2_LEFT1);
1058         snd_emu1010_fpga_link_dst_src_write(emu,
1059                 EMU_DST_ALICE_I2S1_RIGHT, EMU_SRC_DOCK_ADC2_RIGHT1);
1060         snd_emu1010_fpga_link_dst_src_write(emu,
1061                 EMU_DST_ALICE_I2S2_LEFT, EMU_SRC_DOCK_ADC3_LEFT1);
1062         snd_emu1010_fpga_link_dst_src_write(emu,
1063                 EMU_DST_ALICE_I2S2_RIGHT, EMU_SRC_DOCK_ADC3_RIGHT1);
1064         snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, 0x01 ); // Unmute all
1065
1066         snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, &tmp );
1067
1068         /* AC97 1.03, Any 32Meg of 2Gig address, Auto-Mute, EMU32 Slave,
1069          * Lock Sound Memory Cache, Lock Tank Memory Cache,
1070          * Mute all codecs.
1071          */
1072         outl(0x0000a000, emu->port + HCFG);
1073         /* AC97 1.03, Any 32Meg of 2Gig address, Auto-Mute, EMU32 Slave,
1074          * Lock Sound Memory Cache, Lock Tank Memory Cache,
1075          * Un-Mute all codecs.
1076          */
1077         outl(0x0000a001, emu->port + HCFG);
1078
1079         /* Initial boot complete. Now patches */
1080
1081         snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, &tmp );
1082         snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_IN, 0x19 ); /* MIDI Route */
1083         snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_OUT, 0x0c ); /* Unknown */
1084         snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_IN, 0x19 ); /* MIDI Route */
1085         snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_OUT, 0x0c ); /* Unknown */
1086         snd_emu1010_fpga_read(emu, EMU_HANA_SPDIF_MODE, &tmp );
1087         snd_emu1010_fpga_write(emu, EMU_HANA_SPDIF_MODE, 0x10 ); /* SPDIF Format spdif  (or 0x11 for aes/ebu) */
1088
1089         /* Start Micro/Audio Dock firmware loader thread */
1090         emu->emu1010.firmware_thread = kthread_create(&emu1010_firmware_thread,
1091                                    emu,
1092                                    "emu1010_firmware");
1093         wake_up_process(emu->emu1010.firmware_thread);
1094
1095 #if 0
1096         snd_emu1010_fpga_link_dst_src_write(emu,
1097                 EMU_DST_HAMOA_DAC_LEFT1, EMU_SRC_ALICE_EMU32B + 2); /* ALICE2 bus 0xa2 */
1098         snd_emu1010_fpga_link_dst_src_write(emu,
1099                 EMU_DST_HAMOA_DAC_RIGHT1, EMU_SRC_ALICE_EMU32B + 3); /* ALICE2 bus 0xa3 */
1100         snd_emu1010_fpga_link_dst_src_write(emu,
1101                 EMU_DST_HANA_SPDIF_LEFT1, EMU_SRC_ALICE_EMU32A + 2); /* ALICE2 bus 0xb2 */
1102         snd_emu1010_fpga_link_dst_src_write(emu,
1103                 EMU_DST_HANA_SPDIF_RIGHT1, EMU_SRC_ALICE_EMU32A + 3); /* ALICE2 bus 0xb3 */
1104 #endif
1105         /* Default outputs */
1106         if (emu->card_capabilities->emu_model == 3) {
1107                 /* 1616(M) cardbus default outputs */
1108                 /* ALICE2 bus 0xa0 */
1109                 snd_emu1010_fpga_link_dst_src_write(emu,
1110                         EMU_DST_DOCK_DAC1_LEFT1, EMU_SRC_ALICE_EMU32A + 0);
1111                 emu->emu1010.output_source[0] = 17;
1112                 snd_emu1010_fpga_link_dst_src_write(emu,
1113                         EMU_DST_DOCK_DAC1_RIGHT1, EMU_SRC_ALICE_EMU32A + 1);
1114                 emu->emu1010.output_source[1] = 18;
1115                 snd_emu1010_fpga_link_dst_src_write(emu,
1116                         EMU_DST_DOCK_DAC2_LEFT1, EMU_SRC_ALICE_EMU32A + 2);
1117                 emu->emu1010.output_source[2] = 19;
1118                 snd_emu1010_fpga_link_dst_src_write(emu,
1119                         EMU_DST_DOCK_DAC2_RIGHT1, EMU_SRC_ALICE_EMU32A + 3);
1120                 emu->emu1010.output_source[3] = 20;
1121                 snd_emu1010_fpga_link_dst_src_write(emu,
1122                         EMU_DST_DOCK_DAC3_LEFT1, EMU_SRC_ALICE_EMU32A + 4);
1123                 emu->emu1010.output_source[4] = 21;
1124                 snd_emu1010_fpga_link_dst_src_write(emu,
1125                         EMU_DST_DOCK_DAC3_RIGHT1, EMU_SRC_ALICE_EMU32A + 5);
1126                 emu->emu1010.output_source[5] = 22;
1127                 /* ALICE2 bus 0xa0 */
1128                 snd_emu1010_fpga_link_dst_src_write(emu,
1129                         EMU_DST_MANA_DAC_LEFT, EMU_SRC_ALICE_EMU32A + 0);
1130                 emu->emu1010.output_source[16] = 17;
1131                 snd_emu1010_fpga_link_dst_src_write(emu,
1132                         EMU_DST_MANA_DAC_RIGHT, EMU_SRC_ALICE_EMU32A + 1);
1133                 emu->emu1010.output_source[17] = 18;
1134         } else {
1135                 /* ALICE2 bus 0xa0 */
1136                 snd_emu1010_fpga_link_dst_src_write(emu,
1137                         EMU_DST_DOCK_DAC1_LEFT1, EMU_SRC_ALICE_EMU32A + 0);
1138                 emu->emu1010.output_source[0] = 21;
1139                 snd_emu1010_fpga_link_dst_src_write(emu,
1140                         EMU_DST_DOCK_DAC1_RIGHT1, EMU_SRC_ALICE_EMU32A + 1);
1141                 emu->emu1010.output_source[1] = 22;
1142                 snd_emu1010_fpga_link_dst_src_write(emu,
1143                         EMU_DST_DOCK_DAC2_LEFT1, EMU_SRC_ALICE_EMU32A + 2);
1144                 emu->emu1010.output_source[2] = 23;
1145                 snd_emu1010_fpga_link_dst_src_write(emu,
1146                         EMU_DST_DOCK_DAC2_RIGHT1, EMU_SRC_ALICE_EMU32A + 3);
1147                 emu->emu1010.output_source[3] = 24;
1148                 snd_emu1010_fpga_link_dst_src_write(emu,
1149                         EMU_DST_DOCK_DAC3_LEFT1, EMU_SRC_ALICE_EMU32A + 4);
1150                 emu->emu1010.output_source[4] = 25;
1151                 snd_emu1010_fpga_link_dst_src_write(emu,
1152                         EMU_DST_DOCK_DAC3_RIGHT1, EMU_SRC_ALICE_EMU32A + 5);
1153                 emu->emu1010.output_source[5] = 26;
1154                 snd_emu1010_fpga_link_dst_src_write(emu,
1155                         EMU_DST_DOCK_DAC4_LEFT1, EMU_SRC_ALICE_EMU32A + 6);
1156                 emu->emu1010.output_source[6] = 27;
1157                 snd_emu1010_fpga_link_dst_src_write(emu,
1158                         EMU_DST_DOCK_DAC4_RIGHT1, EMU_SRC_ALICE_EMU32A + 7);
1159                 emu->emu1010.output_source[7] = 28;
1160                 /* ALICE2 bus 0xa0 */
1161                 snd_emu1010_fpga_link_dst_src_write(emu,
1162                         EMU_DST_DOCK_PHONES_LEFT1, EMU_SRC_ALICE_EMU32A + 0);
1163                 emu->emu1010.output_source[8] = 21;
1164                 snd_emu1010_fpga_link_dst_src_write(emu,
1165                         EMU_DST_DOCK_PHONES_RIGHT1, EMU_SRC_ALICE_EMU32A + 1);
1166                 emu->emu1010.output_source[9] = 22;
1167                 /* ALICE2 bus 0xa0 */
1168                 snd_emu1010_fpga_link_dst_src_write(emu,
1169                         EMU_DST_DOCK_SPDIF_LEFT1, EMU_SRC_ALICE_EMU32A + 0);
1170                 emu->emu1010.output_source[10] = 21;
1171                 snd_emu1010_fpga_link_dst_src_write(emu,
1172                         EMU_DST_DOCK_SPDIF_RIGHT1, EMU_SRC_ALICE_EMU32A + 1);
1173                 emu->emu1010.output_source[11] = 22;
1174                 /* ALICE2 bus 0xa0 */
1175                 snd_emu1010_fpga_link_dst_src_write(emu,
1176                         EMU_DST_HANA_SPDIF_LEFT1, EMU_SRC_ALICE_EMU32A + 0);
1177                 emu->emu1010.output_source[12] = 21;
1178                 snd_emu1010_fpga_link_dst_src_write(emu,
1179                         EMU_DST_HANA_SPDIF_RIGHT1, EMU_SRC_ALICE_EMU32A + 1);
1180                 emu->emu1010.output_source[13] = 22;
1181                 /* ALICE2 bus 0xa0 */
1182                 snd_emu1010_fpga_link_dst_src_write(emu,
1183                         EMU_DST_HAMOA_DAC_LEFT1, EMU_SRC_ALICE_EMU32A + 0);
1184                 emu->emu1010.output_source[14] = 21;
1185                 snd_emu1010_fpga_link_dst_src_write(emu,
1186                         EMU_DST_HAMOA_DAC_RIGHT1, EMU_SRC_ALICE_EMU32A + 1);
1187                 emu->emu1010.output_source[15] = 22;
1188                 /* ALICE2 bus 0xa0 */
1189                 snd_emu1010_fpga_link_dst_src_write(emu,
1190                         EMU_DST_HANA_ADAT, EMU_SRC_ALICE_EMU32A + 0);
1191                 emu->emu1010.output_source[16] = 21;
1192                 snd_emu1010_fpga_link_dst_src_write(emu,
1193                         EMU_DST_HANA_ADAT + 1, EMU_SRC_ALICE_EMU32A + 1);
1194                 emu->emu1010.output_source[17] = 22;
1195                 snd_emu1010_fpga_link_dst_src_write(emu,
1196                         EMU_DST_HANA_ADAT + 2, EMU_SRC_ALICE_EMU32A + 2);
1197                 emu->emu1010.output_source[18] = 23;
1198                 snd_emu1010_fpga_link_dst_src_write(emu,
1199                         EMU_DST_HANA_ADAT + 3, EMU_SRC_ALICE_EMU32A + 3);
1200                 emu->emu1010.output_source[19] = 24;
1201                 snd_emu1010_fpga_link_dst_src_write(emu,
1202                         EMU_DST_HANA_ADAT + 4, EMU_SRC_ALICE_EMU32A + 4);
1203                 emu->emu1010.output_source[20] = 25;
1204                 snd_emu1010_fpga_link_dst_src_write(emu,
1205                         EMU_DST_HANA_ADAT + 5, EMU_SRC_ALICE_EMU32A + 5);
1206                 emu->emu1010.output_source[21] = 26;
1207                 snd_emu1010_fpga_link_dst_src_write(emu,
1208                         EMU_DST_HANA_ADAT + 6, EMU_SRC_ALICE_EMU32A + 6);
1209                 emu->emu1010.output_source[22] = 27;
1210                 snd_emu1010_fpga_link_dst_src_write(emu,
1211                         EMU_DST_HANA_ADAT + 7, EMU_SRC_ALICE_EMU32A + 7);
1212                 emu->emu1010.output_source[23] = 28;
1213         }
1214         /* TEMP: Select SPDIF in/out */
1215         //snd_emu1010_fpga_write(emu, EMU_HANA_OPTICAL_TYPE, 0x0); /* Output spdif */
1216
1217         /* TEMP: Select 48kHz SPDIF out */
1218         snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, 0x0); /* Mute all */
1219         snd_emu1010_fpga_write(emu, EMU_HANA_DEFCLOCK, 0x0); /* Default fallback clock 48kHz */
1220         /* Word Clock source, Internal 48kHz x1 */
1221         snd_emu1010_fpga_write(emu, EMU_HANA_WCLOCK, EMU_HANA_WCLOCK_INT_48K );
1222         //snd_emu1010_fpga_write(emu, EMU_HANA_WCLOCK, EMU_HANA_WCLOCK_INT_48K | EMU_HANA_WCLOCK_4X );
1223         emu->emu1010.internal_clock = 1; /* 48000 */
1224         snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_LEDS_2, 0x12);/* Set LEDs on Audio Dock */
1225         snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, 0x1); /* Unmute all */
1226         //snd_emu1010_fpga_write(emu, 0x7, 0x0); /* Mute all */
1227         //snd_emu1010_fpga_write(emu, 0x7, 0x1); /* Unmute all */
1228         //snd_emu1010_fpga_write(emu, 0xe, 0x12); /* Set LEDs on Audio Dock */
1229
1230         return 0;
1231 }
1232 /*
1233  *  Create the EMU10K1 instance
1234  */
1235
1236 #ifdef CONFIG_PM
1237 static int alloc_pm_buffer(struct snd_emu10k1 *emu);
1238 static void free_pm_buffer(struct snd_emu10k1 *emu);
1239 #endif
1240
1241 static int snd_emu10k1_free(struct snd_emu10k1 *emu)
1242 {
1243         if (emu->port) {        /* avoid access to already used hardware */
1244                 snd_emu10k1_fx8010_tram_setup(emu, 0);
1245                 snd_emu10k1_done(emu);
1246                 /* remove reserved page */
1247                 if (emu->reserved_page) {
1248                         snd_emu10k1_synth_free(emu, (struct snd_util_memblk *)emu->reserved_page);
1249                         emu->reserved_page = NULL;
1250                 }
1251                 snd_emu10k1_free_efx(emu);
1252         }
1253         if (emu->card_capabilities->emu_model == 1) {
1254                 /* Disable 48Volt power to Audio Dock */
1255                 snd_emu1010_fpga_write(emu,  EMU_HANA_DOCK_PWR,  0 );
1256         }
1257         if (emu->card_capabilities->emu_model)
1258                 kthread_stop(emu->emu1010.firmware_thread);
1259         if (emu->memhdr)
1260                 snd_util_memhdr_free(emu->memhdr);
1261         if (emu->silent_page.area)
1262                 snd_dma_free_pages(&emu->silent_page);
1263         if (emu->ptb_pages.area)
1264                 snd_dma_free_pages(&emu->ptb_pages);
1265         vfree(emu->page_ptr_table);
1266         vfree(emu->page_addr_table);
1267 #ifdef CONFIG_PM
1268         free_pm_buffer(emu);
1269 #endif
1270         if (emu->irq >= 0)
1271                 free_irq(emu->irq, emu);
1272         if (emu->port)
1273                 pci_release_regions(emu->pci);
1274         if (emu->card_capabilities->ca0151_chip) /* P16V */
1275                 snd_p16v_free(emu);
1276         pci_disable_device(emu->pci);
1277         kfree(emu);
1278         return 0;
1279 }
1280
1281 static int snd_emu10k1_dev_free(struct snd_device *device)
1282 {
1283         struct snd_emu10k1 *emu = device->device_data;
1284         return snd_emu10k1_free(emu);
1285 }
1286
1287 static struct snd_emu_chip_details emu_chip_details[] = {
1288         /* Audigy 2 Value AC3 out does not work yet. Need to find out how to turn off interpolators.*/
1289         /* Tested by James@superbug.co.uk 3rd July 2005 */
1290         /* DSP: CA0108-IAT
1291          * DAC: CS4382-KQ
1292          * ADC: Philips 1361T
1293          * AC97: STAC9750
1294          * CA0151: None
1295          */
1296         {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x10011102,
1297          .driver = "Audigy2", .name = "Audigy 2 Value [SB0400]",
1298          .id = "Audigy2",
1299          .emu10k2_chip = 1,
1300          .ca0108_chip = 1,
1301          .spk71 = 1,
1302          .ac97_chip = 1} ,
1303         /* Audigy4 (Not PRO) SB0610 */
1304         /* Tested by James@superbug.co.uk 4th April 2006 */
1305         /* A_IOCFG bits
1306          * Output
1307          * 0: ?
1308          * 1: ?
1309          * 2: ?
1310          * 3: 0 - Digital Out, 1 - Line in
1311          * 4: ?
1312          * 5: ?
1313          * 6: ?
1314          * 7: ?
1315          * Input
1316          * 8: ?
1317          * 9: ?
1318          * A: Green jack sense (Front)
1319          * B: ?
1320          * C: Black jack sense (Rear/Side Right)
1321          * D: Yellow jack sense (Center/LFE/Side Left)
1322          * E: ?
1323          * F: ?
1324          *
1325          * Digital Out/Line in switch using A_IOCFG bit 3 (0x08)
1326          * 0 - Digital Out
1327          * 1 - Line in
1328          */
1329         /* Mic input not tested.
1330          * Analog CD input not tested
1331          * Digital Out not tested.
1332          * Line in working.
1333          * Audio output 5.1 working. Side outputs not working.
1334          */
1335         /* DSP: CA10300-IAT LF
1336          * DAC: Cirrus Logic CS4382-KQZ
1337          * ADC: Philips 1361T
1338          * AC97: Sigmatel STAC9750
1339          * CA0151: None
1340          */
1341         {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x10211102,
1342          .driver = "Audigy2", .name = "Audigy 4 [SB0610]",
1343          .id = "Audigy2",
1344          .emu10k2_chip = 1,
1345          .ca0108_chip = 1,
1346          .spk71 = 1,
1347          .adc_1361t = 1,  /* 24 bit capture instead of 16bit */
1348          .ac97_chip = 1} ,
1349         /* Audigy 2 ZS Notebook Cardbus card.*/
1350         /* Tested by James@superbug.co.uk 6th November 2006 */
1351         /* Audio output 7.1/Headphones working.
1352          * Digital output working. (AC3 not checked, only PCM)
1353          * Audio Mic/Line inputs working.
1354          * Digital input not tested.
1355          */
1356         /* DSP: Tina2
1357          * DAC: Wolfson WM8768/WM8568
1358          * ADC: Wolfson WM8775
1359          * AC97: None
1360          * CA0151: None
1361          */
1362         /* Tested by James@superbug.co.uk 4th April 2006 */
1363         /* A_IOCFG bits
1364          * Output
1365          * 0: Not Used
1366          * 1: 0 = Mute all the 7.1 channel out. 1 = unmute.
1367          * 2: Analog input 0 = line in, 1 = mic in
1368          * 3: Not Used
1369          * 4: Digital output 0 = off, 1 = on.
1370          * 5: Not Used
1371          * 6: Not Used
1372          * 7: Not Used
1373          * Input
1374          *      All bits 1 (0x3fxx) means nothing plugged in.
1375          * 8-9: 0 = Line in/Mic, 2 = Optical in, 3 = Nothing.
1376          * A-B: 0 = Headphones, 2 = Optical out, 3 = Nothing.
1377          * C-D: 2 = Front/Rear/etc, 3 = nothing.
1378          * E-F: Always 0
1379          *
1380          */
1381         {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x20011102,
1382          .driver = "Audigy2", .name = "Audigy 2 ZS Notebook [SB0530]",
1383          .id = "Audigy2",
1384          .emu10k2_chip = 1,
1385          .ca0108_chip = 1,
1386          .ca_cardbus_chip = 1,
1387          .spi_dac = 1,
1388          .i2c_adc = 1,
1389          .spk71 = 1} ,
1390         /* Tested by James@superbug.co.uk 20-3-2007. */
1391         {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x40021102,
1392          .driver = "Audigy2", .name = "E-mu 0404 [4002]",
1393          .id = "EMU0404",
1394          .emu10k2_chip = 1,
1395          .ca0102_chip = 1,
1396          .spk71 = 1,
1397          .emu_model = 4} , /* EMU 0404 */
1398         /* Tested by James@superbug.co.uk 4th Nov 2007. */
1399         {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x42011102,
1400          .driver = "Audigy2", .name = "E-mu 1010 Notebook [MAEM8950]",
1401          .id = "EMU1010",
1402          .emu10k2_chip = 1,
1403          .ca0108_chip = 1,
1404          .ca_cardbus_chip = 1,
1405          .spk71 = 1 ,
1406          .emu_model = 3} ,
1407         /* Tested by James@superbug.co.uk 4th Nov 2007. */
1408         {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x40041102,
1409          .driver = "Audigy2", .name = "E-mu 1010b PCI [MAEM????]",
1410          .id = "EMU1010",
1411          .emu10k2_chip = 1,
1412          .ca0108_chip = 1,
1413          .spk71 = 1,
1414          .emu_model = 2} ,
1415         /* Tested by James@superbug.co.uk 8th July 2005. */
1416         {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x40011102,
1417          .driver = "Audigy2", .name = "E-mu 1010 [4001]",
1418          .id = "EMU1010",
1419          .emu10k2_chip = 1,
1420          .ca0102_chip = 1,
1421          .spk71 = 1,
1422          .emu_model = 1} , /* Emu 1010 */
1423         /* Audigy4 (Not PRO) SB0610 */
1424         {.vendor = 0x1102, .device = 0x0008,
1425          .driver = "Audigy2", .name = "Audigy 2 Value [Unknown]",
1426          .id = "Audigy2",
1427          .emu10k2_chip = 1,
1428          .ca0108_chip = 1,
1429          .ac97_chip = 1} ,
1430         /* Tested by James@superbug.co.uk 3rd July 2005 */
1431         {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20071102,
1432          .driver = "Audigy2", .name = "Audigy 4 PRO [SB0380]",
1433          .id = "Audigy2",
1434          .emu10k2_chip = 1,
1435          .ca0102_chip = 1,
1436          .ca0151_chip = 1,
1437          .spk71 = 1,
1438          .spdif_bug = 1,
1439          .ac97_chip = 1} ,
1440         /* Tested by shane-alsa@cm.nu 5th Nov 2005 */
1441         /* The 0x20061102 does have SB0350 written on it
1442          * Just like 0x20021102
1443          */
1444         {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20061102,
1445          .driver = "Audigy2", .name = "Audigy 2 [SB0350b]",
1446          .id = "Audigy2",
1447          .emu10k2_chip = 1,
1448          .ca0102_chip = 1,
1449          .ca0151_chip = 1,
1450          .spk71 = 1,
1451          .spdif_bug = 1,
1452          .ac97_chip = 1} ,
1453         {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20021102,
1454          .driver = "Audigy2", .name = "Audigy 2 ZS [SB0350]",
1455          .id = "Audigy2",
1456          .emu10k2_chip = 1,
1457          .ca0102_chip = 1,
1458          .ca0151_chip = 1,
1459          .spk71 = 1,
1460          .spdif_bug = 1,
1461          .ac97_chip = 1} ,
1462         {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20011102,
1463          .driver = "Audigy2", .name = "Audigy 2 ZS [2001]",
1464          .id = "Audigy2",
1465          .emu10k2_chip = 1,
1466          .ca0102_chip = 1,
1467          .ca0151_chip = 1,
1468          .spk71 = 1,
1469          .spdif_bug = 1,
1470          .ac97_chip = 1} ,
1471         /* Audigy 2 */
1472         /* Tested by James@superbug.co.uk 3rd July 2005 */
1473         /* DSP: CA0102-IAT
1474          * DAC: CS4382-KQ
1475          * ADC: Philips 1361T
1476          * AC97: STAC9721
1477          * CA0151: Yes
1478          */
1479         {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10071102,
1480          .driver = "Audigy2", .name = "Audigy 2 [SB0240]",
1481          .id = "Audigy2",
1482          .emu10k2_chip = 1,
1483          .ca0102_chip = 1,
1484          .ca0151_chip = 1,
1485          .spk71 = 1,
1486          .spdif_bug = 1,
1487          .adc_1361t = 1,  /* 24 bit capture instead of 16bit */
1488          .ac97_chip = 1} ,
1489         {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10051102,
1490          .driver = "Audigy2", .name = "Audigy 2 EX [1005]",
1491          .id = "Audigy2",
1492          .emu10k2_chip = 1,
1493          .ca0102_chip = 1,
1494          .ca0151_chip = 1,
1495          .spk71 = 1,
1496          .spdif_bug = 1} ,
1497         /* Dell OEM/Creative Labs Audigy 2 ZS */
1498         /* See ALSA bug#1365 */
1499         {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10031102,
1500          .driver = "Audigy2", .name = "Audigy 2 ZS [SB0353]",
1501          .id = "Audigy2",
1502          .emu10k2_chip = 1,
1503          .ca0102_chip = 1,
1504          .ca0151_chip = 1,
1505          .spk71 = 1,
1506          .spdif_bug = 1,
1507          .ac97_chip = 1} ,
1508         {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10021102,
1509          .driver = "Audigy2", .name = "Audigy 2 Platinum [SB0240P]",
1510          .id = "Audigy2",
1511          .emu10k2_chip = 1,
1512          .ca0102_chip = 1,
1513          .ca0151_chip = 1,
1514          .spk71 = 1,
1515          .spdif_bug = 1,
1516          .adc_1361t = 1,  /* 24 bit capture instead of 16bit. Fixes ALSA bug#324 */
1517          .ac97_chip = 1} ,
1518         {.vendor = 0x1102, .device = 0x0004, .revision = 0x04,
1519          .driver = "Audigy2", .name = "Audigy 2 [Unknown]",
1520          .id = "Audigy2",
1521          .emu10k2_chip = 1,
1522          .ca0102_chip = 1,
1523          .ca0151_chip = 1,
1524          .spdif_bug = 1,
1525          .ac97_chip = 1} ,
1526         {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x00531102,
1527          .driver = "Audigy", .name = "Audigy 1 [SB0090]",
1528          .id = "Audigy",
1529          .emu10k2_chip = 1,
1530          .ca0102_chip = 1,
1531          .ac97_chip = 1} ,
1532         {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x00521102,
1533          .driver = "Audigy", .name = "Audigy 1 ES [SB0160]",
1534          .id = "Audigy",
1535          .emu10k2_chip = 1,
1536          .ca0102_chip = 1,
1537          .spdif_bug = 1,
1538          .ac97_chip = 1} ,
1539         {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x00511102,
1540          .driver = "Audigy", .name = "Audigy 1 [SB0090]",
1541          .id = "Audigy",
1542          .emu10k2_chip = 1,
1543          .ca0102_chip = 1,
1544          .ac97_chip = 1} ,
1545         {.vendor = 0x1102, .device = 0x0004,
1546          .driver = "Audigy", .name = "Audigy 1 [Unknown]",
1547          .id = "Audigy",
1548          .emu10k2_chip = 1,
1549          .ca0102_chip = 1,
1550          .ac97_chip = 1} ,
1551         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x806B1102,
1552          .driver = "EMU10K1", .name = "SBLive! [SB0105]",
1553          .id = "Live",
1554          .emu10k1_chip = 1,
1555          .ac97_chip = 1,
1556          .sblive51 = 1} ,
1557         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x806A1102,
1558          .driver = "EMU10K1", .name = "SBLive! Value [SB0103]",
1559          .id = "Live",
1560          .emu10k1_chip = 1,
1561          .ac97_chip = 1,
1562          .sblive51 = 1} ,
1563         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80691102,
1564          .driver = "EMU10K1", .name = "SBLive! Value [SB0101]",
1565          .id = "Live",
1566          .emu10k1_chip = 1,
1567          .ac97_chip = 1,
1568          .sblive51 = 1} ,
1569         /* Tested by ALSA bug#1680 26th December 2005 */
1570         /* note: It really has SB0220 written on the card. */
1571         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80661102,
1572          .driver = "EMU10K1", .name = "SB Live 5.1 Dell OEM [SB0220]",
1573          .id = "Live",
1574          .emu10k1_chip = 1,
1575          .ac97_chip = 1,
1576          .sblive51 = 1} ,
1577         /* Tested by Thomas Zehetbauer 27th Aug 2005 */
1578         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80651102,
1579          .driver = "EMU10K1", .name = "SB Live 5.1 [SB0220]",
1580          .id = "Live",
1581          .emu10k1_chip = 1,
1582          .ac97_chip = 1,
1583          .sblive51 = 1} ,
1584         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x100a1102,
1585          .driver = "EMU10K1", .name = "SB Live 5.1 [SB0220]",
1586          .id = "Live",
1587          .emu10k1_chip = 1,
1588          .ac97_chip = 1,
1589          .sblive51 = 1} ,
1590         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80641102,
1591          .driver = "EMU10K1", .name = "SB Live 5.1",
1592          .id = "Live",
1593          .emu10k1_chip = 1,
1594          .ac97_chip = 1,
1595          .sblive51 = 1} ,
1596         /* Tested by alsa bugtrack user "hus" bug #1297 12th Aug 2005 */
1597         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80611102,
1598          .driver = "EMU10K1", .name = "SBLive 5.1 [SB0060]",
1599          .id = "Live",
1600          .emu10k1_chip = 1,
1601          .ac97_chip = 2, /* ac97 is optional; both SBLive 5.1 and platinum
1602                           * share the same IDs!
1603                           */
1604          .sblive51 = 1} ,
1605         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80511102,
1606          .driver = "EMU10K1", .name = "SBLive! Value [CT4850]",
1607          .id = "Live",
1608          .emu10k1_chip = 1,
1609          .ac97_chip = 1,
1610          .sblive51 = 1} ,
1611         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80401102,
1612          .driver = "EMU10K1", .name = "SBLive! Platinum [CT4760P]",
1613          .id = "Live",
1614          .emu10k1_chip = 1,
1615          .ac97_chip = 1} ,
1616         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80321102,
1617          .driver = "EMU10K1", .name = "SBLive! Value [CT4871]",
1618          .id = "Live",
1619          .emu10k1_chip = 1,
1620          .ac97_chip = 1,
1621          .sblive51 = 1} ,
1622         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80311102,
1623          .driver = "EMU10K1", .name = "SBLive! Value [CT4831]",
1624          .id = "Live",
1625          .emu10k1_chip = 1,
1626          .ac97_chip = 1,
1627          .sblive51 = 1} ,
1628         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80281102,
1629          .driver = "EMU10K1", .name = "SBLive! Value [CT4870]",
1630          .id = "Live",
1631          .emu10k1_chip = 1,
1632          .ac97_chip = 1,
1633          .sblive51 = 1} ,
1634         /* Tested by James@superbug.co.uk 3rd July 2005 */
1635         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80271102,
1636          .driver = "EMU10K1", .name = "SBLive! Value [CT4832]",
1637          .id = "Live",
1638          .emu10k1_chip = 1,
1639          .ac97_chip = 1,
1640          .sblive51 = 1} ,
1641         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80261102,
1642          .driver = "EMU10K1", .name = "SBLive! Value [CT4830]",
1643          .id = "Live",
1644          .emu10k1_chip = 1,
1645          .ac97_chip = 1,
1646          .sblive51 = 1} ,
1647         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80231102,
1648          .driver = "EMU10K1", .name = "SB PCI512 [CT4790]",
1649          .id = "Live",
1650          .emu10k1_chip = 1,
1651          .ac97_chip = 1,
1652          .sblive51 = 1} ,
1653         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80221102,
1654          .driver = "EMU10K1", .name = "SBLive! Value [CT4780]",
1655          .id = "Live",
1656          .emu10k1_chip = 1,
1657          .ac97_chip = 1,
1658          .sblive51 = 1} ,
1659         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x40011102,
1660          .driver = "EMU10K1", .name = "E-mu APS [4001]",
1661          .id = "APS",
1662          .emu10k1_chip = 1,
1663          .ecard = 1} ,
1664         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x00211102,
1665          .driver = "EMU10K1", .name = "SBLive! [CT4620]",
1666          .id = "Live",
1667          .emu10k1_chip = 1,
1668          .ac97_chip = 1,
1669          .sblive51 = 1} ,
1670         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x00201102,
1671          .driver = "EMU10K1", .name = "SBLive! Value [CT4670]",
1672          .id = "Live",
1673          .emu10k1_chip = 1,
1674          .ac97_chip = 1,
1675          .sblive51 = 1} ,
1676         {.vendor = 0x1102, .device = 0x0002,
1677          .driver = "EMU10K1", .name = "SB Live [Unknown]",
1678          .id = "Live",
1679          .emu10k1_chip = 1,
1680          .ac97_chip = 1,
1681          .sblive51 = 1} ,
1682         { } /* terminator */
1683 };
1684
1685 int __devinit snd_emu10k1_create(struct snd_card *card,
1686                        struct pci_dev * pci,
1687                        unsigned short extin_mask,
1688                        unsigned short extout_mask,
1689                        long max_cache_bytes,
1690                        int enable_ir,
1691                        uint subsystem,
1692                        struct snd_emu10k1 ** remu)
1693 {
1694         struct snd_emu10k1 *emu;
1695         int idx, err;
1696         int is_audigy;
1697         unsigned int silent_page;
1698         const struct snd_emu_chip_details *c;
1699         static struct snd_device_ops ops = {
1700                 .dev_free =     snd_emu10k1_dev_free,
1701         };
1702
1703         *remu = NULL;
1704
1705         /* enable PCI device */
1706         if ((err = pci_enable_device(pci)) < 0)
1707                 return err;
1708
1709         emu = kzalloc(sizeof(*emu), GFP_KERNEL);
1710         if (emu == NULL) {
1711                 pci_disable_device(pci);
1712                 return -ENOMEM;
1713         }
1714         emu->card = card;
1715         spin_lock_init(&emu->reg_lock);
1716         spin_lock_init(&emu->emu_lock);
1717         spin_lock_init(&emu->voice_lock);
1718         spin_lock_init(&emu->synth_lock);
1719         spin_lock_init(&emu->memblk_lock);
1720         mutex_init(&emu->fx8010.lock);
1721         INIT_LIST_HEAD(&emu->mapped_link_head);
1722         INIT_LIST_HEAD(&emu->mapped_order_link_head);
1723         emu->pci = pci;
1724         emu->irq = -1;
1725         emu->synth = NULL;
1726         emu->get_synth_voice = NULL;
1727         /* read revision & serial */
1728         emu->revision = pci->revision;
1729         pci_read_config_dword(pci, PCI_SUBSYSTEM_VENDOR_ID, &emu->serial);
1730         pci_read_config_word(pci, PCI_SUBSYSTEM_ID, &emu->model);
1731         snd_printdd("vendor=0x%x, device=0x%x, subsystem_vendor_id=0x%x, subsystem_id=0x%x\n",pci->vendor, pci->device, emu->serial, emu->model);
1732
1733         for (c = emu_chip_details; c->vendor; c++) {
1734                 if (c->vendor == pci->vendor && c->device == pci->device) {
1735                         if (subsystem) {
1736                                 if (c->subsystem && (c->subsystem == subsystem) ) {
1737                                         break;
1738                                 } else continue;
1739                         } else {
1740                                 if (c->subsystem && (c->subsystem != emu->serial) )
1741                                         continue;
1742                                 if (c->revision && c->revision != emu->revision)
1743                                         continue;
1744                         }
1745                         break;
1746                 }
1747         }
1748         if (c->vendor == 0) {
1749                 snd_printk(KERN_ERR "emu10k1: Card not recognised\n");
1750                 kfree(emu);
1751                 pci_disable_device(pci);
1752                 return -ENOENT;
1753         }
1754         emu->card_capabilities = c;
1755         if (c->subsystem && !subsystem)
1756                 snd_printdd("Sound card name=%s\n", c->name);
1757         else if (subsystem)
1758                 snd_printdd("Sound card name=%s, vendor=0x%x, device=0x%x, subsystem=0x%x. Forced to subsytem=0x%x\n",
1759                         c->name, pci->vendor, pci->device, emu->serial, c->subsystem);
1760         else
1761                 snd_printdd("Sound card name=%s, vendor=0x%x, device=0x%x, subsystem=0x%x.\n",
1762                         c->name, pci->vendor, pci->device, emu->serial);
1763
1764         if (!*card->id && c->id) {
1765                 int i, n = 0;
1766                 strlcpy(card->id, c->id, sizeof(card->id));
1767                 for (;;) {
1768                         for (i = 0; i < snd_ecards_limit; i++) {
1769                                 if (snd_cards[i] && !strcmp(snd_cards[i]->id, card->id))
1770                                         break;
1771                         }
1772                         if (i >= snd_ecards_limit)
1773                                 break;
1774                         n++;
1775                         if (n >= SNDRV_CARDS)
1776                                 break;
1777                         snprintf(card->id, sizeof(card->id), "%s_%d", c->id, n);
1778                 }
1779         }
1780
1781         is_audigy = emu->audigy = c->emu10k2_chip;
1782
1783         /* set the DMA transfer mask */
1784         emu->dma_mask = is_audigy ? AUDIGY_DMA_MASK : EMU10K1_DMA_MASK;
1785         if (pci_set_dma_mask(pci, emu->dma_mask) < 0 ||
1786             pci_set_consistent_dma_mask(pci, emu->dma_mask) < 0) {
1787                 snd_printk(KERN_ERR "architecture does not support PCI busmaster DMA with mask 0x%lx\n", emu->dma_mask);
1788                 kfree(emu);
1789                 pci_disable_device(pci);
1790                 return -ENXIO;
1791         }
1792         if (is_audigy)
1793                 emu->gpr_base = A_FXGPREGBASE;
1794         else
1795                 emu->gpr_base = FXGPREGBASE;
1796
1797         if ((err = pci_request_regions(pci, "EMU10K1")) < 0) {
1798                 kfree(emu);
1799                 pci_disable_device(pci);
1800                 return err;
1801         }
1802         emu->port = pci_resource_start(pci, 0);
1803
1804         if (request_irq(pci->irq, snd_emu10k1_interrupt, IRQF_SHARED,
1805                         "EMU10K1", emu)) {
1806                 err = -EBUSY;
1807                 goto error;
1808         }
1809         emu->irq = pci->irq;
1810
1811         emu->max_cache_pages = max_cache_bytes >> PAGE_SHIFT;
1812         if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(pci),
1813                                 32 * 1024, &emu->ptb_pages) < 0) {
1814                 err = -ENOMEM;
1815                 goto error;
1816         }
1817
1818         emu->page_ptr_table = vmalloc(emu->max_cache_pages * sizeof(void *));
1819         emu->page_addr_table = vmalloc(emu->max_cache_pages *
1820                                        sizeof(unsigned long));
1821         if (emu->page_ptr_table == NULL || emu->page_addr_table == NULL) {
1822                 err = -ENOMEM;
1823                 goto error;
1824         }
1825
1826         if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(pci),
1827                                 EMUPAGESIZE, &emu->silent_page) < 0) {
1828                 err = -ENOMEM;
1829                 goto error;
1830         }
1831         emu->memhdr = snd_util_memhdr_new(emu->max_cache_pages * PAGE_SIZE);
1832         if (emu->memhdr == NULL) {
1833                 err = -ENOMEM;
1834                 goto error;
1835         }
1836         emu->memhdr->block_extra_size = sizeof(struct snd_emu10k1_memblk) -
1837                 sizeof(struct snd_util_memblk);
1838
1839         pci_set_master(pci);
1840
1841         emu->fx8010.fxbus_mask = 0x303f;
1842         if (extin_mask == 0)
1843                 extin_mask = 0x3fcf;
1844         if (extout_mask == 0)
1845                 extout_mask = 0x7fff;
1846         emu->fx8010.extin_mask = extin_mask;
1847         emu->fx8010.extout_mask = extout_mask;
1848         emu->enable_ir = enable_ir;
1849
1850         if (emu->card_capabilities->ca_cardbus_chip) {
1851                 if ((err = snd_emu10k1_cardbus_init(emu)) < 0)
1852                         goto error;
1853         }
1854         if (emu->card_capabilities->ecard) {
1855                 if ((err = snd_emu10k1_ecard_init(emu)) < 0)
1856                         goto error;
1857         } else if (emu->card_capabilities->emu_model) {
1858                 if ((err = snd_emu10k1_emu1010_init(emu)) < 0) {
1859                         snd_emu10k1_free(emu);
1860                         return err;
1861                 }
1862         } else {
1863                 /* 5.1: Enable the additional AC97 Slots. If the emu10k1 version
1864                         does not support this, it shouldn't do any harm */
1865                 snd_emu10k1_ptr_write(emu, AC97SLOT, 0, AC97SLOT_CNTR|AC97SLOT_LFE);
1866         }
1867
1868         /* initialize TRAM setup */
1869         emu->fx8010.itram_size = (16 * 1024)/2;
1870         emu->fx8010.etram_pages.area = NULL;
1871         emu->fx8010.etram_pages.bytes = 0;
1872
1873         /*
1874          *  Init to 0x02109204 :
1875          *  Clock accuracy    = 0     (1000ppm)
1876          *  Sample Rate       = 2     (48kHz)
1877          *  Audio Channel     = 1     (Left of 2)
1878          *  Source Number     = 0     (Unspecified)
1879          *  Generation Status = 1     (Original for Cat Code 12)
1880          *  Cat Code          = 12    (Digital Signal Mixer)
1881          *  Mode              = 0     (Mode 0)
1882          *  Emphasis          = 0     (None)
1883          *  CP                = 1     (Copyright unasserted)
1884          *  AN                = 0     (Audio data)
1885          *  P                 = 0     (Consumer)
1886          */
1887         emu->spdif_bits[0] = emu->spdif_bits[1] =
1888                 emu->spdif_bits[2] = SPCS_CLKACCY_1000PPM | SPCS_SAMPLERATE_48 |
1889                 SPCS_CHANNELNUM_LEFT | SPCS_SOURCENUM_UNSPEC |
1890                 SPCS_GENERATIONSTATUS | 0x00001200 |
1891                 0x00000000 | SPCS_EMPHASIS_NONE | SPCS_COPYRIGHT;
1892
1893         emu->reserved_page = (struct snd_emu10k1_memblk *)
1894                 snd_emu10k1_synth_alloc(emu, 4096);
1895         if (emu->reserved_page)
1896                 emu->reserved_page->map_locked = 1;
1897
1898         /* Clear silent pages and set up pointers */
1899         memset(emu->silent_page.area, 0, PAGE_SIZE);
1900         silent_page = emu->silent_page.addr << 1;
1901         for (idx = 0; idx < MAXPAGES; idx++)
1902                 ((u32 *)emu->ptb_pages.area)[idx] = cpu_to_le32(silent_page | idx);
1903
1904         /* set up voice indices */
1905         for (idx = 0; idx < NUM_G; idx++) {
1906                 emu->voices[idx].emu = emu;
1907                 emu->voices[idx].number = idx;
1908         }
1909
1910         if ((err = snd_emu10k1_init(emu, enable_ir, 0)) < 0)
1911                 goto error;
1912 #ifdef CONFIG_PM
1913         if ((err = alloc_pm_buffer(emu)) < 0)
1914                 goto error;
1915 #endif
1916
1917         /*  Initialize the effect engine */
1918         if ((err = snd_emu10k1_init_efx(emu)) < 0)
1919                 goto error;
1920         snd_emu10k1_audio_enable(emu);
1921
1922         if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, emu, &ops)) < 0)
1923                 goto error;
1924
1925 #ifdef CONFIG_PROC_FS
1926         snd_emu10k1_proc_init(emu);
1927 #endif
1928
1929         snd_card_set_dev(card, &pci->dev);
1930         *remu = emu;
1931         return 0;
1932
1933  error:
1934         snd_emu10k1_free(emu);
1935         return err;
1936 }
1937
1938 #ifdef CONFIG_PM
1939 static unsigned char saved_regs[] = {
1940         CPF, PTRX, CVCF, VTFT, Z1, Z2, PSST, DSL, CCCA, CCR, CLP,
1941         FXRT, MAPA, MAPB, ENVVOL, ATKHLDV, DCYSUSV, LFOVAL1, ENVVAL,
1942         ATKHLDM, DCYSUSM, LFOVAL2, IP, IFATN, PEFE, FMMOD, TREMFRQ, FM2FRQ2,
1943         TEMPENV, ADCCR, FXWC, MICBA, ADCBA, FXBA,
1944         MICBS, ADCBS, FXBS, CDCS, GPSCS, SPCS0, SPCS1, SPCS2,
1945         SPBYPASS, AC97SLOT, CDSRCS, GPSRCS, ZVSRCS, MICIDX, ADCIDX, FXIDX,
1946         0xff /* end */
1947 };
1948 static unsigned char saved_regs_audigy[] = {
1949         A_ADCIDX, A_MICIDX, A_FXWC1, A_FXWC2, A_SAMPLE_RATE,
1950         A_FXRT2, A_SENDAMOUNTS, A_FXRT1,
1951         0xff /* end */
1952 };
1953
1954 static int __devinit alloc_pm_buffer(struct snd_emu10k1 *emu)
1955 {
1956         int size;
1957
1958         size = ARRAY_SIZE(saved_regs);
1959         if (emu->audigy)
1960                 size += ARRAY_SIZE(saved_regs_audigy);
1961         emu->saved_ptr = vmalloc(4 * NUM_G * size);
1962         if (! emu->saved_ptr)
1963                 return -ENOMEM;
1964         if (snd_emu10k1_efx_alloc_pm_buffer(emu) < 0)
1965                 return -ENOMEM;
1966         if (emu->card_capabilities->ca0151_chip &&
1967             snd_p16v_alloc_pm_buffer(emu) < 0)
1968                 return -ENOMEM;
1969         return 0;
1970 }
1971
1972 static void free_pm_buffer(struct snd_emu10k1 *emu)
1973 {
1974         vfree(emu->saved_ptr);
1975         snd_emu10k1_efx_free_pm_buffer(emu);
1976         if (emu->card_capabilities->ca0151_chip)
1977                 snd_p16v_free_pm_buffer(emu);
1978 }
1979
1980 void snd_emu10k1_suspend_regs(struct snd_emu10k1 *emu)
1981 {
1982         int i;
1983         unsigned char *reg;
1984         unsigned int *val;
1985
1986         val = emu->saved_ptr;
1987         for (reg = saved_regs; *reg != 0xff; reg++)
1988                 for (i = 0; i < NUM_G; i++, val++)
1989                         *val = snd_emu10k1_ptr_read(emu, *reg, i);
1990         if (emu->audigy) {
1991                 for (reg = saved_regs_audigy; *reg != 0xff; reg++)
1992                         for (i = 0; i < NUM_G; i++, val++)
1993                                 *val = snd_emu10k1_ptr_read(emu, *reg, i);
1994         }
1995         if (emu->audigy)
1996                 emu->saved_a_iocfg = inl(emu->port + A_IOCFG);
1997         emu->saved_hcfg = inl(emu->port + HCFG);
1998 }
1999
2000 void snd_emu10k1_resume_init(struct snd_emu10k1 *emu)
2001 {
2002         if (emu->card_capabilities->ca_cardbus_chip)
2003                 snd_emu10k1_cardbus_init(emu);
2004         if (emu->card_capabilities->ecard)
2005                 snd_emu10k1_ecard_init(emu);
2006         else if (emu->card_capabilities->emu_model)
2007                 snd_emu10k1_emu1010_init(emu);
2008         else
2009                 snd_emu10k1_ptr_write(emu, AC97SLOT, 0, AC97SLOT_CNTR|AC97SLOT_LFE);
2010         snd_emu10k1_init(emu, emu->enable_ir, 1);
2011 }
2012
2013 void snd_emu10k1_resume_regs(struct snd_emu10k1 *emu)
2014 {
2015         int i;
2016         unsigned char *reg;
2017         unsigned int *val;
2018
2019         snd_emu10k1_audio_enable(emu);
2020
2021         /* resore for spdif */
2022         if (emu->audigy)
2023                 outl(emu->saved_a_iocfg, emu->port + A_IOCFG);
2024         outl(emu->saved_hcfg, emu->port + HCFG);
2025
2026         val = emu->saved_ptr;
2027         for (reg = saved_regs; *reg != 0xff; reg++)
2028                 for (i = 0; i < NUM_G; i++, val++)
2029                         snd_emu10k1_ptr_write(emu, *reg, i, *val);
2030         if (emu->audigy) {
2031                 for (reg = saved_regs_audigy; *reg != 0xff; reg++)
2032                         for (i = 0; i < NUM_G; i++, val++)
2033                                 snd_emu10k1_ptr_write(emu, *reg, i, *val);
2034         }
2035 }
2036 #endif