err.no Git - linux-2.6/blob - sound/pci/emu10k1/emu10k1_main.c

   1 /*
   2  *  Copyright (c) by Jaroslav Kysela <perex@perex.cz>
   3  *                   Creative Labs, Inc.
   4  *  Routines for control of EMU10K1 chips
   5  *
   6  *  Copyright (c) by James Courtier-Dutton <James@superbug.co.uk>
   7  *      Added support for Audigy 2 Value.
   8  *      Added EMU 1010 support.
   9  *      General bug fixes and enhancements.
  10  *
  11  *
  12  *  BUGS:
  13  *    --
  14  *
  15  *  TODO:
  16  *    --
  17  *
  18  *   This program is free software; you can redistribute it and/or modify
  19  *   it under the terms of the GNU General Public License as published by
  20  *   the Free Software Foundation; either version 2 of the License, or
  21  *   (at your option) any later version.
  22  *
  23  *   This program is distributed in the hope that it will be useful,
  24  *   but WITHOUT ANY WARRANTY; without even the implied warranty of
  25  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  26  *   GNU General Public License for more details.
  27  *
  28  *   You should have received a copy of the GNU General Public License
  29  *   along with this program; if not, write to the Free Software
  30  *   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
  31  *
  32  */
  33
  34 #include <linux/sched.h>
  35 #include <linux/kthread.h>
  36 #include <linux/delay.h>
  37 #include <linux/init.h>
  38 #include <linux/interrupt.h>
  39 #include <linux/pci.h>
  40 #include <linux/slab.h>
  41 #include <linux/vmalloc.h>
  42 #include <linux/mutex.h>
  43
  44
  45 #include <sound/core.h>
  46 #include <sound/emu10k1.h>
  47 #include <linux/firmware.h>
  48 #include "p16v.h"
  49 #include "tina2.h"
  50 #include "p17v.h"
  51
  52
  53 #define HANA_FILENAME "emu/hana.fw"
  54 #define DOCK_FILENAME "emu/audio_dock.fw"
  55 #define EMU1010B_FILENAME "emu/emu1010b.fw"
  56 #define MICRO_DOCK_FILENAME "emu/micro_dock.fw"
  57 #define EMU0404_FILENAME "emu/emu0404.fw"
  58 #define EMU1010_NOTEBOOK_FILENAME "emu/emu1010_notebook.fw"
  59
  60 MODULE_FIRMWARE(HANA_FILENAME);
  61 MODULE_FIRMWARE(DOCK_FILENAME);
  62 MODULE_FIRMWARE(EMU1010B_FILENAME);
  63 MODULE_FIRMWARE(MICRO_DOCK_FILENAME);
  64 MODULE_FIRMWARE(EMU0404_FILENAME);
  65 MODULE_FIRMWARE(EMU1010_NOTEBOOK_FILENAME);
  66
  67
  68 /*************************************************************************
  69  * EMU10K1 init / done
  70  *************************************************************************/
  71
  72 void snd_emu10k1_voice_init(struct snd_emu10k1 * emu, int ch)
  73 {
  74         snd_emu10k1_ptr_write(emu, DCYSUSV, ch, 0);
  75         snd_emu10k1_ptr_write(emu, IP, ch, 0);
  76         snd_emu10k1_ptr_write(emu, VTFT, ch, 0xffff);
  77         snd_emu10k1_ptr_write(emu, CVCF, ch, 0xffff);
  78         snd_emu10k1_ptr_write(emu, PTRX, ch, 0);
  79         snd_emu10k1_ptr_write(emu, CPF, ch, 0);
  80         snd_emu10k1_ptr_write(emu, CCR, ch, 0);
  81
  82         snd_emu10k1_ptr_write(emu, PSST, ch, 0);
  83         snd_emu10k1_ptr_write(emu, DSL, ch, 0x10);
  84         snd_emu10k1_ptr_write(emu, CCCA, ch, 0);
  85         snd_emu10k1_ptr_write(emu, Z1, ch, 0);
  86         snd_emu10k1_ptr_write(emu, Z2, ch, 0);
  87         snd_emu10k1_ptr_write(emu, FXRT, ch, 0x32100000);
  88
  89         snd_emu10k1_ptr_write(emu, ATKHLDM, ch, 0);
  90         snd_emu10k1_ptr_write(emu, DCYSUSM, ch, 0);
  91         snd_emu10k1_ptr_write(emu, IFATN, ch, 0xffff);
  92         snd_emu10k1_ptr_write(emu, PEFE, ch, 0);
  93         snd_emu10k1_ptr_write(emu, FMMOD, ch, 0);
  94         snd_emu10k1_ptr_write(emu, TREMFRQ, ch, 24);    /* 1 Hz */
  95         snd_emu10k1_ptr_write(emu, FM2FRQ2, ch, 24);    /* 1 Hz */
  96         snd_emu10k1_ptr_write(emu, TEMPENV, ch, 0);
  97
  98         /*** these are last so OFF prevents writing ***/
  99         snd_emu10k1_ptr_write(emu, LFOVAL2, ch, 0);
 100         snd_emu10k1_ptr_write(emu, LFOVAL1, ch, 0);
 101         snd_emu10k1_ptr_write(emu, ATKHLDV, ch, 0);
 102         snd_emu10k1_ptr_write(emu, ENVVOL, ch, 0);
 103         snd_emu10k1_ptr_write(emu, ENVVAL, ch, 0);
 104
 105         /* Audigy extra stuffs */
 106         if (emu->audigy) {
 107                 snd_emu10k1_ptr_write(emu, 0x4c, ch, 0); /* ?? */
 108                 snd_emu10k1_ptr_write(emu, 0x4d, ch, 0); /* ?? */
 109                 snd_emu10k1_ptr_write(emu, 0x4e, ch, 0); /* ?? */
 110                 snd_emu10k1_ptr_write(emu, 0x4f, ch, 0); /* ?? */
 111                 snd_emu10k1_ptr_write(emu, A_FXRT1, ch, 0x03020100);
 112                 snd_emu10k1_ptr_write(emu, A_FXRT2, ch, 0x3f3f3f3f);
 113                 snd_emu10k1_ptr_write(emu, A_SENDAMOUNTS, ch, 0);
 114         }
 115 }
 116
 117 static unsigned int spi_dac_init[] = {
 118                 0x00ff,
 119                 0x02ff,
 120                 0x0400,
 121                 0x0520,
 122                 0x0600,
 123                 0x08ff,
 124                 0x0aff,
 125                 0x0cff,
 126                 0x0eff,
 127                 0x10ff,
 128                 0x1200,
 129                 0x1400,
 130                 0x1480,
 131                 0x1800,
 132                 0x1aff,
 133                 0x1cff,
 134                 0x1e00,
 135                 0x0530,
 136                 0x0602,
 137                 0x0622,
 138                 0x1400,
 139 };
 140
 141 static unsigned int i2c_adc_init[][2] = {
 142         { 0x17, 0x00 }, /* Reset */
 143         { 0x07, 0x00 }, /* Timeout */
 144         { 0x0b, 0x22 },  /* Interface control */
 145         { 0x0c, 0x22 },  /* Master mode control */
 146         { 0x0d, 0x08 },  /* Powerdown control */
 147         { 0x0e, 0xcf },  /* Attenuation Left  0x01 = -103dB, 0xff = 24dB */
 148         { 0x0f, 0xcf },  /* Attenuation Right 0.5dB steps */
 149         { 0x10, 0x7b },  /* ALC Control 1 */
 150         { 0x11, 0x00 },  /* ALC Control 2 */
 151         { 0x12, 0x32 },  /* ALC Control 3 */
 152         { 0x13, 0x00 },  /* Noise gate control */
 153         { 0x14, 0xa6 },  /* Limiter control */
 154         { 0x15, ADC_MUX_2 },  /* ADC Mixer control. Mic for Audigy 2 ZS Notebook */
 155 };
 156
 157 static int snd_emu10k1_init(struct snd_emu10k1 *emu, int enable_ir, int resume)
 158 {
 159         unsigned int silent_page;
 160         int ch;
 161         u32 tmp;
 162
 163         /* disable audio and lock cache */
 164         outl(HCFG_LOCKSOUNDCACHE | HCFG_LOCKTANKCACHE_MASK | HCFG_MUTEBUTTONENABLE,
 165              emu->port + HCFG);
 166
 167         /* reset recording buffers */
 168         snd_emu10k1_ptr_write(emu, MICBS, 0, ADCBS_BUFSIZE_NONE);
 169         snd_emu10k1_ptr_write(emu, MICBA, 0, 0);
 170         snd_emu10k1_ptr_write(emu, FXBS, 0, ADCBS_BUFSIZE_NONE);
 171         snd_emu10k1_ptr_write(emu, FXBA, 0, 0);
 172         snd_emu10k1_ptr_write(emu, ADCBS, 0, ADCBS_BUFSIZE_NONE);
 173         snd_emu10k1_ptr_write(emu, ADCBA, 0, 0);
 174
 175         /* disable channel interrupt */
 176         outl(0, emu->port + INTE);
 177         snd_emu10k1_ptr_write(emu, CLIEL, 0, 0);
 178         snd_emu10k1_ptr_write(emu, CLIEH, 0, 0);
 179         snd_emu10k1_ptr_write(emu, SOLEL, 0, 0);
 180         snd_emu10k1_ptr_write(emu, SOLEH, 0, 0);
 181
 182         if (emu->audigy){
 183                 /* set SPDIF bypass mode */
 184                 snd_emu10k1_ptr_write(emu, SPBYPASS, 0, SPBYPASS_FORMAT);
 185                 /* enable rear left + rear right AC97 slots */
 186                 snd_emu10k1_ptr_write(emu, AC97SLOT, 0, AC97SLOT_REAR_RIGHT |
 187                                       AC97SLOT_REAR_LEFT);
 188         }
 189
 190         /* init envelope engine */
 191         for (ch = 0; ch < NUM_G; ch++)
 192                 snd_emu10k1_voice_init(emu, ch);
 193
 194         snd_emu10k1_ptr_write(emu, SPCS0, 0, emu->spdif_bits[0]);
 195         snd_emu10k1_ptr_write(emu, SPCS1, 0, emu->spdif_bits[1]);
 196         snd_emu10k1_ptr_write(emu, SPCS2, 0, emu->spdif_bits[2]);
 197
 198         if (emu->card_capabilities->ca0151_chip) { /* audigy2 */
 199                 /* Hacks for Alice3 to work independent of haP16V driver */
 200                 //Setup SRCMulti_I2S SamplingRate
 201                 tmp = snd_emu10k1_ptr_read(emu, A_SPDIF_SAMPLERATE, 0);
 202                 tmp &= 0xfffff1ff;
 203                 tmp |= (0x2<<9);
 204                 snd_emu10k1_ptr_write(emu, A_SPDIF_SAMPLERATE, 0, tmp);
 205
 206                 /* Setup SRCSel (Enable Spdif,I2S SRCMulti) */
 207                 snd_emu10k1_ptr20_write(emu, SRCSel, 0, 0x14);
 208                 /* Setup SRCMulti Input Audio Enable */
 209                 /* Use 0xFFFFFFFF to enable P16V sounds. */
 210                 snd_emu10k1_ptr20_write(emu, SRCMULTI_ENABLE, 0, 0xFFFFFFFF);
 211
 212                 /* Enabled Phased (8-channel) P16V playback */
 213                 outl(0x0201, emu->port + HCFG2);
 214                 /* Set playback routing. */
 215                 snd_emu10k1_ptr20_write(emu, CAPTURE_P16V_SOURCE, 0, 0x78e4);
 216         }
 217         if (emu->card_capabilities->ca0108_chip) { /* audigy2 Value */
 218                 /* Hacks for Alice3 to work independent of haP16V driver */
 219                 snd_printk(KERN_INFO "Audigy2 value: Special config.\n");
 220                 //Setup SRCMulti_I2S SamplingRate
 221                 tmp = snd_emu10k1_ptr_read(emu, A_SPDIF_SAMPLERATE, 0);
 222                 tmp &= 0xfffff1ff;
 223                 tmp |= (0x2<<9);
 224                 snd_emu10k1_ptr_write(emu, A_SPDIF_SAMPLERATE, 0, tmp);
 225
 226                 /* Setup SRCSel (Enable Spdif,I2S SRCMulti) */
 227                 outl(0x600000, emu->port + 0x20);
 228                 outl(0x14, emu->port + 0x24);
 229
 230                 /* Setup SRCMulti Input Audio Enable */
 231                 outl(0x7b0000, emu->port + 0x20);
 232                 outl(0xFF000000, emu->port + 0x24);
 233
 234                 /* Setup SPDIF Out Audio Enable */
 235                 /* The Audigy 2 Value has a separate SPDIF out,
 236                  * so no need for a mixer switch
 237                  */
 238                 outl(0x7a0000, emu->port + 0x20);
 239                 outl(0xFF000000, emu->port + 0x24);
 240                 tmp = inl(emu->port + A_IOCFG) & ~0x8; /* Clear bit 3 */
 241                 outl(tmp, emu->port + A_IOCFG);
 242         }
 243         if (emu->card_capabilities->spi_dac) { /* Audigy 2 ZS Notebook with DAC Wolfson WM8768/WM8568 */
 244                 int size, n;
 245
 246                 size = ARRAY_SIZE(spi_dac_init);
 247                 for (n = 0; n < size; n++)
 248                         snd_emu10k1_spi_write(emu, spi_dac_init[n]);
 249
 250                 snd_emu10k1_ptr20_write(emu, 0x60, 0, 0x10);
 251                 /* Enable GPIOs
 252                  * GPIO0: Unknown
 253                  * GPIO1: Speakers-enabled.
 254                  * GPIO2: Unknown
 255                  * GPIO3: Unknown
 256                  * GPIO4: IEC958 Output on.
 257                  * GPIO5: Unknown
 258                  * GPIO6: Unknown
 259                  * GPIO7: Unknown
 260                  */
 261                 outl(0x76, emu->port + A_IOCFG); /* Windows uses 0x3f76 */
 262         }
 263         if (emu->card_capabilities->i2c_adc) { /* Audigy 2 ZS Notebook with ADC Wolfson WM8775 */
 264                 int size, n;
 265
 266                 snd_emu10k1_ptr20_write(emu, P17V_I2S_SRC_SEL, 0, 0x2020205f);
 267                 tmp = inl(emu->port + A_IOCFG);
 268                 outl(tmp | 0x4, emu->port + A_IOCFG);  /* Set bit 2 for mic input */
 269                 tmp = inl(emu->port + A_IOCFG);
 270                 size = ARRAY_SIZE(i2c_adc_init);
 271                 for (n = 0; n < size; n++)
 272                         snd_emu10k1_i2c_write(emu, i2c_adc_init[n][0], i2c_adc_init[n][1]);
 273                 for (n=0; n < 4; n++) {
 274                         emu->i2c_capture_volume[n][0]= 0xcf;
 275                         emu->i2c_capture_volume[n][1]= 0xcf;
 276                 }
 277         }
 278
 279
 280         snd_emu10k1_ptr_write(emu, PTB, 0, emu->ptb_pages.addr);
 281         snd_emu10k1_ptr_write(emu, TCB, 0, 0);  /* taken from original driver */
 282         snd_emu10k1_ptr_write(emu, TCBS, 0, 4); /* taken from original driver */
 283
 284         silent_page = (emu->silent_page.addr << 1) | MAP_PTI_MASK;
 285         for (ch = 0; ch < NUM_G; ch++) {
 286                 snd_emu10k1_ptr_write(emu, MAPA, ch, silent_page);
 287                 snd_emu10k1_ptr_write(emu, MAPB, ch, silent_page);
 288         }
 289
 290         if (emu->card_capabilities->emu_model) {
 291                 outl(HCFG_AUTOMUTE_ASYNC |
 292                         HCFG_EMU32_SLAVE |
 293                         HCFG_AUDIOENABLE, emu->port + HCFG);
 294         /*
 295          *  Hokay, setup HCFG
 296          *   Mute Disable Audio = 0
 297          *   Lock Tank Memory = 1
 298          *   Lock Sound Memory = 0
 299          *   Auto Mute = 1
 300          */
 301         } else if (emu->audigy) {
 302                 if (emu->revision == 4) /* audigy2 */
 303                         outl(HCFG_AUDIOENABLE |
 304                              HCFG_AC3ENABLE_CDSPDIF |
 305                              HCFG_AC3ENABLE_GPSPDIF |
 306                              HCFG_AUTOMUTE | HCFG_JOYENABLE, emu->port + HCFG);
 307                 else
 308                         outl(HCFG_AUTOMUTE | HCFG_JOYENABLE, emu->port + HCFG);
 309         /* FIXME: Remove all these emu->model and replace it with a card recognition parameter,
 310          * e.g. card_capabilities->joystick */
 311         } else if (emu->model == 0x20 ||
 312             emu->model == 0xc400 ||
 313             (emu->model == 0x21 && emu->revision < 6))
 314                 outl(HCFG_LOCKTANKCACHE_MASK | HCFG_AUTOMUTE, emu->port + HCFG);
 315         else
 316                 // With on-chip joystick
 317                 outl(HCFG_LOCKTANKCACHE_MASK | HCFG_AUTOMUTE | HCFG_JOYENABLE, emu->port + HCFG);
 318
 319         if (enable_ir) {        /* enable IR for SB Live */
 320                 if (emu->card_capabilities->emu_model) {
 321                         ;  /* Disable all access to A_IOCFG for the emu1010 */
 322                 } else if (emu->card_capabilities->i2c_adc) {
 323                         ;  /* Disable A_IOCFG for Audigy 2 ZS Notebook */
 324                 } else if (emu->audigy) {
 325                         unsigned int reg = inl(emu->port + A_IOCFG);
 326                         outl(reg | A_IOCFG_GPOUT2, emu->port + A_IOCFG);
 327                         udelay(500);
 328                         outl(reg | A_IOCFG_GPOUT1 | A_IOCFG_GPOUT2, emu->port + A_IOCFG);
 329                         udelay(100);
 330                         outl(reg, emu->port + A_IOCFG);
 331                 } else {
 332                         unsigned int reg = inl(emu->port + HCFG);
 333                         outl(reg | HCFG_GPOUT2, emu->port + HCFG);
 334                         udelay(500);
 335                         outl(reg | HCFG_GPOUT1 | HCFG_GPOUT2, emu->port + HCFG);
 336                         udelay(100);
 337                         outl(reg, emu->port + HCFG);
 338                 }
 339         }
 340
 341         if (emu->card_capabilities->emu_model) {
 342                 ;  /* Disable all access to A_IOCFG for the emu1010 */
 343         } else if (emu->card_capabilities->i2c_adc) {
 344                 ;  /* Disable A_IOCFG for Audigy 2 ZS Notebook */
 345         } else if (emu->audigy) {       /* enable analog output */
 346                 unsigned int reg = inl(emu->port + A_IOCFG);
 347                 outl(reg | A_IOCFG_GPOUT0, emu->port + A_IOCFG);
 348         }
 349
 350         return 0;
 351 }
 352
 353 static void snd_emu10k1_audio_enable(struct snd_emu10k1 *emu)
 354 {
 355         /*
 356          *  Enable the audio bit
 357          */
 358         outl(inl(emu->port + HCFG) | HCFG_AUDIOENABLE, emu->port + HCFG);
 359
 360         /* Enable analog/digital outs on audigy */
 361         if (emu->card_capabilities->emu_model) {
 362                 ;  /* Disable all access to A_IOCFG for the emu1010 */
 363         } else if (emu->card_capabilities->i2c_adc) {
 364                 ;  /* Disable A_IOCFG for Audigy 2 ZS Notebook */
 365         } else if (emu->audigy) {
 366                 outl(inl(emu->port + A_IOCFG) & ~0x44, emu->port + A_IOCFG);
 367
 368                 if (emu->card_capabilities->ca0151_chip) { /* audigy2 */
 369                         /* Unmute Analog now.  Set GPO6 to 1 for Apollo.
 370                          * This has to be done after init ALice3 I2SOut beyond 48KHz.
 371                          * So, sequence is important. */
 372                         outl(inl(emu->port + A_IOCFG) | 0x0040, emu->port + A_IOCFG);
 373                 } else if (emu->card_capabilities->ca0108_chip) { /* audigy2 value */
 374                         /* Unmute Analog now. */
 375                         outl(inl(emu->port + A_IOCFG) | 0x0060, emu->port + A_IOCFG);
 376                 } else {
 377                         /* Disable routing from AC97 line out to Front speakers */
 378                         outl(inl(emu->port + A_IOCFG) | 0x0080, emu->port + A_IOCFG);
 379                 }
 380         }
 381
 382 #if 0
 383         {
 384         unsigned int tmp;
 385         /* FIXME: the following routine disables LiveDrive-II !! */
 386         // TOSLink detection
 387         emu->tos_link = 0;
 388         tmp = inl(emu->port + HCFG);
 389         if (tmp & (HCFG_GPINPUT0 | HCFG_GPINPUT1)) {
 390                 outl(tmp|0x800, emu->port + HCFG);
 391                 udelay(50);
 392                 if (tmp != (inl(emu->port + HCFG) & ~0x800)) {
 393                         emu->tos_link = 1;
 394                         outl(tmp, emu->port + HCFG);
 395                 }
 396         }
 397         }
 398 #endif
 399
 400         snd_emu10k1_intr_enable(emu, INTE_PCIERRORENABLE);
 401 }
 402
 403 int snd_emu10k1_done(struct snd_emu10k1 * emu)
 404 {
 405         int ch;
 406
 407         outl(0, emu->port + INTE);
 408
 409         /*
 410          *  Shutdown the chip
 411          */
 412         for (ch = 0; ch < NUM_G; ch++)
 413                 snd_emu10k1_ptr_write(emu, DCYSUSV, ch, 0);
 414         for (ch = 0; ch < NUM_G; ch++) {
 415                 snd_emu10k1_ptr_write(emu, VTFT, ch, 0);
 416                 snd_emu10k1_ptr_write(emu, CVCF, ch, 0);
 417                 snd_emu10k1_ptr_write(emu, PTRX, ch, 0);
 418                 snd_emu10k1_ptr_write(emu, CPF, ch, 0);
 419         }
 420
 421         /* reset recording buffers */
 422         snd_emu10k1_ptr_write(emu, MICBS, 0, 0);
 423         snd_emu10k1_ptr_write(emu, MICBA, 0, 0);
 424         snd_emu10k1_ptr_write(emu, FXBS, 0, 0);
 425         snd_emu10k1_ptr_write(emu, FXBA, 0, 0);
 426         snd_emu10k1_ptr_write(emu, FXWC, 0, 0);
 427         snd_emu10k1_ptr_write(emu, ADCBS, 0, ADCBS_BUFSIZE_NONE);
 428         snd_emu10k1_ptr_write(emu, ADCBA, 0, 0);
 429         snd_emu10k1_ptr_write(emu, TCBS, 0, TCBS_BUFFSIZE_16K);
 430         snd_emu10k1_ptr_write(emu, TCB, 0, 0);
 431         if (emu->audigy)
 432                 snd_emu10k1_ptr_write(emu, A_DBG, 0, A_DBG_SINGLE_STEP);
 433         else
 434                 snd_emu10k1_ptr_write(emu, DBG, 0, EMU10K1_DBG_SINGLE_STEP);
 435
 436         /* disable channel interrupt */
 437         snd_emu10k1_ptr_write(emu, CLIEL, 0, 0);
 438         snd_emu10k1_ptr_write(emu, CLIEH, 0, 0);
 439         snd_emu10k1_ptr_write(emu, SOLEL, 0, 0);
 440         snd_emu10k1_ptr_write(emu, SOLEH, 0, 0);
 441
 442         /* disable audio and lock cache */
 443         outl(HCFG_LOCKSOUNDCACHE | HCFG_LOCKTANKCACHE_MASK | HCFG_MUTEBUTTONENABLE, emu->port + HCFG);
 444         snd_emu10k1_ptr_write(emu, PTB, 0, 0);
 445
 446         return 0;
 447 }
 448
 449 /*************************************************************************
 450  * ECARD functional implementation
 451  *************************************************************************/
 452
 453 /* In A1 Silicon, these bits are in the HC register */
 454 #define HOOKN_BIT               (1L << 12)
 455 #define HANDN_BIT               (1L << 11)
 456 #define PULSEN_BIT              (1L << 10)
 457
 458 #define EC_GDI1                 (1 << 13)
 459 #define EC_GDI0                 (1 << 14)
 460
 461 #define EC_NUM_CONTROL_BITS     20
 462
 463 #define EC_AC3_DATA_SELN        0x0001L
 464 #define EC_EE_DATA_SEL          0x0002L
 465 #define EC_EE_CNTRL_SELN        0x0004L
 466 #define EC_EECLK                0x0008L
 467 #define EC_EECS                 0x0010L
 468 #define EC_EESDO                0x0020L
 469 #define EC_TRIM_CSN             0x0040L
 470 #define EC_TRIM_SCLK            0x0080L
 471 #define EC_TRIM_SDATA           0x0100L
 472 #define EC_TRIM_MUTEN           0x0200L
 473 #define EC_ADCCAL               0x0400L
 474 #define EC_ADCRSTN              0x0800L
 475 #define EC_DACCAL               0x1000L
 476 #define EC_DACMUTEN             0x2000L
 477 #define EC_LEDN                 0x4000L
 478
 479 #define EC_SPDIF0_SEL_SHIFT     15
 480 #define EC_SPDIF1_SEL_SHIFT     17
 481 #define EC_SPDIF0_SEL_MASK      (0x3L << EC_SPDIF0_SEL_SHIFT)
 482 #define EC_SPDIF1_SEL_MASK      (0x7L << EC_SPDIF1_SEL_SHIFT)
 483 #define EC_SPDIF0_SELECT(_x)    (((_x) << EC_SPDIF0_SEL_SHIFT) & EC_SPDIF0_SEL_MASK)
 484 #define EC_SPDIF1_SELECT(_x)    (((_x) << EC_SPDIF1_SEL_SHIFT) & EC_SPDIF1_SEL_MASK)
 485 #define EC_CURRENT_PROM_VERSION 0x01    /* Self-explanatory.  This should
 486                                          * be incremented any time the EEPROM's
 487                                          * format is changed.  */
 488
 489 #define EC_EEPROM_SIZE          0x40    /* ECARD EEPROM has 64 16-bit words */
 490
 491 /* Addresses for special values stored in to EEPROM */
 492 #define EC_PROM_VERSION_ADDR    0x20    /* Address of the current prom version */
 493 #define EC_BOARDREV0_ADDR       0x21    /* LSW of board rev */
 494 #define EC_BOARDREV1_ADDR       0x22    /* MSW of board rev */
 495
 496 #define EC_LAST_PROMFILE_ADDR   0x2f
 497
 498 #define EC_SERIALNUM_ADDR       0x30    /* First word of serial number.  The
 499                                          * can be up to 30 characters in length
 500                                          * and is stored as a NULL-terminated
 501                                          * ASCII string.  Any unused bytes must be
 502                                          * filled with zeros */
 503 #define EC_CHECKSUM_ADDR        0x3f    /* Location at which checksum is stored */
 504
 505
 506 /* Most of this stuff is pretty self-evident.  According to the hardware
 507  * dudes, we need to leave the ADCCAL bit low in order to avoid a DC
 508  * offset problem.  Weird.
 509  */
 510 #define EC_RAW_RUN_MODE         (EC_DACMUTEN | EC_ADCRSTN | EC_TRIM_MUTEN | \
 511                                  EC_TRIM_CSN)
 512
 513
 514 #define EC_DEFAULT_ADC_GAIN     0xC4C4
 515 #define EC_DEFAULT_SPDIF0_SEL   0x0
 516 #define EC_DEFAULT_SPDIF1_SEL   0x4
 517
 518 /**************************************************************************
 519  * @func Clock bits into the Ecard's control latch.  The Ecard uses a
 520  *  control latch will is loaded bit-serially by toggling the Modem control
 521  *  lines from function 2 on the E8010.  This function hides these details
 522  *  and presents the illusion that we are actually writing to a distinct
 523  *  register.
 524  */
 525
 526 static void snd_emu10k1_ecard_write(struct snd_emu10k1 * emu, unsigned int value)
 527 {
 528         unsigned short count;
 529         unsigned int data;
 530         unsigned long hc_port;
 531         unsigned int hc_value;
 532
 533         hc_port = emu->port + HCFG;
 534         hc_value = inl(hc_port) & ~(HOOKN_BIT | HANDN_BIT | PULSEN_BIT);
 535         outl(hc_value, hc_port);
 536
 537         for (count = 0; count < EC_NUM_CONTROL_BITS; count++) {
 538
 539                 /* Set up the value */
 540                 data = ((value & 0x1) ? PULSEN_BIT : 0);
 541                 value >>= 1;
 542
 543                 outl(hc_value | data, hc_port);
 544
 545                 /* Clock the shift register */
 546                 outl(hc_value | data | HANDN_BIT, hc_port);
 547                 outl(hc_value | data, hc_port);
 548         }
 549
 550         /* Latch the bits */
 551         outl(hc_value | HOOKN_BIT, hc_port);
 552         outl(hc_value, hc_port);
 553 }
 554
 555 /**************************************************************************
 556  * @func Set the gain of the ECARD's CS3310 Trim/gain controller.  The
 557  * trim value consists of a 16bit value which is composed of two
 558  * 8 bit gain/trim values, one for the left channel and one for the
 559  * right channel.  The following table maps from the Gain/Attenuation
 560  * value in decibels into the corresponding bit pattern for a single
 561  * channel.
 562  */
 563
 564 static void snd_emu10k1_ecard_setadcgain(struct snd_emu10k1 * emu,
 565                                          unsigned short gain)
 566 {
 567         unsigned int bit;
 568
 569         /* Enable writing to the TRIM registers */
 570         snd_emu10k1_ecard_write(emu, emu->ecard_ctrl & ~EC_TRIM_CSN);
 571
 572         /* Do it again to insure that we meet hold time requirements */
 573         snd_emu10k1_ecard_write(emu, emu->ecard_ctrl & ~EC_TRIM_CSN);
 574
 575         for (bit = (1 << 15); bit; bit >>= 1) {
 576                 unsigned int value;
 577
 578                 value = emu->ecard_ctrl & ~(EC_TRIM_CSN | EC_TRIM_SDATA);
 579
 580                 if (gain & bit)
 581                         value |= EC_TRIM_SDATA;
 582
 583                 /* Clock the bit */
 584                 snd_emu10k1_ecard_write(emu, value);
 585                 snd_emu10k1_ecard_write(emu, value | EC_TRIM_SCLK);
 586                 snd_emu10k1_ecard_write(emu, value);
 587         }
 588
 589         snd_emu10k1_ecard_write(emu, emu->ecard_ctrl);
 590 }
 591
 592 static int snd_emu10k1_ecard_init(struct snd_emu10k1 * emu)
 593 {
 594         unsigned int hc_value;
 595
 596         /* Set up the initial settings */
 597         emu->ecard_ctrl = EC_RAW_RUN_MODE |
 598                           EC_SPDIF0_SELECT(EC_DEFAULT_SPDIF0_SEL) |
 599                           EC_SPDIF1_SELECT(EC_DEFAULT_SPDIF1_SEL);
 600
 601         /* Step 0: Set the codec type in the hardware control register
 602          * and enable audio output */
 603         hc_value = inl(emu->port + HCFG);
 604         outl(hc_value | HCFG_AUDIOENABLE | HCFG_CODECFORMAT_I2S, emu->port + HCFG);
 605         inl(emu->port + HCFG);
 606
 607         /* Step 1: Turn off the led and deassert TRIM_CS */
 608         snd_emu10k1_ecard_write(emu, EC_ADCCAL | EC_LEDN | EC_TRIM_CSN);
 609
 610         /* Step 2: Calibrate the ADC and DAC */
 611         snd_emu10k1_ecard_write(emu, EC_DACCAL | EC_LEDN | EC_TRIM_CSN);
 612
 613         /* Step 3: Wait for awhile;   XXX We can't get away with this
 614          * under a real operating system; we'll need to block and wait that
 615          * way. */
 616         snd_emu10k1_wait(emu, 48000);
 617
 618         /* Step 4: Switch off the DAC and ADC calibration.  Note
 619          * That ADC_CAL is actually an inverted signal, so we assert
 620          * it here to stop calibration.  */
 621         snd_emu10k1_ecard_write(emu, EC_ADCCAL | EC_LEDN | EC_TRIM_CSN);
 622
 623         /* Step 4: Switch into run mode */
 624         snd_emu10k1_ecard_write(emu, emu->ecard_ctrl);
 625
 626         /* Step 5: Set the analog input gain */
 627         snd_emu10k1_ecard_setadcgain(emu, EC_DEFAULT_ADC_GAIN);
 628
 629         return 0;
 630 }
 631
 632 static int snd_emu10k1_cardbus_init(struct snd_emu10k1 * emu)
 633 {
 634         unsigned long special_port;
 635         unsigned int value;
 636
 637         /* Special initialisation routine
 638          * before the rest of the IO-Ports become active.
 639          */
 640         special_port = emu->port + 0x38;
 641         value = inl(special_port);
 642         outl(0x00d00000, special_port);
 643         value = inl(special_port);
 644         outl(0x00d00001, special_port);
 645         value = inl(special_port);
 646         outl(0x00d0005f, special_port);
 647         value = inl(special_port);
 648         outl(0x00d0007f, special_port);
 649         value = inl(special_port);
 650         outl(0x0090007f, special_port);
 651         value = inl(special_port);
 652
 653         snd_emu10k1_ptr20_write(emu, TINA2_VOLUME, 0, 0xfefefefe); /* Defaults to 0x30303030 */
 654         /* Delay to give time for ADC chip to switch on. It needs 113ms */
 655         msleep(200);
 656         return 0;
 657 }
 658
 659 static int snd_emu1010_load_firmware(struct snd_emu10k1 * emu, const char * filename)
 660 {
 661         int err;
 662         int n, i;
 663         int reg;
 664         int value;
 665         unsigned int write_post;
 666         unsigned long flags;
 667         const struct firmware *fw_entry;
 668
 669         if ((err = request_firmware(&fw_entry, filename, &emu->pci->dev)) != 0) {
 670                 snd_printk(KERN_ERR "firmware: %s not found. Err=%d\n",filename, err);
 671                 return err;
 672         }
 673         snd_printk(KERN_INFO "firmware size=0x%zx\n", fw_entry->size);
 674
 675         /* The FPGA is a Xilinx Spartan IIE XC2S50E */
 676         /* GPIO7 -> FPGA PGMN
 677          * GPIO6 -> FPGA CCLK
 678          * GPIO5 -> FPGA DIN
 679          * FPGA CONFIG OFF -> FPGA PGMN
 680          */
 681         spin_lock_irqsave(&emu->emu_lock, flags);
 682         outl(0x00, emu->port + A_IOCFG); /* Set PGMN low for 1uS. */
 683         write_post = inl(emu->port + A_IOCFG);
 684         udelay(100);
 685         outl(0x80, emu->port + A_IOCFG); /* Leave bit 7 set during netlist setup. */
 686         write_post = inl(emu->port + A_IOCFG);
 687         udelay(100); /* Allow FPGA memory to clean */
 688         for(n = 0; n < fw_entry->size; n++) {
 689                 value=fw_entry->data[n];
 690                 for(i = 0; i < 8; i++) {
 691                         reg = 0x80;
 692                         if (value & 0x1)
 693                                 reg = reg | 0x20;
 694                         value = value >> 1;
 695                         outl(reg, emu->port + A_IOCFG);
 696                         write_post = inl(emu->port + A_IOCFG);
 697                         outl(reg | 0x40, emu->port + A_IOCFG);
 698                         write_post = inl(emu->port + A_IOCFG);
 699                 }
 700         }
 701         /* After programming, set GPIO bit 4 high again. */
 702         outl(0x10, emu->port + A_IOCFG);
 703         write_post = inl(emu->port + A_IOCFG);
 704         spin_unlock_irqrestore(&emu->emu_lock, flags);
 705
 706         release_firmware(fw_entry);
 707         return 0;
 708 }
 709
 710 static int emu1010_firmware_thread(void *data)
 711 {
 712         struct snd_emu10k1 * emu = data;
 713         int tmp,tmp2;
 714         int reg;
 715         int err;
 716
 717         for (;;) {
 718                 /* Delay to allow Audio Dock to settle */
 719                 msleep_interruptible(1000);
 720                 if (kthread_should_stop())
 721                         break;
 722                 snd_emu1010_fpga_read(emu, EMU_HANA_IRQ_STATUS, &tmp ); /* IRQ Status */
 723                 snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, &reg ); /* OPTIONS: Which cards are attached to the EMU */
 724                 if (reg & EMU_HANA_OPTION_DOCK_OFFLINE) {
 725                         /* Audio Dock attached */
 726                         /* Return to Audio Dock programming mode */
 727                         snd_printk(KERN_INFO "emu1010: Loading Audio Dock Firmware\n");
 728                         snd_emu1010_fpga_write(emu,  EMU_HANA_FPGA_CONFIG, EMU_HANA_FPGA_CONFIG_AUDIODOCK );
 729                         if (emu->card_capabilities->emu_model ==
 730                             EMU_MODEL_EMU1010) {
 731                                 if ((err = snd_emu1010_load_firmware(emu, DOCK_FILENAME)) != 0) {
 732                                         continue;
 733                                 }
 734                         } else if (emu->card_capabilities->emu_model ==
 735                                    EMU_MODEL_EMU1010B) {
 736                                 if ((err = snd_emu1010_load_firmware(emu, MICRO_DOCK_FILENAME)) != 0) {
 737                                         continue;
 738                                 }
 739                         } else if (emu->card_capabilities->emu_model ==
 740                                    EMU_MODEL_EMU1616) {
 741                                 if ((err = snd_emu1010_load_firmware(emu, MICRO_DOCK_FILENAME)) != 0) {
 742                                         continue;
 743                                 }
 744                         }
 745
 746                         snd_emu1010_fpga_write(emu,  EMU_HANA_FPGA_CONFIG, 0 );
 747                         snd_emu1010_fpga_read(emu, EMU_HANA_IRQ_STATUS, &reg );
 748                         snd_printk(KERN_INFO "emu1010: EMU_HANA+DOCK_IRQ_STATUS=0x%x\n",reg);
 749                         /* ID, should read & 0x7f = 0x55 when FPGA programmed. */
 750                         snd_emu1010_fpga_read(emu, EMU_HANA_ID, &reg );
 751                         snd_printk(KERN_INFO "emu1010: EMU_HANA+DOCK_ID=0x%x\n",reg);
 752                         if ((reg & 0x1f) != 0x15) {
 753                                 /* FPGA failed to be programmed */
 754                                 snd_printk(KERN_INFO "emu1010: Loading Audio Dock Firmware file failed, reg=0x%x\n", reg);
 755                                 continue;
 756                         }
 757                         snd_printk(KERN_INFO "emu1010: Audio Dock Firmware loaded\n");
 758                         snd_emu1010_fpga_read(emu, EMU_DOCK_MAJOR_REV, &tmp );
 759                         snd_emu1010_fpga_read(emu, EMU_DOCK_MINOR_REV, &tmp2 );
 760                         snd_printk("Audio Dock ver:%d.%d\n",tmp ,tmp2);
 761                         /* Sync clocking between 1010 and Dock */
 762                         /* Allow DLL to settle */
 763                         msleep(10);
 764                         /* Unmute all. Default is muted after a firmware load */
 765                         snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, EMU_UNMUTE );
 766                 }
 767         }
 768         snd_printk(KERN_INFO "emu1010: firmware thread stopping\n");
 769         return 0;
 770 }
 771
 772 /*
 773  * EMU-1010 - details found out from this driver, official MS Win drivers,
 774  * testing the card:
 775  *
 776  * Audigy2 (aka Alice2):
 777  * ---------------------
 778  *      * communication over PCI
 779  *      * conversion of 32-bit data coming over EMU32 links from HANA FPGA
 780  *        to 2 x 16-bit, using internal DSP instructions
 781  *      * slave mode, clock supplied by HANA
 782  *      * linked to HANA using:
 783  *              32 x 32-bit serial EMU32 output channels
 784  *              16 x EMU32 input channels
 785  *              (?) x I2S I/O channels (?)
 786  *
 787  * FPGA (aka HANA):
 788  * ---------------
 789  *      * provides all (?) physical inputs and outputs of the card
 790  *              (ADC, DAC, SPDIF I/O, ADAT I/O, etc.)
 791  *      * provides clock signal for the card and Alice2
 792  *      * two crystals - for 44.1kHz and 48kHz multiples
 793  *      * provides internal routing of signal sources to signal destinations
 794  *      * inputs/outputs to Alice2 - see above
 795  *
 796  * Current status of the driver:
 797  * ----------------------------
 798  *      * only 44.1/48kHz supported (the MS Win driver supports up to 192 kHz)
 799  *      * PCM device nb. 2:
 800  *              16 x 16-bit playback - snd_emu10k1_fx8010_playback_ops
 801  *              16 x 32-bit capture - snd_emu10k1_capture_efx_ops
 802  */
 803 static int snd_emu10k1_emu1010_init(struct snd_emu10k1 * emu)
 804 {
 805         unsigned int i;
 806         int tmp,tmp2;
 807         int reg;
 808         int err;
 809         const char *filename = NULL;
 810
 811         snd_printk(KERN_INFO "emu1010: Special config.\n");
 812         /* AC97 2.1, Any 16Meg of 4Gig address, Auto-Mute, EMU32 Slave,
 813          * Lock Sound Memory Cache, Lock Tank Memory Cache,
 814          * Mute all codecs.
 815          */
 816         outl(0x0005a00c, emu->port + HCFG);
 817         /* AC97 2.1, Any 16Meg of 4Gig address, Auto-Mute, EMU32 Slave,
 818          * Lock Tank Memory Cache,
 819          * Mute all codecs.
 820          */
 821         outl(0x0005a004, emu->port + HCFG);
 822         /* AC97 2.1, Any 16Meg of 4Gig address, Auto-Mute, EMU32 Slave,
 823          * Mute all codecs.
 824          */
 825         outl(0x0005a000, emu->port + HCFG);
 826         /* AC97 2.1, Any 16Meg of 4Gig address, Auto-Mute, EMU32 Slave,
 827          * Mute all codecs.
 828          */
 829         outl(0x0005a000, emu->port + HCFG);
 830
 831         /* Disable 48Volt power to Audio Dock */
 832         snd_emu1010_fpga_write(emu,  EMU_HANA_DOCK_PWR,  0 );
 833
 834         /* ID, should read & 0x7f = 0x55. (Bit 7 is the IRQ bit) */
 835         snd_emu1010_fpga_read(emu, EMU_HANA_ID, &reg );
 836         snd_printdd("reg1=0x%x\n",reg);
 837         if ((reg & 0x3f) == 0x15) {
 838                 /* FPGA netlist already present so clear it */
 839                 /* Return to programming mode */
 840
 841                 snd_emu1010_fpga_write(emu,  EMU_HANA_FPGA_CONFIG, 0x02 );
 842         }
 843         snd_emu1010_fpga_read(emu, EMU_HANA_ID, &reg );
 844         snd_printdd("reg2=0x%x\n",reg);
 845         if ((reg & 0x3f) == 0x15) {
 846                 /* FPGA failed to return to programming mode */
 847                 snd_printk(KERN_INFO "emu1010: FPGA failed to return to programming mode\n");
 848                 return -ENODEV;
 849         }
 850         snd_printk(KERN_INFO "emu1010: EMU_HANA_ID=0x%x\n",reg);
 851         switch (emu->card_capabilities->emu_model) {
 852         case EMU_MODEL_EMU1010:
 853                 filename = HANA_FILENAME;
 854                 break;
 855         case EMU_MODEL_EMU1010B:
 856                 filename = EMU1010B_FILENAME;
 857                 break;
 858         case EMU_MODEL_EMU1616:
 859                 filename = EMU1010_NOTEBOOK_FILENAME;
 860                 break;
 861         case EMU_MODEL_EMU0404:
 862                 filename = EMU0404_FILENAME;
 863                 break;
 864         default:
 865                 filename = NULL;
 866                 return -ENODEV;
 867                 break;
 868         }
 869         snd_printk(KERN_INFO "emu1010: filename %s testing\n", filename);
 870         err = snd_emu1010_load_firmware(emu, filename);
 871         if (err != 0) {
 872                 snd_printk(
 873                         KERN_INFO "emu1010: Loading Firmware file %s failed\n",
 874                         filename);
 875                 return err;
 876         }
 877
 878         /* ID, should read & 0x7f = 0x55 when FPGA programmed. */
 879         snd_emu1010_fpga_read(emu, EMU_HANA_ID, &reg );
 880         if ((reg & 0x3f) != 0x15) {
 881                 /* FPGA failed to be programmed */
 882                 snd_printk(KERN_INFO "emu1010: Loading Hana Firmware file failed, reg=0x%x\n", reg);
 883                 return -ENODEV;
 884         }
 885
 886         snd_printk(KERN_INFO "emu1010: Hana Firmware loaded\n");
 887         snd_emu1010_fpga_read(emu, EMU_HANA_MAJOR_REV, &tmp );
 888         snd_emu1010_fpga_read(emu, EMU_HANA_MINOR_REV, &tmp2 );
 889         snd_printk("Hana ver:%d.%d\n",tmp ,tmp2);
 890         /* Enable 48Volt power to Audio Dock */
 891         snd_emu1010_fpga_write(emu,  EMU_HANA_DOCK_PWR,  EMU_HANA_DOCK_PWR_ON );
 892
 893         snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, &reg );
 894         snd_printk(KERN_INFO "emu1010: Card options=0x%x\n",reg);
 895         snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, &reg );
 896         snd_printk(KERN_INFO "emu1010: Card options=0x%x\n",reg);
 897         snd_emu1010_fpga_read(emu, EMU_HANA_OPTICAL_TYPE, &tmp );
 898         /* Optical -> ADAT I/O  */
 899         /* 0 : SPDIF
 900          * 1 : ADAT
 901          */
 902         emu->emu1010.optical_in = 1; /* IN_ADAT */
 903         emu->emu1010.optical_out = 1; /* IN_ADAT */
 904         tmp = 0;
 905         tmp = (emu->emu1010.optical_in ? EMU_HANA_OPTICAL_IN_ADAT : 0) |
 906                 (emu->emu1010.optical_out ? EMU_HANA_OPTICAL_OUT_ADAT : 0);
 907         snd_emu1010_fpga_write(emu, EMU_HANA_OPTICAL_TYPE, tmp );
 908         snd_emu1010_fpga_read(emu, EMU_HANA_ADC_PADS, &tmp );
 909         /* Set no attenuation on Audio Dock pads. */
 910         snd_emu1010_fpga_write(emu, EMU_HANA_ADC_PADS, 0x00 );
 911         emu->emu1010.adc_pads = 0x00;
 912         snd_emu1010_fpga_read(emu, EMU_HANA_DOCK_MISC, &tmp );
 913         /* Unmute Audio dock DACs, Headphone source DAC-4. */
 914         snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_MISC, 0x30 );
 915         snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_LEDS_2, 0x12 );
 916         snd_emu1010_fpga_read(emu, EMU_HANA_DAC_PADS, &tmp );
 917         /* DAC PADs. */
 918         snd_emu1010_fpga_write(emu, EMU_HANA_DAC_PADS, 0x0f );
 919         emu->emu1010.dac_pads = 0x0f;
 920         snd_emu1010_fpga_read(emu, EMU_HANA_DOCK_MISC, &tmp );
 921         snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_MISC, 0x30 );
 922         snd_emu1010_fpga_read(emu, EMU_HANA_SPDIF_MODE, &tmp );
 923         /* SPDIF Format. Set Consumer mode, 24bit, copy enable */
 924         snd_emu1010_fpga_write(emu, EMU_HANA_SPDIF_MODE, 0x10 );
 925         /* MIDI routing */
 926         snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_IN, 0x19 );
 927         /* Unknown. */
 928         snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_OUT, 0x0c );
 929         /* snd_emu1010_fpga_write(emu, 0x09, 0x0f ); // IRQ Enable: All on */
 930         /* IRQ Enable: All off */
 931         snd_emu1010_fpga_write(emu, EMU_HANA_IRQ_ENABLE, 0x00 );
 932
 933         snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, &reg );
 934         snd_printk(KERN_INFO "emu1010: Card options3=0x%x\n",reg);
 935         /* Default WCLK set to 48kHz. */
 936         snd_emu1010_fpga_write(emu, EMU_HANA_DEFCLOCK, 0x00 );
 937         /* Word Clock source, Internal 48kHz x1 */
 938         snd_emu1010_fpga_write(emu, EMU_HANA_WCLOCK, EMU_HANA_WCLOCK_INT_48K );
 939         //snd_emu1010_fpga_write(emu, EMU_HANA_WCLOCK, EMU_HANA_WCLOCK_INT_48K | EMU_HANA_WCLOCK_4X );
 940         /* Audio Dock LEDs. */
 941         snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_LEDS_2, 0x12 );
 942
 943 #if 0
 944         /* For 96kHz */
 945         snd_emu1010_fpga_link_dst_src_write(emu,
 946                 EMU_DST_ALICE2_EMU32_0, EMU_SRC_HAMOA_ADC_LEFT1);
 947         snd_emu1010_fpga_link_dst_src_write(emu,
 948                 EMU_DST_ALICE2_EMU32_1, EMU_SRC_HAMOA_ADC_RIGHT1);
 949         snd_emu1010_fpga_link_dst_src_write(emu,
 950                 EMU_DST_ALICE2_EMU32_4, EMU_SRC_HAMOA_ADC_LEFT2);
 951         snd_emu1010_fpga_link_dst_src_write(emu,
 952                 EMU_DST_ALICE2_EMU32_5, EMU_SRC_HAMOA_ADC_RIGHT2);
 953 #endif
 954 #if 0
 955         /* For 192kHz */
 956         snd_emu1010_fpga_link_dst_src_write(emu,
 957                 EMU_DST_ALICE2_EMU32_0, EMU_SRC_HAMOA_ADC_LEFT1);
 958         snd_emu1010_fpga_link_dst_src_write(emu,
 959                 EMU_DST_ALICE2_EMU32_1, EMU_SRC_HAMOA_ADC_RIGHT1);
 960         snd_emu1010_fpga_link_dst_src_write(emu,
 961                 EMU_DST_ALICE2_EMU32_2, EMU_SRC_HAMOA_ADC_LEFT2);
 962         snd_emu1010_fpga_link_dst_src_write(emu,
 963                 EMU_DST_ALICE2_EMU32_3, EMU_SRC_HAMOA_ADC_RIGHT2);
 964         snd_emu1010_fpga_link_dst_src_write(emu,
 965                 EMU_DST_ALICE2_EMU32_4, EMU_SRC_HAMOA_ADC_LEFT3);
 966         snd_emu1010_fpga_link_dst_src_write(emu,
 967                 EMU_DST_ALICE2_EMU32_5, EMU_SRC_HAMOA_ADC_RIGHT3);
 968         snd_emu1010_fpga_link_dst_src_write(emu,
 969                 EMU_DST_ALICE2_EMU32_6, EMU_SRC_HAMOA_ADC_LEFT4);
 970         snd_emu1010_fpga_link_dst_src_write(emu,
 971                 EMU_DST_ALICE2_EMU32_7, EMU_SRC_HAMOA_ADC_RIGHT4);
 972 #endif
 973 #if 1
 974         /* For 48kHz */
 975         snd_emu1010_fpga_link_dst_src_write(emu,
 976                 EMU_DST_ALICE2_EMU32_0, EMU_SRC_DOCK_MIC_A1);
 977         snd_emu1010_fpga_link_dst_src_write(emu,
 978                 EMU_DST_ALICE2_EMU32_1, EMU_SRC_DOCK_MIC_B1);
 979         snd_emu1010_fpga_link_dst_src_write(emu,
 980                 EMU_DST_ALICE2_EMU32_2, EMU_SRC_HAMOA_ADC_LEFT2);
 981         snd_emu1010_fpga_link_dst_src_write(emu,
 982                 EMU_DST_ALICE2_EMU32_3, EMU_SRC_HAMOA_ADC_LEFT2);
 983         snd_emu1010_fpga_link_dst_src_write(emu,
 984                 EMU_DST_ALICE2_EMU32_4, EMU_SRC_DOCK_ADC1_LEFT1);
 985         snd_emu1010_fpga_link_dst_src_write(emu,
 986                 EMU_DST_ALICE2_EMU32_5, EMU_SRC_DOCK_ADC1_RIGHT1);
 987         snd_emu1010_fpga_link_dst_src_write(emu,
 988                 EMU_DST_ALICE2_EMU32_6, EMU_SRC_DOCK_ADC2_LEFT1);
 989         snd_emu1010_fpga_link_dst_src_write(emu,
 990                 EMU_DST_ALICE2_EMU32_7, EMU_SRC_DOCK_ADC2_RIGHT1);
 991         /* Pavel Hofman - setting defaults for 8 more capture channels
 992          * Defaults only, users will set their own values anyways, let's
 993          * just copy/paste.
 994          */
 995
 996         snd_emu1010_fpga_link_dst_src_write(emu,
 997                 EMU_DST_ALICE2_EMU32_8, EMU_SRC_DOCK_MIC_A1);
 998         snd_emu1010_fpga_link_dst_src_write(emu,
 999                 EMU_DST_ALICE2_EMU32_9, EMU_SRC_DOCK_MIC_B1);
1000         snd_emu1010_fpga_link_dst_src_write(emu,
1001                 EMU_DST_ALICE2_EMU32_A, EMU_SRC_HAMOA_ADC_LEFT2);
1002         snd_emu1010_fpga_link_dst_src_write(emu,
1003                 EMU_DST_ALICE2_EMU32_B, EMU_SRC_HAMOA_ADC_LEFT2);
1004         snd_emu1010_fpga_link_dst_src_write(emu,
1005                 EMU_DST_ALICE2_EMU32_C, EMU_SRC_DOCK_ADC1_LEFT1);
1006         snd_emu1010_fpga_link_dst_src_write(emu,
1007                 EMU_DST_ALICE2_EMU32_D, EMU_SRC_DOCK_ADC1_RIGHT1);
1008         snd_emu1010_fpga_link_dst_src_write(emu,
1009                 EMU_DST_ALICE2_EMU32_E, EMU_SRC_DOCK_ADC2_LEFT1);
1010         snd_emu1010_fpga_link_dst_src_write(emu,
1011                 EMU_DST_ALICE2_EMU32_F, EMU_SRC_DOCK_ADC2_RIGHT1);
1012 #endif
1013 #if 0
1014         /* Original */
1015         snd_emu1010_fpga_link_dst_src_write(emu,
1016                 EMU_DST_ALICE2_EMU32_4, EMU_SRC_HANA_ADAT);
1017         snd_emu1010_fpga_link_dst_src_write(emu,
1018                 EMU_DST_ALICE2_EMU32_5, EMU_SRC_HANA_ADAT + 1);
1019         snd_emu1010_fpga_link_dst_src_write(emu,
1020                 EMU_DST_ALICE2_EMU32_6, EMU_SRC_HANA_ADAT + 2);
1021         snd_emu1010_fpga_link_dst_src_write(emu,
1022                 EMU_DST_ALICE2_EMU32_7, EMU_SRC_HANA_ADAT + 3);
1023         snd_emu1010_fpga_link_dst_src_write(emu,
1024                 EMU_DST_ALICE2_EMU32_8, EMU_SRC_HANA_ADAT + 4);
1025         snd_emu1010_fpga_link_dst_src_write(emu,
1026                 EMU_DST_ALICE2_EMU32_9, EMU_SRC_HANA_ADAT + 5);
1027         snd_emu1010_fpga_link_dst_src_write(emu,
1028                 EMU_DST_ALICE2_EMU32_A, EMU_SRC_HANA_ADAT + 6);
1029         snd_emu1010_fpga_link_dst_src_write(emu,
1030                 EMU_DST_ALICE2_EMU32_B, EMU_SRC_HANA_ADAT + 7);
1031         snd_emu1010_fpga_link_dst_src_write(emu,
1032                 EMU_DST_ALICE2_EMU32_C, EMU_SRC_DOCK_MIC_A1);
1033         snd_emu1010_fpga_link_dst_src_write(emu,
1034                 EMU_DST_ALICE2_EMU32_D, EMU_SRC_DOCK_MIC_B1);
1035         snd_emu1010_fpga_link_dst_src_write(emu,
1036                 EMU_DST_ALICE2_EMU32_E, EMU_SRC_HAMOA_ADC_LEFT2);
1037         snd_emu1010_fpga_link_dst_src_write(emu,
1038                 EMU_DST_ALICE2_EMU32_F, EMU_SRC_HAMOA_ADC_LEFT2);
1039 #endif
1040         for (i = 0;i < 0x20; i++ ) {
1041                 /* AudioDock Elink <-  Silence */
1042                 snd_emu1010_fpga_link_dst_src_write(emu, 0x0100+i, EMU_SRC_SILENCE);
1043         }
1044         for (i = 0;i < 4; i++) {
1045                 /* Hana SPDIF Out <- Silence */
1046                 snd_emu1010_fpga_link_dst_src_write(emu, 0x0200+i, EMU_SRC_SILENCE);
1047         }
1048         for (i = 0;i < 7; i++) {
1049                 /* Hamoa DAC <- Silence */
1050                 snd_emu1010_fpga_link_dst_src_write(emu, 0x0300+i, EMU_SRC_SILENCE);
1051         }
1052         for (i = 0;i < 7; i++) {
1053                 /* Hana ADAT Out <- Silence */
1054                 snd_emu1010_fpga_link_dst_src_write(emu, EMU_DST_HANA_ADAT + i, EMU_SRC_SILENCE);
1055         }
1056         snd_emu1010_fpga_link_dst_src_write(emu,
1057                 EMU_DST_ALICE_I2S0_LEFT, EMU_SRC_DOCK_ADC1_LEFT1);
1058         snd_emu1010_fpga_link_dst_src_write(emu,
1059                 EMU_DST_ALICE_I2S0_RIGHT, EMU_SRC_DOCK_ADC1_RIGHT1);
1060         snd_emu1010_fpga_link_dst_src_write(emu,
1061                 EMU_DST_ALICE_I2S1_LEFT, EMU_SRC_DOCK_ADC2_LEFT1);
1062         snd_emu1010_fpga_link_dst_src_write(emu,
1063                 EMU_DST_ALICE_I2S1_RIGHT, EMU_SRC_DOCK_ADC2_RIGHT1);
1064         snd_emu1010_fpga_link_dst_src_write(emu,
1065                 EMU_DST_ALICE_I2S2_LEFT, EMU_SRC_DOCK_ADC3_LEFT1);
1066         snd_emu1010_fpga_link_dst_src_write(emu,
1067                 EMU_DST_ALICE_I2S2_RIGHT, EMU_SRC_DOCK_ADC3_RIGHT1);
1068         snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, 0x01 ); // Unmute all
1069
1070         snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, &tmp );
1071
1072         /* AC97 1.03, Any 32Meg of 2Gig address, Auto-Mute, EMU32 Slave,
1073          * Lock Sound Memory Cache, Lock Tank Memory Cache,
1074          * Mute all codecs.
1075          */
1076         outl(0x0000a000, emu->port + HCFG);
1077         /* AC97 1.03, Any 32Meg of 2Gig address, Auto-Mute, EMU32 Slave,
1078          * Lock Sound Memory Cache, Lock Tank Memory Cache,
1079          * Un-Mute all codecs.
1080          */
1081         outl(0x0000a001, emu->port + HCFG);
1082
1083         /* Initial boot complete. Now patches */
1084
1085         snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, &tmp );
1086         snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_IN, 0x19 ); /* MIDI Route */
1087         snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_OUT, 0x0c ); /* Unknown */
1088         snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_IN, 0x19 ); /* MIDI Route */
1089         snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_OUT, 0x0c ); /* Unknown */
1090         snd_emu1010_fpga_read(emu, EMU_HANA_SPDIF_MODE, &tmp );
1091         snd_emu1010_fpga_write(emu, EMU_HANA_SPDIF_MODE, 0x10 ); /* SPDIF Format spdif  (or 0x11 for aes/ebu) */
1092
1093         /* Start Micro/Audio Dock firmware loader thread */
1094         if (!emu->emu1010.firmware_thread) {
1095                 emu->emu1010.firmware_thread =
1096                         kthread_create(emu1010_firmware_thread, emu,
1097                                        "emu1010_firmware");
1098                 wake_up_process(emu->emu1010.firmware_thread);
1099         }
1100
1101 #if 0
1102         snd_emu1010_fpga_link_dst_src_write(emu,
1103                 EMU_DST_HAMOA_DAC_LEFT1, EMU_SRC_ALICE_EMU32B + 2); /* ALICE2 bus 0xa2 */
1104         snd_emu1010_fpga_link_dst_src_write(emu,
1105                 EMU_DST_HAMOA_DAC_RIGHT1, EMU_SRC_ALICE_EMU32B + 3); /* ALICE2 bus 0xa3 */
1106         snd_emu1010_fpga_link_dst_src_write(emu,
1107                 EMU_DST_HANA_SPDIF_LEFT1, EMU_SRC_ALICE_EMU32A + 2); /* ALICE2 bus 0xb2 */
1108         snd_emu1010_fpga_link_dst_src_write(emu,
1109                 EMU_DST_HANA_SPDIF_RIGHT1, EMU_SRC_ALICE_EMU32A + 3); /* ALICE2 bus 0xb3 */
1110 #endif
1111         /* Default outputs */
1112         if (emu->card_capabilities->emu_model == EMU_MODEL_EMU1616) {
1113                 /* 1616(M) cardbus default outputs */
1114                 /* ALICE2 bus 0xa0 */
1115                 snd_emu1010_fpga_link_dst_src_write(emu,
1116                         EMU_DST_DOCK_DAC1_LEFT1, EMU_SRC_ALICE_EMU32A + 0);
1117                 emu->emu1010.output_source[0] = 17;
1118                 snd_emu1010_fpga_link_dst_src_write(emu,
1119                         EMU_DST_DOCK_DAC1_RIGHT1, EMU_SRC_ALICE_EMU32A + 1);
1120                 emu->emu1010.output_source[1] = 18;
1121                 snd_emu1010_fpga_link_dst_src_write(emu,
1122                         EMU_DST_DOCK_DAC2_LEFT1, EMU_SRC_ALICE_EMU32A + 2);
1123                 emu->emu1010.output_source[2] = 19;
1124                 snd_emu1010_fpga_link_dst_src_write(emu,
1125                         EMU_DST_DOCK_DAC2_RIGHT1, EMU_SRC_ALICE_EMU32A + 3);
1126                 emu->emu1010.output_source[3] = 20;
1127                 snd_emu1010_fpga_link_dst_src_write(emu,
1128                         EMU_DST_DOCK_DAC3_LEFT1, EMU_SRC_ALICE_EMU32A + 4);
1129                 emu->emu1010.output_source[4] = 21;
1130                 snd_emu1010_fpga_link_dst_src_write(emu,
1131                         EMU_DST_DOCK_DAC3_RIGHT1, EMU_SRC_ALICE_EMU32A + 5);
1132                 emu->emu1010.output_source[5] = 22;
1133                 /* ALICE2 bus 0xa0 */
1134                 snd_emu1010_fpga_link_dst_src_write(emu,
1135                         EMU_DST_MANA_DAC_LEFT, EMU_SRC_ALICE_EMU32A + 0);
1136                 emu->emu1010.output_source[16] = 17;
1137                 snd_emu1010_fpga_link_dst_src_write(emu,
1138                         EMU_DST_MANA_DAC_RIGHT, EMU_SRC_ALICE_EMU32A + 1);
1139                 emu->emu1010.output_source[17] = 18;
1140         } else {
1141                 /* ALICE2 bus 0xa0 */
1142                 snd_emu1010_fpga_link_dst_src_write(emu,
1143                         EMU_DST_DOCK_DAC1_LEFT1, EMU_SRC_ALICE_EMU32A + 0);
1144                 emu->emu1010.output_source[0] = 21;
1145                 snd_emu1010_fpga_link_dst_src_write(emu,
1146                         EMU_DST_DOCK_DAC1_RIGHT1, EMU_SRC_ALICE_EMU32A + 1);
1147                 emu->emu1010.output_source[1] = 22;
1148                 snd_emu1010_fpga_link_dst_src_write(emu,
1149                         EMU_DST_DOCK_DAC2_LEFT1, EMU_SRC_ALICE_EMU32A + 2);
1150                 emu->emu1010.output_source[2] = 23;
1151                 snd_emu1010_fpga_link_dst_src_write(emu,
1152                         EMU_DST_DOCK_DAC2_RIGHT1, EMU_SRC_ALICE_EMU32A + 3);
1153                 emu->emu1010.output_source[3] = 24;
1154                 snd_emu1010_fpga_link_dst_src_write(emu,
1155                         EMU_DST_DOCK_DAC3_LEFT1, EMU_SRC_ALICE_EMU32A + 4);
1156                 emu->emu1010.output_source[4] = 25;
1157                 snd_emu1010_fpga_link_dst_src_write(emu,
1158                         EMU_DST_DOCK_DAC3_RIGHT1, EMU_SRC_ALICE_EMU32A + 5);
1159                 emu->emu1010.output_source[5] = 26;
1160                 snd_emu1010_fpga_link_dst_src_write(emu,
1161                         EMU_DST_DOCK_DAC4_LEFT1, EMU_SRC_ALICE_EMU32A + 6);
1162                 emu->emu1010.output_source[6] = 27;
1163                 snd_emu1010_fpga_link_dst_src_write(emu,
1164                         EMU_DST_DOCK_DAC4_RIGHT1, EMU_SRC_ALICE_EMU32A + 7);
1165                 emu->emu1010.output_source[7] = 28;
1166                 /* ALICE2 bus 0xa0 */
1167                 snd_emu1010_fpga_link_dst_src_write(emu,
1168                         EMU_DST_DOCK_PHONES_LEFT1, EMU_SRC_ALICE_EMU32A + 0);
1169                 emu->emu1010.output_source[8] = 21;
1170                 snd_emu1010_fpga_link_dst_src_write(emu,
1171                         EMU_DST_DOCK_PHONES_RIGHT1, EMU_SRC_ALICE_EMU32A + 1);
1172                 emu->emu1010.output_source[9] = 22;
1173                 /* ALICE2 bus 0xa0 */
1174                 snd_emu1010_fpga_link_dst_src_write(emu,
1175                         EMU_DST_DOCK_SPDIF_LEFT1, EMU_SRC_ALICE_EMU32A + 0);
1176                 emu->emu1010.output_source[10] = 21;
1177                 snd_emu1010_fpga_link_dst_src_write(emu,
1178                         EMU_DST_DOCK_SPDIF_RIGHT1, EMU_SRC_ALICE_EMU32A + 1);
1179                 emu->emu1010.output_source[11] = 22;
1180                 /* ALICE2 bus 0xa0 */
1181                 snd_emu1010_fpga_link_dst_src_write(emu,
1182                         EMU_DST_HANA_SPDIF_LEFT1, EMU_SRC_ALICE_EMU32A + 0);
1183                 emu->emu1010.output_source[12] = 21;
1184                 snd_emu1010_fpga_link_dst_src_write(emu,
1185                         EMU_DST_HANA_SPDIF_RIGHT1, EMU_SRC_ALICE_EMU32A + 1);
1186                 emu->emu1010.output_source[13] = 22;
1187                 /* ALICE2 bus 0xa0 */
1188                 snd_emu1010_fpga_link_dst_src_write(emu,
1189                         EMU_DST_HAMOA_DAC_LEFT1, EMU_SRC_ALICE_EMU32A + 0);
1190                 emu->emu1010.output_source[14] = 21;
1191                 snd_emu1010_fpga_link_dst_src_write(emu,
1192                         EMU_DST_HAMOA_DAC_RIGHT1, EMU_SRC_ALICE_EMU32A + 1);
1193                 emu->emu1010.output_source[15] = 22;
1194                 /* ALICE2 bus 0xa0 */
1195                 snd_emu1010_fpga_link_dst_src_write(emu,
1196                         EMU_DST_HANA_ADAT, EMU_SRC_ALICE_EMU32A + 0);
1197                 emu->emu1010.output_source[16] = 21;
1198                 snd_emu1010_fpga_link_dst_src_write(emu,
1199                         EMU_DST_HANA_ADAT + 1, EMU_SRC_ALICE_EMU32A + 1);
1200                 emu->emu1010.output_source[17] = 22;
1201                 snd_emu1010_fpga_link_dst_src_write(emu,
1202                         EMU_DST_HANA_ADAT + 2, EMU_SRC_ALICE_EMU32A + 2);
1203                 emu->emu1010.output_source[18] = 23;
1204                 snd_emu1010_fpga_link_dst_src_write(emu,
1205                         EMU_DST_HANA_ADAT + 3, EMU_SRC_ALICE_EMU32A + 3);
1206                 emu->emu1010.output_source[19] = 24;
1207                 snd_emu1010_fpga_link_dst_src_write(emu,
1208                         EMU_DST_HANA_ADAT + 4, EMU_SRC_ALICE_EMU32A + 4);
1209                 emu->emu1010.output_source[20] = 25;
1210                 snd_emu1010_fpga_link_dst_src_write(emu,
1211                         EMU_DST_HANA_ADAT + 5, EMU_SRC_ALICE_EMU32A + 5);
1212                 emu->emu1010.output_source[21] = 26;
1213                 snd_emu1010_fpga_link_dst_src_write(emu,
1214                         EMU_DST_HANA_ADAT + 6, EMU_SRC_ALICE_EMU32A + 6);
1215                 emu->emu1010.output_source[22] = 27;
1216                 snd_emu1010_fpga_link_dst_src_write(emu,
1217                         EMU_DST_HANA_ADAT + 7, EMU_SRC_ALICE_EMU32A + 7);
1218                 emu->emu1010.output_source[23] = 28;
1219         }
1220         /* TEMP: Select SPDIF in/out */
1221         //snd_emu1010_fpga_write(emu, EMU_HANA_OPTICAL_TYPE, 0x0); /* Output spdif */
1222
1223         /* TEMP: Select 48kHz SPDIF out */
1224         snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, 0x0); /* Mute all */
1225         snd_emu1010_fpga_write(emu, EMU_HANA_DEFCLOCK, 0x0); /* Default fallback clock 48kHz */
1226         /* Word Clock source, Internal 48kHz x1 */
1227         snd_emu1010_fpga_write(emu, EMU_HANA_WCLOCK, EMU_HANA_WCLOCK_INT_48K );
1228         //snd_emu1010_fpga_write(emu, EMU_HANA_WCLOCK, EMU_HANA_WCLOCK_INT_48K | EMU_HANA_WCLOCK_4X );
1229         emu->emu1010.internal_clock = 1; /* 48000 */
1230         snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_LEDS_2, 0x12);/* Set LEDs on Audio Dock */
1231         snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, 0x1); /* Unmute all */
1232         //snd_emu1010_fpga_write(emu, 0x7, 0x0); /* Mute all */
1233         //snd_emu1010_fpga_write(emu, 0x7, 0x1); /* Unmute all */
1234         //snd_emu1010_fpga_write(emu, 0xe, 0x12); /* Set LEDs on Audio Dock */
1235
1236         return 0;
1237 }
1238 /*
1239  *  Create the EMU10K1 instance
1240  */
1241
1242 #ifdef CONFIG_PM
1243 static int alloc_pm_buffer(struct snd_emu10k1 *emu);
1244 static void free_pm_buffer(struct snd_emu10k1 *emu);
1245 #endif
1246
1247 static int snd_emu10k1_free(struct snd_emu10k1 *emu)
1248 {
1249         if (emu->port) {        /* avoid access to already used hardware */
1250                 snd_emu10k1_fx8010_tram_setup(emu, 0);
1251                 snd_emu10k1_done(emu);
1252                 snd_emu10k1_free_efx(emu);
1253         }
1254         if (emu->card_capabilities->emu_model == EMU_MODEL_EMU1010) {
1255                 /* Disable 48Volt power to Audio Dock */
1256                 snd_emu1010_fpga_write(emu,  EMU_HANA_DOCK_PWR,  0 );
1257         }
1258         if (emu->emu1010.firmware_thread)
1259                 kthread_stop(emu->emu1010.firmware_thread);
1260         if (emu->irq >= 0)
1261                 free_irq(emu->irq, emu);
1262         /* remove reserved page */
1263         if (emu->reserved_page) {
1264                 snd_emu10k1_synth_free(emu,
1265                         (struct snd_util_memblk *)emu->reserved_page);
1266                 emu->reserved_page = NULL;
1267         }
1268         if (emu->memhdr)
1269                 snd_util_memhdr_free(emu->memhdr);
1270         if (emu->silent_page.area)
1271                 snd_dma_free_pages(&emu->silent_page);
1272         if (emu->ptb_pages.area)
1273                 snd_dma_free_pages(&emu->ptb_pages);
1274         vfree(emu->page_ptr_table);
1275         vfree(emu->page_addr_table);
1276 #ifdef CONFIG_PM
1277         free_pm_buffer(emu);
1278 #endif
1279         if (emu->port)
1280                 pci_release_regions(emu->pci);
1281         if (emu->card_capabilities->ca0151_chip) /* P16V */
1282                 snd_p16v_free(emu);
1283         pci_disable_device(emu->pci);
1284         kfree(emu);
1285         return 0;
1286 }
1287
1288 static int snd_emu10k1_dev_free(struct snd_device *device)
1289 {
1290         struct snd_emu10k1 *emu = device->device_data;
1291         return snd_emu10k1_free(emu);
1292 }
1293
1294 static struct snd_emu_chip_details emu_chip_details[] = {
1295         /* Audigy 2 Value AC3 out does not work yet. Need to find out how to turn off interpolators.*/
1296         /* Tested by James@superbug.co.uk 3rd July 2005 */
1297         /* DSP: CA0108-IAT
1298          * DAC: CS4382-KQ
1299          * ADC: Philips 1361T
1300          * AC97: STAC9750
1301          * CA0151: None
1302          */
1303         {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x10011102,
1304          .driver = "Audigy2", .name = "Audigy 2 Value [SB0400]",
1305          .id = "Audigy2",
1306          .emu10k2_chip = 1,
1307          .ca0108_chip = 1,
1308          .spk71 = 1,
1309          .ac97_chip = 1} ,
1310         /* Audigy4 (Not PRO) SB0610 */
1311         /* Tested by James@superbug.co.uk 4th April 2006 */
1312         /* A_IOCFG bits
1313          * Output
1314          * 0: ?
1315          * 1: ?
1316          * 2: ?
1317          * 3: 0 - Digital Out, 1 - Line in
1318          * 4: ?
1319          * 5: ?
1320          * 6: ?
1321          * 7: ?
1322          * Input
1323          * 8: ?
1324          * 9: ?
1325          * A: Green jack sense (Front)
1326          * B: ?
1327          * C: Black jack sense (Rear/Side Right)
1328          * D: Yellow jack sense (Center/LFE/Side Left)
1329          * E: ?
1330          * F: ?
1331          *
1332          * Digital Out/Line in switch using A_IOCFG bit 3 (0x08)
1333          * 0 - Digital Out
1334          * 1 - Line in
1335          */
1336         /* Mic input not tested.
1337          * Analog CD input not tested
1338          * Digital Out not tested.
1339          * Line in working.
1340          * Audio output 5.1 working. Side outputs not working.
1341          */
1342         /* DSP: CA10300-IAT LF
1343          * DAC: Cirrus Logic CS4382-KQZ
1344          * ADC: Philips 1361T
1345          * AC97: Sigmatel STAC9750
1346          * CA0151: None
1347          */
1348         {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x10211102,
1349          .driver = "Audigy2", .name = "Audigy 4 [SB0610]",
1350          .id = "Audigy2",
1351          .emu10k2_chip = 1,
1352          .ca0108_chip = 1,
1353          .spk71 = 1,
1354          .adc_1361t = 1,  /* 24 bit capture instead of 16bit */
1355          .ac97_chip = 1} ,
1356         /* Audigy 2 ZS Notebook Cardbus card.*/
1357         /* Tested by James@superbug.co.uk 6th November 2006 */
1358         /* Audio output 7.1/Headphones working.
1359          * Digital output working. (AC3 not checked, only PCM)
1360          * Audio Mic/Line inputs working.
1361          * Digital input not tested.
1362          */
1363         /* DSP: Tina2
1364          * DAC: Wolfson WM8768/WM8568
1365          * ADC: Wolfson WM8775
1366          * AC97: None
1367          * CA0151: None
1368          */
1369         /* Tested by James@superbug.co.uk 4th April 2006 */
1370         /* A_IOCFG bits
1371          * Output
1372          * 0: Not Used
1373          * 1: 0 = Mute all the 7.1 channel out. 1 = unmute.
1374          * 2: Analog input 0 = line in, 1 = mic in
1375          * 3: Not Used
1376          * 4: Digital output 0 = off, 1 = on.
1377          * 5: Not Used
1378          * 6: Not Used
1379          * 7: Not Used
1380          * Input
1381          *      All bits 1 (0x3fxx) means nothing plugged in.
1382          * 8-9: 0 = Line in/Mic, 2 = Optical in, 3 = Nothing.
1383          * A-B: 0 = Headphones, 2 = Optical out, 3 = Nothing.
1384          * C-D: 2 = Front/Rear/etc, 3 = nothing.
1385          * E-F: Always 0
1386          *
1387          */
1388         {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x20011102,
1389          .driver = "Audigy2", .name = "Audigy 2 ZS Notebook [SB0530]",
1390          .id = "Audigy2",
1391          .emu10k2_chip = 1,
1392          .ca0108_chip = 1,
1393          .ca_cardbus_chip = 1,
1394          .spi_dac = 1,
1395          .i2c_adc = 1,
1396          .spk71 = 1} ,
1397         /* Tested by James@superbug.co.uk 4th Nov 2007. */
1398         {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x42011102,
1399          .driver = "Audigy2", .name = "E-mu 1010 Notebook [MAEM8950]",
1400          .id = "EMU1010",
1401          .emu10k2_chip = 1,
1402          .ca0108_chip = 1,
1403          .ca_cardbus_chip = 1,
1404          .spk71 = 1 ,
1405          .emu_model = EMU_MODEL_EMU1616},
1406         /* Tested by James@superbug.co.uk 4th Nov 2007. */
1407         {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x40041102,
1408          .driver = "Audigy2", .name = "E-mu 1010b PCI [MAEM????]",
1409          .id = "EMU1010",
1410          .emu10k2_chip = 1,
1411          .ca0108_chip = 1,
1412          .spk71 = 1,
1413          .emu_model = EMU_MODEL_EMU1010B},
1414         /* Tested by James@superbug.co.uk 8th July 2005. */
1415         {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x40011102,
1416          .driver = "Audigy2", .name = "E-mu 1010 [4001]",
1417          .id = "EMU1010",
1418          .emu10k2_chip = 1,
1419          .ca0102_chip = 1,
1420          .spk71 = 1,
1421          .emu_model = EMU_MODEL_EMU1010}, /* Emu 1010 */
1422         /* EMU0404b */
1423         {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x40021102,
1424          .driver = "Audigy2", .name = "E-mu 0404b [4002]",
1425          .id = "EMU0404",
1426          .emu10k2_chip = 1,
1427          .ca0108_chip = 1,
1428          .spk71 = 1,
1429          .emu_model = EMU_MODEL_EMU0404}, /* EMU 0404 */
1430         /* Tested by James@superbug.co.uk 20-3-2007. */
1431         {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x40021102,
1432          .driver = "Audigy2", .name = "E-mu 0404 [4002]",
1433          .id = "EMU0404",
1434          .emu10k2_chip = 1,
1435          .ca0102_chip = 1,
1436          .spk71 = 1,
1437          .emu_model = EMU_MODEL_EMU0404}, /* EMU 0404 */
1438         /* Audigy4 (Not PRO) SB0610 */
1439         {.vendor = 0x1102, .device = 0x0008,
1440          .driver = "Audigy2", .name = "Audigy 2 Value [Unknown]",
1441          .id = "Audigy2",
1442          .emu10k2_chip = 1,
1443          .ca0108_chip = 1,
1444          .ac97_chip = 1} ,
1445         /* Tested by James@superbug.co.uk 3rd July 2005 */
1446         {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20071102,
1447          .driver = "Audigy2", .name = "Audigy 4 PRO [SB0380]",
1448          .id = "Audigy2",
1449          .emu10k2_chip = 1,
1450          .ca0102_chip = 1,
1451          .ca0151_chip = 1,
1452          .spk71 = 1,
1453          .spdif_bug = 1,
1454          .ac97_chip = 1} ,
1455         /* Tested by shane-alsa@cm.nu 5th Nov 2005 */
1456         /* The 0x20061102 does have SB0350 written on it
1457          * Just like 0x20021102
1458          */
1459         {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20061102,
1460          .driver = "Audigy2", .name = "Audigy 2 [SB0350b]",
1461          .id = "Audigy2",
1462          .emu10k2_chip = 1,
1463          .ca0102_chip = 1,
1464          .ca0151_chip = 1,
1465          .spk71 = 1,
1466          .spdif_bug = 1,
1467          .ac97_chip = 1} ,
1468         {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20021102,
1469          .driver = "Audigy2", .name = "Audigy 2 ZS [SB0350]",
1470          .id = "Audigy2",
1471          .emu10k2_chip = 1,
1472          .ca0102_chip = 1,
1473          .ca0151_chip = 1,
1474          .spk71 = 1,
1475          .spdif_bug = 1,
1476          .ac97_chip = 1} ,
1477         {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20011102,
1478          .driver = "Audigy2", .name = "Audigy 2 ZS [2001]",
1479          .id = "Audigy2",
1480          .emu10k2_chip = 1,
1481          .ca0102_chip = 1,
1482          .ca0151_chip = 1,
1483          .spk71 = 1,
1484          .spdif_bug = 1,
1485          .ac97_chip = 1} ,
1486         /* Audigy 2 */
1487         /* Tested by James@superbug.co.uk 3rd July 2005 */
1488         /* DSP: CA0102-IAT
1489          * DAC: CS4382-KQ
1490          * ADC: Philips 1361T
1491          * AC97: STAC9721
1492          * CA0151: Yes
1493          */
1494         {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10071102,
1495          .driver = "Audigy2", .name = "Audigy 2 [SB0240]",
1496          .id = "Audigy2",
1497          .emu10k2_chip = 1,
1498          .ca0102_chip = 1,
1499          .ca0151_chip = 1,
1500          .spk71 = 1,
1501          .spdif_bug = 1,
1502          .adc_1361t = 1,  /* 24 bit capture instead of 16bit */
1503          .ac97_chip = 1} ,
1504         {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10051102,
1505          .driver = "Audigy2", .name = "Audigy 2 EX [1005]",
1506          .id = "Audigy2",
1507          .emu10k2_chip = 1,
1508          .ca0102_chip = 1,
1509          .ca0151_chip = 1,
1510          .spk71 = 1,
1511          .spdif_bug = 1} ,
1512         /* Dell OEM/Creative Labs Audigy 2 ZS */
1513         /* See ALSA bug#1365 */
1514         {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10031102,
1515          .driver = "Audigy2", .name = "Audigy 2 ZS [SB0353]",
1516          .id = "Audigy2",
1517          .emu10k2_chip = 1,
1518          .ca0102_chip = 1,
1519          .ca0151_chip = 1,
1520          .spk71 = 1,
1521          .spdif_bug = 1,
1522          .ac97_chip = 1} ,
1523         {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10021102,
1524          .driver = "Audigy2", .name = "Audigy 2 Platinum [SB0240P]",
1525          .id = "Audigy2",
1526          .emu10k2_chip = 1,
1527          .ca0102_chip = 1,
1528          .ca0151_chip = 1,
1529          .spk71 = 1,
1530          .spdif_bug = 1,
1531          .invert_shared_spdif = 1,      /* digital/analog switch swapped */
1532          .adc_1361t = 1,  /* 24 bit capture instead of 16bit. Fixes ALSA bug#324 */
1533          .ac97_chip = 1} ,
1534         {.vendor = 0x1102, .device = 0x0004, .revision = 0x04,
1535          .driver = "Audigy2", .name = "Audigy 2 [Unknown]",
1536          .id = "Audigy2",
1537          .emu10k2_chip = 1,
1538          .ca0102_chip = 1,
1539          .ca0151_chip = 1,
1540          .spdif_bug = 1,
1541          .ac97_chip = 1} ,
1542         {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x00531102,
1543          .driver = "Audigy", .name = "Audigy 1 [SB0090]",
1544          .id = "Audigy",
1545          .emu10k2_chip = 1,
1546          .ca0102_chip = 1,
1547          .ac97_chip = 1} ,
1548         {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x00521102,
1549          .driver = "Audigy", .name = "Audigy 1 ES [SB0160]",
1550          .id = "Audigy",
1551          .emu10k2_chip = 1,
1552          .ca0102_chip = 1,
1553          .spdif_bug = 1,
1554          .ac97_chip = 1} ,
1555         {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x00511102,
1556          .driver = "Audigy", .name = "Audigy 1 [SB0090]",
1557          .id = "Audigy",
1558          .emu10k2_chip = 1,
1559          .ca0102_chip = 1,
1560          .ac97_chip = 1} ,
1561         {.vendor = 0x1102, .device = 0x0004,
1562          .driver = "Audigy", .name = "Audigy 1 [Unknown]",
1563          .id = "Audigy",
1564          .emu10k2_chip = 1,
1565          .ca0102_chip = 1,
1566          .ac97_chip = 1} ,
1567         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x806B1102,
1568          .driver = "EMU10K1", .name = "SBLive! [SB0105]",
1569          .id = "Live",
1570          .emu10k1_chip = 1,
1571          .ac97_chip = 1,
1572          .sblive51 = 1} ,
1573         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x806A1102,
1574          .driver = "EMU10K1", .name = "SBLive! Value [SB0103]",
1575          .id = "Live",
1576          .emu10k1_chip = 1,
1577          .ac97_chip = 1,
1578          .sblive51 = 1} ,
1579         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80691102,
1580          .driver = "EMU10K1", .name = "SBLive! Value [SB0101]",
1581          .id = "Live",
1582          .emu10k1_chip = 1,
1583          .ac97_chip = 1,
1584          .sblive51 = 1} ,
1585         /* Tested by ALSA bug#1680 26th December 2005 */
1586         /* note: It really has SB0220 written on the card. */
1587         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80661102,
1588          .driver = "EMU10K1", .name = "SB Live 5.1 Dell OEM [SB0220]",
1589          .id = "Live",
1590          .emu10k1_chip = 1,
1591          .ac97_chip = 1,
1592          .sblive51 = 1} ,
1593         /* Tested by Thomas Zehetbauer 27th Aug 2005 */
1594         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80651102,
1595          .driver = "EMU10K1", .name = "SB Live 5.1 [SB0220]",
1596          .id = "Live",
1597          .emu10k1_chip = 1,
1598          .ac97_chip = 1,
1599          .sblive51 = 1} ,
1600         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x100a1102,
1601          .driver = "EMU10K1", .name = "SB Live 5.1 [SB0220]",
1602          .id = "Live",
1603          .emu10k1_chip = 1,
1604          .ac97_chip = 1,
1605          .sblive51 = 1} ,
1606         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80641102,
1607          .driver = "EMU10K1", .name = "SB Live 5.1",
1608          .id = "Live",
1609          .emu10k1_chip = 1,
1610          .ac97_chip = 1,
1611          .sblive51 = 1} ,
1612         /* Tested by alsa bugtrack user "hus" bug #1297 12th Aug 2005 */
1613         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80611102,
1614          .driver = "EMU10K1", .name = "SBLive 5.1 [SB0060]",
1615          .id = "Live",
1616          .emu10k1_chip = 1,
1617          .ac97_chip = 2, /* ac97 is optional; both SBLive 5.1 and platinum
1618                           * share the same IDs!
1619                           */
1620          .sblive51 = 1} ,
1621         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80511102,
1622          .driver = "EMU10K1", .name = "SBLive! Value [CT4850]",
1623          .id = "Live",
1624          .emu10k1_chip = 1,
1625          .ac97_chip = 1,
1626          .sblive51 = 1} ,
1627         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80401102,
1628          .driver = "EMU10K1", .name = "SBLive! Platinum [CT4760P]",
1629          .id = "Live",
1630          .emu10k1_chip = 1,
1631          .ac97_chip = 1} ,
1632         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80321102,
1633          .driver = "EMU10K1", .name = "SBLive! Value [CT4871]",
1634          .id = "Live",
1635          .emu10k1_chip = 1,
1636          .ac97_chip = 1,
1637          .sblive51 = 1} ,
1638         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80311102,
1639          .driver = "EMU10K1", .name = "SBLive! Value [CT4831]",
1640          .id = "Live",
1641          .emu10k1_chip = 1,
1642          .ac97_chip = 1,
1643          .sblive51 = 1} ,
1644         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80281102,
1645          .driver = "EMU10K1", .name = "SBLive! Value [CT4870]",
1646          .id = "Live",
1647          .emu10k1_chip = 1,
1648          .ac97_chip = 1,
1649          .sblive51 = 1} ,
1650         /* Tested by James@superbug.co.uk 3rd July 2005 */
1651         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80271102,
1652          .driver = "EMU10K1", .name = "SBLive! Value [CT4832]",
1653          .id = "Live",
1654          .emu10k1_chip = 1,
1655          .ac97_chip = 1,
1656          .sblive51 = 1} ,
1657         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80261102,
1658          .driver = "EMU10K1", .name = "SBLive! Value [CT4830]",
1659          .id = "Live",
1660          .emu10k1_chip = 1,
1661          .ac97_chip = 1,
1662          .sblive51 = 1} ,
1663         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80231102,
1664          .driver = "EMU10K1", .name = "SB PCI512 [CT4790]",
1665          .id = "Live",
1666          .emu10k1_chip = 1,
1667          .ac97_chip = 1,
1668          .sblive51 = 1} ,
1669         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80221102,
1670          .driver = "EMU10K1", .name = "SBLive! Value [CT4780]",
1671          .id = "Live",
1672          .emu10k1_chip = 1,
1673          .ac97_chip = 1,
1674          .sblive51 = 1} ,
1675         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x40011102,
1676          .driver = "EMU10K1", .name = "E-mu APS [4001]",
1677          .id = "APS",
1678          .emu10k1_chip = 1,
1679          .ecard = 1} ,
1680         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x00211102,
1681          .driver = "EMU10K1", .name = "SBLive! [CT4620]",
1682          .id = "Live",
1683          .emu10k1_chip = 1,
1684          .ac97_chip = 1,
1685          .sblive51 = 1} ,
1686         {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x00201102,
1687          .driver = "EMU10K1", .name = "SBLive! Value [CT4670]",
1688          .id = "Live",
1689          .emu10k1_chip = 1,
1690          .ac97_chip = 1,
1691          .sblive51 = 1} ,
1692         {.vendor = 0x1102, .device = 0x0002,
1693          .driver = "EMU10K1", .name = "SB Live [Unknown]",
1694          .id = "Live",
1695          .emu10k1_chip = 1,
1696          .ac97_chip = 1,
1697          .sblive51 = 1} ,
1698         { } /* terminator */
1699 };
1700
1701 int __devinit snd_emu10k1_create(struct snd_card *card,
1702                        struct pci_dev * pci,
1703                        unsigned short extin_mask,
1704                        unsigned short extout_mask,
1705                        long max_cache_bytes,
1706                        int enable_ir,
1707                        uint subsystem,
1708                        struct snd_emu10k1 ** remu)
1709 {
1710         struct snd_emu10k1 *emu;
1711         int idx, err;
1712         int is_audigy;
1713         unsigned int silent_page;
1714         const struct snd_emu_chip_details *c;
1715         static struct snd_device_ops ops = {
1716                 .dev_free =     snd_emu10k1_dev_free,
1717         };
1718
1719         *remu = NULL;
1720
1721         /* enable PCI device */
1722         if ((err = pci_enable_device(pci)) < 0)
1723                 return err;
1724
1725         emu = kzalloc(sizeof(*emu), GFP_KERNEL);
1726         if (emu == NULL) {
1727                 pci_disable_device(pci);
1728                 return -ENOMEM;
1729         }
1730         emu->card = card;
1731         spin_lock_init(&emu->reg_lock);
1732         spin_lock_init(&emu->emu_lock);
1733         spin_lock_init(&emu->spi_lock);
1734         spin_lock_init(&emu->i2c_lock);
1735         spin_lock_init(&emu->voice_lock);
1736         spin_lock_init(&emu->synth_lock);
1737         spin_lock_init(&emu->memblk_lock);
1738         mutex_init(&emu->fx8010.lock);
1739         INIT_LIST_HEAD(&emu->mapped_link_head);
1740         INIT_LIST_HEAD(&emu->mapped_order_link_head);
1741         emu->pci = pci;
1742         emu->irq = -1;
1743         emu->synth = NULL;
1744         emu->get_synth_voice = NULL;
1745         /* read revision & serial */
1746         emu->revision = pci->revision;
1747         pci_read_config_dword(pci, PCI_SUBSYSTEM_VENDOR_ID, &emu->serial);
1748         pci_read_config_word(pci, PCI_SUBSYSTEM_ID, &emu->model);
1749         snd_printdd("vendor=0x%x, device=0x%x, subsystem_vendor_id=0x%x, subsystem_id=0x%x\n",pci->vendor, pci->device, emu->serial, emu->model);
1750
1751         for (c = emu_chip_details; c->vendor; c++) {
1752                 if (c->vendor == pci->vendor && c->device == pci->device) {
1753                         if (subsystem) {
1754                                 if (c->subsystem && (c->subsystem == subsystem) ) {
1755                                         break;
1756                                 } else continue;
1757                         } else {
1758                                 if (c->subsystem && (c->subsystem != emu->serial) )
1759                                         continue;
1760                                 if (c->revision && c->revision != emu->revision)
1761                                         continue;
1762                         }
1763                         break;
1764                 }
1765         }
1766         if (c->vendor == 0) {
1767                 snd_printk(KERN_ERR "emu10k1: Card not recognised\n");
1768                 kfree(emu);
1769                 pci_disable_device(pci);
1770                 return -ENOENT;
1771         }
1772         emu->card_capabilities = c;
1773         if (c->subsystem && !subsystem)
1774                 snd_printdd("Sound card name=%s\n", c->name);
1775         else if (subsystem)
1776                 snd_printdd("Sound card name=%s, vendor=0x%x, device=0x%x, subsystem=0x%x. Forced to subsytem=0x%x\n",
1777                         c->name, pci->vendor, pci->device, emu->serial, c->subsystem);
1778         else
1779                 snd_printdd("Sound card name=%s, vendor=0x%x, device=0x%x, subsystem=0x%x.\n",
1780                         c->name, pci->vendor, pci->device, emu->serial);
1781
1782         if (!*card->id && c->id) {
1783                 int i, n = 0;
1784                 strlcpy(card->id, c->id, sizeof(card->id));
1785                 for (;;) {
1786                         for (i = 0; i < snd_ecards_limit; i++) {
1787                                 if (snd_cards[i] && !strcmp(snd_cards[i]->id, card->id))
1788                                         break;
1789                         }
1790                         if (i >= snd_ecards_limit)
1791                                 break;
1792                         n++;
1793                         if (n >= SNDRV_CARDS)
1794                                 break;
1795                         snprintf(card->id, sizeof(card->id), "%s_%d", c->id, n);
1796                 }
1797         }
1798
1799         is_audigy = emu->audigy = c->emu10k2_chip;
1800
1801         /* set the DMA transfer mask */
1802         emu->dma_mask = is_audigy ? AUDIGY_DMA_MASK : EMU10K1_DMA_MASK;
1803         if (pci_set_dma_mask(pci, emu->dma_mask) < 0 ||
1804             pci_set_consistent_dma_mask(pci, emu->dma_mask) < 0) {
1805                 snd_printk(KERN_ERR "architecture does not support PCI busmaster DMA with mask 0x%lx\n", emu->dma_mask);
1806                 kfree(emu);
1807                 pci_disable_device(pci);
1808                 return -ENXIO;
1809         }
1810         if (is_audigy)
1811                 emu->gpr_base = A_FXGPREGBASE;
1812         else
1813                 emu->gpr_base = FXGPREGBASE;
1814
1815         if ((err = pci_request_regions(pci, "EMU10K1")) < 0) {
1816                 kfree(emu);
1817                 pci_disable_device(pci);
1818                 return err;
1819         }
1820         emu->port = pci_resource_start(pci, 0);
1821
1822         emu->max_cache_pages = max_cache_bytes >> PAGE_SHIFT;
1823         if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(pci),
1824                                 32 * 1024, &emu->ptb_pages) < 0) {
1825                 err = -ENOMEM;
1826                 goto error;
1827         }
1828
1829         emu->page_ptr_table = vmalloc(emu->max_cache_pages * sizeof(void *));
1830         emu->page_addr_table = vmalloc(emu->max_cache_pages *
1831                                        sizeof(unsigned long));
1832         if (emu->page_ptr_table == NULL || emu->page_addr_table == NULL) {
1833                 err = -ENOMEM;
1834                 goto error;
1835         }
1836
1837         if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(pci),
1838                                 EMUPAGESIZE, &emu->silent_page) < 0) {
1839                 err = -ENOMEM;
1840                 goto error;
1841         }
1842         emu->memhdr = snd_util_memhdr_new(emu->max_cache_pages * PAGE_SIZE);
1843         if (emu->memhdr == NULL) {
1844                 err = -ENOMEM;
1845                 goto error;
1846         }
1847         emu->memhdr->block_extra_size = sizeof(struct snd_emu10k1_memblk) -
1848                 sizeof(struct snd_util_memblk);
1849
1850         pci_set_master(pci);
1851
1852         emu->fx8010.fxbus_mask = 0x303f;
1853         if (extin_mask == 0)
1854                 extin_mask = 0x3fcf;
1855         if (extout_mask == 0)
1856                 extout_mask = 0x7fff;
1857         emu->fx8010.extin_mask = extin_mask;
1858         emu->fx8010.extout_mask = extout_mask;
1859         emu->enable_ir = enable_ir;
1860
1861         if (emu->card_capabilities->ca_cardbus_chip) {
1862                 if ((err = snd_emu10k1_cardbus_init(emu)) < 0)
1863                         goto error;
1864         }
1865         if (emu->card_capabilities->ecard) {
1866                 if ((err = snd_emu10k1_ecard_init(emu)) < 0)
1867                         goto error;
1868         } else if (emu->card_capabilities->emu_model) {
1869                 if ((err = snd_emu10k1_emu1010_init(emu)) < 0) {
1870                         snd_emu10k1_free(emu);
1871                         return err;
1872                 }
1873         } else {
1874                 /* 5.1: Enable the additional AC97 Slots. If the emu10k1 version
1875                         does not support this, it shouldn't do any harm */
1876                 snd_emu10k1_ptr_write(emu, AC97SLOT, 0, AC97SLOT_CNTR|AC97SLOT_LFE);
1877         }
1878
1879         /* initialize TRAM setup */
1880         emu->fx8010.itram_size = (16 * 1024)/2;
1881         emu->fx8010.etram_pages.area = NULL;
1882         emu->fx8010.etram_pages.bytes = 0;
1883
1884         /* irq handler must be registered after I/O ports are activated */
1885         if (request_irq(pci->irq, snd_emu10k1_interrupt, IRQF_SHARED,
1886                         "EMU10K1", emu)) {
1887                 err = -EBUSY;
1888                 goto error;
1889         }
1890         emu->irq = pci->irq;
1891
1892         /*
1893          *  Init to 0x02109204 :
1894          *  Clock accuracy    = 0     (1000ppm)
1895          *  Sample Rate       = 2     (48kHz)
1896          *  Audio Channel     = 1     (Left of 2)
1897          *  Source Number     = 0     (Unspecified)
1898          *  Generation Status = 1     (Original for Cat Code 12)
1899          *  Cat Code          = 12    (Digital Signal Mixer)
1900          *  Mode              = 0     (Mode 0)
1901          *  Emphasis          = 0     (None)
1902          *  CP                = 1     (Copyright unasserted)
1903          *  AN                = 0     (Audio data)
1904          *  P                 = 0     (Consumer)
1905          */
1906         emu->spdif_bits[0] = emu->spdif_bits[1] =
1907                 emu->spdif_bits[2] = SPCS_CLKACCY_1000PPM | SPCS_SAMPLERATE_48 |
1908                 SPCS_CHANNELNUM_LEFT | SPCS_SOURCENUM_UNSPEC |
1909                 SPCS_GENERATIONSTATUS | 0x00001200 |
1910                 0x00000000 | SPCS_EMPHASIS_NONE | SPCS_COPYRIGHT;
1911
1912         emu->reserved_page = (struct snd_emu10k1_memblk *)
1913                 snd_emu10k1_synth_alloc(emu, 4096);
1914         if (emu->reserved_page)
1915                 emu->reserved_page->map_locked = 1;
1916
1917         /* Clear silent pages and set up pointers */
1918         memset(emu->silent_page.area, 0, PAGE_SIZE);
1919         silent_page = emu->silent_page.addr << 1;
1920         for (idx = 0; idx < MAXPAGES; idx++)
1921                 ((u32 *)emu->ptb_pages.area)[idx] = cpu_to_le32(silent_page | idx);
1922
1923         /* set up voice indices */
1924         for (idx = 0; idx < NUM_G; idx++) {
1925                 emu->voices[idx].emu = emu;
1926                 emu->voices[idx].number = idx;
1927         }
1928
1929         if ((err = snd_emu10k1_init(emu, enable_ir, 0)) < 0)
1930                 goto error;
1931 #ifdef CONFIG_PM
1932         if ((err = alloc_pm_buffer(emu)) < 0)
1933                 goto error;
1934 #endif
1935
1936         /*  Initialize the effect engine */
1937         if ((err = snd_emu10k1_init_efx(emu)) < 0)
1938                 goto error;
1939         snd_emu10k1_audio_enable(emu);
1940
1941         if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, emu, &ops)) < 0)
1942                 goto error;
1943
1944 #ifdef CONFIG_PROC_FS
1945         snd_emu10k1_proc_init(emu);
1946 #endif
1947
1948         snd_card_set_dev(card, &pci->dev);
1949         *remu = emu;
1950         return 0;
1951
1952  error:
1953         snd_emu10k1_free(emu);
1954         return err;
1955 }
1956
1957 #ifdef CONFIG_PM
1958 static unsigned char saved_regs[] = {
1959         CPF, PTRX, CVCF, VTFT, Z1, Z2, PSST, DSL, CCCA, CCR, CLP,
1960         FXRT, MAPA, MAPB, ENVVOL, ATKHLDV, DCYSUSV, LFOVAL1, ENVVAL,
1961         ATKHLDM, DCYSUSM, LFOVAL2, IP, IFATN, PEFE, FMMOD, TREMFRQ, FM2FRQ2,
1962         TEMPENV, ADCCR, FXWC, MICBA, ADCBA, FXBA,
1963         MICBS, ADCBS, FXBS, CDCS, GPSCS, SPCS0, SPCS1, SPCS2,
1964         SPBYPASS, AC97SLOT, CDSRCS, GPSRCS, ZVSRCS, MICIDX, ADCIDX, FXIDX,
1965         0xff /* end */
1966 };
1967 static unsigned char saved_regs_audigy[] = {
1968         A_ADCIDX, A_MICIDX, A_FXWC1, A_FXWC2, A_SAMPLE_RATE,
1969         A_FXRT2, A_SENDAMOUNTS, A_FXRT1,
1970         0xff /* end */
1971 };
1972
1973 static int __devinit alloc_pm_buffer(struct snd_emu10k1 *emu)
1974 {
1975         int size;
1976
1977         size = ARRAY_SIZE(saved_regs);
1978         if (emu->audigy)
1979                 size += ARRAY_SIZE(saved_regs_audigy);
1980         emu->saved_ptr = vmalloc(4 * NUM_G * size);
1981         if (! emu->saved_ptr)
1982                 return -ENOMEM;
1983         if (snd_emu10k1_efx_alloc_pm_buffer(emu) < 0)
1984                 return -ENOMEM;
1985         if (emu->card_capabilities->ca0151_chip &&
1986             snd_p16v_alloc_pm_buffer(emu) < 0)
1987                 return -ENOMEM;
1988         return 0;
1989 }
1990
1991 static void free_pm_buffer(struct snd_emu10k1 *emu)
1992 {
1993         vfree(emu->saved_ptr);
1994         snd_emu10k1_efx_free_pm_buffer(emu);
1995         if (emu->card_capabilities->ca0151_chip)
1996                 snd_p16v_free_pm_buffer(emu);
1997 }
1998
1999 void snd_emu10k1_suspend_regs(struct snd_emu10k1 *emu)
2000 {
2001         int i;
2002         unsigned char *reg;
2003         unsigned int *val;
2004
2005         val = emu->saved_ptr;
2006         for (reg = saved_regs; *reg != 0xff; reg++)
2007                 for (i = 0; i < NUM_G; i++, val++)
2008                         *val = snd_emu10k1_ptr_read(emu, *reg, i);
2009         if (emu->audigy) {
2010                 for (reg = saved_regs_audigy; *reg != 0xff; reg++)
2011                         for (i = 0; i < NUM_G; i++, val++)
2012                                 *val = snd_emu10k1_ptr_read(emu, *reg, i);
2013         }
2014         if (emu->audigy)
2015                 emu->saved_a_iocfg = inl(emu->port + A_IOCFG);
2016         emu->saved_hcfg = inl(emu->port + HCFG);
2017 }
2018
2019 void snd_emu10k1_resume_init(struct snd_emu10k1 *emu)
2020 {
2021         if (emu->card_capabilities->ca_cardbus_chip)
2022                 snd_emu10k1_cardbus_init(emu);
2023         if (emu->card_capabilities->ecard)
2024                 snd_emu10k1_ecard_init(emu);
2025         else if (emu->card_capabilities->emu_model)
2026                 snd_emu10k1_emu1010_init(emu);
2027         else
2028                 snd_emu10k1_ptr_write(emu, AC97SLOT, 0, AC97SLOT_CNTR|AC97SLOT_LFE);
2029         snd_emu10k1_init(emu, emu->enable_ir, 1);
2030 }
2031
2032 void snd_emu10k1_resume_regs(struct snd_emu10k1 *emu)
2033 {
2034         int i;
2035         unsigned char *reg;
2036         unsigned int *val;
2037
2038         snd_emu10k1_audio_enable(emu);
2039
2040         /* resore for spdif */
2041         if (emu->audigy)
2042                 outl(emu->saved_a_iocfg, emu->port + A_IOCFG);
2043         outl(emu->saved_hcfg, emu->port + HCFG);
2044
2045         val = emu->saved_ptr;
2046         for (reg = saved_regs; *reg != 0xff; reg++)
2047                 for (i = 0; i < NUM_G; i++, val++)
2048                         snd_emu10k1_ptr_write(emu, *reg, i, *val);
2049         if (emu->audigy) {
2050                 for (reg = saved_regs_audigy; *reg != 0xff; reg++)
2051                         for (i = 0; i < NUM_G; i++, val++)
2052                                 snd_emu10k1_ptr_write(emu, *reg, i, *val);
2053         }
2054 }
2055 #endif