err.no Git - linux-2.6/blob - sound/pci/cs46xx/dsp_spos.c

   1 /*
   2  *   This program is free software; you can redistribute it and/or modify
   3  *   it under the terms of the GNU General Public License as published by
   4  *   the Free Software Foundation; either version 2 of the License, or
   5  *   (at your option) any later version.
   6  *
   7  *   This program is distributed in the hope that it will be useful,
   8  *   but WITHOUT ANY WARRANTY; without even the implied warranty of
   9  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  10  *   GNU General Public License for more details.
  11  *
  12  *   You should have received a copy of the GNU General Public License
  13  *   along with this program; if not, write to the Free Software
  14  *   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
  15  *
  16  */
  17
  18 /*
  19  * 2002-07 Benny Sjostrand benny@hostmobility.com
  20  */
  21
  22
  23 #include <sound/driver.h>
  24 #include <asm/io.h>
  25 #include <linux/delay.h>
  26 #include <linux/pm.h>
  27 #include <linux/init.h>
  28 #include <linux/slab.h>
  29 #include <linux/vmalloc.h>
  30 #include <linux/mutex.h>
  31
  32 #include <sound/core.h>
  33 #include <sound/control.h>
  34 #include <sound/info.h>
  35 #include <sound/asoundef.h>
  36 #include <sound/cs46xx.h>
  37
  38 #include "cs46xx_lib.h"
  39 #include "dsp_spos.h"
  40
  41 static int cs46xx_dsp_async_init (struct snd_cs46xx *chip,
  42                                   struct dsp_scb_descriptor * fg_entry);
  43
  44 static enum wide_opcode wide_opcodes[] = {
  45         WIDE_FOR_BEGIN_LOOP,
  46         WIDE_FOR_BEGIN_LOOP2,
  47         WIDE_COND_GOTO_ADDR,
  48         WIDE_COND_GOTO_CALL,
  49         WIDE_TBEQ_COND_GOTO_ADDR,
  50         WIDE_TBEQ_COND_CALL_ADDR,
  51         WIDE_TBEQ_NCOND_GOTO_ADDR,
  52         WIDE_TBEQ_NCOND_CALL_ADDR,
  53         WIDE_TBEQ_COND_GOTO1_ADDR,
  54         WIDE_TBEQ_COND_CALL1_ADDR,
  55         WIDE_TBEQ_NCOND_GOTOI_ADDR,
  56         WIDE_TBEQ_NCOND_CALL1_ADDR
  57 };
  58
  59 static int shadow_and_reallocate_code (struct snd_cs46xx * chip, u32 * data, u32 size,
  60                                        u32 overlay_begin_address)
  61 {
  62         unsigned int i = 0, j, nreallocated = 0;
  63         u32 hival,loval,address;
  64         u32 mop_operands,mop_type,wide_op;
  65         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
  66
  67         snd_assert( ((size % 2) == 0), return -EINVAL);
  68
  69         while (i < size) {
  70                 loval = data[i++];
  71                 hival = data[i++];
  72
  73                 if (ins->code.offset > 0) {
  74                         mop_operands = (hival >> 6) & 0x03fff;
  75                         mop_type = mop_operands >> 10;
  76
  77                         /* check for wide type instruction */
  78                         if (mop_type == 0 &&
  79                             (mop_operands & WIDE_LADD_INSTR_MASK) == 0 &&
  80                             (mop_operands & WIDE_INSTR_MASK) != 0) {
  81                                 wide_op = loval & 0x7f;
  82                                 for (j = 0;j < ARRAY_SIZE(wide_opcodes); ++j) {
  83                                         if (wide_opcodes[j] == wide_op) {
  84                                                 /* need to reallocate instruction */
  85                                                 address  = (hival & 0x00FFF) << 5;
  86                                                 address |=  loval >> 15;
  87
  88                                                 snd_printdd("handle_wideop[1]: %05x:%05x addr %04x\n",hival,loval,address);
  89
  90                                                 if ( !(address & 0x8000) ) {
  91                                                         address += (ins->code.offset / 2) - overlay_begin_address;
  92                                                 } else {
  93                                                         snd_printdd("handle_wideop[1]: ROM symbol not reallocated\n");
  94                                                 }
  95
  96                                                 hival &= 0xFF000;
  97                                                 loval &= 0x07FFF;
  98
  99                                                 hival |= ( (address >> 5)  & 0x00FFF);
 100                                                 loval |= ( (address << 15) & 0xF8000);
 101
 102                                                 address  = (hival & 0x00FFF) << 5;
 103                                                 address |=  loval >> 15;
 104
 105                                                 snd_printdd("handle_wideop:[2] %05x:%05x addr %04x\n",hival,loval,address);
 106                                                 nreallocated ++;
 107                                         } /* wide_opcodes[j] == wide_op */
 108                                 } /* for */
 109                         } /* mod_type == 0 ... */
 110                 } /* ins->code.offset > 0 */
 111
 112                 ins->code.data[ins->code.size++] = loval;
 113                 ins->code.data[ins->code.size++] = hival;
 114         }
 115
 116         snd_printdd("dsp_spos: %d instructions reallocated\n",nreallocated);
 117         return nreallocated;
 118 }
 119
 120 static struct dsp_segment_desc * get_segment_desc (struct dsp_module_desc * module, int seg_type)
 121 {
 122         int i;
 123         for (i = 0;i < module->nsegments; ++i) {
 124                 if (module->segments[i].segment_type == seg_type) {
 125                         return (module->segments + i);
 126                 }
 127         }
 128
 129         return NULL;
 130 };
 131
 132 static int find_free_symbol_index (struct dsp_spos_instance * ins)
 133 {
 134         int index = ins->symbol_table.nsymbols,i;
 135
 136         for (i = ins->symbol_table.highest_frag_index; i < ins->symbol_table.nsymbols; ++i) {
 137                 if (ins->symbol_table.symbols[i].deleted) {
 138                         index = i;
 139                         break;
 140                 }
 141         }
 142
 143         return index;
 144 }
 145
 146 static int add_symbols (struct snd_cs46xx * chip, struct dsp_module_desc * module)
 147 {
 148         int i;
 149         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
 150
 151         if (module->symbol_table.nsymbols > 0) {
 152                 if (!strcmp(module->symbol_table.symbols[0].symbol_name, "OVERLAYBEGINADDRESS") &&
 153                     module->symbol_table.symbols[0].symbol_type == SYMBOL_CONSTANT ) {
 154                         module->overlay_begin_address = module->symbol_table.symbols[0].address;
 155                 }
 156         }
 157
 158         for (i = 0;i < module->symbol_table.nsymbols; ++i) {
 159                 if (ins->symbol_table.nsymbols == (DSP_MAX_SYMBOLS - 1)) {
 160                         snd_printk(KERN_ERR "dsp_spos: symbol table is full\n");
 161                         return -ENOMEM;
 162                 }
 163
 164
 165                 if (cs46xx_dsp_lookup_symbol(chip,
 166                                              module->symbol_table.symbols[i].symbol_name,
 167                                              module->symbol_table.symbols[i].symbol_type) == NULL) {
 168
 169                         ins->symbol_table.symbols[ins->symbol_table.nsymbols] = module->symbol_table.symbols[i];
 170                         ins->symbol_table.symbols[ins->symbol_table.nsymbols].address += ((ins->code.offset / 2) - module->overlay_begin_address);
 171                         ins->symbol_table.symbols[ins->symbol_table.nsymbols].module = module;
 172                         ins->symbol_table.symbols[ins->symbol_table.nsymbols].deleted = 0;
 173
 174                         if (ins->symbol_table.nsymbols > ins->symbol_table.highest_frag_index)
 175                                 ins->symbol_table.highest_frag_index = ins->symbol_table.nsymbols;
 176
 177                         ins->symbol_table.nsymbols++;
 178                 } else {
 179           /* if (0) printk ("dsp_spos: symbol <%s> duplicated, probably nothing wrong with that (Cirrus?)\n",
 180                              module->symbol_table.symbols[i].symbol_name); */
 181                 }
 182         }
 183
 184         return 0;
 185 }
 186
 187 static struct dsp_symbol_entry *
 188 add_symbol (struct snd_cs46xx * chip, char * symbol_name, u32 address, int type)
 189 {
 190         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
 191         struct dsp_symbol_entry * symbol = NULL;
 192         int index;
 193
 194         if (ins->symbol_table.nsymbols == (DSP_MAX_SYMBOLS - 1)) {
 195                 snd_printk(KERN_ERR "dsp_spos: symbol table is full\n");
 196                 return NULL;
 197         }
 198
 199         if (cs46xx_dsp_lookup_symbol(chip,
 200                                      symbol_name,
 201                                      type) != NULL) {
 202                 snd_printk(KERN_ERR "dsp_spos: symbol <%s> duplicated\n", symbol_name);
 203                 return NULL;
 204         }
 205
 206         index = find_free_symbol_index (ins);
 207
 208         strcpy (ins->symbol_table.symbols[index].symbol_name, symbol_name);
 209         ins->symbol_table.symbols[index].address = address;
 210         ins->symbol_table.symbols[index].symbol_type = type;
 211         ins->symbol_table.symbols[index].module = NULL;
 212         ins->symbol_table.symbols[index].deleted = 0;
 213         symbol = (ins->symbol_table.symbols + index);
 214
 215         if (index > ins->symbol_table.highest_frag_index)
 216                 ins->symbol_table.highest_frag_index = index;
 217
 218         if (index == ins->symbol_table.nsymbols)
 219                 ins->symbol_table.nsymbols++; /* no frag. in list */
 220
 221         return symbol;
 222 }
 223
 224 struct dsp_spos_instance *cs46xx_dsp_spos_create (struct snd_cs46xx * chip)
 225 {
 226         struct dsp_spos_instance * ins = kzalloc(sizeof(struct dsp_spos_instance), GFP_KERNEL);
 227
 228         if (ins == NULL)
 229                 return NULL;
 230
 231         /* better to use vmalloc for this big table */
 232         ins->symbol_table.nsymbols = 0;
 233         ins->symbol_table.symbols = vmalloc(sizeof(struct dsp_symbol_entry) *
 234                                             DSP_MAX_SYMBOLS);
 235         ins->symbol_table.highest_frag_index = 0;
 236
 237         if (ins->symbol_table.symbols == NULL) {
 238                 cs46xx_dsp_spos_destroy(chip);
 239                 goto error;
 240         }
 241
 242         ins->code.offset = 0;
 243         ins->code.size = 0;
 244         ins->code.data = kmalloc(DSP_CODE_BYTE_SIZE, GFP_KERNEL);
 245
 246         if (ins->code.data == NULL) {
 247                 cs46xx_dsp_spos_destroy(chip);
 248                 goto error;
 249         }
 250
 251         ins->nscb = 0;
 252         ins->ntask = 0;
 253
 254         ins->nmodules = 0;
 255         ins->modules = kmalloc(sizeof(struct dsp_module_desc) * DSP_MAX_MODULES, GFP_KERNEL);
 256
 257         if (ins->modules == NULL) {
 258                 cs46xx_dsp_spos_destroy(chip);
 259                 goto error;
 260         }
 261
 262         /* default SPDIF input sample rate
 263            to 48000 khz */
 264         ins->spdif_in_sample_rate = 48000;
 265
 266         /* maximize volume */
 267         ins->dac_volume_right = 0x8000;
 268         ins->dac_volume_left = 0x8000;
 269         ins->spdif_input_volume_right = 0x8000;
 270         ins->spdif_input_volume_left = 0x8000;
 271
 272         /* set left and right validity bits and
 273            default channel status */
 274         ins->spdif_csuv_default =
 275                 ins->spdif_csuv_stream =
 276          /* byte 0 */  ((unsigned int)_wrap_all_bits(  (SNDRV_PCM_DEFAULT_CON_SPDIF        & 0xff)) << 24) |
 277          /* byte 1 */  ((unsigned int)_wrap_all_bits( ((SNDRV_PCM_DEFAULT_CON_SPDIF >> 8) & 0xff)) << 16) |
 278          /* byte 3 */   (unsigned int)_wrap_all_bits(  (SNDRV_PCM_DEFAULT_CON_SPDIF >> 24) & 0xff) |
 279          /* left and right validity bits */ (1 << 13) | (1 << 12);
 280
 281         return ins;
 282
 283 error:
 284         kfree(ins);
 285         return NULL;
 286 }
 287
 288 void  cs46xx_dsp_spos_destroy (struct snd_cs46xx * chip)
 289 {
 290         int i;
 291         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
 292
 293         snd_assert(ins != NULL, return);
 294
 295         mutex_lock(&chip->spos_mutex);
 296         for (i = 0; i < ins->nscb; ++i) {
 297                 if (ins->scbs[i].deleted) continue;
 298
 299                 cs46xx_dsp_proc_free_scb_desc ( (ins->scbs + i) );
 300         }
 301
 302         kfree(ins->code.data);
 303         vfree(ins->symbol_table.symbols);
 304         kfree(ins->modules);
 305         kfree(ins);
 306         mutex_unlock(&chip->spos_mutex);
 307 }
 308
 309 static int dsp_load_parameter(struct snd_cs46xx *chip,
 310                               struct dsp_segment_desc *parameter)
 311 {
 312         u32 doffset, dsize;
 313
 314         if (!parameter) {
 315                 snd_printdd("dsp_spos: module got no parameter segment\n");
 316                 return 0;
 317         }
 318
 319         doffset = (parameter->offset * 4 + DSP_PARAMETER_BYTE_OFFSET);
 320         dsize   = parameter->size * 4;
 321
 322         snd_printdd("dsp_spos: "
 323                     "downloading parameter data to chip (%08x-%08x)\n",
 324                     doffset,doffset + dsize);
 325         if (snd_cs46xx_download (chip, parameter->data, doffset, dsize)) {
 326                 snd_printk(KERN_ERR "dsp_spos: "
 327                            "failed to download parameter data to DSP\n");
 328                 return -EINVAL;
 329         }
 330         return 0;
 331 }
 332
 333 static int dsp_load_sample(struct snd_cs46xx *chip,
 334                            struct dsp_segment_desc *sample)
 335 {
 336         u32 doffset, dsize;
 337
 338         if (!sample) {
 339                 snd_printdd("dsp_spos: module got no sample segment\n");
 340                 return 0;
 341         }
 342
 343         doffset = (sample->offset * 4  + DSP_SAMPLE_BYTE_OFFSET);
 344         dsize   =  sample->size * 4;
 345
 346         snd_printdd("dsp_spos: downloading sample data to chip (%08x-%08x)\n",
 347                     doffset,doffset + dsize);
 348
 349         if (snd_cs46xx_download (chip,sample->data,doffset,dsize)) {
 350                 snd_printk(KERN_ERR "dsp_spos: failed to sample data to DSP\n");
 351                 return -EINVAL;
 352         }
 353         return 0;
 354 }
 355
 356 int cs46xx_dsp_load_module (struct snd_cs46xx * chip, struct dsp_module_desc * module)
 357 {
 358         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
 359         struct dsp_segment_desc * code = get_segment_desc (module,SEGTYPE_SP_PROGRAM);
 360         u32 doffset, dsize;
 361         int err;
 362
 363         if (ins->nmodules == DSP_MAX_MODULES - 1) {
 364                 snd_printk(KERN_ERR "dsp_spos: to many modules loaded into DSP\n");
 365                 return -ENOMEM;
 366         }
 367
 368         snd_printdd("dsp_spos: loading module %s into DSP\n", module->module_name);
 369
 370         if (ins->nmodules == 0) {
 371                 snd_printdd("dsp_spos: clearing parameter area\n");
 372                 snd_cs46xx_clear_BA1(chip, DSP_PARAMETER_BYTE_OFFSET, DSP_PARAMETER_BYTE_SIZE);
 373         }
 374
 375         err = dsp_load_parameter(chip, get_segment_desc(module,
 376                                                         SEGTYPE_SP_PARAMETER));
 377         if (err < 0)
 378                 return err;
 379
 380         if (ins->nmodules == 0) {
 381                 snd_printdd("dsp_spos: clearing sample area\n");
 382                 snd_cs46xx_clear_BA1(chip, DSP_SAMPLE_BYTE_OFFSET, DSP_SAMPLE_BYTE_SIZE);
 383         }
 384
 385         err = dsp_load_sample(chip, get_segment_desc(module,
 386                                                      SEGTYPE_SP_SAMPLE));
 387         if (err < 0)
 388                 return err;
 389
 390         if (ins->nmodules == 0) {
 391                 snd_printdd("dsp_spos: clearing code area\n");
 392                 snd_cs46xx_clear_BA1(chip, DSP_CODE_BYTE_OFFSET, DSP_CODE_BYTE_SIZE);
 393         }
 394
 395         if (code == NULL) {
 396                 snd_printdd("dsp_spos: module got no code segment\n");
 397         } else {
 398                 if (ins->code.offset + code->size > DSP_CODE_BYTE_SIZE) {
 399                         snd_printk(KERN_ERR "dsp_spos: no space available in DSP\n");
 400                         return -ENOMEM;
 401                 }
 402
 403                 module->load_address = ins->code.offset;
 404                 module->overlay_begin_address = 0x000;
 405
 406                 /* if module has a code segment it must have
 407                    symbol table */
 408                 snd_assert(module->symbol_table.symbols != NULL ,return -ENOMEM);
 409                 if (add_symbols(chip,module)) {
 410                         snd_printk(KERN_ERR "dsp_spos: failed to load symbol table\n");
 411                         return -ENOMEM;
 412                 }
 413
 414                 doffset = (code->offset * 4 + ins->code.offset * 4 + DSP_CODE_BYTE_OFFSET);
 415                 dsize   = code->size * 4;
 416                 snd_printdd("dsp_spos: downloading code to chip (%08x-%08x)\n",
 417                             doffset,doffset + dsize);
 418
 419                 module->nfixups = shadow_and_reallocate_code(chip,code->data,code->size,module->overlay_begin_address);
 420
 421                 if (snd_cs46xx_download (chip,(ins->code.data + ins->code.offset),doffset,dsize)) {
 422                         snd_printk(KERN_ERR "dsp_spos: failed to download code to DSP\n");
 423                         return -EINVAL;
 424                 }
 425
 426                 ins->code.offset += code->size;
 427         }
 428
 429         /* NOTE: module segments and symbol table must be
 430            statically allocated. Case that module data is
 431            not generated by the ospparser */
 432         ins->modules[ins->nmodules] = *module;
 433         ins->nmodules++;
 434
 435         return 0;
 436 }
 437
 438 struct dsp_symbol_entry *
 439 cs46xx_dsp_lookup_symbol (struct snd_cs46xx * chip, char * symbol_name, int symbol_type)
 440 {
 441         int i;
 442         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
 443
 444         for ( i = 0; i < ins->symbol_table.nsymbols; ++i ) {
 445
 446                 if (ins->symbol_table.symbols[i].deleted)
 447                         continue;
 448
 449                 if (!strcmp(ins->symbol_table.symbols[i].symbol_name,symbol_name) &&
 450                     ins->symbol_table.symbols[i].symbol_type == symbol_type) {
 451                         return (ins->symbol_table.symbols + i);
 452                 }
 453         }
 454
 455 #if 0
 456         printk ("dsp_spos: symbol <%s> type %02x not found\n",
 457                 symbol_name,symbol_type);
 458 #endif
 459
 460         return NULL;
 461 }
 462
 463
 464 #ifdef CONFIG_PROC_FS
 465 static struct dsp_symbol_entry *
 466 cs46xx_dsp_lookup_symbol_addr (struct snd_cs46xx * chip, u32 address, int symbol_type)
 467 {
 468         int i;
 469         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
 470
 471         for ( i = 0; i < ins->symbol_table.nsymbols; ++i ) {
 472
 473                 if (ins->symbol_table.symbols[i].deleted)
 474                         continue;
 475
 476                 if (ins->symbol_table.symbols[i].address == address &&
 477                     ins->symbol_table.symbols[i].symbol_type == symbol_type) {
 478                         return (ins->symbol_table.symbols + i);
 479                 }
 480         }
 481
 482
 483         return NULL;
 484 }
 485
 486
 487 static void cs46xx_dsp_proc_symbol_table_read (struct snd_info_entry *entry,
 488                                                struct snd_info_buffer *buffer)
 489 {
 490         struct snd_cs46xx *chip = entry->private_data;
 491         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
 492         int i;
 493
 494         snd_iprintf(buffer, "SYMBOLS:\n");
 495         for ( i = 0; i < ins->symbol_table.nsymbols; ++i ) {
 496                 char *module_str = "system";
 497
 498                 if (ins->symbol_table.symbols[i].deleted)
 499                         continue;
 500
 501                 if (ins->symbol_table.symbols[i].module != NULL) {
 502                         module_str = ins->symbol_table.symbols[i].module->module_name;
 503                 }
 504
 505
 506                 snd_iprintf(buffer, "%04X <%02X> %s [%s]\n",
 507                             ins->symbol_table.symbols[i].address,
 508                             ins->symbol_table.symbols[i].symbol_type,
 509                             ins->symbol_table.symbols[i].symbol_name,
 510                             module_str);
 511         }
 512 }
 513
 514
 515 static void cs46xx_dsp_proc_modules_read (struct snd_info_entry *entry,
 516                                           struct snd_info_buffer *buffer)
 517 {
 518         struct snd_cs46xx *chip = entry->private_data;
 519         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
 520         int i,j;
 521
 522         mutex_lock(&chip->spos_mutex);
 523         snd_iprintf(buffer, "MODULES:\n");
 524         for ( i = 0; i < ins->nmodules; ++i ) {
 525                 snd_iprintf(buffer, "\n%s:\n", ins->modules[i].module_name);
 526                 snd_iprintf(buffer, "   %d symbols\n", ins->modules[i].symbol_table.nsymbols);
 527                 snd_iprintf(buffer, "   %d fixups\n", ins->modules[i].nfixups);
 528
 529                 for (j = 0; j < ins->modules[i].nsegments; ++ j) {
 530                         struct dsp_segment_desc * desc = (ins->modules[i].segments + j);
 531                         snd_iprintf(buffer, "   segment %02x offset %08x size %08x\n",
 532                                     desc->segment_type,desc->offset, desc->size);
 533                 }
 534         }
 535         mutex_unlock(&chip->spos_mutex);
 536 }
 537
 538 static void cs46xx_dsp_proc_task_tree_read (struct snd_info_entry *entry,
 539                                             struct snd_info_buffer *buffer)
 540 {
 541         struct snd_cs46xx *chip = entry->private_data;
 542         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
 543         int i, j, col;
 544         void __iomem *dst = chip->region.idx[1].remap_addr + DSP_PARAMETER_BYTE_OFFSET;
 545
 546         mutex_lock(&chip->spos_mutex);
 547         snd_iprintf(buffer, "TASK TREES:\n");
 548         for ( i = 0; i < ins->ntask; ++i) {
 549                 snd_iprintf(buffer,"\n%04x %s:\n",ins->tasks[i].address,ins->tasks[i].task_name);
 550
 551                 for (col = 0,j = 0;j < ins->tasks[i].size; j++,col++) {
 552                         u32 val;
 553                         if (col == 4) {
 554                                 snd_iprintf(buffer,"\n");
 555                                 col = 0;
 556                         }
 557                         val = readl(dst + (ins->tasks[i].address + j) * sizeof(u32));
 558                         snd_iprintf(buffer,"%08x ",val);
 559                 }
 560         }
 561
 562         snd_iprintf(buffer,"\n");
 563         mutex_unlock(&chip->spos_mutex);
 564 }
 565
 566 static void cs46xx_dsp_proc_scb_read (struct snd_info_entry *entry,
 567                                       struct snd_info_buffer *buffer)
 568 {
 569         struct snd_cs46xx *chip = entry->private_data;
 570         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
 571         int i;
 572
 573         mutex_lock(&chip->spos_mutex);
 574         snd_iprintf(buffer, "SCB's:\n");
 575         for ( i = 0; i < ins->nscb; ++i) {
 576                 if (ins->scbs[i].deleted)
 577                         continue;
 578                 snd_iprintf(buffer,"\n%04x %s:\n\n",ins->scbs[i].address,ins->scbs[i].scb_name);
 579
 580                 if (ins->scbs[i].parent_scb_ptr != NULL) {
 581                         snd_iprintf(buffer,"parent [%s:%04x] ",
 582                                     ins->scbs[i].parent_scb_ptr->scb_name,
 583                                     ins->scbs[i].parent_scb_ptr->address);
 584                 } else snd_iprintf(buffer,"parent [none] ");
 585
 586                 snd_iprintf(buffer,"sub_list_ptr [%s:%04x]\nnext_scb_ptr [%s:%04x]  task_entry [%s:%04x]\n",
 587                             ins->scbs[i].sub_list_ptr->scb_name,
 588                             ins->scbs[i].sub_list_ptr->address,
 589                             ins->scbs[i].next_scb_ptr->scb_name,
 590                             ins->scbs[i].next_scb_ptr->address,
 591                             ins->scbs[i].task_entry->symbol_name,
 592                             ins->scbs[i].task_entry->address);
 593         }
 594
 595         snd_iprintf(buffer,"\n");
 596         mutex_unlock(&chip->spos_mutex);
 597 }
 598
 599 static void cs46xx_dsp_proc_parameter_dump_read (struct snd_info_entry *entry,
 600                                                  struct snd_info_buffer *buffer)
 601 {
 602         struct snd_cs46xx *chip = entry->private_data;
 603         /*struct dsp_spos_instance * ins = chip->dsp_spos_instance; */
 604         unsigned int i, col = 0;
 605         void __iomem *dst = chip->region.idx[1].remap_addr + DSP_PARAMETER_BYTE_OFFSET;
 606         struct dsp_symbol_entry * symbol;
 607
 608         for (i = 0;i < DSP_PARAMETER_BYTE_SIZE; i += sizeof(u32),col ++) {
 609                 if (col == 4) {
 610                         snd_iprintf(buffer,"\n");
 611                         col = 0;
 612                 }
 613
 614                 if ( (symbol = cs46xx_dsp_lookup_symbol_addr (chip,i / sizeof(u32), SYMBOL_PARAMETER)) != NULL) {
 615                         col = 0;
 616                         snd_iprintf (buffer,"\n%s:\n",symbol->symbol_name);
 617                 }
 618
 619                 if (col == 0) {
 620                         snd_iprintf(buffer, "%04X ", i / (unsigned int)sizeof(u32));
 621                 }
 622
 623                 snd_iprintf(buffer,"%08X ",readl(dst + i));
 624         }
 625 }
 626
 627 static void cs46xx_dsp_proc_sample_dump_read (struct snd_info_entry *entry,
 628                                               struct snd_info_buffer *buffer)
 629 {
 630         struct snd_cs46xx *chip = entry->private_data;
 631         int i,col = 0;
 632         void __iomem *dst = chip->region.idx[2].remap_addr;
 633
 634         snd_iprintf(buffer,"PCMREADER:\n");
 635         for (i = PCM_READER_BUF1;i < PCM_READER_BUF1 + 0x30; i += sizeof(u32),col ++) {
 636                 if (col == 4) {
 637                         snd_iprintf(buffer,"\n");
 638                         col = 0;
 639                 }
 640
 641                 if (col == 0) {
 642                         snd_iprintf(buffer, "%04X ",i);
 643                 }
 644
 645                 snd_iprintf(buffer,"%08X ",readl(dst + i));
 646         }
 647
 648         snd_iprintf(buffer,"\nMIX_SAMPLE_BUF1:\n");
 649
 650         col = 0;
 651         for (i = MIX_SAMPLE_BUF1;i < MIX_SAMPLE_BUF1 + 0x40; i += sizeof(u32),col ++) {
 652                 if (col == 4) {
 653                         snd_iprintf(buffer,"\n");
 654                         col = 0;
 655                 }
 656
 657                 if (col == 0) {
 658                         snd_iprintf(buffer, "%04X ",i);
 659                 }
 660
 661                 snd_iprintf(buffer,"%08X ",readl(dst + i));
 662         }
 663
 664         snd_iprintf(buffer,"\nSRC_TASK_SCB1:\n");
 665         col = 0;
 666         for (i = 0x2480 ; i < 0x2480 + 0x40 ; i += sizeof(u32),col ++) {
 667                 if (col == 4) {
 668                         snd_iprintf(buffer,"\n");
 669                         col = 0;
 670                 }
 671
 672                 if (col == 0) {
 673                         snd_iprintf(buffer, "%04X ",i);
 674                 }
 675
 676                 snd_iprintf(buffer,"%08X ",readl(dst + i));
 677         }
 678
 679
 680         snd_iprintf(buffer,"\nSPDIFO_BUFFER:\n");
 681         col = 0;
 682         for (i = SPDIFO_IP_OUTPUT_BUFFER1;i < SPDIFO_IP_OUTPUT_BUFFER1 + 0x30; i += sizeof(u32),col ++) {
 683                 if (col == 4) {
 684                         snd_iprintf(buffer,"\n");
 685                         col = 0;
 686                 }
 687
 688                 if (col == 0) {
 689                         snd_iprintf(buffer, "%04X ",i);
 690                 }
 691
 692                 snd_iprintf(buffer,"%08X ",readl(dst + i));
 693         }
 694
 695         snd_iprintf(buffer,"\n...\n");
 696         col = 0;
 697
 698         for (i = SPDIFO_IP_OUTPUT_BUFFER1+0xD0;i < SPDIFO_IP_OUTPUT_BUFFER1 + 0x110; i += sizeof(u32),col ++) {
 699                 if (col == 4) {
 700                         snd_iprintf(buffer,"\n");
 701                         col = 0;
 702                 }
 703
 704                 if (col == 0) {
 705                         snd_iprintf(buffer, "%04X ",i);
 706                 }
 707
 708                 snd_iprintf(buffer,"%08X ",readl(dst + i));
 709         }
 710
 711
 712         snd_iprintf(buffer,"\nOUTPUT_SNOOP:\n");
 713         col = 0;
 714         for (i = OUTPUT_SNOOP_BUFFER;i < OUTPUT_SNOOP_BUFFER + 0x40; i += sizeof(u32),col ++) {
 715                 if (col == 4) {
 716                         snd_iprintf(buffer,"\n");
 717                         col = 0;
 718                 }
 719
 720                 if (col == 0) {
 721                         snd_iprintf(buffer, "%04X ",i);
 722                 }
 723
 724                 snd_iprintf(buffer,"%08X ",readl(dst + i));
 725         }
 726
 727         snd_iprintf(buffer,"\nCODEC_INPUT_BUF1: \n");
 728         col = 0;
 729         for (i = CODEC_INPUT_BUF1;i < CODEC_INPUT_BUF1 + 0x40; i += sizeof(u32),col ++) {
 730                 if (col == 4) {
 731                         snd_iprintf(buffer,"\n");
 732                         col = 0;
 733                 }
 734
 735                 if (col == 0) {
 736                         snd_iprintf(buffer, "%04X ",i);
 737                 }
 738
 739                 snd_iprintf(buffer,"%08X ",readl(dst + i));
 740         }
 741 #if 0
 742         snd_iprintf(buffer,"\nWRITE_BACK_BUF1: \n");
 743         col = 0;
 744         for (i = WRITE_BACK_BUF1;i < WRITE_BACK_BUF1 + 0x40; i += sizeof(u32),col ++) {
 745                 if (col == 4) {
 746                         snd_iprintf(buffer,"\n");
 747                         col = 0;
 748                 }
 749
 750                 if (col == 0) {
 751                         snd_iprintf(buffer, "%04X ",i);
 752                 }
 753
 754                 snd_iprintf(buffer,"%08X ",readl(dst + i));
 755         }
 756 #endif
 757
 758         snd_iprintf(buffer,"\nSPDIFI_IP_OUTPUT_BUFFER1: \n");
 759         col = 0;
 760         for (i = SPDIFI_IP_OUTPUT_BUFFER1;i < SPDIFI_IP_OUTPUT_BUFFER1 + 0x80; i += sizeof(u32),col ++) {
 761                 if (col == 4) {
 762                         snd_iprintf(buffer,"\n");
 763                         col = 0;
 764                 }
 765
 766                 if (col == 0) {
 767                         snd_iprintf(buffer, "%04X ",i);
 768                 }
 769
 770                 snd_iprintf(buffer,"%08X ",readl(dst + i));
 771         }
 772         snd_iprintf(buffer,"\n");
 773 }
 774
 775 int cs46xx_dsp_proc_init (struct snd_card *card, struct snd_cs46xx *chip)
 776 {
 777         struct snd_info_entry *entry;
 778         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
 779         int i;
 780
 781         ins->snd_card = card;
 782
 783         if ((entry = snd_info_create_card_entry(card, "dsp", card->proc_root)) != NULL) {
 784                 entry->content = SNDRV_INFO_CONTENT_TEXT;
 785                 entry->mode = S_IFDIR | S_IRUGO | S_IXUGO;
 786
 787                 if (snd_info_register(entry) < 0) {
 788                         snd_info_free_entry(entry);
 789                         entry = NULL;
 790                 }
 791         }
 792
 793         ins->proc_dsp_dir = entry;
 794
 795         if (!ins->proc_dsp_dir)
 796                 return -ENOMEM;
 797
 798         if ((entry = snd_info_create_card_entry(card, "spos_symbols", ins->proc_dsp_dir)) != NULL) {
 799                 entry->content = SNDRV_INFO_CONTENT_TEXT;
 800                 entry->private_data = chip;
 801                 entry->mode = S_IFREG | S_IRUGO | S_IWUSR;
 802                 entry->c.text.read = cs46xx_dsp_proc_symbol_table_read;
 803                 if (snd_info_register(entry) < 0) {
 804                         snd_info_free_entry(entry);
 805                         entry = NULL;
 806                 }
 807         }
 808         ins->proc_sym_info_entry = entry;
 809
 810         if ((entry = snd_info_create_card_entry(card, "spos_modules", ins->proc_dsp_dir)) != NULL) {
 811                 entry->content = SNDRV_INFO_CONTENT_TEXT;
 812                 entry->private_data = chip;
 813                 entry->mode = S_IFREG | S_IRUGO | S_IWUSR;
 814                 entry->c.text.read = cs46xx_dsp_proc_modules_read;
 815                 if (snd_info_register(entry) < 0) {
 816                         snd_info_free_entry(entry);
 817                         entry = NULL;
 818                 }
 819         }
 820         ins->proc_modules_info_entry = entry;
 821
 822         if ((entry = snd_info_create_card_entry(card, "parameter", ins->proc_dsp_dir)) != NULL) {
 823                 entry->content = SNDRV_INFO_CONTENT_TEXT;
 824                 entry->private_data = chip;
 825                 entry->mode = S_IFREG | S_IRUGO | S_IWUSR;
 826                 entry->c.text.read = cs46xx_dsp_proc_parameter_dump_read;
 827                 if (snd_info_register(entry) < 0) {
 828                         snd_info_free_entry(entry);
 829                         entry = NULL;
 830                 }
 831         }
 832         ins->proc_parameter_dump_info_entry = entry;
 833
 834         if ((entry = snd_info_create_card_entry(card, "sample", ins->proc_dsp_dir)) != NULL) {
 835                 entry->content = SNDRV_INFO_CONTENT_TEXT;
 836                 entry->private_data = chip;
 837                 entry->mode = S_IFREG | S_IRUGO | S_IWUSR;
 838                 entry->c.text.read = cs46xx_dsp_proc_sample_dump_read;
 839                 if (snd_info_register(entry) < 0) {
 840                         snd_info_free_entry(entry);
 841                         entry = NULL;
 842                 }
 843         }
 844         ins->proc_sample_dump_info_entry = entry;
 845
 846         if ((entry = snd_info_create_card_entry(card, "task_tree", ins->proc_dsp_dir)) != NULL) {
 847                 entry->content = SNDRV_INFO_CONTENT_TEXT;
 848                 entry->private_data = chip;
 849                 entry->mode = S_IFREG | S_IRUGO | S_IWUSR;
 850                 entry->c.text.read = cs46xx_dsp_proc_task_tree_read;
 851                 if (snd_info_register(entry) < 0) {
 852                         snd_info_free_entry(entry);
 853                         entry = NULL;
 854                 }
 855         }
 856         ins->proc_task_info_entry = entry;
 857
 858         if ((entry = snd_info_create_card_entry(card, "scb_info", ins->proc_dsp_dir)) != NULL) {
 859                 entry->content = SNDRV_INFO_CONTENT_TEXT;
 860                 entry->private_data = chip;
 861                 entry->mode = S_IFREG | S_IRUGO | S_IWUSR;
 862                 entry->c.text.read = cs46xx_dsp_proc_scb_read;
 863                 if (snd_info_register(entry) < 0) {
 864                         snd_info_free_entry(entry);
 865                         entry = NULL;
 866                 }
 867         }
 868         ins->proc_scb_info_entry = entry;
 869
 870         mutex_lock(&chip->spos_mutex);
 871         /* register/update SCB's entries on proc */
 872         for (i = 0; i < ins->nscb; ++i) {
 873                 if (ins->scbs[i].deleted) continue;
 874
 875                 cs46xx_dsp_proc_register_scb_desc (chip, (ins->scbs + i));
 876         }
 877         mutex_unlock(&chip->spos_mutex);
 878
 879         return 0;
 880 }
 881
 882 int cs46xx_dsp_proc_done (struct snd_cs46xx *chip)
 883 {
 884         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
 885         int i;
 886
 887         snd_info_free_entry(ins->proc_sym_info_entry);
 888         ins->proc_sym_info_entry = NULL;
 889
 890         snd_info_free_entry(ins->proc_modules_info_entry);
 891         ins->proc_modules_info_entry = NULL;
 892
 893         snd_info_free_entry(ins->proc_parameter_dump_info_entry);
 894         ins->proc_parameter_dump_info_entry = NULL;
 895
 896         snd_info_free_entry(ins->proc_sample_dump_info_entry);
 897         ins->proc_sample_dump_info_entry = NULL;
 898
 899         snd_info_free_entry(ins->proc_scb_info_entry);
 900         ins->proc_scb_info_entry = NULL;
 901
 902         snd_info_free_entry(ins->proc_task_info_entry);
 903         ins->proc_task_info_entry = NULL;
 904
 905         mutex_lock(&chip->spos_mutex);
 906         for (i = 0; i < ins->nscb; ++i) {
 907                 if (ins->scbs[i].deleted) continue;
 908                 cs46xx_dsp_proc_free_scb_desc ( (ins->scbs + i) );
 909         }
 910         mutex_unlock(&chip->spos_mutex);
 911
 912         snd_info_free_entry(ins->proc_dsp_dir);
 913         ins->proc_dsp_dir = NULL;
 914
 915         return 0;
 916 }
 917 #endif /* CONFIG_PROC_FS */
 918
 919 static int debug_tree;
 920 static void _dsp_create_task_tree (struct snd_cs46xx *chip, u32 * task_data,
 921                                    u32  dest, int size)
 922 {
 923         void __iomem *spdst = chip->region.idx[1].remap_addr +
 924                 DSP_PARAMETER_BYTE_OFFSET + dest * sizeof(u32);
 925         int i;
 926
 927         for (i = 0; i < size; ++i) {
 928                 if (debug_tree) printk ("addr %p, val %08x\n",spdst,task_data[i]);
 929                 writel(task_data[i],spdst);
 930                 spdst += sizeof(u32);
 931         }
 932 }
 933
 934 static int debug_scb;
 935 static void _dsp_create_scb (struct snd_cs46xx *chip, u32 * scb_data, u32 dest)
 936 {
 937         void __iomem *spdst = chip->region.idx[1].remap_addr +
 938                 DSP_PARAMETER_BYTE_OFFSET + dest * sizeof(u32);
 939         int i;
 940
 941         for (i = 0; i < 0x10; ++i) {
 942                 if (debug_scb) printk ("addr %p, val %08x\n",spdst,scb_data[i]);
 943                 writel(scb_data[i],spdst);
 944                 spdst += sizeof(u32);
 945         }
 946 }
 947
 948 static int find_free_scb_index (struct dsp_spos_instance * ins)
 949 {
 950         int index = ins->nscb, i;
 951
 952         for (i = ins->scb_highest_frag_index; i < ins->nscb; ++i) {
 953                 if (ins->scbs[i].deleted) {
 954                         index = i;
 955                         break;
 956                 }
 957         }
 958
 959         return index;
 960 }
 961
 962 static struct dsp_scb_descriptor * _map_scb (struct snd_cs46xx *chip, char * name, u32 dest)
 963 {
 964         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
 965         struct dsp_scb_descriptor * desc = NULL;
 966         int index;
 967
 968         if (ins->nscb == DSP_MAX_SCB_DESC - 1) {
 969                 snd_printk(KERN_ERR "dsp_spos: got no place for other SCB\n");
 970                 return NULL;
 971         }
 972
 973         index = find_free_scb_index (ins);
 974
 975         strcpy(ins->scbs[index].scb_name, name);
 976         ins->scbs[index].address = dest;
 977         ins->scbs[index].index = index;
 978         ins->scbs[index].proc_info = NULL;
 979         ins->scbs[index].ref_count = 1;
 980         ins->scbs[index].deleted = 0;
 981         spin_lock_init(&ins->scbs[index].lock);
 982
 983         desc = (ins->scbs + index);
 984         ins->scbs[index].scb_symbol = add_symbol (chip, name, dest, SYMBOL_PARAMETER);
 985
 986         if (index > ins->scb_highest_frag_index)
 987                 ins->scb_highest_frag_index = index;
 988
 989         if (index == ins->nscb)
 990                 ins->nscb++;
 991
 992         return desc;
 993 }
 994
 995 static struct dsp_task_descriptor *
 996 _map_task_tree (struct snd_cs46xx *chip, char * name, u32 dest, u32 size)
 997 {
 998         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
 999         struct dsp_task_descriptor * desc = NULL;
1000
1001         if (ins->ntask == DSP_MAX_TASK_DESC - 1) {
1002                 snd_printk(KERN_ERR "dsp_spos: got no place for other TASK\n");
1003                 return NULL;
1004         }
1005
1006         if (name)
1007                 strcpy(ins->tasks[ins->ntask].task_name, name);
1008         else
1009                 strcpy(ins->tasks[ins->ntask].task_name, "(NULL)");
1010         ins->tasks[ins->ntask].address = dest;
1011         ins->tasks[ins->ntask].size = size;
1012
1013         /* quick find in list */
1014         ins->tasks[ins->ntask].index = ins->ntask;
1015         desc = (ins->tasks + ins->ntask);
1016         ins->ntask++;
1017
1018         if (name)
1019                 add_symbol (chip,name,dest,SYMBOL_PARAMETER);
1020         return desc;
1021 }
1022
1023 struct dsp_scb_descriptor *
1024 cs46xx_dsp_create_scb (struct snd_cs46xx *chip, char * name, u32 * scb_data, u32 dest)
1025 {
1026         struct dsp_scb_descriptor * desc;
1027
1028         desc = _map_scb (chip,name,dest);
1029         if (desc) {
1030                 desc->data = scb_data;
1031                 _dsp_create_scb(chip,scb_data,dest);
1032         } else {
1033                 snd_printk(KERN_ERR "dsp_spos: failed to map SCB\n");
1034         }
1035
1036         return desc;
1037 }
1038
1039
1040 static struct dsp_task_descriptor *
1041 cs46xx_dsp_create_task_tree (struct snd_cs46xx *chip, char * name, u32 * task_data,
1042                              u32 dest, int size)
1043 {
1044         struct dsp_task_descriptor * desc;
1045
1046         desc = _map_task_tree (chip,name,dest,size);
1047         if (desc) {
1048                 desc->data = task_data;
1049                 _dsp_create_task_tree(chip,task_data,dest,size);
1050         } else {
1051                 snd_printk(KERN_ERR "dsp_spos: failed to map TASK\n");
1052         }
1053
1054         return desc;
1055 }
1056
1057 int cs46xx_dsp_scb_and_task_init (struct snd_cs46xx *chip)
1058 {
1059         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1060         struct dsp_symbol_entry * fg_task_tree_header_code;
1061         struct dsp_symbol_entry * task_tree_header_code;
1062         struct dsp_symbol_entry * task_tree_thread;
1063         struct dsp_symbol_entry * null_algorithm;
1064         struct dsp_symbol_entry * magic_snoop_task;
1065
1066         struct dsp_scb_descriptor * timing_master_scb;
1067         struct dsp_scb_descriptor * codec_out_scb;
1068         struct dsp_scb_descriptor * codec_in_scb;
1069         struct dsp_scb_descriptor * src_task_scb;
1070         struct dsp_scb_descriptor * master_mix_scb;
1071         struct dsp_scb_descriptor * rear_mix_scb;
1072         struct dsp_scb_descriptor * record_mix_scb;
1073         struct dsp_scb_descriptor * write_back_scb;
1074         struct dsp_scb_descriptor * vari_decimate_scb;
1075         struct dsp_scb_descriptor * rear_codec_out_scb;
1076         struct dsp_scb_descriptor * clfe_codec_out_scb;
1077         struct dsp_scb_descriptor * magic_snoop_scb;
1078
1079         int fifo_addr, fifo_span, valid_slots;
1080
1081         static struct dsp_spos_control_block sposcb = {
1082                 /* 0 */ HFG_TREE_SCB,HFG_STACK,
1083                 /* 1 */ SPOSCB_ADDR,BG_TREE_SCB_ADDR,
1084                 /* 2 */ DSP_SPOS_DC,0,
1085                 /* 3 */ DSP_SPOS_DC,DSP_SPOS_DC,
1086                 /* 4 */ 0,0,
1087                 /* 5 */ DSP_SPOS_UU,0,
1088                 /* 6 */ FG_TASK_HEADER_ADDR,0,
1089                 /* 7 */ 0,0,
1090                 /* 8 */ DSP_SPOS_UU,DSP_SPOS_DC,
1091                 /* 9 */ 0,
1092                 /* A */ 0,HFG_FIRST_EXECUTE_MODE,
1093                 /* B */ DSP_SPOS_UU,DSP_SPOS_UU,
1094                 /* C */ DSP_SPOS_DC_DC,
1095                 /* D */ DSP_SPOS_DC_DC,
1096                 /* E */ DSP_SPOS_DC_DC,
1097                 /* F */ DSP_SPOS_DC_DC
1098         };
1099
1100         cs46xx_dsp_create_task_tree(chip, "sposCB", (u32 *)&sposcb, SPOSCB_ADDR, 0x10);
1101
1102         null_algorithm  = cs46xx_dsp_lookup_symbol(chip, "NULLALGORITHM", SYMBOL_CODE);
1103         if (null_algorithm == NULL) {
1104                 snd_printk(KERN_ERR "dsp_spos: symbol NULLALGORITHM not found\n");
1105                 return -EIO;
1106         }
1107
1108         fg_task_tree_header_code = cs46xx_dsp_lookup_symbol(chip, "FGTASKTREEHEADERCODE", SYMBOL_CODE);
1109         if (fg_task_tree_header_code == NULL) {
1110                 snd_printk(KERN_ERR "dsp_spos: symbol FGTASKTREEHEADERCODE not found\n");
1111                 return -EIO;
1112         }
1113
1114         task_tree_header_code = cs46xx_dsp_lookup_symbol(chip, "TASKTREEHEADERCODE", SYMBOL_CODE);
1115         if (task_tree_header_code == NULL) {
1116                 snd_printk(KERN_ERR "dsp_spos: symbol TASKTREEHEADERCODE not found\n");
1117                 return -EIO;
1118         }
1119
1120         task_tree_thread = cs46xx_dsp_lookup_symbol(chip, "TASKTREETHREAD", SYMBOL_CODE);
1121         if (task_tree_thread == NULL) {
1122                 snd_printk(KERN_ERR "dsp_spos: symbol TASKTREETHREAD not found\n");
1123                 return -EIO;
1124         }
1125
1126         magic_snoop_task = cs46xx_dsp_lookup_symbol(chip, "MAGICSNOOPTASK", SYMBOL_CODE);
1127         if (magic_snoop_task == NULL) {
1128                 snd_printk(KERN_ERR "dsp_spos: symbol MAGICSNOOPTASK not found\n");
1129                 return -EIO;
1130         }
1131
1132         {
1133                 /* create the null SCB */
1134                 static struct dsp_generic_scb null_scb = {
1135                         { 0, 0, 0, 0 },
1136                         { 0, 0, 0, 0, 0 },
1137                         NULL_SCB_ADDR, NULL_SCB_ADDR,
1138                         0, 0, 0, 0, 0,
1139                         {
1140                                 0,0,
1141                                 0,0,
1142                         }
1143                 };
1144
1145                 null_scb.entry_point = null_algorithm->address;
1146                 ins->the_null_scb = cs46xx_dsp_create_scb(chip, "nullSCB", (u32 *)&null_scb, NULL_SCB_ADDR);
1147                 ins->the_null_scb->task_entry = null_algorithm;
1148                 ins->the_null_scb->sub_list_ptr = ins->the_null_scb;
1149                 ins->the_null_scb->next_scb_ptr = ins->the_null_scb;
1150                 ins->the_null_scb->parent_scb_ptr = NULL;
1151                 cs46xx_dsp_proc_register_scb_desc (chip,ins->the_null_scb);
1152         }
1153
1154         {
1155                 /* setup foreground task tree */
1156                 static struct dsp_task_tree_control_block fg_task_tree_hdr =  {
1157                         { FG_TASK_HEADER_ADDR | (DSP_SPOS_DC << 0x10),
1158                           DSP_SPOS_DC_DC,
1159                           DSP_SPOS_DC_DC,
1160                           0x0000,DSP_SPOS_DC,
1161                           DSP_SPOS_DC, DSP_SPOS_DC,
1162                           DSP_SPOS_DC_DC,
1163                           DSP_SPOS_DC_DC,
1164                           DSP_SPOS_DC_DC,
1165                           DSP_SPOS_DC,DSP_SPOS_DC },
1166
1167                         {
1168                                 BG_TREE_SCB_ADDR,TIMINGMASTER_SCB_ADDR,
1169                                 0,
1170                                 FG_TASK_HEADER_ADDR + TCBData,
1171                         },
1172
1173                         {
1174                                 4,0,
1175                                 1,0,
1176                                 2,SPOSCB_ADDR + HFGFlags,
1177                                 0,0,
1178                                 FG_TASK_HEADER_ADDR + TCBContextBlk,FG_STACK
1179                         },
1180
1181                         {
1182                                 DSP_SPOS_DC,0,
1183                                 DSP_SPOS_DC,DSP_SPOS_DC,
1184                                 DSP_SPOS_DC,DSP_SPOS_DC,
1185                                 DSP_SPOS_DC,DSP_SPOS_DC,
1186                                 DSP_SPOS_DC,DSP_SPOS_DC,
1187                                 DSP_SPOS_DCDC,
1188                                 DSP_SPOS_UU,1,
1189                                 DSP_SPOS_DCDC,
1190                                 DSP_SPOS_DCDC,
1191                                 DSP_SPOS_DCDC,
1192                                 DSP_SPOS_DCDC,
1193                                 DSP_SPOS_DCDC,
1194                                 DSP_SPOS_DCDC,
1195                                 DSP_SPOS_DCDC,
1196                                 DSP_SPOS_DCDC,
1197                                 DSP_SPOS_DCDC,
1198                                 DSP_SPOS_DCDC,
1199                                 DSP_SPOS_DCDC,
1200                                 DSP_SPOS_DCDC,
1201                                 DSP_SPOS_DCDC,
1202                                 DSP_SPOS_DCDC,
1203                                 DSP_SPOS_DCDC,
1204                                 DSP_SPOS_DCDC,
1205                                 DSP_SPOS_DCDC,
1206                                 DSP_SPOS_DCDC,
1207                                 DSP_SPOS_DCDC,
1208                                 DSP_SPOS_DCDC,
1209                                 DSP_SPOS_DCDC,
1210                                 DSP_SPOS_DCDC,
1211                                 DSP_SPOS_DCDC,
1212                                 DSP_SPOS_DCDC,
1213                                 DSP_SPOS_DCDC,
1214                                 DSP_SPOS_DCDC,
1215                                 DSP_SPOS_DCDC,
1216                                 DSP_SPOS_DCDC
1217                         },
1218                         {
1219                                 FG_INTERVAL_TIMER_PERIOD,DSP_SPOS_UU,
1220                                 0,0
1221                         }
1222                 };
1223
1224                 fg_task_tree_hdr.links.entry_point = fg_task_tree_header_code->address;
1225                 fg_task_tree_hdr.context_blk.stack0 = task_tree_thread->address;
1226                 cs46xx_dsp_create_task_tree(chip,"FGtaskTreeHdr",(u32 *)&fg_task_tree_hdr,FG_TASK_HEADER_ADDR,0x35);
1227         }
1228
1229
1230         {
1231                 /* setup foreground task tree */
1232                 static struct dsp_task_tree_control_block bg_task_tree_hdr =  {
1233                         { DSP_SPOS_DC_DC,
1234                           DSP_SPOS_DC_DC,
1235                           DSP_SPOS_DC_DC,
1236                           DSP_SPOS_DC, DSP_SPOS_DC,
1237                           DSP_SPOS_DC, DSP_SPOS_DC,
1238                           DSP_SPOS_DC_DC,
1239                           DSP_SPOS_DC_DC,
1240                           DSP_SPOS_DC_DC,
1241                           DSP_SPOS_DC,DSP_SPOS_DC },
1242
1243                         {
1244                                 NULL_SCB_ADDR,NULL_SCB_ADDR,  /* Set up the background to do nothing */
1245                                 0,
1246                                 BG_TREE_SCB_ADDR + TCBData,
1247                         },
1248
1249                         {
1250                                 9999,0,
1251                                 0,1,
1252                                 0,SPOSCB_ADDR + HFGFlags,
1253                                 0,0,
1254                                 BG_TREE_SCB_ADDR + TCBContextBlk,BG_STACK
1255                         },
1256
1257                         {
1258                                 DSP_SPOS_DC,0,
1259                                 DSP_SPOS_DC,DSP_SPOS_DC,
1260                                 DSP_SPOS_DC,DSP_SPOS_DC,
1261                                 DSP_SPOS_DC,DSP_SPOS_DC,
1262                                 DSP_SPOS_DC,DSP_SPOS_DC,
1263                                 DSP_SPOS_DCDC,
1264                                 DSP_SPOS_UU,1,
1265                                 DSP_SPOS_DCDC,
1266                                 DSP_SPOS_DCDC,
1267                                 DSP_SPOS_DCDC,
1268                                 DSP_SPOS_DCDC,
1269                                 DSP_SPOS_DCDC,
1270                                 DSP_SPOS_DCDC,
1271                                 DSP_SPOS_DCDC,
1272                                 DSP_SPOS_DCDC,
1273                                 DSP_SPOS_DCDC,
1274                                 DSP_SPOS_DCDC,
1275                                 DSP_SPOS_DCDC,
1276                                 DSP_SPOS_DCDC,
1277                                 DSP_SPOS_DCDC,
1278                                 DSP_SPOS_DCDC,
1279                                 DSP_SPOS_DCDC,
1280                                 DSP_SPOS_DCDC,
1281                                 DSP_SPOS_DCDC,
1282                                 DSP_SPOS_DCDC,
1283                                 DSP_SPOS_DCDC,
1284                                 DSP_SPOS_DCDC,
1285                                 DSP_SPOS_DCDC,
1286                                 DSP_SPOS_DCDC,
1287                                 DSP_SPOS_DCDC,
1288                                 DSP_SPOS_DCDC,
1289                                 DSP_SPOS_DCDC,
1290                                 DSP_SPOS_DCDC,
1291                                 DSP_SPOS_DCDC,
1292                                 DSP_SPOS_DCDC
1293                         },
1294                         {
1295                                 BG_INTERVAL_TIMER_PERIOD,DSP_SPOS_UU,
1296                                 0,0
1297                         }
1298                 };
1299
1300                 bg_task_tree_hdr.links.entry_point = task_tree_header_code->address;
1301                 bg_task_tree_hdr.context_blk.stack0 = task_tree_thread->address;
1302                 cs46xx_dsp_create_task_tree(chip,"BGtaskTreeHdr",(u32 *)&bg_task_tree_hdr,BG_TREE_SCB_ADDR,0x35);
1303         }
1304
1305         /* create timing master SCB */
1306         timing_master_scb = cs46xx_dsp_create_timing_master_scb(chip);
1307
1308         /* create the CODEC output task */
1309         codec_out_scb = cs46xx_dsp_create_codec_out_scb(chip,"CodecOutSCB_I",0x0010,0x0000,
1310                                                         MASTERMIX_SCB_ADDR,
1311                                                         CODECOUT_SCB_ADDR,timing_master_scb,
1312                                                         SCB_ON_PARENT_SUBLIST_SCB);
1313
1314         if (!codec_out_scb) goto _fail_end;
1315         /* create the master mix SCB */
1316         master_mix_scb = cs46xx_dsp_create_mix_only_scb(chip,"MasterMixSCB",
1317                                                         MIX_SAMPLE_BUF1,MASTERMIX_SCB_ADDR,
1318                                                         codec_out_scb,
1319                                                         SCB_ON_PARENT_SUBLIST_SCB);
1320         ins->master_mix_scb = master_mix_scb;
1321
1322         if (!master_mix_scb) goto _fail_end;
1323
1324         /* create codec in */
1325         codec_in_scb = cs46xx_dsp_create_codec_in_scb(chip,"CodecInSCB",0x0010,0x00A0,
1326                                                       CODEC_INPUT_BUF1,
1327                                                       CODECIN_SCB_ADDR,codec_out_scb,
1328                                                       SCB_ON_PARENT_NEXT_SCB);
1329         if (!codec_in_scb) goto _fail_end;
1330         ins->codec_in_scb = codec_in_scb;
1331
1332         /* create write back scb */
1333         write_back_scb = cs46xx_dsp_create_mix_to_ostream_scb(chip,"WriteBackSCB",
1334                                                               WRITE_BACK_BUF1,WRITE_BACK_SPB,
1335                                                               WRITEBACK_SCB_ADDR,
1336                                                               timing_master_scb,
1337                                                               SCB_ON_PARENT_NEXT_SCB);
1338         if (!write_back_scb) goto _fail_end;
1339
1340         {
1341                 static struct dsp_mix2_ostream_spb mix2_ostream_spb = {
1342                         0x00020000,
1343                         0x0000ffff
1344                 };
1345
1346                 if (!cs46xx_dsp_create_task_tree(chip, NULL,
1347                                                  (u32 *)&mix2_ostream_spb,
1348                                                  WRITE_BACK_SPB, 2))
1349                         goto _fail_end;
1350         }
1351
1352         /* input sample converter */
1353         vari_decimate_scb = cs46xx_dsp_create_vari_decimate_scb(chip,"VariDecimateSCB",
1354                                                                 VARI_DECIMATE_BUF0,
1355                                                                 VARI_DECIMATE_BUF1,
1356                                                                 VARIDECIMATE_SCB_ADDR,
1357                                                                 write_back_scb,
1358                                                                 SCB_ON_PARENT_SUBLIST_SCB);
1359         if (!vari_decimate_scb) goto _fail_end;
1360
1361         /* create the record mixer SCB */
1362         record_mix_scb = cs46xx_dsp_create_mix_only_scb(chip,"RecordMixerSCB",
1363                                                         MIX_SAMPLE_BUF2,
1364                                                         RECORD_MIXER_SCB_ADDR,
1365                                                         vari_decimate_scb,
1366                                                         SCB_ON_PARENT_SUBLIST_SCB);
1367         ins->record_mixer_scb = record_mix_scb;
1368
1369         if (!record_mix_scb) goto _fail_end;
1370
1371         valid_slots = snd_cs46xx_peekBA0(chip, BA0_ACOSV);
1372
1373         snd_assert (chip->nr_ac97_codecs == 1 || chip->nr_ac97_codecs == 2);
1374
1375         if (chip->nr_ac97_codecs == 1) {
1376                 /* output on slot 5 and 11
1377                    on primary CODEC */
1378                 fifo_addr = 0x20;
1379                 fifo_span = 0x60;
1380
1381                 /* enable slot 5 and 11 */
1382                 valid_slots |= ACOSV_SLV5 | ACOSV_SLV11;
1383         } else {
1384                 /* output on slot 7 and 8
1385                    on secondary CODEC */
1386                 fifo_addr = 0x40;
1387                 fifo_span = 0x10;
1388
1389                 /* enable slot 7 and 8 */
1390                 valid_slots |= ACOSV_SLV7 | ACOSV_SLV8;
1391         }
1392         /* create CODEC tasklet for rear speakers output*/
1393         rear_codec_out_scb = cs46xx_dsp_create_codec_out_scb(chip,"CodecOutSCB_Rear",fifo_span,fifo_addr,
1394                                                              REAR_MIXER_SCB_ADDR,
1395                                                              REAR_CODECOUT_SCB_ADDR,codec_in_scb,
1396                                                              SCB_ON_PARENT_NEXT_SCB);
1397         if (!rear_codec_out_scb) goto _fail_end;
1398
1399
1400         /* create the rear PCM channel  mixer SCB */
1401         rear_mix_scb = cs46xx_dsp_create_mix_only_scb(chip,"RearMixerSCB",
1402                                                       MIX_SAMPLE_BUF3,
1403                                                       REAR_MIXER_SCB_ADDR,
1404                                                       rear_codec_out_scb,
1405                                                       SCB_ON_PARENT_SUBLIST_SCB);
1406         ins->rear_mix_scb = rear_mix_scb;
1407         if (!rear_mix_scb) goto _fail_end;
1408
1409         if (chip->nr_ac97_codecs == 2) {
1410                 /* create CODEC tasklet for rear Center/LFE output
1411                    slot 6 and 9 on seconadry CODEC */
1412                 clfe_codec_out_scb = cs46xx_dsp_create_codec_out_scb(chip,"CodecOutSCB_CLFE",0x0030,0x0030,
1413                                                                      CLFE_MIXER_SCB_ADDR,
1414                                                                      CLFE_CODEC_SCB_ADDR,
1415                                                                      rear_codec_out_scb,
1416                                                                      SCB_ON_PARENT_NEXT_SCB);
1417                 if (!clfe_codec_out_scb) goto _fail_end;
1418
1419
1420                 /* create the rear PCM channel  mixer SCB */
1421                 ins->center_lfe_mix_scb = cs46xx_dsp_create_mix_only_scb(chip,"CLFEMixerSCB",
1422                                                                          MIX_SAMPLE_BUF4,
1423                                                                          CLFE_MIXER_SCB_ADDR,
1424                                                                          clfe_codec_out_scb,
1425                                                                          SCB_ON_PARENT_SUBLIST_SCB);
1426                 if (!ins->center_lfe_mix_scb) goto _fail_end;
1427
1428                 /* enable slot 6 and 9 */
1429                 valid_slots |= ACOSV_SLV6 | ACOSV_SLV9;
1430         } else {
1431                 clfe_codec_out_scb = rear_codec_out_scb;
1432                 ins->center_lfe_mix_scb = rear_mix_scb;
1433         }
1434
1435         /* enable slots depending on CODEC configuration */
1436         snd_cs46xx_pokeBA0(chip, BA0_ACOSV, valid_slots);
1437
1438         /* the magic snooper */
1439         magic_snoop_scb = cs46xx_dsp_create_magic_snoop_scb (chip,"MagicSnoopSCB_I",OUTPUTSNOOP_SCB_ADDR,
1440                                                              OUTPUT_SNOOP_BUFFER,
1441                                                              codec_out_scb,
1442                                                              clfe_codec_out_scb,
1443                                                              SCB_ON_PARENT_NEXT_SCB);
1444
1445
1446         if (!magic_snoop_scb) goto _fail_end;
1447         ins->ref_snoop_scb = magic_snoop_scb;
1448
1449         /* SP IO access */
1450         if (!cs46xx_dsp_create_spio_write_scb(chip,"SPIOWriteSCB",SPIOWRITE_SCB_ADDR,
1451                                               magic_snoop_scb,
1452                                               SCB_ON_PARENT_NEXT_SCB))
1453                 goto _fail_end;
1454
1455         /* SPDIF input sampel rate converter */
1456         src_task_scb = cs46xx_dsp_create_src_task_scb(chip,"SrcTaskSCB_SPDIFI",
1457                                                       ins->spdif_in_sample_rate,
1458                                                       SRC_OUTPUT_BUF1,
1459                                                       SRC_DELAY_BUF1,SRCTASK_SCB_ADDR,
1460                                                       master_mix_scb,
1461                                                       SCB_ON_PARENT_SUBLIST_SCB,1);
1462
1463         if (!src_task_scb) goto _fail_end;
1464         cs46xx_src_unlink(chip,src_task_scb);
1465
1466         /* NOTE: when we now how to detect the SPDIF input
1467            sample rate we will use this SRC to adjust it */
1468         ins->spdif_in_src = src_task_scb;
1469
1470         cs46xx_dsp_async_init(chip,timing_master_scb);
1471         return 0;
1472
1473  _fail_end:
1474         snd_printk(KERN_ERR "dsp_spos: failed to setup SCB's in DSP\n");
1475         return -EINVAL;
1476 }
1477
1478 static int cs46xx_dsp_async_init (struct snd_cs46xx *chip,
1479                                   struct dsp_scb_descriptor * fg_entry)
1480 {
1481         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1482         struct dsp_symbol_entry * s16_async_codec_input_task;
1483         struct dsp_symbol_entry * spdifo_task;
1484         struct dsp_symbol_entry * spdifi_task;
1485         struct dsp_scb_descriptor * spdifi_scb_desc, * spdifo_scb_desc, * async_codec_scb_desc;
1486
1487         s16_async_codec_input_task = cs46xx_dsp_lookup_symbol(chip, "S16_ASYNCCODECINPUTTASK", SYMBOL_CODE);
1488         if (s16_async_codec_input_task == NULL) {
1489                 snd_printk(KERN_ERR "dsp_spos: symbol S16_ASYNCCODECINPUTTASK not found\n");
1490                 return -EIO;
1491         }
1492         spdifo_task = cs46xx_dsp_lookup_symbol(chip, "SPDIFOTASK", SYMBOL_CODE);
1493         if (spdifo_task == NULL) {
1494                 snd_printk(KERN_ERR "dsp_spos: symbol SPDIFOTASK not found\n");
1495                 return -EIO;
1496         }
1497
1498         spdifi_task = cs46xx_dsp_lookup_symbol(chip, "SPDIFITASK", SYMBOL_CODE);
1499         if (spdifi_task == NULL) {
1500                 snd_printk(KERN_ERR "dsp_spos: symbol SPDIFITASK not found\n");
1501                 return -EIO;
1502         }
1503
1504         {
1505                 /* 0xBC0 */
1506                 struct dsp_spdifoscb spdifo_scb = {
1507                         /* 0 */ DSP_SPOS_UUUU,
1508                         {
1509                                 /* 1 */ 0xb0,
1510                                 /* 2 */ 0,
1511                                 /* 3 */ 0,
1512                                 /* 4 */ 0,
1513                         },
1514                         /* NOTE: the SPDIF output task read samples in mono
1515                            format, the AsynchFGTxSCB task writes to buffer
1516                            in stereo format
1517                         */
1518                         /* 5 */ RSCONFIG_SAMPLE_16MONO + RSCONFIG_MODULO_256,
1519                         /* 6 */ ( SPDIFO_IP_OUTPUT_BUFFER1 << 0x10 )  |  0xFFFC,
1520                         /* 7 */ 0,0,
1521                         /* 8 */ 0,
1522                         /* 9 */ FG_TASK_HEADER_ADDR, NULL_SCB_ADDR,
1523                         /* A */ spdifo_task->address,
1524                         SPDIFO_SCB_INST + SPDIFOFIFOPointer,
1525                         {
1526                                 /* B */ 0x0040, /*DSP_SPOS_UUUU,*/
1527                                 /* C */ 0x20ff, /*DSP_SPOS_UUUU,*/
1528                         },
1529                         /* D */ 0x804c,0,                                                         /* SPDIFOFIFOPointer:SPDIFOStatRegAddr; */
1530                         /* E */ 0x0108,0x0001,                                    /* SPDIFOStMoFormat:SPDIFOFIFOBaseAddr; */
1531                         /* F */ DSP_SPOS_UUUU                                     /* SPDIFOFree; */
1532                 };
1533
1534                 /* 0xBB0 */
1535                 struct dsp_spdifiscb spdifi_scb = {
1536                         /* 0 */ DSP_SPOS_UULO,DSP_SPOS_UUHI,
1537                         /* 1 */ 0,
1538                         /* 2 */ 0,
1539                         /* 3 */ 1,4000,        /* SPDIFICountLimit SPDIFICount */
1540                         /* 4 */ DSP_SPOS_UUUU, /* SPDIFIStatusData */
1541                         /* 5 */ 0,DSP_SPOS_UUHI, /* StatusData, Free4 */
1542                         /* 6 */ DSP_SPOS_UUUU,  /* Free3 */
1543                         /* 7 */ DSP_SPOS_UU,DSP_SPOS_DC,  /* Free2 BitCount*/
1544                         /* 8 */ DSP_SPOS_UUUU,  /* TempStatus */
1545                         /* 9 */ SPDIFO_SCB_INST, NULL_SCB_ADDR,
1546                         /* A */ spdifi_task->address,
1547                         SPDIFI_SCB_INST + SPDIFIFIFOPointer,
1548                         /* NOTE: The SPDIF input task write the sample in mono
1549                            format from the HW FIFO, the AsynchFGRxSCB task  reads
1550                            them in stereo
1551                         */
1552                         /* B */ RSCONFIG_SAMPLE_16MONO + RSCONFIG_MODULO_128,
1553                         /* C */ (SPDIFI_IP_OUTPUT_BUFFER1 << 0x10) | 0xFFFC,
1554                         /* D */ 0x8048,0,
1555                         /* E */ 0x01f0,0x0001,
1556                         /* F */ DSP_SPOS_UUUU /* SPDIN_STATUS monitor */
1557                 };
1558
1559                 /* 0xBA0 */
1560                 struct dsp_async_codec_input_scb async_codec_input_scb = {
1561                         /* 0 */ DSP_SPOS_UUUU,
1562                         /* 1 */ 0,
1563                         /* 2 */ 0,
1564                         /* 3 */ 1,4000,
1565                         /* 4 */ 0x0118,0x0001,
1566                         /* 5 */ RSCONFIG_SAMPLE_16MONO + RSCONFIG_MODULO_64,
1567                         /* 6 */ (ASYNC_IP_OUTPUT_BUFFER1 << 0x10) | 0xFFFC,
1568                         /* 7 */ DSP_SPOS_UU,0x3,
1569                         /* 8 */ DSP_SPOS_UUUU,
1570                         /* 9 */ SPDIFI_SCB_INST,NULL_SCB_ADDR,
1571                         /* A */ s16_async_codec_input_task->address,
1572                         HFG_TREE_SCB + AsyncCIOFIFOPointer,
1573
1574                         /* B */ RSCONFIG_SAMPLE_16STEREO + RSCONFIG_MODULO_64,
1575                         /* C */ (ASYNC_IP_OUTPUT_BUFFER1 << 0x10),  /*(ASYNC_IP_OUTPUT_BUFFER1 << 0x10) | 0xFFFC,*/
1576
1577 #ifdef UseASER1Input
1578                         /* short AsyncCIFIFOPointer:AsyncCIStatRegAddr;
1579                            Init. 0000:8042: for ASER1
1580                            0000:8044: for ASER2 */
1581                         /* D */ 0x8042,0,
1582
1583                         /* short AsyncCIStMoFormat:AsyncCIFIFOBaseAddr;
1584                            Init 1 stero:8050 ASER1
1585                            Init 0  mono:8070 ASER2
1586                            Init 1 Stereo : 0100 ASER1 (Set by script) */
1587                         /* E */ 0x0100,0x0001,
1588
1589 #endif
1590
1591 #ifdef UseASER2Input
1592                         /* short AsyncCIFIFOPointer:AsyncCIStatRegAddr;
1593                            Init. 0000:8042: for ASER1
1594                            0000:8044: for ASER2 */
1595                         /* D */ 0x8044,0,
1596
1597                         /* short AsyncCIStMoFormat:AsyncCIFIFOBaseAddr;
1598                            Init 1 stero:8050 ASER1
1599                            Init 0  mono:8070 ASER2
1600                            Init 1 Stereo : 0100 ASER1 (Set by script) */
1601                         /* E */ 0x0110,0x0001,
1602
1603 #endif
1604
1605                         /* short AsyncCIOutputBufModulo:AsyncCIFree;
1606                            AsyncCIOutputBufModulo: The modulo size for
1607                            the output buffer of this task */
1608                         /* F */ 0, /* DSP_SPOS_UUUU */
1609                 };
1610
1611                 spdifo_scb_desc = cs46xx_dsp_create_scb(chip,"SPDIFOSCB",(u32 *)&spdifo_scb,SPDIFO_SCB_INST);
1612
1613                 snd_assert(spdifo_scb_desc, return -EIO);
1614                 spdifi_scb_desc = cs46xx_dsp_create_scb(chip,"SPDIFISCB",(u32 *)&spdifi_scb,SPDIFI_SCB_INST);
1615                 snd_assert(spdifi_scb_desc, return -EIO);
1616                 async_codec_scb_desc = cs46xx_dsp_create_scb(chip,"AsynCodecInputSCB",(u32 *)&async_codec_input_scb, HFG_TREE_SCB);
1617                 snd_assert(async_codec_scb_desc, return -EIO);
1618
1619                 async_codec_scb_desc->parent_scb_ptr = NULL;
1620                 async_codec_scb_desc->next_scb_ptr = spdifi_scb_desc;
1621                 async_codec_scb_desc->sub_list_ptr = ins->the_null_scb;
1622                 async_codec_scb_desc->task_entry = s16_async_codec_input_task;
1623
1624                 spdifi_scb_desc->parent_scb_ptr = async_codec_scb_desc;
1625                 spdifi_scb_desc->next_scb_ptr = spdifo_scb_desc;
1626                 spdifi_scb_desc->sub_list_ptr = ins->the_null_scb;
1627                 spdifi_scb_desc->task_entry = spdifi_task;
1628
1629                 spdifo_scb_desc->parent_scb_ptr = spdifi_scb_desc;
1630                 spdifo_scb_desc->next_scb_ptr = fg_entry;
1631                 spdifo_scb_desc->sub_list_ptr = ins->the_null_scb;
1632                 spdifo_scb_desc->task_entry = spdifo_task;
1633
1634                 /* this one is faked, as the parnet of SPDIFO task
1635                    is the FG task tree */
1636                 fg_entry->parent_scb_ptr = spdifo_scb_desc;
1637
1638                 /* for proc fs */
1639                 cs46xx_dsp_proc_register_scb_desc (chip,spdifo_scb_desc);
1640                 cs46xx_dsp_proc_register_scb_desc (chip,spdifi_scb_desc);
1641                 cs46xx_dsp_proc_register_scb_desc (chip,async_codec_scb_desc);
1642
1643                 /* Async MASTER ENABLE, affects both SPDIF input and output */
1644                 snd_cs46xx_pokeBA0(chip, BA0_ASER_MASTER, 0x1 );
1645         }
1646
1647         return 0;
1648 }
1649
1650 static void cs46xx_dsp_disable_spdif_hw (struct snd_cs46xx *chip)
1651 {
1652         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1653
1654         /* set SPDIF output FIFO slot */
1655         snd_cs46xx_pokeBA0(chip, BA0_ASER_FADDR, 0);
1656
1657         /* SPDIF output MASTER ENABLE */
1658         cs46xx_poke_via_dsp (chip,SP_SPDOUT_CONTROL, 0);
1659
1660         /* right and left validate bit */
1661         /*cs46xx_poke_via_dsp (chip,SP_SPDOUT_CSUV, ins->spdif_csuv_default);*/
1662         cs46xx_poke_via_dsp (chip,SP_SPDOUT_CSUV, 0x0);
1663
1664         /* clear fifo pointer */
1665         cs46xx_poke_via_dsp (chip,SP_SPDIN_FIFOPTR, 0x0);
1666
1667         /* monitor state */
1668         ins->spdif_status_out &= ~DSP_SPDIF_STATUS_HW_ENABLED;
1669 }
1670
1671 int cs46xx_dsp_enable_spdif_hw (struct snd_cs46xx *chip)
1672 {
1673         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1674
1675         /* if hw-ctrl already enabled, turn off to reset logic ... */
1676         cs46xx_dsp_disable_spdif_hw (chip);
1677         udelay(50);
1678
1679         /* set SPDIF output FIFO slot */
1680         snd_cs46xx_pokeBA0(chip, BA0_ASER_FADDR, ( 0x8000 | ((SP_SPDOUT_FIFO >> 4) << 4) ));
1681
1682         /* SPDIF output MASTER ENABLE */
1683         cs46xx_poke_via_dsp (chip,SP_SPDOUT_CONTROL, 0x80000000);
1684
1685         /* right and left validate bit */
1686         cs46xx_poke_via_dsp (chip,SP_SPDOUT_CSUV, ins->spdif_csuv_default);
1687
1688         /* monitor state */
1689         ins->spdif_status_out |= DSP_SPDIF_STATUS_HW_ENABLED;
1690
1691         return 0;
1692 }
1693
1694 int cs46xx_dsp_enable_spdif_in (struct snd_cs46xx *chip)
1695 {
1696         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1697
1698         /* turn on amplifier */
1699         chip->active_ctrl(chip, 1);
1700         chip->amplifier_ctrl(chip, 1);
1701
1702         snd_assert (ins->asynch_rx_scb == NULL,return -EINVAL);
1703         snd_assert (ins->spdif_in_src != NULL,return -EINVAL);
1704
1705         mutex_lock(&chip->spos_mutex);
1706
1707         if ( ! (ins->spdif_status_out & DSP_SPDIF_STATUS_INPUT_CTRL_ENABLED) ) {
1708                 /* time countdown enable */
1709                 cs46xx_poke_via_dsp (chip,SP_ASER_COUNTDOWN, 0x80000005);
1710                 /* NOTE: 80000005 value is just magic. With all values
1711                    that I've tested this one seem to give the best result.
1712                    Got no explication why. (Benny) */
1713
1714                 /* SPDIF input MASTER ENABLE */
1715                 cs46xx_poke_via_dsp (chip,SP_SPDIN_CONTROL, 0x800003ff);
1716
1717                 ins->spdif_status_out |= DSP_SPDIF_STATUS_INPUT_CTRL_ENABLED;
1718         }
1719
1720         /* create and start the asynchronous receiver SCB */
1721         ins->asynch_rx_scb = cs46xx_dsp_create_asynch_fg_rx_scb(chip,"AsynchFGRxSCB",
1722                                                                 ASYNCRX_SCB_ADDR,
1723                                                                 SPDIFI_SCB_INST,
1724                                                                 SPDIFI_IP_OUTPUT_BUFFER1,
1725                                                                 ins->spdif_in_src,
1726                                                                 SCB_ON_PARENT_SUBLIST_SCB);
1727
1728         spin_lock_irq(&chip->reg_lock);
1729
1730         /* reset SPDIF input sample buffer pointer */
1731         /*snd_cs46xx_poke (chip, (SPDIFI_SCB_INST + 0x0c) << 2,
1732           (SPDIFI_IP_OUTPUT_BUFFER1 << 0x10) | 0xFFFC);*/
1733
1734         /* reset FIFO ptr */
1735         /*cs46xx_poke_via_dsp (chip,SP_SPDIN_FIFOPTR, 0x0);*/
1736         cs46xx_src_link(chip,ins->spdif_in_src);
1737
1738         /* unmute SRC volume */
1739         cs46xx_dsp_scb_set_volume (chip,ins->spdif_in_src,0x7fff,0x7fff);
1740
1741         spin_unlock_irq(&chip->reg_lock);
1742
1743         /* set SPDIF input sample rate and unmute
1744            NOTE: only 48khz support for SPDIF input this time */
1745         /* cs46xx_dsp_set_src_sample_rate(chip,ins->spdif_in_src,48000); */
1746
1747         /* monitor state */
1748         ins->spdif_status_in = 1;
1749         mutex_unlock(&chip->spos_mutex);
1750
1751         return 0;
1752 }
1753
1754 int cs46xx_dsp_disable_spdif_in (struct snd_cs46xx *chip)
1755 {
1756         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1757
1758         snd_assert (ins->asynch_rx_scb != NULL, return -EINVAL);
1759         snd_assert (ins->spdif_in_src != NULL,return -EINVAL);
1760
1761         mutex_lock(&chip->spos_mutex);
1762
1763         /* Remove the asynchronous receiver SCB */
1764         cs46xx_dsp_remove_scb (chip,ins->asynch_rx_scb);
1765         ins->asynch_rx_scb = NULL;
1766
1767         cs46xx_src_unlink(chip,ins->spdif_in_src);
1768
1769         /* monitor state */
1770         ins->spdif_status_in = 0;
1771         mutex_unlock(&chip->spos_mutex);
1772
1773         /* restore amplifier */
1774         chip->active_ctrl(chip, -1);
1775         chip->amplifier_ctrl(chip, -1);
1776
1777         return 0;
1778 }
1779
1780 int cs46xx_dsp_enable_pcm_capture (struct snd_cs46xx *chip)
1781 {
1782         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1783
1784         snd_assert (ins->pcm_input == NULL,return -EINVAL);
1785         snd_assert (ins->ref_snoop_scb != NULL,return -EINVAL);
1786
1787         mutex_lock(&chip->spos_mutex);
1788         ins->pcm_input = cs46xx_add_record_source(chip,ins->ref_snoop_scb,PCMSERIALIN_PCM_SCB_ADDR,
1789                                                   "PCMSerialInput_Wave");
1790         mutex_unlock(&chip->spos_mutex);
1791
1792         return 0;
1793 }
1794
1795 int cs46xx_dsp_disable_pcm_capture (struct snd_cs46xx *chip)
1796 {
1797         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1798
1799         snd_assert (ins->pcm_input != NULL,return -EINVAL);
1800
1801         mutex_lock(&chip->spos_mutex);
1802         cs46xx_dsp_remove_scb (chip,ins->pcm_input);
1803         ins->pcm_input = NULL;
1804         mutex_unlock(&chip->spos_mutex);
1805
1806         return 0;
1807 }
1808
1809 int cs46xx_dsp_enable_adc_capture (struct snd_cs46xx *chip)
1810 {
1811         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1812
1813         snd_assert (ins->adc_input == NULL,return -EINVAL);
1814         snd_assert (ins->codec_in_scb != NULL,return -EINVAL);
1815
1816         mutex_lock(&chip->spos_mutex);
1817         ins->adc_input = cs46xx_add_record_source(chip,ins->codec_in_scb,PCMSERIALIN_SCB_ADDR,
1818                                                   "PCMSerialInput_ADC");
1819         mutex_unlock(&chip->spos_mutex);
1820
1821         return 0;
1822 }
1823
1824 int cs46xx_dsp_disable_adc_capture (struct snd_cs46xx *chip)
1825 {
1826         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1827
1828         snd_assert (ins->adc_input != NULL,return -EINVAL);
1829
1830         mutex_lock(&chip->spos_mutex);
1831         cs46xx_dsp_remove_scb (chip,ins->adc_input);
1832         ins->adc_input = NULL;
1833         mutex_unlock(&chip->spos_mutex);
1834
1835         return 0;
1836 }
1837
1838 int cs46xx_poke_via_dsp (struct snd_cs46xx *chip, u32 address, u32 data)
1839 {
1840         u32 temp;
1841         int  i;
1842
1843         /* santiy check the parameters.  (These numbers are not 100% correct.  They are
1844            a rough guess from looking at the controller spec.) */
1845         if (address < 0x8000 || address >= 0x9000)
1846                 return -EINVAL;
1847
1848         /* initialize the SP_IO_WRITE SCB with the data. */
1849         temp = ( address << 16 ) | ( address & 0x0000FFFF);   /* offset 0 <-- address2 : address1 */
1850
1851         snd_cs46xx_poke(chip,( SPIOWRITE_SCB_ADDR      << 2), temp);
1852         snd_cs46xx_poke(chip,((SPIOWRITE_SCB_ADDR + 1) << 2), data); /* offset 1 <-- data1 */
1853         snd_cs46xx_poke(chip,((SPIOWRITE_SCB_ADDR + 2) << 2), data); /* offset 1 <-- data2 */
1854
1855         /* Poke this location to tell the task to start */
1856         snd_cs46xx_poke(chip,((SPIOWRITE_SCB_ADDR + 6) << 2), SPIOWRITE_SCB_ADDR << 0x10);
1857
1858         /* Verify that the task ran */
1859         for (i=0; i<25; i++) {
1860                 udelay(125);
1861
1862                 temp =  snd_cs46xx_peek(chip,((SPIOWRITE_SCB_ADDR + 6) << 2));
1863                 if (temp == 0x00000000)
1864                         break;
1865         }
1866
1867         if (i == 25) {
1868                 snd_printk(KERN_ERR "dsp_spos: SPIOWriteTask not responding\n");
1869                 return -EBUSY;
1870         }
1871
1872         return 0;
1873 }
1874
1875 int cs46xx_dsp_set_dac_volume (struct snd_cs46xx * chip, u16 left, u16 right)
1876 {
1877         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1878         struct dsp_scb_descriptor * scb;
1879
1880         mutex_lock(&chip->spos_mutex);
1881
1882         /* main output */
1883         scb = ins->master_mix_scb->sub_list_ptr;
1884         while (scb != ins->the_null_scb) {
1885                 cs46xx_dsp_scb_set_volume (chip,scb,left,right);
1886                 scb = scb->next_scb_ptr;
1887         }
1888
1889         /* rear output */
1890         scb = ins->rear_mix_scb->sub_list_ptr;
1891         while (scb != ins->the_null_scb) {
1892                 cs46xx_dsp_scb_set_volume (chip,scb,left,right);
1893                 scb = scb->next_scb_ptr;
1894         }
1895
1896         ins->dac_volume_left = left;
1897         ins->dac_volume_right = right;
1898
1899         mutex_unlock(&chip->spos_mutex);
1900
1901         return 0;
1902 }
1903
1904 int cs46xx_dsp_set_iec958_volume (struct snd_cs46xx * chip, u16 left, u16 right)
1905 {
1906         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1907
1908         mutex_lock(&chip->spos_mutex);
1909
1910         if (ins->asynch_rx_scb != NULL)
1911                 cs46xx_dsp_scb_set_volume (chip,ins->asynch_rx_scb,
1912                                            left,right);
1913
1914         ins->spdif_input_volume_left = left;
1915         ins->spdif_input_volume_right = right;
1916
1917         mutex_unlock(&chip->spos_mutex);
1918
1919         return 0;
1920 }
1921
1922 #ifdef CONFIG_PM
1923 int cs46xx_dsp_resume(struct snd_cs46xx * chip)
1924 {
1925         struct dsp_spos_instance * ins = chip->dsp_spos_instance;
1926         int i, err;
1927
1928         /* clear parameter, sample and code areas */
1929         snd_cs46xx_clear_BA1(chip, DSP_PARAMETER_BYTE_OFFSET,
1930                              DSP_PARAMETER_BYTE_SIZE);
1931         snd_cs46xx_clear_BA1(chip, DSP_SAMPLE_BYTE_OFFSET,
1932                              DSP_SAMPLE_BYTE_SIZE);
1933         snd_cs46xx_clear_BA1(chip, DSP_CODE_BYTE_OFFSET, DSP_CODE_BYTE_SIZE);
1934
1935         for (i = 0; i < ins->nmodules; i++) {
1936                 struct dsp_module_desc *module = &ins->modules[i];
1937                 struct dsp_segment_desc *seg;
1938                 u32 doffset, dsize;
1939
1940                 seg = get_segment_desc(module, SEGTYPE_SP_PARAMETER);
1941                 err = dsp_load_parameter(chip, seg);
1942                 if (err < 0)
1943                         return err;
1944
1945                 seg = get_segment_desc(module, SEGTYPE_SP_SAMPLE);
1946                 err = dsp_load_sample(chip, seg);
1947                 if (err < 0)
1948                         return err;
1949
1950                 seg = get_segment_desc(module, SEGTYPE_SP_PROGRAM);
1951                 if (!seg)
1952                         continue;
1953
1954                 doffset = seg->offset * 4 + module->load_address * 4
1955                         + DSP_CODE_BYTE_OFFSET;
1956                 dsize   = seg->size * 4;
1957                 err = snd_cs46xx_download(chip,
1958                                           ins->code.data + module->load_address,
1959                                           doffset, dsize);
1960                 if (err < 0)
1961                         return err;
1962         }
1963
1964         for (i = 0; i < ins->ntask; i++) {
1965                 struct dsp_task_descriptor *t = &ins->tasks[i];
1966                 _dsp_create_task_tree(chip, t->data, t->address, t->size);
1967         }
1968
1969         for (i = 0; i < ins->nscb; i++) {
1970                 struct dsp_scb_descriptor *s = &ins->scbs[i];
1971                 if (s->deleted)
1972                         continue;
1973                 _dsp_create_scb(chip, s->data, s->address);
1974         }
1975
1976         return 0;
1977 }
1978 #endif