err.no Git - linux-2.6/blob - sound/oss/es1371.c

   1 /*****************************************************************************/
   2
   3 /*
   4  *      es1371.c  --  Creative Ensoniq ES1371.
   5  *
   6  *      Copyright (C) 1998-2001, 2003  Thomas Sailer (t.sailer@alumni.ethz.ch)
   7  *
   8  *      This program is free software; you can redistribute it and/or modify
   9  *      it under the terms of the GNU General Public License as published by
  10  *      the Free Software Foundation; either version 2 of the License, or
  11  *      (at your option) any later version.
  12  *
  13  *      This program is distributed in the hope that it will be useful,
  14  *      but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  *      MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  *      GNU General Public License for more details.
  17  *
  18  *      You should have received a copy of the GNU General Public License
  19  *      along with this program; if not, write to the Free Software
  20  *      Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  21  *
  22  * Special thanks to Ensoniq
  23  *
  24  *  Supported devices:
  25  *  /dev/dsp    standard /dev/dsp device, (mostly) OSS compatible
  26  *  /dev/mixer  standard /dev/mixer device, (mostly) OSS compatible
  27  *  /dev/dsp1   additional DAC, like /dev/dsp, but outputs to mixer "SYNTH" setting
  28  *  /dev/midi   simple MIDI UART interface, no ioctl
  29  *
  30  *  NOTE: the card does not have any FM/Wavetable synthesizer, it is supposed
  31  *  to be done in software. That is what /dev/dac is for. By now (Q2 1998)
  32  *  there are several MIDI to PCM (WAV) packages, one of them is timidity.
  33  *
  34  *  Revision history
  35  *    04.06.1998   0.1   Initial release
  36  *                       Mixer stuff should be overhauled; especially optional AC97 mixer bits
  37  *                       should be detected. This results in strange behaviour of some mixer
  38  *                       settings, like master volume and mic.
  39  *    08.06.1998   0.2   First release using Alan Cox' soundcore instead of miscdevice
  40  *    03.08.1998   0.3   Do not include modversions.h
  41  *                       Now mixer behaviour can basically be selected between
  42  *                       "OSS documented" and "OSS actual" behaviour
  43  *    31.08.1998   0.4   Fix realplayer problems - dac.count issues
  44  *    27.10.1998   0.5   Fix joystick support
  45  *                       -- Oliver Neukum (c188@org.chemie.uni-muenchen.de)
  46  *    10.12.1998   0.6   Fix drain_dac trying to wait on not yet initialized DMA
  47  *    23.12.1998   0.7   Fix a few f_file & FMODE_ bugs
  48  *                       Don't wake up app until there are fragsize bytes to read/write
  49  *    06.01.1999   0.8   remove the silly SA_INTERRUPT flag.
  50  *                       hopefully killed the egcs section type conflict
  51  *    12.03.1999   0.9   cinfo.blocks should be reset after GETxPTR ioctl.
  52  *                       reported by Johan Maes <joma@telindus.be>
  53  *    22.03.1999   0.10  return EAGAIN instead of EBUSY when O_NONBLOCK
  54  *                       read/write cannot be executed
  55  *    07.04.1999   0.11  implemented the following ioctl's: SOUND_PCM_READ_RATE,
  56  *                       SOUND_PCM_READ_CHANNELS, SOUND_PCM_READ_BITS;
  57  *                       Alpha fixes reported by Peter Jones <pjones@redhat.com>
  58  *                       Another Alpha fix (wait_src_ready in init routine)
  59  *                       reported by "Ivan N. Kokshaysky" <ink@jurassic.park.msu.ru>
  60  *                       Note: joystick address handling might still be wrong on archs
  61  *                       other than i386
  62  *    15.06.1999   0.12  Fix bad allocation bug.
  63  *                       Thanks to Deti Fliegl <fliegl@in.tum.de>
  64  *    28.06.1999   0.13  Add pci_set_master
  65  *    03.08.1999   0.14  adapt to Linus' new __setup/__initcall
  66  *                       added kernel command line option "es1371=joystickaddr"
  67  *                       removed CONFIG_SOUND_ES1371_JOYPORT_BOOT kludge
  68  *    10.08.1999   0.15  (Re)added S/PDIF module option for cards revision >= 4.
  69  *                       Initial version by Dave Platt <dplatt@snulbug.mtview.ca.us>.
  70  *                       module_init/__setup fixes
  71  *    08.16.1999   0.16  Joe Cotellese <joec@ensoniq.com>
  72  *                       Added detection for ES1371 revision ID so that we can
  73  *                       detect the ES1373 and later parts.
  74  *                       added AC97 #defines for readability
  75  *                       added a /proc file system for dumping hardware state
  76  *                       updated SRC and CODEC w/r functions to accommodate bugs
  77  *                       in some versions of the ES137x chips.
  78  *    31.08.1999   0.17  add spin_lock_init
  79  *                       replaced current->state = x with set_current_state(x)
  80  *    03.09.1999   0.18  change read semantics for MIDI to match
  81  *                       OSS more closely; remove possible wakeup race
  82  *    21.10.1999   0.19  Round sampling rates, requested by
  83  *                       Kasamatsu Kenichi <t29w0267@ip.media.kyoto-u.ac.jp>
  84  *    27.10.1999   0.20  Added SigmaTel 3D enhancement string
  85  *                       Codec ID printing changes
  86  *    28.10.1999   0.21  More waitqueue races fixed
  87  *                       Joe Cotellese <joec@ensoniq.com>
  88  *                       Changed PCI detection routine so we can more easily
  89  *                       detect ES137x chip and derivatives.
  90  *    05.01.2000   0.22  Should now work with rev7 boards; patch by
  91  *                       Eric Lemar, elemar@cs.washington.edu
  92  *    08.01.2000   0.23  Prevent some ioctl's from returning bad count values on underrun/overrun;
  93  *                       Tim Janik's BSE (Bedevilled Sound Engine) found this
  94  *    07.02.2000   0.24  Use pci_alloc_consistent and pci_register_driver
  95  *    07.02.2000   0.25  Use ac97_codec
  96  *    01.03.2000   0.26  SPDIF patch by Mikael Bouillot <mikael.bouillot@bigfoot.com>
  97  *                       Use pci_module_init
  98  *    21.11.2000   0.27  Initialize dma buffers in poll, otherwise poll may return a bogus mask
  99  *    12.12.2000   0.28  More dma buffer initializations, patch from
 100  *                       Tjeerd Mulder <tjeerd.mulder@fujitsu-siemens.com>
 101  *    05.01.2001   0.29  Hopefully updates will not be required anymore when Creative bumps
 102  *                       the CT5880 revision.
 103  *                       suggested by Stephan Müller <smueller@chronox.de>
 104  *    31.01.2001   0.30  Register/Unregister gameport
 105  *                       Fix SETTRIGGER non OSS API conformity
 106  *    14.07.2001   0.31  Add list of laptops needing amplifier control
 107  *    03.01.2003   0.32  open_mode fixes from Georg Acher <acher@in.tum.de>
 108  */
 109
 110 /*****************************************************************************/
 111
 112 #include <linux/interrupt.h>
 113 #include <linux/module.h>
 114 #include <linux/string.h>
 115 #include <linux/ioport.h>
 116 #include <linux/sched.h>
 117 #include <linux/delay.h>
 118 #include <linux/sound.h>
 119 #include <linux/slab.h>
 120 #include <linux/soundcard.h>
 121 #include <linux/pci.h>
 122 #include <linux/init.h>
 123 #include <linux/poll.h>
 124 #include <linux/bitops.h>
 125 #include <linux/proc_fs.h>
 126 #include <linux/spinlock.h>
 127 #include <linux/smp_lock.h>
 128 #include <linux/ac97_codec.h>
 129 #include <linux/gameport.h>
 130 #include <linux/wait.h>
 131
 132 #include <asm/io.h>
 133 #include <asm/page.h>
 134 #include <asm/uaccess.h>
 135
 136 #if defined(CONFIG_GAMEPORT) || (defined(MODULE) && defined(CONFIG_GAMEPORT_MODULE))
 137 #define SUPPORT_JOYSTICK
 138 #endif
 139
 140 /* --------------------------------------------------------------------- */
 141
 142 #undef OSS_DOCUMENTED_MIXER_SEMANTICS
 143 #define ES1371_DEBUG
 144 #define DBG(x) {}
 145 /*#define DBG(x) {x}*/
 146
 147 /* --------------------------------------------------------------------- */
 148
 149 #ifndef PCI_VENDOR_ID_ENSONIQ
 150 #define PCI_VENDOR_ID_ENSONIQ        0x1274
 151 #endif
 152
 153 #ifndef PCI_VENDOR_ID_ECTIVA
 154 #define PCI_VENDOR_ID_ECTIVA         0x1102
 155 #endif
 156
 157 #ifndef PCI_DEVICE_ID_ENSONIQ_ES1371
 158 #define PCI_DEVICE_ID_ENSONIQ_ES1371 0x1371
 159 #endif
 160
 161 #ifndef PCI_DEVICE_ID_ENSONIQ_CT5880
 162 #define PCI_DEVICE_ID_ENSONIQ_CT5880 0x5880
 163 #endif
 164
 165 #ifndef PCI_DEVICE_ID_ECTIVA_EV1938
 166 #define PCI_DEVICE_ID_ECTIVA_EV1938 0x8938
 167 #endif
 168
 169 /* ES1371 chip ID */
 170 /* This is a little confusing because all ES1371 compatible chips have the
 171    same DEVICE_ID, the only thing differentiating them is the REV_ID field.
 172    This is only significant if you want to enable features on the later parts.
 173    Yes, I know it's stupid and why didn't we use the sub IDs?
 174 */
 175 #define ES1371REV_ES1373_A  0x04
 176 #define ES1371REV_ES1373_B  0x06
 177 #define ES1371REV_CT5880_A  0x07
 178 #define CT5880REV_CT5880_C  0x02
 179 #define CT5880REV_CT5880_D  0x03
 180 #define ES1371REV_ES1371_B  0x09
 181 #define EV1938REV_EV1938_A  0x00
 182 #define ES1371REV_ES1373_8  0x08
 183
 184 #define ES1371_MAGIC  ((PCI_VENDOR_ID_ENSONIQ<<16)|PCI_DEVICE_ID_ENSONIQ_ES1371)
 185
 186 #define ES1371_EXTENT             0x40
 187 #define JOY_EXTENT                8
 188
 189 #define ES1371_REG_CONTROL        0x00
 190 #define ES1371_REG_STATUS         0x04 /* on the 5880 it is control/status */
 191 #define ES1371_REG_UART_DATA      0x08
 192 #define ES1371_REG_UART_STATUS    0x09
 193 #define ES1371_REG_UART_CONTROL   0x09
 194 #define ES1371_REG_UART_TEST      0x0a
 195 #define ES1371_REG_MEMPAGE        0x0c
 196 #define ES1371_REG_SRCONV         0x10
 197 #define ES1371_REG_CODEC          0x14
 198 #define ES1371_REG_LEGACY         0x18
 199 #define ES1371_REG_SERIAL_CONTROL 0x20
 200 #define ES1371_REG_DAC1_SCOUNT    0x24
 201 #define ES1371_REG_DAC2_SCOUNT    0x28
 202 #define ES1371_REG_ADC_SCOUNT     0x2c
 203
 204 #define ES1371_REG_DAC1_FRAMEADR  0xc30
 205 #define ES1371_REG_DAC1_FRAMECNT  0xc34
 206 #define ES1371_REG_DAC2_FRAMEADR  0xc38
 207 #define ES1371_REG_DAC2_FRAMECNT  0xc3c
 208 #define ES1371_REG_ADC_FRAMEADR   0xd30
 209 #define ES1371_REG_ADC_FRAMECNT   0xd34
 210
 211 #define ES1371_FMT_U8_MONO     0
 212 #define ES1371_FMT_U8_STEREO   1
 213 #define ES1371_FMT_S16_MONO    2
 214 #define ES1371_FMT_S16_STEREO  3
 215 #define ES1371_FMT_STEREO      1
 216 #define ES1371_FMT_S16         2
 217 #define ES1371_FMT_MASK        3
 218
 219 static const unsigned sample_size[] = { 1, 2, 2, 4 };
 220 static const unsigned sample_shift[] = { 0, 1, 1, 2 };
 221
 222 #define CTRL_RECEN_B    0x08000000  /* 1 = don't mix analog in to digital out */
 223 #define CTRL_SPDIFEN_B  0x04000000
 224 #define CTRL_JOY_SHIFT  24
 225 #define CTRL_JOY_MASK   3
 226 #define CTRL_JOY_200    0x00000000  /* joystick base address */
 227 #define CTRL_JOY_208    0x01000000
 228 #define CTRL_JOY_210    0x02000000
 229 #define CTRL_JOY_218    0x03000000
 230 #define CTRL_GPIO_IN0   0x00100000  /* general purpose inputs/outputs */
 231 #define CTRL_GPIO_IN1   0x00200000
 232 #define CTRL_GPIO_IN2   0x00400000
 233 #define CTRL_GPIO_IN3   0x00800000
 234 #define CTRL_GPIO_OUT0  0x00010000
 235 #define CTRL_GPIO_OUT1  0x00020000
 236 #define CTRL_GPIO_OUT2  0x00040000
 237 #define CTRL_GPIO_OUT3  0x00080000
 238 #define CTRL_MSFMTSEL   0x00008000  /* MPEG serial data fmt: 0 = Sony, 1 = I2S */
 239 #define CTRL_SYNCRES    0x00004000  /* AC97 warm reset */
 240 #define CTRL_ADCSTOP    0x00002000  /* stop ADC transfers */
 241 #define CTRL_PWR_INTRM  0x00001000  /* 1 = power level ints enabled */
 242 #define CTRL_M_CB       0x00000800  /* recording source: 0 = ADC, 1 = MPEG */
 243 #define CTRL_CCB_INTRM  0x00000400  /* 1 = CCB "voice" ints enabled */
 244 #define CTRL_PDLEV0     0x00000000  /* power down level */
 245 #define CTRL_PDLEV1     0x00000100
 246 #define CTRL_PDLEV2     0x00000200
 247 #define CTRL_PDLEV3     0x00000300
 248 #define CTRL_BREQ       0x00000080  /* 1 = test mode (internal mem test) */
 249 #define CTRL_DAC1_EN    0x00000040  /* enable DAC1 */
 250 #define CTRL_DAC2_EN    0x00000020  /* enable DAC2 */
 251 #define CTRL_ADC_EN     0x00000010  /* enable ADC */
 252 #define CTRL_UART_EN    0x00000008  /* enable MIDI uart */
 253 #define CTRL_JYSTK_EN   0x00000004  /* enable Joystick port */
 254 #define CTRL_XTALCLKDIS 0x00000002  /* 1 = disable crystal clock input */
 255 #define CTRL_PCICLKDIS  0x00000001  /* 1 = disable PCI clock distribution */
 256
 257
 258 #define STAT_INTR       0x80000000  /* wired or of all interrupt bits */
 259 #define CSTAT_5880_AC97_RST 0x20000000 /* CT5880 Reset bit */
 260 #define STAT_EN_SPDIF   0x00040000  /* enable S/PDIF circuitry */
 261 #define STAT_TS_SPDIF   0x00020000  /* test S/PDIF circuitry */
 262 #define STAT_TESTMODE   0x00010000  /* test ASIC */
 263 #define STAT_SYNC_ERR   0x00000100  /* 1 = codec sync error */
 264 #define STAT_VC         0x000000c0  /* CCB int source, 0=DAC1, 1=DAC2, 2=ADC, 3=undef */
 265 #define STAT_SH_VC      6
 266 #define STAT_MPWR       0x00000020  /* power level interrupt */
 267 #define STAT_MCCB       0x00000010  /* CCB int pending */
 268 #define STAT_UART       0x00000008  /* UART int pending */
 269 #define STAT_DAC1       0x00000004  /* DAC1 int pending */
 270 #define STAT_DAC2       0x00000002  /* DAC2 int pending */
 271 #define STAT_ADC        0x00000001  /* ADC int pending */
 272
 273 #define USTAT_RXINT     0x80        /* UART rx int pending */
 274 #define USTAT_TXINT     0x04        /* UART tx int pending */
 275 #define USTAT_TXRDY     0x02        /* UART tx ready */
 276 #define USTAT_RXRDY     0x01        /* UART rx ready */
 277
 278 #define UCTRL_RXINTEN   0x80        /* 1 = enable RX ints */
 279 #define UCTRL_TXINTEN   0x60        /* TX int enable field mask */
 280 #define UCTRL_ENA_TXINT 0x20        /* enable TX int */
 281 #define UCTRL_CNTRL     0x03        /* control field */
 282 #define UCTRL_CNTRL_SWR 0x03        /* software reset command */
 283
 284 /* sample rate converter */
 285 #define SRC_OKSTATE        1
 286
 287 #define SRC_RAMADDR_MASK   0xfe000000
 288 #define SRC_RAMADDR_SHIFT  25
 289 #define SRC_DAC1FREEZE     (1UL << 21)
 290 #define SRC_DAC2FREEZE      (1UL << 20)
 291 #define SRC_ADCFREEZE      (1UL << 19)
 292
 293
 294 #define SRC_WE             0x01000000  /* read/write control for SRC RAM */
 295 #define SRC_BUSY           0x00800000  /* SRC busy */
 296 #define SRC_DIS            0x00400000  /* 1 = disable SRC */
 297 #define SRC_DDAC1          0x00200000  /* 1 = disable accum update for DAC1 */
 298 #define SRC_DDAC2          0x00100000  /* 1 = disable accum update for DAC2 */
 299 #define SRC_DADC           0x00080000  /* 1 = disable accum update for ADC2 */
 300 #define SRC_CTLMASK        0x00780000
 301 #define SRC_RAMDATA_MASK   0x0000ffff
 302 #define SRC_RAMDATA_SHIFT  0
 303
 304 #define SRCREG_ADC      0x78
 305 #define SRCREG_DAC1     0x70
 306 #define SRCREG_DAC2     0x74
 307 #define SRCREG_VOL_ADC  0x6c
 308 #define SRCREG_VOL_DAC1 0x7c
 309 #define SRCREG_VOL_DAC2 0x7e
 310
 311 #define SRCREG_TRUNC_N     0x00
 312 #define SRCREG_INT_REGS    0x01
 313 #define SRCREG_ACCUM_FRAC  0x02
 314 #define SRCREG_VFREQ_FRAC  0x03
 315
 316 #define CODEC_PIRD        0x00800000  /* 0 = write AC97 register */
 317 #define CODEC_PIADD_MASK  0x007f0000
 318 #define CODEC_PIADD_SHIFT 16
 319 #define CODEC_PIDAT_MASK  0x0000ffff
 320 #define CODEC_PIDAT_SHIFT 0
 321
 322 #define CODEC_RDY         0x80000000  /* AC97 read data valid */
 323 #define CODEC_WIP         0x40000000  /* AC97 write in progress */
 324 #define CODEC_PORD        0x00800000  /* 0 = write AC97 register */
 325 #define CODEC_POADD_MASK  0x007f0000
 326 #define CODEC_POADD_SHIFT 16
 327 #define CODEC_PODAT_MASK  0x0000ffff
 328 #define CODEC_PODAT_SHIFT 0
 329
 330
 331 #define LEGACY_JFAST      0x80000000  /* fast joystick timing */
 332 #define LEGACY_FIRQ       0x01000000  /* force IRQ */
 333
 334 #define SCTRL_DACTEST     0x00400000  /* 1 = DAC test, test vector generation purposes */
 335 #define SCTRL_P2ENDINC    0x00380000  /*  */
 336 #define SCTRL_SH_P2ENDINC 19
 337 #define SCTRL_P2STINC     0x00070000  /*  */
 338 #define SCTRL_SH_P2STINC  16
 339 #define SCTRL_R1LOOPSEL   0x00008000  /* 0 = loop mode */
 340 #define SCTRL_P2LOOPSEL   0x00004000  /* 0 = loop mode */
 341 #define SCTRL_P1LOOPSEL   0x00002000  /* 0 = loop mode */
 342 #define SCTRL_P2PAUSE     0x00001000  /* 1 = pause mode */
 343 #define SCTRL_P1PAUSE     0x00000800  /* 1 = pause mode */
 344 #define SCTRL_R1INTEN     0x00000400  /* enable interrupt */
 345 #define SCTRL_P2INTEN     0x00000200  /* enable interrupt */
 346 #define SCTRL_P1INTEN     0x00000100  /* enable interrupt */
 347 #define SCTRL_P1SCTRLD    0x00000080  /* reload sample count register for DAC1 */
 348 #define SCTRL_P2DACSEN    0x00000040  /* 1 = DAC2 play back last sample when disabled */
 349 #define SCTRL_R1SEB       0x00000020  /* 1 = 16bit */
 350 #define SCTRL_R1SMB       0x00000010  /* 1 = stereo */
 351 #define SCTRL_R1FMT       0x00000030  /* format mask */
 352 #define SCTRL_SH_R1FMT    4
 353 #define SCTRL_P2SEB       0x00000008  /* 1 = 16bit */
 354 #define SCTRL_P2SMB       0x00000004  /* 1 = stereo */
 355 #define SCTRL_P2FMT       0x0000000c  /* format mask */
 356 #define SCTRL_SH_P2FMT    2
 357 #define SCTRL_P1SEB       0x00000002  /* 1 = 16bit */
 358 #define SCTRL_P1SMB       0x00000001  /* 1 = stereo */
 359 #define SCTRL_P1FMT       0x00000003  /* format mask */
 360 #define SCTRL_SH_P1FMT    0
 361
 362
 363 /* misc stuff */
 364 #define POLL_COUNT   0x1000
 365 #define FMODE_DAC         4           /* slight misuse of mode_t */
 366
 367 /* MIDI buffer sizes */
 368
 369 #define MIDIINBUF  256
 370 #define MIDIOUTBUF 256
 371
 372 #define FMODE_MIDI_SHIFT 3
 373 #define FMODE_MIDI_READ  (FMODE_READ << FMODE_MIDI_SHIFT)
 374 #define FMODE_MIDI_WRITE (FMODE_WRITE << FMODE_MIDI_SHIFT)
 375
 376 #define ES1371_MODULE_NAME "es1371"
 377 #define PFX ES1371_MODULE_NAME ": "
 378
 379 /* --------------------------------------------------------------------- */
 380
 381 struct es1371_state {
 382         /* magic */
 383         unsigned int magic;
 384
 385         /* list of es1371 devices */
 386         struct list_head devs;
 387
 388         /* the corresponding pci_dev structure */
 389         struct pci_dev *dev;
 390
 391         /* soundcore stuff */
 392         int dev_audio;
 393         int dev_dac;
 394         int dev_midi;
 395
 396         /* hardware resources */
 397         unsigned long io; /* long for SPARC */
 398         unsigned int irq;
 399
 400         /* PCI ID's */
 401         u16 vendor;
 402         u16 device;
 403         u8 rev; /* the chip revision */
 404
 405         /* options */
 406         int spdif_volume; /* S/PDIF output is enabled if != -1 */
 407
 408 #ifdef ES1371_DEBUG
 409         /* debug /proc entry */
 410         struct proc_dir_entry *ps;
 411 #endif /* ES1371_DEBUG */
 412
 413         struct ac97_codec *codec;
 414
 415         /* wave stuff */
 416         unsigned ctrl;
 417         unsigned sctrl;
 418         unsigned dac1rate, dac2rate, adcrate;
 419
 420         spinlock_t lock;
 421         struct semaphore open_sem;
 422         mode_t open_mode;
 423         wait_queue_head_t open_wait;
 424
 425         struct dmabuf {
 426                 void *rawbuf;
 427                 dma_addr_t dmaaddr;
 428                 unsigned buforder;
 429                 unsigned numfrag;
 430                 unsigned fragshift;
 431                 unsigned hwptr, swptr;
 432                 unsigned total_bytes;
 433                 int count;
 434                 unsigned error; /* over/underrun */
 435                 wait_queue_head_t wait;
 436                 /* redundant, but makes calculations easier */
 437                 unsigned fragsize;
 438                 unsigned dmasize;
 439                 unsigned fragsamples;
 440                 /* OSS stuff */
 441                 unsigned mapped:1;
 442                 unsigned ready:1;
 443                 unsigned endcleared:1;
 444                 unsigned enabled:1;
 445                 unsigned ossfragshift;
 446                 int ossmaxfrags;
 447                 unsigned subdivision;
 448         } dma_dac1, dma_dac2, dma_adc;
 449
 450         /* midi stuff */
 451         struct {
 452                 unsigned ird, iwr, icnt;
 453                 unsigned ord, owr, ocnt;
 454                 wait_queue_head_t iwait;
 455                 wait_queue_head_t owait;
 456                 unsigned char ibuf[MIDIINBUF];
 457                 unsigned char obuf[MIDIOUTBUF];
 458         } midi;
 459
 460 #ifdef SUPPORT_JOYSTICK
 461         struct gameport *gameport;
 462 #endif
 463
 464         struct semaphore sem;
 465 };
 466
 467 /* --------------------------------------------------------------------- */
 468
 469 static LIST_HEAD(devs);
 470
 471 /* --------------------------------------------------------------------- */
 472
 473 static inline unsigned ld2(unsigned int x)
 474 {
 475         unsigned r = 0;
 476
 477         if (x >= 0x10000) {
 478                 x >>= 16;
 479                 r += 16;
 480         }
 481         if (x >= 0x100) {
 482                 x >>= 8;
 483                 r += 8;
 484         }
 485         if (x >= 0x10) {
 486                 x >>= 4;
 487                 r += 4;
 488         }
 489         if (x >= 4) {
 490                 x >>= 2;
 491                 r += 2;
 492         }
 493         if (x >= 2)
 494                 r++;
 495         return r;
 496 }
 497
 498 /* --------------------------------------------------------------------- */
 499
 500 static unsigned wait_src_ready(struct es1371_state *s)
 501 {
 502         unsigned int t, r;
 503
 504         for (t = 0; t < POLL_COUNT; t++) {
 505                 if (!((r = inl(s->io + ES1371_REG_SRCONV)) & SRC_BUSY))
 506                         return r;
 507                 udelay(1);
 508         }
 509         printk(KERN_DEBUG PFX "sample rate converter timeout r = 0x%08x\n", r);
 510         return r;
 511 }
 512
 513 static unsigned src_read(struct es1371_state *s, unsigned reg)
 514 {
 515         unsigned int temp,i,orig;
 516
 517         /* wait for ready */
 518         temp = wait_src_ready (s);
 519
 520         /* we can only access the SRC at certain times, make sure
 521            we're allowed to before we read */
 522
 523         orig = temp;
 524         /* expose the SRC state bits */
 525         outl ( (temp & SRC_CTLMASK) | (reg << SRC_RAMADDR_SHIFT) | 0x10000UL,
 526                s->io + ES1371_REG_SRCONV);
 527
 528         /* now, wait for busy and the correct time to read */
 529         temp = wait_src_ready (s);
 530
 531         if ( (temp & 0x00870000UL ) != ( SRC_OKSTATE << 16 )){
 532                 /* wait for the right state */
 533                 for (i=0; i<POLL_COUNT; i++){
 534                         temp = inl (s->io + ES1371_REG_SRCONV);
 535                         if ( (temp & 0x00870000UL ) == ( SRC_OKSTATE << 16 ))
 536                                 break;
 537                 }
 538         }
 539
 540         /* hide the state bits */
 541         outl ((orig & SRC_CTLMASK) | (reg << SRC_RAMADDR_SHIFT), s->io + ES1371_REG_SRCONV);
 542         return temp;
 543
 544
 545 }
 546
 547 static void src_write(struct es1371_state *s, unsigned reg, unsigned data)
 548 {
 549
 550         unsigned int r;
 551
 552         r = wait_src_ready(s) & (SRC_DIS | SRC_DDAC1 | SRC_DDAC2 | SRC_DADC);
 553         r |= (reg << SRC_RAMADDR_SHIFT) & SRC_RAMADDR_MASK;
 554         r |= (data << SRC_RAMDATA_SHIFT) & SRC_RAMDATA_MASK;
 555         outl(r | SRC_WE, s->io + ES1371_REG_SRCONV);
 556
 557 }
 558
 559 /* --------------------------------------------------------------------- */
 560
 561 /* most of the following here is black magic */
 562 static void set_adc_rate(struct es1371_state *s, unsigned rate)
 563 {
 564         unsigned long flags;
 565         unsigned int n, truncm, freq;
 566
 567         if (rate > 48000)
 568                 rate = 48000;
 569         if (rate < 4000)
 570                 rate = 4000;
 571         n = rate / 3000;
 572         if ((1 << n) & ((1 << 15) | (1 << 13) | (1 << 11) | (1 << 9)))
 573                 n--;
 574         truncm = (21 * n - 1) | 1;
 575         freq = ((48000UL << 15) / rate) * n;
 576         s->adcrate = (48000UL << 15) / (freq / n);
 577         spin_lock_irqsave(&s->lock, flags);
 578         if (rate >= 24000) {
 579                 if (truncm > 239)
 580                         truncm = 239;
 581                 src_write(s, SRCREG_ADC+SRCREG_TRUNC_N,
 582                           (((239 - truncm) >> 1) << 9) | (n << 4));
 583         } else {
 584                 if (truncm > 119)
 585                         truncm = 119;
 586                 src_write(s, SRCREG_ADC+SRCREG_TRUNC_N,
 587                           0x8000 | (((119 - truncm) >> 1) << 9) | (n << 4));
 588         }
 589         src_write(s, SRCREG_ADC+SRCREG_INT_REGS,
 590                   (src_read(s, SRCREG_ADC+SRCREG_INT_REGS) & 0x00ff) |
 591                   ((freq >> 5) & 0xfc00));
 592         src_write(s, SRCREG_ADC+SRCREG_VFREQ_FRAC, freq & 0x7fff);
 593         src_write(s, SRCREG_VOL_ADC, n << 8);
 594         src_write(s, SRCREG_VOL_ADC+1, n << 8);
 595         spin_unlock_irqrestore(&s->lock, flags);
 596 }
 597
 598
 599 static void set_dac1_rate(struct es1371_state *s, unsigned rate)
 600 {
 601         unsigned long flags;
 602         unsigned int freq, r;
 603
 604         if (rate > 48000)
 605                 rate = 48000;
 606         if (rate < 4000)
 607                 rate = 4000;
 608         freq = ((rate << 15) + 1500) / 3000;
 609         s->dac1rate = (freq * 3000 + 16384) >> 15;
 610         spin_lock_irqsave(&s->lock, flags);
 611         r = (wait_src_ready(s) & (SRC_DIS | SRC_DDAC2 | SRC_DADC)) | SRC_DDAC1;
 612         outl(r, s->io + ES1371_REG_SRCONV);
 613         src_write(s, SRCREG_DAC1+SRCREG_INT_REGS,
 614                   (src_read(s, SRCREG_DAC1+SRCREG_INT_REGS) & 0x00ff) |
 615                   ((freq >> 5) & 0xfc00));
 616         src_write(s, SRCREG_DAC1+SRCREG_VFREQ_FRAC, freq & 0x7fff);
 617         r = (wait_src_ready(s) & (SRC_DIS | SRC_DDAC2 | SRC_DADC));
 618         outl(r, s->io + ES1371_REG_SRCONV);
 619         spin_unlock_irqrestore(&s->lock, flags);
 620 }
 621
 622 static void set_dac2_rate(struct es1371_state *s, unsigned rate)
 623 {
 624         unsigned long flags;
 625         unsigned int freq, r;
 626
 627         if (rate > 48000)
 628                 rate = 48000;
 629         if (rate < 4000)
 630                 rate = 4000;
 631         freq = ((rate << 15) + 1500) / 3000;
 632         s->dac2rate = (freq * 3000 + 16384) >> 15;
 633         spin_lock_irqsave(&s->lock, flags);
 634         r = (wait_src_ready(s) & (SRC_DIS | SRC_DDAC1 | SRC_DADC)) | SRC_DDAC2;
 635         outl(r, s->io + ES1371_REG_SRCONV);
 636         src_write(s, SRCREG_DAC2+SRCREG_INT_REGS,
 637                   (src_read(s, SRCREG_DAC2+SRCREG_INT_REGS) & 0x00ff) |
 638                   ((freq >> 5) & 0xfc00));
 639         src_write(s, SRCREG_DAC2+SRCREG_VFREQ_FRAC, freq & 0x7fff);
 640         r = (wait_src_ready(s) & (SRC_DIS | SRC_DDAC1 | SRC_DADC));
 641         outl(r, s->io + ES1371_REG_SRCONV);
 642         spin_unlock_irqrestore(&s->lock, flags);
 643 }
 644
 645 /* --------------------------------------------------------------------- */
 646
 647 static void __devinit src_init(struct es1371_state *s)
 648 {
 649         unsigned int i;
 650
 651         /* before we enable or disable the SRC we need
 652            to wait for it to become ready */
 653         wait_src_ready(s);
 654
 655         outl(SRC_DIS, s->io + ES1371_REG_SRCONV);
 656
 657         for (i = 0; i < 0x80; i++)
 658                 src_write(s, i, 0);
 659
 660         src_write(s, SRCREG_DAC1+SRCREG_TRUNC_N, 16 << 4);
 661         src_write(s, SRCREG_DAC1+SRCREG_INT_REGS, 16 << 10);
 662         src_write(s, SRCREG_DAC2+SRCREG_TRUNC_N, 16 << 4);
 663         src_write(s, SRCREG_DAC2+SRCREG_INT_REGS, 16 << 10);
 664         src_write(s, SRCREG_VOL_ADC, 1 << 12);
 665         src_write(s, SRCREG_VOL_ADC+1, 1 << 12);
 666         src_write(s, SRCREG_VOL_DAC1, 1 << 12);
 667         src_write(s, SRCREG_VOL_DAC1+1, 1 << 12);
 668         src_write(s, SRCREG_VOL_DAC2, 1 << 12);
 669         src_write(s, SRCREG_VOL_DAC2+1, 1 << 12);
 670         set_adc_rate(s, 22050);
 671         set_dac1_rate(s, 22050);
 672         set_dac2_rate(s, 22050);
 673
 674         /* WARNING:
 675          * enabling the sample rate converter without properly programming
 676          * its parameters causes the chip to lock up (the SRC busy bit will
 677          * be stuck high, and I've found no way to rectify this other than
 678          * power cycle)
 679          */
 680         wait_src_ready(s);
 681         outl(0, s->io+ES1371_REG_SRCONV);
 682 }
 683
 684 /* --------------------------------------------------------------------- */
 685
 686 static void wrcodec(struct ac97_codec *codec, u8 addr, u16 data)
 687 {
 688         struct es1371_state *s = (struct es1371_state *)codec->private_data;
 689         unsigned long flags;
 690         unsigned t, x;
 691
 692         spin_lock_irqsave(&s->lock, flags);
 693         for (t = 0; t < POLL_COUNT; t++)
 694                 if (!(inl(s->io+ES1371_REG_CODEC) & CODEC_WIP))
 695                         break;
 696
 697         /* save the current state for later */
 698         x = wait_src_ready(s);
 699
 700         /* enable SRC state data in SRC mux */
 701         outl((x & (SRC_DIS | SRC_DDAC1 | SRC_DDAC2 | SRC_DADC)) | 0x00010000,
 702              s->io+ES1371_REG_SRCONV);
 703
 704         /* wait for not busy (state 0) first to avoid
 705            transition states */
 706         for (t=0; t<POLL_COUNT; t++){
 707                 if((inl(s->io+ES1371_REG_SRCONV) & 0x00870000) ==0 )
 708                     break;
 709                 udelay(1);
 710         }
 711
 712         /* wait for a SAFE time to write addr/data and then do it, dammit */
 713         for (t=0; t<POLL_COUNT; t++){
 714                 if((inl(s->io+ES1371_REG_SRCONV) & 0x00870000) ==0x00010000)
 715                     break;
 716                 udelay(1);
 717         }
 718
 719         outl(((addr << CODEC_POADD_SHIFT) & CODEC_POADD_MASK) |
 720              ((data << CODEC_PODAT_SHIFT) & CODEC_PODAT_MASK), s->io+ES1371_REG_CODEC);
 721
 722         /* restore SRC reg */
 723         wait_src_ready(s);
 724         outl(x, s->io+ES1371_REG_SRCONV);
 725         spin_unlock_irqrestore(&s->lock, flags);
 726 }
 727
 728 static u16 rdcodec(struct ac97_codec *codec, u8 addr)
 729 {
 730         struct es1371_state *s = (struct es1371_state *)codec->private_data;
 731         unsigned long flags;
 732         unsigned t, x;
 733
 734         spin_lock_irqsave(&s->lock, flags);
 735
 736         /* wait for WIP to go away */
 737         for (t = 0; t < 0x1000; t++)
 738                 if (!(inl(s->io+ES1371_REG_CODEC) & CODEC_WIP))
 739                         break;
 740
 741         /* save the current state for later */
 742         x = (wait_src_ready(s) & (SRC_DIS | SRC_DDAC1 | SRC_DDAC2 | SRC_DADC));
 743
 744         /* enable SRC state data in SRC mux */
 745         outl( x | 0x00010000,
 746               s->io+ES1371_REG_SRCONV);
 747
 748         /* wait for not busy (state 0) first to avoid
 749            transition states */
 750         for (t=0; t<POLL_COUNT; t++){
 751                 if((inl(s->io+ES1371_REG_SRCONV) & 0x00870000) ==0 )
 752                     break;
 753                 udelay(1);
 754         }
 755
 756         /* wait for a SAFE time to write addr/data and then do it, dammit */
 757         for (t=0; t<POLL_COUNT; t++){
 758                 if((inl(s->io+ES1371_REG_SRCONV) & 0x00870000) ==0x00010000)
 759                     break;
 760                 udelay(1);
 761         }
 762
 763         outl(((addr << CODEC_POADD_SHIFT) & CODEC_POADD_MASK) | CODEC_PORD, s->io+ES1371_REG_CODEC);
 764         /* restore SRC reg */
 765         wait_src_ready(s);
 766         outl(x, s->io+ES1371_REG_SRCONV);
 767
 768         /* wait for WIP again */
 769         for (t = 0; t < 0x1000; t++)
 770                 if (!(inl(s->io+ES1371_REG_CODEC) & CODEC_WIP))
 771                         break;
 772
 773         /* now wait for the stinkin' data (RDY) */
 774         for (t = 0; t < POLL_COUNT; t++)
 775                 if ((x = inl(s->io+ES1371_REG_CODEC)) & CODEC_RDY)
 776                         break;
 777
 778         spin_unlock_irqrestore(&s->lock, flags);
 779         return ((x & CODEC_PIDAT_MASK) >> CODEC_PIDAT_SHIFT);
 780 }
 781
 782 /* --------------------------------------------------------------------- */
 783
 784 static inline void stop_adc(struct es1371_state *s)
 785 {
 786         unsigned long flags;
 787
 788         spin_lock_irqsave(&s->lock, flags);
 789         s->ctrl &= ~CTRL_ADC_EN;
 790         outl(s->ctrl, s->io+ES1371_REG_CONTROL);
 791         spin_unlock_irqrestore(&s->lock, flags);
 792 }
 793
 794 static inline void stop_dac1(struct es1371_state *s)
 795 {
 796         unsigned long flags;
 797
 798         spin_lock_irqsave(&s->lock, flags);
 799         s->ctrl &= ~CTRL_DAC1_EN;
 800         outl(s->ctrl, s->io+ES1371_REG_CONTROL);
 801         spin_unlock_irqrestore(&s->lock, flags);
 802 }
 803
 804 static inline void stop_dac2(struct es1371_state *s)
 805 {
 806         unsigned long flags;
 807
 808         spin_lock_irqsave(&s->lock, flags);
 809         s->ctrl &= ~CTRL_DAC2_EN;
 810         outl(s->ctrl, s->io+ES1371_REG_CONTROL);
 811         spin_unlock_irqrestore(&s->lock, flags);
 812 }
 813
 814 static void start_dac1(struct es1371_state *s)
 815 {
 816         unsigned long flags;
 817         unsigned fragremain, fshift;
 818
 819         spin_lock_irqsave(&s->lock, flags);
 820         if (!(s->ctrl & CTRL_DAC1_EN) && (s->dma_dac1.mapped || s->dma_dac1.count > 0)
 821             && s->dma_dac1.ready) {
 822                 s->ctrl |= CTRL_DAC1_EN;
 823                 s->sctrl = (s->sctrl & ~(SCTRL_P1LOOPSEL | SCTRL_P1PAUSE | SCTRL_P1SCTRLD)) | SCTRL_P1INTEN;
 824                 outl(s->sctrl, s->io+ES1371_REG_SERIAL_CONTROL);
 825                 fragremain = ((- s->dma_dac1.hwptr) & (s->dma_dac1.fragsize-1));
 826                 fshift = sample_shift[(s->sctrl & SCTRL_P1FMT) >> SCTRL_SH_P1FMT];
 827                 if (fragremain < 2*fshift)
 828                         fragremain = s->dma_dac1.fragsize;
 829                 outl((fragremain >> fshift) - 1, s->io+ES1371_REG_DAC1_SCOUNT);
 830                 outl(s->ctrl, s->io+ES1371_REG_CONTROL);
 831                 outl((s->dma_dac1.fragsize >> fshift) - 1, s->io+ES1371_REG_DAC1_SCOUNT);
 832         }
 833         spin_unlock_irqrestore(&s->lock, flags);
 834 }
 835
 836 static void start_dac2(struct es1371_state *s)
 837 {
 838         unsigned long flags;
 839         unsigned fragremain, fshift;
 840
 841         spin_lock_irqsave(&s->lock, flags);
 842         if (!(s->ctrl & CTRL_DAC2_EN) && (s->dma_dac2.mapped || s->dma_dac2.count > 0)
 843             && s->dma_dac2.ready) {
 844                 s->ctrl |= CTRL_DAC2_EN;
 845                 s->sctrl = (s->sctrl & ~(SCTRL_P2LOOPSEL | SCTRL_P2PAUSE | SCTRL_P2DACSEN |
 846                                          SCTRL_P2ENDINC | SCTRL_P2STINC)) | SCTRL_P2INTEN |
 847                         (((s->sctrl & SCTRL_P2FMT) ? 2 : 1) << SCTRL_SH_P2ENDINC) |
 848                         (0 << SCTRL_SH_P2STINC);
 849                 outl(s->sctrl, s->io+ES1371_REG_SERIAL_CONTROL);
 850                 fragremain = ((- s->dma_dac2.hwptr) & (s->dma_dac2.fragsize-1));
 851                 fshift = sample_shift[(s->sctrl & SCTRL_P2FMT) >> SCTRL_SH_P2FMT];
 852                 if (fragremain < 2*fshift)
 853                         fragremain = s->dma_dac2.fragsize;
 854                 outl((fragremain >> fshift) - 1, s->io+ES1371_REG_DAC2_SCOUNT);
 855                 outl(s->ctrl, s->io+ES1371_REG_CONTROL);
 856                 outl((s->dma_dac2.fragsize >> fshift) - 1, s->io+ES1371_REG_DAC2_SCOUNT);
 857         }
 858         spin_unlock_irqrestore(&s->lock, flags);
 859 }
 860
 861 static void start_adc(struct es1371_state *s)
 862 {
 863         unsigned long flags;
 864         unsigned fragremain, fshift;
 865
 866         spin_lock_irqsave(&s->lock, flags);
 867         if (!(s->ctrl & CTRL_ADC_EN) && (s->dma_adc.mapped || s->dma_adc.count < (signed)(s->dma_adc.dmasize - 2*s->dma_adc.fragsize))
 868             && s->dma_adc.ready) {
 869                 s->ctrl |= CTRL_ADC_EN;
 870                 s->sctrl = (s->sctrl & ~SCTRL_R1LOOPSEL) | SCTRL_R1INTEN;
 871                 outl(s->sctrl, s->io+ES1371_REG_SERIAL_CONTROL);
 872                 fragremain = ((- s->dma_adc.hwptr) & (s->dma_adc.fragsize-1));
 873                 fshift = sample_shift[(s->sctrl & SCTRL_R1FMT) >> SCTRL_SH_R1FMT];
 874                 if (fragremain < 2*fshift)
 875                         fragremain = s->dma_adc.fragsize;
 876                 outl((fragremain >> fshift) - 1, s->io+ES1371_REG_ADC_SCOUNT);
 877                 outl(s->ctrl, s->io+ES1371_REG_CONTROL);
 878                 outl((s->dma_adc.fragsize >> fshift) - 1, s->io+ES1371_REG_ADC_SCOUNT);
 879         }
 880         spin_unlock_irqrestore(&s->lock, flags);
 881 }
 882
 883 /* --------------------------------------------------------------------- */
 884
 885 #define DMABUF_DEFAULTORDER (17-PAGE_SHIFT)
 886 #define DMABUF_MINORDER 1
 887
 888
 889 static inline void dealloc_dmabuf(struct es1371_state *s, struct dmabuf *db)
 890 {
 891         struct page *page, *pend;
 892
 893         if (db->rawbuf) {
 894                 /* undo marking the pages as reserved */
 895                 pend = virt_to_page(db->rawbuf + (PAGE_SIZE << db->buforder) - 1);
 896                 for (page = virt_to_page(db->rawbuf); page <= pend; page++)
 897                         ClearPageReserved(page);
 898                 pci_free_consistent(s->dev, PAGE_SIZE << db->buforder, db->rawbuf, db->dmaaddr);
 899         }
 900         db->rawbuf = NULL;
 901         db->mapped = db->ready = 0;
 902 }
 903
 904 static int prog_dmabuf(struct es1371_state *s, struct dmabuf *db, unsigned rate, unsigned fmt, unsigned reg)
 905 {
 906         int order;
 907         unsigned bytepersec;
 908         unsigned bufs;
 909         struct page *page, *pend;
 910
 911         db->hwptr = db->swptr = db->total_bytes = db->count = db->error = db->endcleared = 0;
 912         if (!db->rawbuf) {
 913                 db->ready = db->mapped = 0;
 914                 for (order = DMABUF_DEFAULTORDER; order >= DMABUF_MINORDER; order--)
 915                         if ((db->rawbuf = pci_alloc_consistent(s->dev, PAGE_SIZE << order, &db->dmaaddr)))
 916                                 break;
 917                 if (!db->rawbuf)
 918                         return -ENOMEM;
 919                 db->buforder = order;
 920                 /* now mark the pages as reserved; otherwise remap_pfn_range doesn't do what we want */
 921                 pend = virt_to_page(db->rawbuf + (PAGE_SIZE << db->buforder) - 1);
 922                 for (page = virt_to_page(db->rawbuf); page <= pend; page++)
 923                         SetPageReserved(page);
 924         }
 925         fmt &= ES1371_FMT_MASK;
 926         bytepersec = rate << sample_shift[fmt];
 927         bufs = PAGE_SIZE << db->buforder;
 928         if (db->ossfragshift) {
 929                 if ((1000 << db->ossfragshift) < bytepersec)
 930                         db->fragshift = ld2(bytepersec/1000);
 931                 else
 932                         db->fragshift = db->ossfragshift;
 933         } else {
 934                 db->fragshift = ld2(bytepersec/100/(db->subdivision ? db->subdivision : 1));
 935                 if (db->fragshift < 3)
 936                         db->fragshift = 3;
 937         }
 938         db->numfrag = bufs >> db->fragshift;
 939         while (db->numfrag < 4 && db->fragshift > 3) {
 940                 db->fragshift--;
 941                 db->numfrag = bufs >> db->fragshift;
 942         }
 943         db->fragsize = 1 << db->fragshift;
 944         if (db->ossmaxfrags >= 4 && db->ossmaxfrags < db->numfrag)
 945                 db->numfrag = db->ossmaxfrags;
 946         db->fragsamples = db->fragsize >> sample_shift[fmt];
 947         db->dmasize = db->numfrag << db->fragshift;
 948         memset(db->rawbuf, (fmt & ES1371_FMT_S16) ? 0 : 0x80, db->dmasize);
 949         outl((reg >> 8) & 15, s->io+ES1371_REG_MEMPAGE);
 950         outl(db->dmaaddr, s->io+(reg & 0xff));
 951         outl((db->dmasize >> 2)-1, s->io+((reg + 4) & 0xff));
 952         db->enabled = 1;
 953         db->ready = 1;
 954         return 0;
 955 }
 956
 957 static inline int prog_dmabuf_adc(struct es1371_state *s)
 958 {
 959         stop_adc(s);
 960         return prog_dmabuf(s, &s->dma_adc, s->adcrate, (s->sctrl >> SCTRL_SH_R1FMT) & ES1371_FMT_MASK,
 961                            ES1371_REG_ADC_FRAMEADR);
 962 }
 963
 964 static inline int prog_dmabuf_dac2(struct es1371_state *s)
 965 {
 966         stop_dac2(s);
 967         return prog_dmabuf(s, &s->dma_dac2, s->dac2rate, (s->sctrl >> SCTRL_SH_P2FMT) & ES1371_FMT_MASK,
 968                            ES1371_REG_DAC2_FRAMEADR);
 969 }
 970
 971 static inline int prog_dmabuf_dac1(struct es1371_state *s)
 972 {
 973         stop_dac1(s);
 974         return prog_dmabuf(s, &s->dma_dac1, s->dac1rate, (s->sctrl >> SCTRL_SH_P1FMT) & ES1371_FMT_MASK,
 975                            ES1371_REG_DAC1_FRAMEADR);
 976 }
 977
 978 static inline unsigned get_hwptr(struct es1371_state *s, struct dmabuf *db, unsigned reg)
 979 {
 980         unsigned hwptr, diff;
 981
 982         outl((reg >> 8) & 15, s->io+ES1371_REG_MEMPAGE);
 983         hwptr = (inl(s->io+(reg & 0xff)) >> 14) & 0x3fffc;
 984         diff = (db->dmasize + hwptr - db->hwptr) % db->dmasize;
 985         db->hwptr = hwptr;
 986         return diff;
 987 }
 988
 989 static inline void clear_advance(void *buf, unsigned bsize, unsigned bptr, unsigned len, unsigned char c)
 990 {
 991         if (bptr + len > bsize) {
 992                 unsigned x = bsize - bptr;
 993                 memset(((char *)buf) + bptr, c, x);
 994                 bptr = 0;
 995                 len -= x;
 996         }
 997         memset(((char *)buf) + bptr, c, len);
 998 }
 999
1000 /* call with spinlock held! */
1001 static void es1371_update_ptr(struct es1371_state *s)
1002 {
1003         int diff;
1004
1005         /* update ADC pointer */
1006         if (s->ctrl & CTRL_ADC_EN) {
1007                 diff = get_hwptr(s, &s->dma_adc, ES1371_REG_ADC_FRAMECNT);
1008                 s->dma_adc.total_bytes += diff;
1009                 s->dma_adc.count += diff;
1010                 if (s->dma_adc.count >= (signed)s->dma_adc.fragsize)
1011                         wake_up(&s->dma_adc.wait);
1012                 if (!s->dma_adc.mapped) {
1013                         if (s->dma_adc.count > (signed)(s->dma_adc.dmasize - ((3 * s->dma_adc.fragsize) >> 1))) {
1014                                 s->ctrl &= ~CTRL_ADC_EN;
1015                                 outl(s->ctrl, s->io+ES1371_REG_CONTROL);
1016                                 s->dma_adc.error++;
1017                         }
1018                 }
1019         }
1020         /* update DAC1 pointer */
1021         if (s->ctrl & CTRL_DAC1_EN) {
1022                 diff = get_hwptr(s, &s->dma_dac1, ES1371_REG_DAC1_FRAMECNT);
1023                 s->dma_dac1.total_bytes += diff;
1024                 if (s->dma_dac1.mapped) {
1025                         s->dma_dac1.count += diff;
1026                         if (s->dma_dac1.count >= (signed)s->dma_dac1.fragsize)
1027                                 wake_up(&s->dma_dac1.wait);
1028                 } else {
1029                         s->dma_dac1.count -= diff;
1030                         if (s->dma_dac1.count <= 0) {
1031                                 s->ctrl &= ~CTRL_DAC1_EN;
1032                                 outl(s->ctrl, s->io+ES1371_REG_CONTROL);
1033                                 s->dma_dac1.error++;
1034                         } else if (s->dma_dac1.count <= (signed)s->dma_dac1.fragsize && !s->dma_dac1.endcleared) {
1035                                 clear_advance(s->dma_dac1.rawbuf, s->dma_dac1.dmasize, s->dma_dac1.swptr,
1036                                               s->dma_dac1.fragsize, (s->sctrl & SCTRL_P1SEB) ? 0 : 0x80);
1037                                 s->dma_dac1.endcleared = 1;
1038                         }
1039                         if (s->dma_dac1.count + (signed)s->dma_dac1.fragsize <= (signed)s->dma_dac1.dmasize)
1040                                 wake_up(&s->dma_dac1.wait);
1041                 }
1042         }
1043         /* update DAC2 pointer */
1044         if (s->ctrl & CTRL_DAC2_EN) {
1045                 diff = get_hwptr(s, &s->dma_dac2, ES1371_REG_DAC2_FRAMECNT);
1046                 s->dma_dac2.total_bytes += diff;
1047                 if (s->dma_dac2.mapped) {
1048                         s->dma_dac2.count += diff;
1049                         if (s->dma_dac2.count >= (signed)s->dma_dac2.fragsize)
1050                                 wake_up(&s->dma_dac2.wait);
1051                 } else {
1052                         s->dma_dac2.count -= diff;
1053                         if (s->dma_dac2.count <= 0) {
1054                                 s->ctrl &= ~CTRL_DAC2_EN;
1055                                 outl(s->ctrl, s->io+ES1371_REG_CONTROL);
1056                                 s->dma_dac2.error++;
1057                         } else if (s->dma_dac2.count <= (signed)s->dma_dac2.fragsize && !s->dma_dac2.endcleared) {
1058                                 clear_advance(s->dma_dac2.rawbuf, s->dma_dac2.dmasize, s->dma_dac2.swptr,
1059                                               s->dma_dac2.fragsize, (s->sctrl & SCTRL_P2SEB) ? 0 : 0x80);
1060                                 s->dma_dac2.endcleared = 1;
1061                         }
1062                         if (s->dma_dac2.count + (signed)s->dma_dac2.fragsize <= (signed)s->dma_dac2.dmasize)
1063                                 wake_up(&s->dma_dac2.wait);
1064                 }
1065         }
1066 }
1067
1068 /* hold spinlock for the following! */
1069 static void es1371_handle_midi(struct es1371_state *s)
1070 {
1071         unsigned char ch;
1072         int wake;
1073
1074         if (!(s->ctrl & CTRL_UART_EN))
1075                 return;
1076         wake = 0;
1077         while (inb(s->io+ES1371_REG_UART_STATUS) & USTAT_RXRDY) {
1078                 ch = inb(s->io+ES1371_REG_UART_DATA);
1079                 if (s->midi.icnt < MIDIINBUF) {
1080                         s->midi.ibuf[s->midi.iwr] = ch;
1081                         s->midi.iwr = (s->midi.iwr + 1) % MIDIINBUF;
1082                         s->midi.icnt++;
1083                 }
1084                 wake = 1;
1085         }
1086         if (wake)
1087                 wake_up(&s->midi.iwait);
1088         wake = 0;
1089         while ((inb(s->io+ES1371_REG_UART_STATUS) & USTAT_TXRDY) && s->midi.ocnt > 0) {
1090                 outb(s->midi.obuf[s->midi.ord], s->io+ES1371_REG_UART_DATA);
1091                 s->midi.ord = (s->midi.ord + 1) % MIDIOUTBUF;
1092                 s->midi.ocnt--;
1093                 if (s->midi.ocnt < MIDIOUTBUF-16)
1094                         wake = 1;
1095         }
1096         if (wake)
1097                 wake_up(&s->midi.owait);
1098         outb((s->midi.ocnt > 0) ? UCTRL_RXINTEN | UCTRL_ENA_TXINT : UCTRL_RXINTEN, s->io+ES1371_REG_UART_CONTROL);
1099 }
1100
1101 static irqreturn_t es1371_interrupt(int irq, void *dev_id, struct pt_regs *regs)
1102 {
1103         struct es1371_state *s = (struct es1371_state *)dev_id;
1104         unsigned int intsrc, sctl;
1105
1106         /* fastpath out, to ease interrupt sharing */
1107         intsrc = inl(s->io+ES1371_REG_STATUS);
1108         if (!(intsrc & 0x80000000))
1109                 return IRQ_NONE;
1110         spin_lock(&s->lock);
1111         /* clear audio interrupts first */
1112         sctl = s->sctrl;
1113         if (intsrc & STAT_ADC)
1114                 sctl &= ~SCTRL_R1INTEN;
1115         if (intsrc & STAT_DAC1)
1116                 sctl &= ~SCTRL_P1INTEN;
1117         if (intsrc & STAT_DAC2)
1118                 sctl &= ~SCTRL_P2INTEN;
1119         outl(sctl, s->io+ES1371_REG_SERIAL_CONTROL);
1120         outl(s->sctrl, s->io+ES1371_REG_SERIAL_CONTROL);
1121         es1371_update_ptr(s);
1122         es1371_handle_midi(s);
1123         spin_unlock(&s->lock);
1124         return IRQ_HANDLED;
1125 }
1126
1127 /* --------------------------------------------------------------------- */
1128
1129 static const char invalid_magic[] = KERN_CRIT PFX "invalid magic value\n";
1130
1131 #define VALIDATE_STATE(s)                         \
1132 ({                                                \
1133         if (!(s) || (s)->magic != ES1371_MAGIC) { \
1134                 printk(invalid_magic);            \
1135                 return -ENXIO;                    \
1136         }                                         \
1137 })
1138
1139 /* --------------------------------------------------------------------- */
1140
1141 /* Conversion table for S/PDIF PCM volume emulation through the SRC */
1142 /* dB-linear table of DAC vol values; -0dB to -46.5dB with mute */
1143 static const unsigned short DACVolTable[101] =
1144 {
1145         0x1000, 0x0f2a, 0x0e60, 0x0da0, 0x0cea, 0x0c3e, 0x0b9a, 0x0aff,
1146         0x0a6d, 0x09e1, 0x095e, 0x08e1, 0x086a, 0x07fa, 0x078f, 0x072a,
1147         0x06cb, 0x0670, 0x061a, 0x05c9, 0x057b, 0x0532, 0x04ed, 0x04ab,
1148         0x046d, 0x0432, 0x03fa, 0x03c5, 0x0392, 0x0363, 0x0335, 0x030b,
1149         0x02e2, 0x02bc, 0x0297, 0x0275, 0x0254, 0x0235, 0x0217, 0x01fb,
1150         0x01e1, 0x01c8, 0x01b0, 0x0199, 0x0184, 0x0170, 0x015d, 0x014b,
1151         0x0139, 0x0129, 0x0119, 0x010b, 0x00fd, 0x00f0, 0x00e3, 0x00d7,
1152         0x00cc, 0x00c1, 0x00b7, 0x00ae, 0x00a5, 0x009c, 0x0094, 0x008c,
1153         0x0085, 0x007e, 0x0077, 0x0071, 0x006b, 0x0066, 0x0060, 0x005b,
1154         0x0057, 0x0052, 0x004e, 0x004a, 0x0046, 0x0042, 0x003f, 0x003c,
1155         0x0038, 0x0036, 0x0033, 0x0030, 0x002e, 0x002b, 0x0029, 0x0027,
1156         0x0025, 0x0023, 0x0021, 0x001f, 0x001e, 0x001c, 0x001b, 0x0019,
1157         0x0018, 0x0017, 0x0016, 0x0014, 0x0000
1158 };
1159
1160 /*
1161  * when we are in S/PDIF mode, we want to disable any analog output so
1162  * we filter the mixer ioctls
1163  */
1164 static int mixdev_ioctl(struct ac97_codec *codec, unsigned int cmd, unsigned long arg)
1165 {
1166         struct es1371_state *s = (struct es1371_state *)codec->private_data;
1167         int val;
1168         unsigned long flags;
1169         unsigned int left, right;
1170
1171         VALIDATE_STATE(s);
1172         /* filter mixer ioctls to catch PCM and MASTER volume when in S/PDIF mode */
1173         if (s->spdif_volume == -1)
1174                 return codec->mixer_ioctl(codec, cmd, arg);
1175         switch (cmd) {
1176         case SOUND_MIXER_WRITE_VOLUME:
1177                 return 0;
1178
1179         case SOUND_MIXER_WRITE_PCM:   /* use SRC for PCM volume */
1180                 if (get_user(val, (int __user *)arg))
1181                         return -EFAULT;
1182                 right = ((val >> 8)  & 0xff);
1183                 left = (val  & 0xff);
1184                 if (right > 100)
1185                         right = 100;
1186                 if (left > 100)
1187                         left = 100;
1188                 s->spdif_volume = (right << 8) | left;
1189                 spin_lock_irqsave(&s->lock, flags);
1190                 src_write(s, SRCREG_VOL_DAC2, DACVolTable[100 - left]);
1191                 src_write(s, SRCREG_VOL_DAC2+1, DACVolTable[100 - right]);
1192                 spin_unlock_irqrestore(&s->lock, flags);
1193                 return 0;
1194
1195         case SOUND_MIXER_READ_PCM:
1196                 return put_user(s->spdif_volume, (int __user *)arg);
1197         }
1198         return codec->mixer_ioctl(codec, cmd, arg);
1199 }
1200
1201 /* --------------------------------------------------------------------- */
1202
1203 /*
1204  * AC97 Mixer Register to Connections mapping of the Concert 97 board
1205  *
1206  * AC97_MASTER_VOL_STEREO   Line Out
1207  * AC97_MASTER_VOL_MONO     TAD Output
1208  * AC97_PCBEEP_VOL          none
1209  * AC97_PHONE_VOL           TAD Input (mono)
1210  * AC97_MIC_VOL             MIC Input (mono)
1211  * AC97_LINEIN_VOL          Line Input (stereo)
1212  * AC97_CD_VOL              CD Input (stereo)
1213  * AC97_VIDEO_VOL           none
1214  * AC97_AUX_VOL             Aux Input (stereo)
1215  * AC97_PCMOUT_VOL          Wave Output (stereo)
1216  */
1217
1218 static int es1371_open_mixdev(struct inode *inode, struct file *file)
1219 {
1220         int minor = iminor(inode);
1221         struct list_head *list;
1222         struct es1371_state *s;
1223
1224         for (list = devs.next; ; list = list->next) {
1225                 if (list == &devs)
1226                         return -ENODEV;
1227                 s = list_entry(list, struct es1371_state, devs);
1228                 if (s->codec->dev_mixer == minor)
1229                         break;
1230         }
1231         VALIDATE_STATE(s);
1232         file->private_data = s;
1233         return nonseekable_open(inode, file);
1234 }
1235
1236 static int es1371_release_mixdev(struct inode *inode, struct file *file)
1237 {
1238         struct es1371_state *s = (struct es1371_state *)file->private_data;
1239
1240         VALIDATE_STATE(s);
1241         return 0;
1242 }
1243
1244 static int es1371_ioctl_mixdev(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg)
1245 {
1246         struct es1371_state *s = (struct es1371_state *)file->private_data;
1247         struct ac97_codec *codec = s->codec;
1248
1249         return mixdev_ioctl(codec, cmd, arg);
1250 }
1251
1252 static /*const*/ struct file_operations es1371_mixer_fops = {
1253         .owner          = THIS_MODULE,
1254         .llseek         = no_llseek,
1255         .ioctl          = es1371_ioctl_mixdev,
1256         .open           = es1371_open_mixdev,
1257         .release        = es1371_release_mixdev,
1258 };
1259
1260 /* --------------------------------------------------------------------- */
1261
1262 static int drain_dac1(struct es1371_state *s, int nonblock)
1263 {
1264         DECLARE_WAITQUEUE(wait, current);
1265         unsigned long flags;
1266         int count, tmo;
1267
1268         if (s->dma_dac1.mapped || !s->dma_dac1.ready)
1269                 return 0;
1270         add_wait_queue(&s->dma_dac1.wait, &wait);
1271         for (;;) {
1272                 __set_current_state(TASK_INTERRUPTIBLE);
1273                 spin_lock_irqsave(&s->lock, flags);
1274                 count = s->dma_dac1.count;
1275                 spin_unlock_irqrestore(&s->lock, flags);
1276                 if (count <= 0)
1277                         break;
1278                 if (signal_pending(current))
1279                         break;
1280                 if (nonblock) {
1281                         remove_wait_queue(&s->dma_dac1.wait, &wait);
1282                         set_current_state(TASK_RUNNING);
1283                         return -EBUSY;
1284                 }
1285                 tmo = 3 * HZ * (count + s->dma_dac1.fragsize) / 2 / s->dac1rate;
1286                 tmo >>= sample_shift[(s->sctrl & SCTRL_P1FMT) >> SCTRL_SH_P1FMT];
1287                 if (!schedule_timeout(tmo + 1))
1288                         DBG(printk(KERN_DEBUG PFX "dac1 dma timed out??\n");)
1289         }
1290         remove_wait_queue(&s->dma_dac1.wait, &wait);
1291         set_current_state(TASK_RUNNING);
1292         if (signal_pending(current))
1293                 return -ERESTARTSYS;
1294         return 0;
1295 }
1296
1297 static int drain_dac2(struct es1371_state *s, int nonblock)
1298 {
1299         DECLARE_WAITQUEUE(wait, current);
1300         unsigned long flags;
1301         int count, tmo;
1302
1303         if (s->dma_dac2.mapped || !s->dma_dac2.ready)
1304                 return 0;
1305         add_wait_queue(&s->dma_dac2.wait, &wait);
1306         for (;;) {
1307                 __set_current_state(TASK_UNINTERRUPTIBLE);
1308                 spin_lock_irqsave(&s->lock, flags);
1309                 count = s->dma_dac2.count;
1310                 spin_unlock_irqrestore(&s->lock, flags);
1311                 if (count <= 0)
1312                         break;
1313                 if (signal_pending(current))
1314                         break;
1315                 if (nonblock) {
1316                         remove_wait_queue(&s->dma_dac2.wait, &wait);
1317                         set_current_state(TASK_RUNNING);
1318                         return -EBUSY;
1319                 }
1320                 tmo = 3 * HZ * (count + s->dma_dac2.fragsize) / 2 / s->dac2rate;
1321                 tmo >>= sample_shift[(s->sctrl & SCTRL_P2FMT) >> SCTRL_SH_P2FMT];
1322                 if (!schedule_timeout(tmo + 1))
1323                         DBG(printk(KERN_DEBUG PFX "dac2 dma timed out??\n");)
1324         }
1325         remove_wait_queue(&s->dma_dac2.wait, &wait);
1326         set_current_state(TASK_RUNNING);
1327         if (signal_pending(current))
1328                 return -ERESTARTSYS;
1329         return 0;
1330 }
1331
1332 /* --------------------------------------------------------------------- */
1333
1334 static ssize_t es1371_read(struct file *file, char __user *buffer, size_t count, loff_t *ppos)
1335 {
1336         struct es1371_state *s = (struct es1371_state *)file->private_data;
1337         DECLARE_WAITQUEUE(wait, current);
1338         ssize_t ret = 0;
1339         unsigned long flags;
1340         unsigned swptr;
1341         int cnt;
1342
1343         VALIDATE_STATE(s);
1344         if (s->dma_adc.mapped)
1345                 return -ENXIO;
1346         if (!access_ok(VERIFY_WRITE, buffer, count))
1347                 return -EFAULT;
1348         down(&s->sem);
1349         if (!s->dma_adc.ready && (ret = prog_dmabuf_adc(s)))
1350                 goto out2;
1351
1352         add_wait_queue(&s->dma_adc.wait, &wait);
1353         while (count > 0) {
1354                 spin_lock_irqsave(&s->lock, flags);
1355                 swptr = s->dma_adc.swptr;
1356                 cnt = s->dma_adc.dmasize-swptr;
1357                 if (s->dma_adc.count < cnt)
1358                         cnt = s->dma_adc.count;
1359                 if (cnt <= 0)
1360                         __set_current_state(TASK_INTERRUPTIBLE);
1361                 spin_unlock_irqrestore(&s->lock, flags);
1362                 if (cnt > count)
1363                         cnt = count;
1364                 if (cnt <= 0) {
1365                         if (s->dma_adc.enabled)
1366                                 start_adc(s);
1367                         if (file->f_flags & O_NONBLOCK) {
1368                                 if (!ret)
1369                                         ret = -EAGAIN;
1370                                 goto out;
1371                         }
1372                         up(&s->sem);
1373                         schedule();
1374                         if (signal_pending(current)) {
1375                                 if (!ret)
1376                                         ret = -ERESTARTSYS;
1377                                 goto out2;
1378                         }
1379                         down(&s->sem);
1380                         if (s->dma_adc.mapped)
1381                         {
1382                                 ret = -ENXIO;
1383                                 goto out;
1384                         }
1385                         continue;
1386                 }
1387                 if (copy_to_user(buffer, s->dma_adc.rawbuf + swptr, cnt)) {
1388                         if (!ret)
1389                                 ret = -EFAULT;
1390                         goto out;
1391                 }
1392                 swptr = (swptr + cnt) % s->dma_adc.dmasize;
1393                 spin_lock_irqsave(&s->lock, flags);
1394                 s->dma_adc.swptr = swptr;
1395                 s->dma_adc.count -= cnt;
1396                 spin_unlock_irqrestore(&s->lock, flags);
1397                 count -= cnt;
1398                 buffer += cnt;
1399                 ret += cnt;
1400                 if (s->dma_adc.enabled)
1401                         start_adc(s);
1402         }
1403 out:
1404         up(&s->sem);
1405 out2:
1406         remove_wait_queue(&s->dma_adc.wait, &wait);
1407         set_current_state(TASK_RUNNING);
1408         return ret;
1409 }
1410
1411 static ssize_t es1371_write(struct file *file, const char __user *buffer, size_t count, loff_t *ppos)
1412 {
1413         struct es1371_state *s = (struct es1371_state *)file->private_data;
1414         DECLARE_WAITQUEUE(wait, current);
1415         ssize_t ret;
1416         unsigned long flags;
1417         unsigned swptr;
1418         int cnt;
1419
1420         VALIDATE_STATE(s);
1421         if (s->dma_dac2.mapped)
1422                 return -ENXIO;
1423         if (!access_ok(VERIFY_READ, buffer, count))
1424                 return -EFAULT;
1425         down(&s->sem);
1426         if (!s->dma_dac2.ready && (ret = prog_dmabuf_dac2(s)))
1427                 goto out3;
1428         ret = 0;
1429         add_wait_queue(&s->dma_dac2.wait, &wait);
1430         while (count > 0) {
1431                 spin_lock_irqsave(&s->lock, flags);
1432                 if (s->dma_dac2.count < 0) {
1433                         s->dma_dac2.count = 0;
1434                         s->dma_dac2.swptr = s->dma_dac2.hwptr;
1435                 }
1436                 swptr = s->dma_dac2.swptr;
1437                 cnt = s->dma_dac2.dmasize-swptr;
1438                 if (s->dma_dac2.count + cnt > s->dma_dac2.dmasize)
1439                         cnt = s->dma_dac2.dmasize - s->dma_dac2.count;
1440                 if (cnt <= 0)
1441                         __set_current_state(TASK_INTERRUPTIBLE);
1442                 spin_unlock_irqrestore(&s->lock, flags);
1443                 if (cnt > count)
1444                         cnt = count;
1445                 if (cnt <= 0) {
1446                         if (s->dma_dac2.enabled)
1447                                 start_dac2(s);
1448                         if (file->f_flags & O_NONBLOCK) {
1449                                 if (!ret)
1450                                         ret = -EAGAIN;
1451                                 goto out;
1452                         }
1453                         up(&s->sem);
1454                         schedule();
1455                         if (signal_pending(current)) {
1456                                 if (!ret)
1457                                         ret = -ERESTARTSYS;
1458                                 goto out2;
1459                         }
1460                         down(&s->sem);
1461                         if (s->dma_dac2.mapped)
1462                         {
1463                                 ret = -ENXIO;
1464                                 goto out;
1465                         }
1466                         continue;
1467                 }
1468                 if (copy_from_user(s->dma_dac2.rawbuf + swptr, buffer, cnt)) {
1469                         if (!ret)
1470                                 ret = -EFAULT;
1471                         goto out;
1472                 }
1473                 swptr = (swptr + cnt) % s->dma_dac2.dmasize;
1474                 spin_lock_irqsave(&s->lock, flags);
1475                 s->dma_dac2.swptr = swptr;
1476                 s->dma_dac2.count += cnt;
1477                 s->dma_dac2.endcleared = 0;
1478                 spin_unlock_irqrestore(&s->lock, flags);
1479                 count -= cnt;
1480                 buffer += cnt;
1481                 ret += cnt;
1482                 if (s->dma_dac2.enabled)
1483                         start_dac2(s);
1484         }
1485 out:
1486         up(&s->sem);
1487 out2:
1488         remove_wait_queue(&s->dma_dac2.wait, &wait);
1489 out3:
1490         set_current_state(TASK_RUNNING);
1491         return ret;
1492 }
1493
1494 /* No kernel lock - we have our own spinlock */
1495 static unsigned int es1371_poll(struct file *file, struct poll_table_struct *wait)
1496 {
1497         struct es1371_state *s = (struct es1371_state *)file->private_data;
1498         unsigned long flags;
1499         unsigned int mask = 0;
1500
1501         VALIDATE_STATE(s);
1502         if (file->f_mode & FMODE_WRITE) {
1503                 if (!s->dma_dac2.ready && prog_dmabuf_dac2(s))
1504                         return 0;
1505                 poll_wait(file, &s->dma_dac2.wait, wait);
1506         }
1507         if (file->f_mode & FMODE_READ) {
1508                 if (!s->dma_adc.ready && prog_dmabuf_adc(s))
1509                         return 0;
1510                 poll_wait(file, &s->dma_adc.wait, wait);
1511         }
1512         spin_lock_irqsave(&s->lock, flags);
1513         es1371_update_ptr(s);
1514         if (file->f_mode & FMODE_READ) {
1515                         if (s->dma_adc.count >= (signed)s->dma_adc.fragsize)
1516                                 mask |= POLLIN | POLLRDNORM;
1517         }
1518         if (file->f_mode & FMODE_WRITE) {
1519                 if (s->dma_dac2.mapped) {
1520                         if (s->dma_dac2.count >= (signed)s->dma_dac2.fragsize)
1521                                 mask |= POLLOUT | POLLWRNORM;
1522                 } else {
1523                         if ((signed)s->dma_dac2.dmasize >= s->dma_dac2.count + (signed)s->dma_dac2.fragsize)
1524                                 mask |= POLLOUT | POLLWRNORM;
1525                 }
1526         }
1527         spin_unlock_irqrestore(&s->lock, flags);
1528         return mask;
1529 }
1530
1531 static int es1371_mmap(struct file *file, struct vm_area_struct *vma)
1532 {
1533         struct es1371_state *s = (struct es1371_state *)file->private_data;
1534         struct dmabuf *db;
1535         int ret = 0;
1536         unsigned long size;
1537
1538         VALIDATE_STATE(s);
1539         lock_kernel();
1540         down(&s->sem);
1541
1542         if (vma->vm_flags & VM_WRITE) {
1543                 if ((ret = prog_dmabuf_dac2(s)) != 0) {
1544                         goto out;
1545                 }
1546                 db = &s->dma_dac2;
1547         } else if (vma->vm_flags & VM_READ) {
1548                 if ((ret = prog_dmabuf_adc(s)) != 0) {
1549                         goto out;
1550                 }
1551                 db = &s->dma_adc;
1552         } else {
1553                 ret = -EINVAL;
1554                 goto out;
1555         }
1556         if (vma->vm_pgoff != 0) {
1557                 ret = -EINVAL;
1558                 goto out;
1559         }
1560         size = vma->vm_end - vma->vm_start;
1561         if (size > (PAGE_SIZE << db->buforder)) {
1562                 ret = -EINVAL;
1563                 goto out;
1564         }
1565         if (remap_pfn_range(vma, vma->vm_start,
1566                                 virt_to_phys(db->rawbuf) >> PAGE_SHIFT,
1567                                 size, vma->vm_page_prot)) {
1568                 ret = -EAGAIN;
1569                 goto out;
1570         }
1571         db->mapped = 1;
1572 out:
1573         up(&s->sem);
1574         unlock_kernel();
1575         return ret;
1576 }
1577
1578 static int es1371_ioctl(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg)
1579 {
1580         struct es1371_state *s = (struct es1371_state *)file->private_data;
1581         unsigned long flags;
1582         audio_buf_info abinfo;
1583         count_info cinfo;
1584         int count;
1585         int val, mapped, ret;
1586         void __user *argp = (void __user *)arg;
1587         int __user *p = argp;
1588
1589         VALIDATE_STATE(s);
1590         mapped = ((file->f_mode & FMODE_WRITE) && s->dma_dac2.mapped) ||
1591                 ((file->f_mode & FMODE_READ) && s->dma_adc.mapped);
1592         switch (cmd) {
1593         case OSS_GETVERSION:
1594                 return put_user(SOUND_VERSION, p);
1595
1596         case SNDCTL_DSP_SYNC:
1597                 if (file->f_mode & FMODE_WRITE)
1598                         return drain_dac2(s, 0/*file->f_flags & O_NONBLOCK*/);
1599                 return 0;
1600
1601         case SNDCTL_DSP_SETDUPLEX:
1602                 return 0;
1603
1604         case SNDCTL_DSP_GETCAPS:
1605                 return put_user(DSP_CAP_DUPLEX | DSP_CAP_REALTIME | DSP_CAP_TRIGGER | DSP_CAP_MMAP, p);
1606
1607         case SNDCTL_DSP_RESET:
1608                 if (file->f_mode & FMODE_WRITE) {
1609                         stop_dac2(s);
1610                         synchronize_irq(s->irq);
1611                         s->dma_dac2.swptr = s->dma_dac2.hwptr = s->dma_dac2.count = s->dma_dac2.total_bytes = 0;
1612                 }
1613                 if (file->f_mode & FMODE_READ) {
1614                         stop_adc(s);
1615                         synchronize_irq(s->irq);
1616                         s->dma_adc.swptr = s->dma_adc.hwptr = s->dma_adc.count = s->dma_adc.total_bytes = 0;
1617                 }
1618                 return 0;
1619
1620         case SNDCTL_DSP_SPEED:
1621                 if (get_user(val, p))
1622                         return -EFAULT;
1623                 if (val >= 0) {
1624                         if (file->f_mode & FMODE_READ) {
1625                                 stop_adc(s);
1626                                 s->dma_adc.ready = 0;
1627                                 set_adc_rate(s, val);
1628                         }
1629                         if (file->f_mode & FMODE_WRITE) {
1630                                 stop_dac2(s);
1631                                 s->dma_dac2.ready = 0;
1632                                 set_dac2_rate(s, val);
1633                         }
1634                 }
1635                 return put_user((file->f_mode & FMODE_READ) ? s->adcrate : s->dac2rate, p);
1636
1637         case SNDCTL_DSP_STEREO:
1638                 if (get_user(val, p))
1639                         return -EFAULT;
1640                 if (file->f_mode & FMODE_READ) {
1641                         stop_adc(s);
1642                         s->dma_adc.ready = 0;
1643                         spin_lock_irqsave(&s->lock, flags);
1644                         if (val)
1645                                 s->sctrl |= SCTRL_R1SMB;
1646                         else
1647                                 s->sctrl &= ~SCTRL_R1SMB;
1648                         outl(s->sctrl, s->io+ES1371_REG_SERIAL_CONTROL);
1649                         spin_unlock_irqrestore(&s->lock, flags);
1650                 }
1651                 if (file->f_mode & FMODE_WRITE) {
1652                         stop_dac2(s);
1653                         s->dma_dac2.ready = 0;
1654                         spin_lock_irqsave(&s->lock, flags);
1655                         if (val)
1656                                 s->sctrl |= SCTRL_P2SMB;
1657                         else
1658                                 s->sctrl &= ~SCTRL_P2SMB;
1659                         outl(s->sctrl, s->io+ES1371_REG_SERIAL_CONTROL);
1660                         spin_unlock_irqrestore(&s->lock, flags);
1661                 }
1662                 return 0;
1663
1664         case SNDCTL_DSP_CHANNELS:
1665                 if (get_user(val, p))
1666                         return -EFAULT;
1667                 if (val != 0) {
1668                         if (file->f_mode & FMODE_READ) {
1669                                 stop_adc(s);
1670                                 s->dma_adc.ready = 0;
1671                                 spin_lock_irqsave(&s->lock, flags);
1672                                 if (val >= 2)
1673                                         s->sctrl |= SCTRL_R1SMB;
1674                                 else
1675                                         s->sctrl &= ~SCTRL_R1SMB;
1676                                 outl(s->sctrl, s->io+ES1371_REG_SERIAL_CONTROL);
1677                                 spin_unlock_irqrestore(&s->lock, flags);
1678                         }
1679                         if (file->f_mode & FMODE_WRITE) {
1680                                 stop_dac2(s);
1681                                 s->dma_dac2.ready = 0;
1682                                 spin_lock_irqsave(&s->lock, flags);
1683                                 if (val >= 2)
1684                                         s->sctrl |= SCTRL_P2SMB;
1685                                 else
1686                                         s->sctrl &= ~SCTRL_P2SMB;
1687                                 outl(s->sctrl, s->io+ES1371_REG_SERIAL_CONTROL);
1688                                 spin_unlock_irqrestore(&s->lock, flags);
1689                         }
1690                 }
1691                 return put_user((s->sctrl & ((file->f_mode & FMODE_READ) ? SCTRL_R1SMB : SCTRL_P2SMB)) ? 2 : 1, p);
1692
1693         case SNDCTL_DSP_GETFMTS: /* Returns a mask */
1694                 return put_user(AFMT_S16_LE|AFMT_U8, p);
1695
1696         case SNDCTL_DSP_SETFMT: /* Selects ONE fmt*/
1697                 if (get_user(val, p))
1698                         return -EFAULT;
1699                 if (val != AFMT_QUERY) {
1700                         if (file->f_mode & FMODE_READ) {
1701                                 stop_adc(s);
1702                                 s->dma_adc.ready = 0;
1703                                 spin_lock_irqsave(&s->lock, flags);
1704                                 if (val == AFMT_S16_LE)
1705                                         s->sctrl |= SCTRL_R1SEB;
1706                                 else
1707                                         s->sctrl &= ~SCTRL_R1SEB;
1708                                 outl(s->sctrl, s->io+ES1371_REG_SERIAL_CONTROL);
1709                                 spin_unlock_irqrestore(&s->lock, flags);
1710                         }
1711                         if (file->f_mode & FMODE_WRITE) {
1712                                 stop_dac2(s);
1713                                 s->dma_dac2.ready = 0;
1714                                 spin_lock_irqsave(&s->lock, flags);
1715                                 if (val == AFMT_S16_LE)
1716                                         s->sctrl |= SCTRL_P2SEB;
1717                                 else
1718                                         s->sctrl &= ~SCTRL_P2SEB;
1719                                 outl(s->sctrl, s->io+ES1371_REG_SERIAL_CONTROL);
1720                                 spin_unlock_irqrestore(&s->lock, flags);
1721                         }
1722                 }
1723                 return put_user((s->sctrl & ((file->f_mode & FMODE_READ) ? SCTRL_R1SEB : SCTRL_P2SEB)) ?
1724                                 AFMT_S16_LE : AFMT_U8, p);
1725
1726         case SNDCTL_DSP_POST:
1727                 return 0;
1728
1729         case SNDCTL_DSP_GETTRIGGER:
1730                 val = 0;
1731                 if (file->f_mode & FMODE_READ && s->ctrl & CTRL_ADC_EN)
1732                         val |= PCM_ENABLE_INPUT;
1733                 if (file->f_mode & FMODE_WRITE && s->ctrl & CTRL_DAC2_EN)
1734                         val |= PCM_ENABLE_OUTPUT;
1735                 return put_user(val, p);
1736
1737         case SNDCTL_DSP_SETTRIGGER:
1738                 if (get_user(val, p))
1739                         return -EFAULT;
1740                 if (file->f_mode & FMODE_READ) {
1741                         if (val & PCM_ENABLE_INPUT) {
1742                                 if (!s->dma_adc.ready && (ret = prog_dmabuf_adc(s)))
1743                                         return ret;
1744                                 s->dma_adc.enabled = 1;
1745                                 start_adc(s);
1746                         } else {
1747                                 s->dma_adc.enabled = 0;
1748                                 stop_adc(s);
1749                         }
1750                 }
1751                 if (file->f_mode & FMODE_WRITE) {
1752                         if (val & PCM_ENABLE_OUTPUT) {
1753                                 if (!s->dma_dac2.ready && (ret = prog_dmabuf_dac2(s)))
1754                                         return ret;
1755                                 s->dma_dac2.enabled = 1;
1756                                 start_dac2(s);
1757                         } else {
1758                                 s->dma_dac2.enabled = 0;
1759                                 stop_dac2(s);
1760                         }
1761                 }
1762                 return 0;
1763
1764         case SNDCTL_DSP_GETOSPACE:
1765                 if (!(file->f_mode & FMODE_WRITE))
1766                         return -EINVAL;
1767                 if (!s->dma_dac2.ready && (val = prog_dmabuf_dac2(s)) != 0)
1768                         return val;
1769                 spin_lock_irqsave(&s->lock, flags);
1770                 es1371_update_ptr(s);
1771                 abinfo.fragsize = s->dma_dac2.fragsize;
1772                 count = s->dma_dac2.count;
1773                 if (count < 0)
1774                         count = 0;
1775                 abinfo.bytes = s->dma_dac2.dmasize - count;
1776                 abinfo.fragstotal = s->dma_dac2.numfrag;
1777                 abinfo.fragments = abinfo.bytes >> s->dma_dac2.fragshift;
1778                 spin_unlock_irqrestore(&s->lock, flags);
1779                 return copy_to_user(argp, &abinfo, sizeof(abinfo)) ? -EFAULT : 0;
1780
1781         case SNDCTL_DSP_GETISPACE:
1782                 if (!(file->f_mode & FMODE_READ))
1783                         return -EINVAL;
1784                 if (!s->dma_adc.ready && (val = prog_dmabuf_adc(s)) != 0)
1785                         return val;
1786                 spin_lock_irqsave(&s->lock, flags);
1787                 es1371_update_ptr(s);
1788                 abinfo.fragsize = s->dma_adc.fragsize;
1789                 count = s->dma_adc.count;
1790                 if (count < 0)
1791                         count = 0;
1792                 abinfo.bytes = count;
1793                 abinfo.fragstotal = s->dma_adc.numfrag;
1794                 abinfo.fragments = abinfo.bytes >> s->dma_adc.fragshift;
1795                 spin_unlock_irqrestore(&s->lock, flags);
1796                 return copy_to_user(argp, &abinfo, sizeof(abinfo)) ? -EFAULT : 0;
1797
1798         case SNDCTL_DSP_NONBLOCK:
1799                 file->f_flags |= O_NONBLOCK;
1800                 return 0;
1801
1802         case SNDCTL_DSP_GETODELAY:
1803                 if (!(file->f_mode & FMODE_WRITE))
1804                         return -EINVAL;
1805                 if (!s->dma_dac2.ready && (val = prog_dmabuf_dac2(s)) != 0)
1806                         return val;
1807                 spin_lock_irqsave(&s->lock, flags);
1808                 es1371_update_ptr(s);
1809                 count = s->dma_dac2.count;
1810                 spin_unlock_irqrestore(&s->lock, flags);
1811                 if (count < 0)
1812                         count = 0;
1813                 return put_user(count, p);
1814
1815         case SNDCTL_DSP_GETIPTR:
1816                 if (!(file->f_mode & FMODE_READ))
1817                         return -EINVAL;
1818                 if (!s->dma_adc.ready && (val = prog_dmabuf_adc(s)) != 0)
1819                         return val;
1820                 spin_lock_irqsave(&s->lock, flags);
1821                 es1371_update_ptr(s);
1822                 cinfo.bytes = s->dma_adc.total_bytes;
1823                 count = s->dma_adc.count;
1824                 if (count < 0)
1825                         count = 0;
1826                 cinfo.blocks = count >> s->dma_adc.fragshift;
1827                 cinfo.ptr = s->dma_adc.hwptr;
1828                 if (s->dma_adc.mapped)
1829                         s->dma_adc.count &= s->dma_adc.fragsize-1;
1830                 spin_unlock_irqrestore(&s->lock, flags);
1831                 if (copy_to_user(argp, &cinfo, sizeof(cinfo)))
1832                         return -EFAULT;
1833                 return 0;
1834
1835         case SNDCTL_DSP_GETOPTR:
1836                 if (!(file->f_mode & FMODE_WRITE))
1837                         return -EINVAL;
1838                 if (!s->dma_dac2.ready && (val = prog_dmabuf_dac2(s)) != 0)
1839                         return val;
1840                 spin_lock_irqsave(&s->lock, flags);
1841                 es1371_update_ptr(s);
1842                 cinfo.bytes = s->dma_dac2.total_bytes;
1843                 count = s->dma_dac2.count;
1844                 if (count < 0)
1845                         count = 0;
1846                 cinfo.blocks = count >> s->dma_dac2.fragshift;
1847                 cinfo.ptr = s->dma_dac2.hwptr;
1848                 if (s->dma_dac2.mapped)
1849                         s->dma_dac2.count &= s->dma_dac2.fragsize-1;
1850                 spin_unlock_irqrestore(&s->lock, flags);
1851                 if (copy_to_user(argp, &cinfo, sizeof(cinfo)))
1852                         return -EFAULT;
1853                 return 0;
1854
1855         case SNDCTL_DSP_GETBLKSIZE:
1856                 if (file->f_mode & FMODE_WRITE) {
1857                         if ((val = prog_dmabuf_dac2(s)))
1858                                 return val;
1859                         return put_user(s->dma_dac2.fragsize, p);
1860                 }
1861                 if ((val = prog_dmabuf_adc(s)))
1862                         return val;
1863                 return put_user(s->dma_adc.fragsize, p);
1864
1865         case SNDCTL_DSP_SETFRAGMENT:
1866                 if (get_user(val, p))
1867                         return -EFAULT;
1868                 if (file->f_mode & FMODE_READ) {
1869                         s->dma_adc.ossfragshift = val & 0xffff;
1870                         s->dma_adc.ossmaxfrags = (val >> 16) & 0xffff;
1871                         if (s->dma_adc.ossfragshift < 4)
1872                                 s->dma_adc.ossfragshift = 4;
1873                         if (s->dma_adc.ossfragshift > 15)
1874                                 s->dma_adc.ossfragshift = 15;
1875                         if (s->dma_adc.ossmaxfrags < 4)
1876                                 s->dma_adc.ossmaxfrags = 4;
1877                 }
1878                 if (file->f_mode & FMODE_WRITE) {
1879                         s->dma_dac2.ossfragshift = val & 0xffff;
1880                         s->dma_dac2.ossmaxfrags = (val >> 16) & 0xffff;
1881                         if (s->dma_dac2.ossfragshift < 4)
1882                                 s->dma_dac2.ossfragshift = 4;
1883                         if (s->dma_dac2.ossfragshift > 15)
1884                                 s->dma_dac2.ossfragshift = 15;
1885                         if (s->dma_dac2.ossmaxfrags < 4)
1886                                 s->dma_dac2.ossmaxfrags = 4;
1887                 }
1888                 return 0;
1889
1890         case SNDCTL_DSP_SUBDIVIDE:
1891                 if ((file->f_mode & FMODE_READ && s->dma_adc.subdivision) ||
1892                     (file->f_mode & FMODE_WRITE && s->dma_dac2.subdivision))
1893                         return -EINVAL;
1894                 if (get_user(val, p))
1895                         return -EFAULT;
1896                 if (val != 1 && val != 2 && val != 4)
1897                         return -EINVAL;
1898                 if (file->f_mode & FMODE_READ)
1899                         s->dma_adc.subdivision = val;
1900                 if (file->f_mode & FMODE_WRITE)
1901                         s->dma_dac2.subdivision = val;
1902                 return 0;
1903
1904         case SOUND_PCM_READ_RATE:
1905                 return put_user((file->f_mode & FMODE_READ) ? s->adcrate : s->dac2rate, p);
1906
1907         case SOUND_PCM_READ_CHANNELS:
1908                 return put_user((s->sctrl & ((file->f_mode & FMODE_READ) ? SCTRL_R1SMB : SCTRL_P2SMB)) ? 2 : 1, p);
1909
1910         case SOUND_PCM_READ_BITS:
1911                 return put_user((s->sctrl & ((file->f_mode & FMODE_READ) ? SCTRL_R1SEB : SCTRL_P2SEB)) ? 16 : 8, p);
1912
1913         case SOUND_PCM_WRITE_FILTER:
1914         case SNDCTL_DSP_SETSYNCRO:
1915         case SOUND_PCM_READ_FILTER:
1916                 return -EINVAL;
1917
1918         }
1919         return mixdev_ioctl(s->codec, cmd, arg);
1920 }
1921
1922 static int es1371_open(struct inode *inode, struct file *file)
1923 {
1924         int minor = iminor(inode);
1925         DECLARE_WAITQUEUE(wait, current);
1926         unsigned long flags;
1927         struct list_head *list;
1928         struct es1371_state *s;
1929
1930         for (list = devs.next; ; list = list->next) {
1931                 if (list == &devs)
1932                         return -ENODEV;
1933                 s = list_entry(list, struct es1371_state, devs);
1934                 if (!((s->dev_audio ^ minor) & ~0xf))
1935                         break;
1936         }
1937         VALIDATE_STATE(s);
1938         file->private_data = s;
1939         /* wait for device to become free */
1940         down(&s->open_sem);
1941         while (s->open_mode & file->f_mode) {
1942                 if (file->f_flags & O_NONBLOCK) {
1943                         up(&s->open_sem);
1944                         return -EBUSY;
1945                 }
1946                 add_wait_queue(&s->open_wait, &wait);
1947                 __set_current_state(TASK_INTERRUPTIBLE);
1948                 up(&s->open_sem);
1949                 schedule();
1950                 remove_wait_queue(&s->open_wait, &wait);
1951                 set_current_state(TASK_RUNNING);
1952                 if (signal_pending(current))
1953                         return -ERESTARTSYS;
1954                 down(&s->open_sem);
1955         }
1956         if (file->f_mode & FMODE_READ) {
1957                 s->dma_adc.ossfragshift = s->dma_adc.ossmaxfrags = s->dma_adc.subdivision = 0;
1958                 s->dma_adc.enabled = 1;
1959                 set_adc_rate(s, 8000);
1960         }
1961         if (file->f_mode & FMODE_WRITE) {
1962                 s->dma_dac2.ossfragshift = s->dma_dac2.ossmaxfrags = s->dma_dac2.subdivision = 0;
1963                 s->dma_dac2.enabled = 1;
1964                 set_dac2_rate(s, 8000);
1965         }
1966         spin_lock_irqsave(&s->lock, flags);
1967         if (file->f_mode & FMODE_READ) {
1968                 s->sctrl &= ~SCTRL_R1FMT;
1969                 if ((minor & 0xf) == SND_DEV_DSP16)
1970                         s->sctrl |= ES1371_FMT_S16_MONO << SCTRL_SH_R1FMT;
1971                 else
1972                         s->sctrl |= ES1371_FMT_U8_MONO << SCTRL_SH_R1FMT;
1973         }
1974         if (file->f_mode & FMODE_WRITE) {
1975                 s->sctrl &= ~SCTRL_P2FMT;
1976                 if ((minor & 0xf) == SND_DEV_DSP16)
1977                         s->sctrl |= ES1371_FMT_S16_MONO << SCTRL_SH_P2FMT;
1978                 else
1979                         s->sctrl |= ES1371_FMT_U8_MONO << SCTRL_SH_P2FMT;
1980         }
1981         outl(s->sctrl, s->io+ES1371_REG_SERIAL_CONTROL);
1982         spin_unlock_irqrestore(&s->lock, flags);
1983         s->open_mode |= file->f_mode & (FMODE_READ | FMODE_WRITE);
1984         up(&s->open_sem);
1985         init_MUTEX(&s->sem);
1986         return nonseekable_open(inode, file);
1987 }
1988
1989 static int es1371_release(struct inode *inode, struct file *file)
1990 {
1991         struct es1371_state *s = (struct es1371_state *)file->private_data;
1992
1993         VALIDATE_STATE(s);
1994         lock_kernel();
1995         if (file->f_mode & FMODE_WRITE)
1996                 drain_dac2(s, file->f_flags & O_NONBLOCK);
1997         down(&s->open_sem);
1998         if (file->f_mode & FMODE_WRITE) {
1999                 stop_dac2(s);
2000                 dealloc_dmabuf(s, &s->dma_dac2);
2001         }
2002         if (file->f_mode & FMODE_READ) {
2003                 stop_adc(s);
2004                 dealloc_dmabuf(s, &s->dma_adc);
2005         }
2006         s->open_mode &= ~(file->f_mode & (FMODE_READ|FMODE_WRITE));
2007         up(&s->open_sem);
2008         wake_up(&s->open_wait);
2009         unlock_kernel();
2010         return 0;
2011 }
2012
2013 static /*const*/ struct file_operations es1371_audio_fops = {
2014         .owner          = THIS_MODULE,
2015         .llseek         = no_llseek,
2016         .read           = es1371_read,
2017         .write          = es1371_write,
2018         .poll           = es1371_poll,
2019         .ioctl          = es1371_ioctl,
2020         .mmap           = es1371_mmap,
2021         .open           = es1371_open,
2022         .release        = es1371_release,
2023 };
2024
2025 /* --------------------------------------------------------------------- */
2026
2027 static ssize_t es1371_write_dac(struct file *file, const char __user *buffer, size_t count, loff_t *ppos)
2028 {
2029         struct es1371_state *s = (struct es1371_state *)file->private_data;
2030         DECLARE_WAITQUEUE(wait, current);
2031         ssize_t ret = 0;
2032         unsigned long flags;
2033         unsigned swptr;
2034         int cnt;
2035
2036         VALIDATE_STATE(s);
2037         if (s->dma_dac1.mapped)
2038                 return -ENXIO;
2039         if (!s->dma_dac1.ready && (ret = prog_dmabuf_dac1(s)))
2040                 return ret;
2041         if (!access_ok(VERIFY_READ, buffer, count))
2042                 return -EFAULT;
2043         add_wait_queue(&s->dma_dac1.wait, &wait);
2044         while (count > 0) {
2045                 spin_lock_irqsave(&s->lock, flags);
2046                 if (s->dma_dac1.count < 0) {
2047                         s->dma_dac1.count = 0;
2048                         s->dma_dac1.swptr = s->dma_dac1.hwptr;
2049                 }
2050                 swptr = s->dma_dac1.swptr;
2051                 cnt = s->dma_dac1.dmasize-swptr;
2052                 if (s->dma_dac1.count + cnt > s->dma_dac1.dmasize)
2053                         cnt = s->dma_dac1.dmasize - s->dma_dac1.count;
2054                 if (cnt <= 0)
2055                         __set_current_state(TASK_INTERRUPTIBLE);
2056                 spin_unlock_irqrestore(&s->lock, flags);
2057                 if (cnt > count)
2058                         cnt = count;
2059                 if (cnt <= 0) {
2060                         if (s->dma_dac1.enabled)
2061                                 start_dac1(s);
2062                         if (file->f_flags & O_NONBLOCK) {
2063                                 if (!ret)
2064                                         ret = -EAGAIN;
2065                                 break;
2066                         }
2067                         schedule();
2068                         if (signal_pending(current)) {
2069                                 if (!ret)
2070                                         ret = -ERESTARTSYS;
2071                                 break;
2072                         }
2073                         continue;
2074                 }
2075                 if (copy_from_user(s->dma_dac1.rawbuf + swptr, buffer, cnt)) {
2076                         if (!ret)
2077                                 ret = -EFAULT;
2078                         break;
2079                 }
2080                 swptr = (swptr + cnt) % s->dma_dac1.dmasize;
2081                 spin_lock_irqsave(&s->lock, flags);
2082                 s->dma_dac1.swptr = swptr;
2083                 s->dma_dac1.count += cnt;
2084                 s->dma_dac1.endcleared = 0;
2085                 spin_unlock_irqrestore(&s->lock, flags);
2086                 count -= cnt;
2087                 buffer += cnt;
2088                 ret += cnt;
2089                 if (s->dma_dac1.enabled)
2090                         start_dac1(s);
2091         }
2092         remove_wait_queue(&s->dma_dac1.wait, &wait);
2093         set_current_state(TASK_RUNNING);
2094         return ret;
2095 }
2096
2097 /* No kernel lock - we have our own spinlock */
2098 static unsigned int es1371_poll_dac(struct file *file, struct poll_table_struct *wait)
2099 {
2100         struct es1371_state *s = (struct es1371_state *)file->private_data;
2101         unsigned long flags;
2102         unsigned int mask = 0;
2103
2104         VALIDATE_STATE(s);
2105         if (!s->dma_dac1.ready && prog_dmabuf_dac1(s))
2106                 return 0;
2107         poll_wait(file, &s->dma_dac1.wait, wait);
2108         spin_lock_irqsave(&s->lock, flags);
2109         es1371_update_ptr(s);
2110         if (s->dma_dac1.mapped) {
2111                 if (s->dma_dac1.count >= (signed)s->dma_dac1.fragsize)
2112                         mask |= POLLOUT | POLLWRNORM;
2113         } else {
2114                 if ((signed)s->dma_dac1.dmasize >= s->dma_dac1.count + (signed)s->dma_dac1.fragsize)
2115                         mask |= POLLOUT | POLLWRNORM;
2116         }
2117         spin_unlock_irqrestore(&s->lock, flags);
2118         return mask;
2119 }
2120
2121 static int es1371_mmap_dac(struct file *file, struct vm_area_struct *vma)
2122 {
2123         struct es1371_state *s = (struct es1371_state *)file->private_data;
2124         int ret;
2125         unsigned long size;
2126
2127         VALIDATE_STATE(s);
2128         if (!(vma->vm_flags & VM_WRITE))
2129                 return -EINVAL;
2130         lock_kernel();
2131         if ((ret = prog_dmabuf_dac1(s)) != 0)
2132                 goto out;
2133         ret = -EINVAL;
2134         if (vma->vm_pgoff != 0)
2135                 goto out;
2136         size = vma->vm_end - vma->vm_start;
2137         if (size > (PAGE_SIZE << s->dma_dac1.buforder))
2138                 goto out;
2139         ret = -EAGAIN;
2140         if (remap_pfn_range(vma, vma->vm_start,
2141                         virt_to_phys(s->dma_dac1.rawbuf) >> PAGE_SHIFT,
2142                         size, vma->vm_page_prot))
2143                 goto out;
2144         s->dma_dac1.mapped = 1;
2145         ret = 0;
2146 out:
2147         unlock_kernel();
2148         return ret;
2149 }
2150
2151 static int es1371_ioctl_dac(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg)
2152 {
2153         struct es1371_state *s = (struct es1371_state *)file->private_data;
2154         unsigned long flags;
2155         audio_buf_info abinfo;
2156         count_info cinfo;
2157         int count;
2158         int val, ret;
2159         int __user *p = (int __user *)arg;
2160
2161         VALIDATE_STATE(s);
2162         switch (cmd) {
2163         case OSS_GETVERSION:
2164                 return put_user(SOUND_VERSION, p);
2165
2166         case SNDCTL_DSP_SYNC:
2167                 return drain_dac1(s, 0/*file->f_flags & O_NONBLOCK*/);
2168
2169         case SNDCTL_DSP_SETDUPLEX:
2170                 return -EINVAL;
2171
2172         case SNDCTL_DSP_GETCAPS:
2173                 return put_user(DSP_CAP_REALTIME | DSP_CAP_TRIGGER | DSP_CAP_MMAP, p);
2174
2175         case SNDCTL_DSP_RESET:
2176                 stop_dac1(s);
2177                 synchronize_irq(s->irq);
2178                 s->dma_dac1.swptr = s->dma_dac1.hwptr = s->dma_dac1.count = s->dma_dac1.total_bytes = 0;
2179                 return 0;
2180
2181         case SNDCTL_DSP_SPEED:
2182                 if (get_user(val, p))
2183                         return -EFAULT;
2184                 if (val >= 0) {
2185                         stop_dac1(s);
2186                         s->dma_dac1.ready = 0;
2187                         set_dac1_rate(s, val);
2188                 }
2189                 return put_user(s->dac1rate, p);
2190
2191         case SNDCTL_DSP_STEREO:
2192                 if (get_user(val, p))
2193                         return -EFAULT;
2194                 stop_dac1(s);
2195                 s->dma_dac1.ready = 0;
2196                 spin_lock_irqsave(&s->lock, flags);
2197                 if (val)
2198                         s->sctrl |= SCTRL_P1SMB;
2199                 else
2200                         s->sctrl &= ~SCTRL_P1SMB;
2201                 outl(s->sctrl, s->io+ES1371_REG_SERIAL_CONTROL);
2202                 spin_unlock_irqrestore(&s->lock, flags);
2203                 return 0;
2204
2205         case SNDCTL_DSP_CHANNELS:
2206                 if (get_user(val, p))
2207                         return -EFAULT;
2208                 if (val != 0) {
2209                         stop_dac1(s);
2210                         s->dma_dac1.ready = 0;
2211                         spin_lock_irqsave(&s->lock, flags);
2212                         if (val >= 2)
2213                                 s->sctrl |= SCTRL_P1SMB;
2214                         else
2215                                 s->sctrl &= ~SCTRL_P1SMB;
2216                         outl(s->sctrl, s->io+ES1371_REG_SERIAL_CONTROL);
2217                         spin_unlock_irqrestore(&s->lock, flags);
2218                 }
2219                 return put_user((s->sctrl & SCTRL_P1SMB) ? 2 : 1, p);
2220
2221         case SNDCTL_DSP_GETFMTS: /* Returns a mask */
2222                 return put_user(AFMT_S16_LE|AFMT_U8, p);
2223
2224         case SNDCTL_DSP_SETFMT: /* Selects ONE fmt*/
2225                 if (get_user(val, p))
2226                         return -EFAULT;
2227                 if (val != AFMT_QUERY) {
2228                         stop_dac1(s);
2229                         s->dma_dac1.ready = 0;
2230                         spin_lock_irqsave(&s->lock, flags);
2231                         if (val == AFMT_S16_LE)
2232                                 s->sctrl |= SCTRL_P1SEB;
2233                         else
2234                                 s->sctrl &= ~SCTRL_P1SEB;
2235                         outl(s->sctrl, s->io+ES1371_REG_SERIAL_CONTROL);
2236                         spin_unlock_irqrestore(&s->lock, flags);
2237                 }
2238                 return put_user((s->sctrl & SCTRL_P1SEB) ? AFMT_S16_LE : AFMT_U8, p);
2239
2240         case SNDCTL_DSP_POST:
2241                 return 0;
2242
2243         case SNDCTL_DSP_GETTRIGGER:
2244                 return put_user((s->ctrl & CTRL_DAC1_EN) ? PCM_ENABLE_OUTPUT : 0, p);
2245
2246         case SNDCTL_DSP_SETTRIGGER:
2247                 if (get_user(val, p))
2248                         return -EFAULT;
2249                 if (val & PCM_ENABLE_OUTPUT) {
2250                         if (!s->dma_dac1.ready && (ret = prog_dmabuf_dac1(s)))
2251                                 return ret;
2252                         s->dma_dac1.enabled = 1;
2253                         start_dac1(s);
2254                 } else {
2255                         s->dma_dac1.enabled = 0;
2256                         stop_dac1(s);
2257                 }
2258                 return 0;
2259
2260         case SNDCTL_DSP_GETOSPACE:
2261                 if (!s->dma_dac1.ready && (val = prog_dmabuf_dac1(s)) != 0)
2262                         return val;
2263                 spin_lock_irqsave(&s->lock, flags);
2264                 es1371_update_ptr(s);
2265                 abinfo.fragsize = s->dma_dac1.fragsize;
2266                 count = s->dma_dac1.count;
2267                 if (count < 0)
2268                         count = 0;
2269                 abinfo.bytes = s->dma_dac1.dmasize - count;
2270                 abinfo.fragstotal = s->dma_dac1.numfrag;
2271                 abinfo.fragments = abinfo.bytes >> s->dma_dac1.fragshift;
2272                 spin_unlock_irqrestore(&s->lock, flags);
2273                 return copy_to_user((void __user *)arg, &abinfo, sizeof(abinfo)) ? -EFAULT : 0;
2274
2275         case SNDCTL_DSP_NONBLOCK:
2276                 file->f_flags |= O_NONBLOCK;
2277                 return 0;
2278
2279         case SNDCTL_DSP_GETODELAY:
2280                 if (!s->dma_dac1.ready && (val = prog_dmabuf_dac1(s)) != 0)
2281                         return val;
2282                 spin_lock_irqsave(&s->lock, flags);
2283                 es1371_update_ptr(s);
2284                 count = s->dma_dac1.count;
2285                 spin_unlock_irqrestore(&s->lock, flags);
2286                 if (count < 0)
2287                         count = 0;
2288                 return put_user(count, p);
2289
2290         case SNDCTL_DSP_GETOPTR:
2291                 if (!s->dma_dac1.ready && (val = prog_dmabuf_dac1(s)) != 0)
2292                         return val;
2293                 spin_lock_irqsave(&s->lock, flags);
2294                 es1371_update_ptr(s);
2295                 cinfo.bytes = s->dma_dac1.total_bytes;
2296                 count = s->dma_dac1.count;
2297                 if (count < 0)
2298                         count = 0;
2299                 cinfo.blocks = count >> s->dma_dac1.fragshift;
2300                 cinfo.ptr = s->dma_dac1.hwptr;
2301                 if (s->dma_dac1.mapped)
2302                         s->dma_dac1.count &= s->dma_dac1.fragsize-1;
2303                 spin_unlock_irqrestore(&s->lock, flags);
2304                 if (copy_to_user((void __user *)arg, &cinfo, sizeof(cinfo)))
2305                         return -EFAULT;
2306                 return 0;
2307
2308         case SNDCTL_DSP_GETBLKSIZE:
2309                 if ((val = prog_dmabuf_dac1(s)))
2310                         return val;
2311                 return put_user(s->dma_dac1.fragsize, p);
2312
2313         case SNDCTL_DSP_SETFRAGMENT:
2314                 if (get_user(val, p))
2315                         return -EFAULT;
2316                 s->dma_dac1.ossfragshift = val & 0xffff;
2317                 s->dma_dac1.ossmaxfrags = (val >> 16) & 0xffff;
2318                 if (s->dma_dac1.ossfragshift < 4)
2319                         s->dma_dac1.ossfragshift = 4;
2320                 if (s->dma_dac1.ossfragshift > 15)
2321                         s->dma_dac1.ossfragshift = 15;
2322                 if (s->dma_dac1.ossmaxfrags < 4)
2323                         s->dma_dac1.ossmaxfrags = 4;
2324                 return 0;
2325
2326         case SNDCTL_DSP_SUBDIVIDE:
2327                 if (s->dma_dac1.subdivision)
2328                         return -EINVAL;
2329                 if (get_user(val, p))
2330                         return -EFAULT;
2331                 if (val != 1 && val != 2 && val != 4)
2332                         return -EINVAL;
2333                 s->dma_dac1.subdivision = val;
2334                 return 0;
2335
2336         case SOUND_PCM_READ_RATE:
2337                 return put_user(s->dac1rate, p);
2338
2339         case SOUND_PCM_READ_CHANNELS:
2340                 return put_user((s->sctrl & SCTRL_P1SMB) ? 2 : 1, p);
2341
2342         case SOUND_PCM_READ_BITS:
2343                 return put_user((s->sctrl & SCTRL_P1SEB) ? 16 : 8, p);
2344
2345         case SOUND_PCM_WRITE_FILTER:
2346         case SNDCTL_DSP_SETSYNCRO:
2347         case SOUND_PCM_READ_FILTER:
2348                 return -EINVAL;
2349
2350         }
2351         return mixdev_ioctl(s->codec, cmd, arg);
2352 }
2353
2354 static int es1371_open_dac(struct inode *inode, struct file *file)
2355 {
2356         int minor = iminor(inode);
2357         DECLARE_WAITQUEUE(wait, current);
2358         unsigned long flags;
2359         struct list_head *list;
2360         struct es1371_state *s;
2361
2362         for (list = devs.next; ; list = list->next) {
2363                 if (list == &devs)
2364                         return -ENODEV;
2365                 s = list_entry(list, struct es1371_state, devs);
2366                 if (!((s->dev_dac ^ minor) & ~0xf))
2367                         break;
2368         }
2369         VALIDATE_STATE(s);
2370         /* we allow opening with O_RDWR, most programs do it although they will only write */
2371 #if 0
2372         if (file->f_mode & FMODE_READ)
2373                 return -EPERM;
2374 #endif
2375         if (!(file->f_mode & FMODE_WRITE))
2376                 return -EINVAL;
2377         file->private_data = s;
2378         /* wait for device to become free */
2379         down(&s->open_sem);
2380         while (s->open_mode & FMODE_DAC) {
2381                 if (file->f_flags & O_NONBLOCK) {
2382                         up(&s->open_sem);
2383                         return -EBUSY;
2384                 }
2385                 add_wait_queue(&s->open_wait, &wait);
2386                 __set_current_state(TASK_INTERRUPTIBLE);
2387                 up(&s->open_sem);
2388                 schedule();
2389                 remove_wait_queue(&s->open_wait, &wait);
2390                 set_current_state(TASK_RUNNING);
2391                 if (signal_pending(current))
2392                         return -ERESTARTSYS;
2393                 down(&s->open_sem);
2394         }
2395         s->dma_dac1.ossfragshift = s->dma_dac1.ossmaxfrags = s->dma_dac1.subdivision = 0;
2396         s->dma_dac1.enabled = 1;
2397         set_dac1_rate(s, 8000);
2398         spin_lock_irqsave(&s->lock, flags);
2399         s->sctrl &= ~SCTRL_P1FMT;
2400         if ((minor & 0xf) == SND_DEV_DSP16)
2401                 s->sctrl |= ES1371_FMT_S16_MONO << SCTRL_SH_P1FMT;
2402         else
2403                 s->sctrl |= ES1371_FMT_U8_MONO << SCTRL_SH_P1FMT;
2404         outl(s->sctrl, s->io+ES1371_REG_SERIAL_CONTROL);
2405         spin_unlock_irqrestore(&s->lock, flags);
2406         s->open_mode |= FMODE_DAC;
2407         up(&s->open_sem);
2408         return nonseekable_open(inode, file);
2409 }
2410
2411 static int es1371_release_dac(struct inode *inode, struct file *file)
2412 {
2413         struct es1371_state *s = (struct es1371_state *)file->private_data;
2414
2415         VALIDATE_STATE(s);
2416         lock_kernel();
2417         drain_dac1(s, file->f_flags & O_NONBLOCK);
2418         down(&s->open_sem);
2419         stop_dac1(s);
2420         dealloc_dmabuf(s, &s->dma_dac1);
2421         s->open_mode &= ~FMODE_DAC;
2422         up(&s->open_sem);
2423         wake_up(&s->open_wait);
2424         unlock_kernel();
2425         return 0;
2426 }
2427
2428 static /*const*/ struct file_operations es1371_dac_fops = {
2429         .owner          = THIS_MODULE,
2430         .llseek         = no_llseek,
2431         .write          = es1371_write_dac,
2432         .poll           = es1371_poll_dac,
2433         .ioctl          = es1371_ioctl_dac,
2434         .mmap           = es1371_mmap_dac,
2435         .open           = es1371_open_dac,
2436         .release        = es1371_release_dac,
2437 };
2438
2439 /* --------------------------------------------------------------------- */
2440
2441 static ssize_t es1371_midi_read(struct file *file, char __user *buffer, size_t count, loff_t *ppos)
2442 {
2443         struct es1371_state *s = (struct es1371_state *)file->private_data;
2444         DECLARE_WAITQUEUE(wait, current);
2445         ssize_t ret;
2446         unsigned long flags;
2447         unsigned ptr;
2448         int cnt;
2449
2450         VALIDATE_STATE(s);
2451         if (!access_ok(VERIFY_WRITE, buffer, count))
2452                 return -EFAULT;
2453         if (count == 0)
2454                 return 0;
2455         ret = 0;
2456         add_wait_queue(&s->midi.iwait, &wait);
2457         while (count > 0) {
2458                 spin_lock_irqsave(&s->lock, flags);
2459                 ptr = s->midi.ird;
2460                 cnt = MIDIINBUF - ptr;
2461                 if (s->midi.icnt < cnt)
2462                         cnt = s->midi.icnt;
2463                 if (cnt <= 0)
2464                         __set_current_state(TASK_INTERRUPTIBLE);
2465                 spin_unlock_irqrestore(&s->lock, flags);
2466                 if (cnt > count)
2467                         cnt = count;
2468                 if (cnt <= 0) {
2469                         if (file->f_flags & O_NONBLOCK) {
2470                                 if (!ret)
2471                                         ret = -EAGAIN;
2472                                 break;
2473                         }
2474                         schedule();
2475                         if (signal_pending(current)) {
2476                                 if (!ret)
2477                                         ret = -ERESTARTSYS;
2478                                 break;
2479                         }
2480                         continue;
2481                 }
2482                 if (copy_to_user(buffer, s->midi.ibuf + ptr, cnt)) {
2483                         if (!ret)
2484                                 ret = -EFAULT;
2485                         break;
2486                 }
2487                 ptr = (ptr + cnt) % MIDIINBUF;
2488                 spin_lock_irqsave(&s->lock, flags);
2489                 s->midi.ird = ptr;
2490                 s->midi.icnt -= cnt;
2491                 spin_unlock_irqrestore(&s->lock, flags);
2492                 count -= cnt;
2493                 buffer += cnt;
2494                 ret += cnt;
2495                 break;
2496         }
2497         __set_current_state(TASK_RUNNING);
2498         remove_wait_queue(&s->midi.iwait, &wait);
2499         return ret;
2500 }
2501
2502 static ssize_t es1371_midi_write(struct file *file, const char __user *buffer, size_t count, loff_t *ppos)
2503 {
2504         struct es1371_state *s = (struct es1371_state *)file->private_data;
2505         DECLARE_WAITQUEUE(wait, current);
2506         ssize_t ret;
2507         unsigned long flags;
2508         unsigned ptr;
2509         int cnt;
2510
2511         VALIDATE_STATE(s);
2512         if (!access_ok(VERIFY_READ, buffer, count))
2513                 return -EFAULT;
2514         if (count == 0)
2515                 return 0;
2516         ret = 0;
2517         add_wait_queue(&s->midi.owait, &wait);
2518         while (count > 0) {
2519                 spin_lock_irqsave(&s->lock, flags);
2520                 ptr = s->midi.owr;
2521                 cnt = MIDIOUTBUF - ptr;
2522                 if (s->midi.ocnt + cnt > MIDIOUTBUF)
2523                         cnt = MIDIOUTBUF - s->midi.ocnt;
2524                 if (cnt <= 0) {
2525                         __set_current_state(TASK_INTERRUPTIBLE);
2526                         es1371_handle_midi(s);
2527                 }
2528                 spin_unlock_irqrestore(&s->lock, flags);
2529                 if (cnt > count)
2530                         cnt = count;
2531                 if (cnt <= 0) {
2532                         if (file->f_flags & O_NONBLOCK) {
2533                                 if (!ret)
2534                                         ret = -EAGAIN;
2535                                 break;
2536                         }
2537                         schedule();
2538                         if (signal_pending(current)) {
2539                                 if (!ret)
2540                                         ret = -ERESTARTSYS;
2541                                 break;
2542                         }
2543                         continue;
2544                 }
2545                 if (copy_from_user(s->midi.obuf + ptr, buffer, cnt)) {
2546                         if (!ret)
2547                                 ret = -EFAULT;
2548                         break;
2549                 }
2550                 ptr = (ptr + cnt) % MIDIOUTBUF;
2551                 spin_lock_irqsave(&s->lock, flags);
2552                 s->midi.owr = ptr;
2553                 s->midi.ocnt += cnt;
2554                 spin_unlock_irqrestore(&s->lock, flags);
2555                 count -= cnt;
2556                 buffer += cnt;
2557                 ret += cnt;
2558                 spin_lock_irqsave(&s->lock, flags);
2559                 es1371_handle_midi(s);
2560                 spin_unlock_irqrestore(&s->lock, flags);
2561         }
2562         __set_current_state(TASK_RUNNING);
2563         remove_wait_queue(&s->midi.owait, &wait);
2564         return ret;
2565 }
2566
2567 /* No kernel lock - we have our own spinlock */
2568 static unsigned int es1371_midi_poll(struct file *file, struct poll_table_struct *wait)
2569 {
2570         struct es1371_state *s = (struct es1371_state *)file->private_data;
2571         unsigned long flags;
2572         unsigned int mask = 0;
2573
2574         VALIDATE_STATE(s);
2575         if (file->f_mode & FMODE_WRITE)
2576                 poll_wait(file, &s->midi.owait, wait);
2577         if (file->f_mode & FMODE_READ)
2578                 poll_wait(file, &s->midi.iwait, wait);
2579         spin_lock_irqsave(&s->lock, flags);
2580         if (file->f_mode & FMODE_READ) {
2581                 if (s->midi.icnt > 0)
2582                         mask |= POLLIN | POLLRDNORM;
2583         }
2584         if (file->f_mode & FMODE_WRITE) {
2585                 if (s->midi.ocnt < MIDIOUTBUF)
2586                         mask |= POLLOUT | POLLWRNORM;
2587         }
2588         spin_unlock_irqrestore(&s->lock, flags);
2589         return mask;
2590 }
2591
2592 static int es1371_midi_open(struct inode *inode, struct file *file)
2593 {
2594         int minor = iminor(inode);
2595         DECLARE_WAITQUEUE(wait, current);
2596         unsigned long flags;
2597         struct list_head *list;
2598         struct es1371_state *s;
2599
2600         for (list = devs.next; ; list = list->next) {
2601                 if (list == &devs)
2602                         return -ENODEV;
2603                 s = list_entry(list, struct es1371_state, devs);
2604                 if (s->dev_midi == minor)
2605                         break;
2606         }
2607         VALIDATE_STATE(s);
2608         file->private_data = s;
2609         /* wait for device to become free */
2610         down(&s->open_sem);
2611         while (s->open_mode & (file->f_mode << FMODE_MIDI_SHIFT)) {
2612                 if (file->f_flags & O_NONBLOCK) {
2613                         up(&s->open_sem);
2614                         return -EBUSY;
2615                 }
2616                 add_wait_queue(&s->open_wait, &wait);
2617                 __set_current_state(TASK_INTERRUPTIBLE);
2618                 up(&s->open_sem);
2619                 schedule();
2620                 remove_wait_queue(&s->open_wait, &wait);
2621                 set_current_state(TASK_RUNNING);
2622                 if (signal_pending(current))
2623                         return -ERESTARTSYS;
2624                 down(&s->open_sem);
2625         }
2626         spin_lock_irqsave(&s->lock, flags);
2627         if (!(s->open_mode & (FMODE_MIDI_READ | FMODE_MIDI_WRITE))) {
2628                 s->midi.ird = s->midi.iwr = s->midi.icnt = 0;
2629                 s->midi.ord = s->midi.owr = s->midi.ocnt = 0;
2630                 outb(UCTRL_CNTRL_SWR, s->io+ES1371_REG_UART_CONTROL);
2631                 outb(0, s->io+ES1371_REG_UART_CONTROL);
2632                 outb(0, s->io+ES1371_REG_UART_TEST);
2633         }
2634         if (file->f_mode & FMODE_READ) {
2635                 s->midi.ird = s->midi.iwr = s->midi.icnt = 0;
2636         }
2637         if (file->f_mode & FMODE_WRITE) {
2638                 s->midi.ord = s->midi.owr = s->midi.ocnt = 0;
2639         }
2640         s->ctrl |= CTRL_UART_EN;
2641         outl(s->ctrl, s->io+ES1371_REG_CONTROL);
2642         es1371_handle_midi(s);
2643         spin_unlock_irqrestore(&s->lock, flags);
2644         s->open_mode |= (file->f_mode << FMODE_MIDI_SHIFT) & (FMODE_MIDI_READ | FMODE_MIDI_WRITE);
2645         up(&s->open_sem);
2646         return nonseekable_open(inode, file);
2647 }
2648
2649 static int es1371_midi_release(struct inode *inode, struct file *file)
2650 {
2651         struct es1371_state *s = (struct es1371_state *)file->private_data;
2652         DECLARE_WAITQUEUE(wait, current);
2653         unsigned long flags;
2654         unsigned count, tmo;
2655
2656         VALIDATE_STATE(s);
2657         lock_kernel();
2658         if (file->f_mode & FMODE_WRITE) {
2659                 add_wait_queue(&s->midi.owait, &wait);
2660                 for (;;) {
2661                         __set_current_state(TASK_INTERRUPTIBLE);
2662                         spin_lock_irqsave(&s->lock, flags);
2663                         count = s->midi.ocnt;
2664                         spin_unlock_irqrestore(&s->lock, flags);
2665                         if (count <= 0)
2666                                 break;
2667                         if (signal_pending(current))
2668                                 break;
2669                         if (file->f_flags & O_NONBLOCK)
2670                                 break;
2671                         tmo = (count * HZ) / 3100;
2672                         if (!schedule_timeout(tmo ? : 1) && tmo)
2673                                 printk(KERN_DEBUG PFX "midi timed out??\n");
2674                 }
2675                 remove_wait_queue(&s->midi.owait, &wait);
2676                 set_current_state(TASK_RUNNING);
2677         }
2678         down(&s->open_sem);
2679         s->open_mode &= ~((file->f_mode << FMODE_MIDI_SHIFT) & (FMODE_MIDI_READ|FMODE_MIDI_WRITE));
2680         spin_lock_irqsave(&s->lock, flags);
2681         if (!(s->open_mode & (FMODE_MIDI_READ | FMODE_MIDI_WRITE))) {
2682                 s->ctrl &= ~CTRL_UART_EN;
2683                 outl(s->ctrl, s->io+ES1371_REG_CONTROL);
2684         }
2685         spin_unlock_irqrestore(&s->lock, flags);
2686         up(&s->open_sem);
2687         wake_up(&s->open_wait);
2688         unlock_kernel();
2689         return 0;
2690 }
2691
2692 static /*const*/ struct file_operations es1371_midi_fops = {
2693         .owner          = THIS_MODULE,
2694         .llseek         = no_llseek,
2695         .read           = es1371_midi_read,
2696         .write          = es1371_midi_write,
2697         .poll           = es1371_midi_poll,
2698         .open           = es1371_midi_open,
2699         .release        = es1371_midi_release,
2700 };
2701
2702 /* --------------------------------------------------------------------- */
2703
2704 /*
2705  * for debugging purposes, we'll create a proc device that dumps the
2706  * CODEC chipstate
2707  */
2708
2709 #ifdef ES1371_DEBUG
2710 static int proc_es1371_dump (char *buf, char **start, off_t fpos, int length, int *eof, void *data)
2711 {
2712         struct es1371_state *s;
2713         int cnt, len = 0;
2714
2715         if (list_empty(&devs))
2716                 return 0;
2717         s = list_entry(devs.next, struct es1371_state, devs);
2718         /* print out header */
2719         len += sprintf(buf + len, "\t\tCreative ES137x Debug Dump-o-matic\n");
2720
2721         /* print out CODEC state */
2722         len += sprintf (buf + len, "AC97 CODEC state\n");
2723         for (cnt=0; cnt <= 0x7e; cnt = cnt +2)
2724                 len+= sprintf (buf + len, "reg:0x%02x  val:0x%04x\n", cnt, rdcodec(s->codec, cnt));
2725
2726         if (fpos >=len){
2727                 *start = buf;
2728                 *eof =1;
2729                 return 0;
2730         }
2731         *start = buf + fpos;
2732         if ((len -= fpos) > length)
2733                 return length;
2734         *eof =1;
2735         return len;
2736
2737 }
2738 #endif /* ES1371_DEBUG */
2739
2740 /* --------------------------------------------------------------------- */
2741
2742 /* maximum number of devices; only used for command line params */
2743 #define NR_DEVICE 5
2744
2745 static int spdif[NR_DEVICE];
2746 static int nomix[NR_DEVICE];
2747 static int amplifier[NR_DEVICE];
2748
2749 static unsigned int devindex;
2750
2751 module_param_array(spdif, bool, NULL, 0);
2752 MODULE_PARM_DESC(spdif, "if 1 the output is in S/PDIF digital mode");
2753 module_param_array(nomix, bool, NULL, 0);
2754 MODULE_PARM_DESC(nomix, "if 1 no analog audio is mixed to the digital output");
2755 module_param_array(amplifier, bool, NULL, 0);
2756 MODULE_PARM_DESC(amplifier, "Set to 1 if the machine needs the amp control enabling (many laptops)");
2757
2758 MODULE_AUTHOR("Thomas M. Sailer, sailer@ife.ee.ethz.ch, hb9jnx@hb9w.che.eu");
2759 MODULE_DESCRIPTION("ES1371 AudioPCI97 Driver");
2760 MODULE_LICENSE("GPL");
2761
2762
2763 /* --------------------------------------------------------------------- */
2764
2765 static struct initvol {
2766         int mixch;
2767         int vol;
2768 } initvol[] __devinitdata = {
2769         { SOUND_MIXER_WRITE_LINE, 0x4040 },
2770         { SOUND_MIXER_WRITE_CD, 0x4040 },
2771         { MIXER_WRITE(SOUND_MIXER_VIDEO), 0x4040 },
2772         { SOUND_MIXER_WRITE_LINE1, 0x4040 },
2773         { SOUND_MIXER_WRITE_PCM, 0x4040 },
2774         { SOUND_MIXER_WRITE_VOLUME, 0x4040 },
2775         { MIXER_WRITE(SOUND_MIXER_PHONEOUT), 0x4040 },
2776         { SOUND_MIXER_WRITE_OGAIN, 0x4040 },
2777         { MIXER_WRITE(SOUND_MIXER_PHONEIN), 0x4040 },
2778         { SOUND_MIXER_WRITE_SPEAKER, 0x4040 },
2779         { SOUND_MIXER_WRITE_MIC, 0x4040 },
2780         { SOUND_MIXER_WRITE_RECLEV, 0x4040 },
2781         { SOUND_MIXER_WRITE_IGAIN, 0x4040 }
2782 };
2783
2784 static struct
2785 {
2786         short svid, sdid;
2787 } amplifier_needed[] =
2788 {
2789         { 0x107B, 0x2150 },             /* Gateway Solo 2150 */
2790         { 0x13BD, 0x100C },             /* Mebius PC-MJ100V */
2791         { 0x1102, 0x5938 },             /* Targa Xtender 300 */
2792         { 0x1102, 0x8938 },             /* IPC notebook */
2793         { PCI_ANY_ID, PCI_ANY_ID }
2794 };
2795
2796 #ifdef SUPPORT_JOYSTICK
2797
2798 static int __devinit es1371_register_gameport(struct es1371_state *s)
2799 {
2800         struct gameport *gp;
2801         int gpio;
2802
2803         for (gpio = 0x218; gpio >= 0x200; gpio -= 0x08)
2804                 if (request_region(gpio, JOY_EXTENT, "es1371"))
2805                         break;
2806
2807         if (gpio < 0x200) {
2808                 printk(KERN_ERR PFX "no free joystick address found\n");
2809                 return -EBUSY;
2810         }
2811
2812         s->gameport = gp = gameport_allocate_port();
2813         if (!gp) {
2814                 printk(KERN_ERR PFX "can not allocate memory for gameport\n");
2815                 release_region(gpio, JOY_EXTENT);
2816                 return -ENOMEM;
2817         }
2818
2819         gameport_set_name(gp, "ESS1371 Gameport");
2820         gameport_set_phys(gp, "isa%04x/gameport0", gpio);
2821         gp->dev.parent = &s->dev->dev;
2822         gp->io = gpio;
2823
2824         s->ctrl |= CTRL_JYSTK_EN | (((gpio >> 3) & CTRL_JOY_MASK) << CTRL_JOY_SHIFT);
2825         outl(s->ctrl, s->io + ES1371_REG_CONTROL);
2826
2827         gameport_register_port(gp);
2828
2829         return 0;
2830 }
2831
2832 static inline void es1371_unregister_gameport(struct es1371_state *s)
2833 {
2834         if (s->gameport) {
2835                 int gpio = s->gameport->io;
2836                 gameport_unregister_port(s->gameport);
2837                 release_region(gpio, JOY_EXTENT);
2838
2839         }
2840 }
2841
2842 #else
2843 static inline int es1371_register_gameport(struct es1371_state *s) { return -ENOSYS; }
2844 static inline void es1371_unregister_gameport(struct es1371_state *s) { }
2845 #endif /* SUPPORT_JOYSTICK */
2846
2847
2848 static int __devinit es1371_probe(struct pci_dev *pcidev, const struct pci_device_id *pciid)
2849 {
2850         struct es1371_state *s;
2851         mm_segment_t fs;
2852         int i, val, res = -1;
2853         int idx;
2854         unsigned long tmo;
2855         signed long tmo2;
2856         unsigned int cssr;
2857
2858         if ((res=pci_enable_device(pcidev)))
2859                 return res;
2860
2861         if (!(pci_resource_flags(pcidev, 0) & IORESOURCE_IO))
2862                 return -ENODEV;
2863         if (pcidev->irq == 0)
2864                 return -ENODEV;
2865         i = pci_set_dma_mask(pcidev, 0xffffffff);
2866         if (i) {
2867                 printk(KERN_WARNING "es1371: architecture does not support 32bit PCI busmaster DMA\n");
2868                 return i;
2869         }
2870         if (!(s = kmalloc(sizeof(struct es1371_state), GFP_KERNEL))) {
2871                 printk(KERN_WARNING PFX "out of memory\n");
2872                 return -ENOMEM;
2873         }
2874         memset(s, 0, sizeof(struct es1371_state));
2875
2876         s->codec = ac97_alloc_codec();
2877         if(s->codec == NULL)
2878                 goto err_codec;
2879
2880         init_waitqueue_head(&s->dma_adc.wait);
2881         init_waitqueue_head(&s->dma_dac1.wait);
2882         init_waitqueue_head(&s->dma_dac2.wait);
2883         init_waitqueue_head(&s->open_wait);
2884         init_waitqueue_head(&s->midi.iwait);
2885         init_waitqueue_head(&s->midi.owait);
2886         init_MUTEX(&s->open_sem);
2887         spin_lock_init(&s->lock);
2888         s->magic = ES1371_MAGIC;
2889         s->dev = pcidev;
2890         s->io = pci_resource_start(pcidev, 0);
2891         s->irq = pcidev->irq;
2892         s->vendor = pcidev->vendor;
2893         s->device = pcidev->device;
2894         pci_read_config_byte(pcidev, PCI_REVISION_ID, &s->rev);
2895         s->codec->private_data = s;
2896         s->codec->id = 0;
2897         s->codec->codec_read = rdcodec;
2898         s->codec->codec_write = wrcodec;
2899         printk(KERN_INFO PFX "found chip, vendor id 0x%04x device id 0x%04x revision 0x%02x\n",
2900                s->vendor, s->device, s->rev);
2901         if (!request_region(s->io, ES1371_EXTENT, "es1371")) {
2902                 printk(KERN_ERR PFX "io ports %#lx-%#lx in use\n", s->io, s->io+ES1371_EXTENT-1);
2903                 res = -EBUSY;
2904                 goto err_region;
2905         }
2906         if ((res=request_irq(s->irq, es1371_interrupt, SA_SHIRQ, "es1371",s))) {
2907                 printk(KERN_ERR PFX "irq %u in use\n", s->irq);
2908                 goto err_irq;
2909         }
2910         printk(KERN_INFO PFX "found es1371 rev %d at io %#lx irq %u\n",
2911                s->rev, s->io, s->irq);
2912         /* register devices */
2913         if ((res=(s->dev_audio = register_sound_dsp(&es1371_audio_fops,-1)))<0)
2914                 goto err_dev1;
2915         if ((res=(s->codec->dev_mixer = register_sound_mixer(&es1371_mixer_fops, -1))) < 0)
2916                 goto err_dev2;
2917         if ((res=(s->dev_dac = register_sound_dsp(&es1371_dac_fops, -1))) < 0)
2918                 goto err_dev3;
2919         if ((res=(s->dev_midi = register_sound_midi(&es1371_midi_fops, -1)))<0 )
2920                 goto err_dev4;
2921 #ifdef ES1371_DEBUG
2922         /* initialize the debug proc device */
2923         s->ps = create_proc_read_entry("es1371",0,NULL,proc_es1371_dump,NULL);
2924 #endif /* ES1371_DEBUG */
2925
2926         /* initialize codec registers */
2927         s->ctrl = 0;
2928
2929         /* Check amplifier requirements */
2930
2931         if (amplifier[devindex])
2932                 s->ctrl |= CTRL_GPIO_OUT0;
2933         else for(idx = 0; amplifier_needed[idx].svid != PCI_ANY_ID; idx++)
2934         {
2935                 if(pcidev->subsystem_vendor == amplifier_needed[idx].svid &&
2936                    pcidev->subsystem_device == amplifier_needed[idx].sdid)
2937                 {
2938                         s->ctrl |= CTRL_GPIO_OUT0;   /* turn internal amplifier on */
2939                         printk(KERN_INFO PFX "Enabling internal amplifier.\n");
2940                 }
2941         }
2942
2943         s->sctrl = 0;
2944         cssr = 0;
2945         s->spdif_volume = -1;
2946         /* check to see if s/pdif mode is being requested */
2947         if (spdif[devindex]) {
2948                 if (s->rev >= 4) {
2949                         printk(KERN_INFO PFX "enabling S/PDIF output\n");
2950                         s->spdif_volume = 0;
2951                         cssr |= STAT_EN_SPDIF;
2952                         s->ctrl |= CTRL_SPDIFEN_B;
2953                         if (nomix[devindex]) /* don't mix analog inputs to s/pdif output */
2954                                 s->ctrl |= CTRL_RECEN_B;
2955                 } else {
2956                         printk(KERN_ERR PFX "revision %d does not support S/PDIF\n", s->rev);
2957                 }
2958         }
2959         /* initialize the chips */
2960         outl(s->ctrl, s->io+ES1371_REG_CONTROL);
2961         outl(s->sctrl, s->io+ES1371_REG_SERIAL_CONTROL);
2962         outl(LEGACY_JFAST, s->io+ES1371_REG_LEGACY);
2963         pci_set_master(pcidev);  /* enable bus mastering */
2964         /* if we are a 5880 turn on the AC97 */
2965         if (s->vendor == PCI_VENDOR_ID_ENSONIQ &&
2966             ((s->device == PCI_DEVICE_ID_ENSONIQ_CT5880 && s->rev >= CT5880REV_CT5880_C) ||
2967              (s->device == PCI_DEVICE_ID_ENSONIQ_ES1371 && s->rev == ES1371REV_CT5880_A) ||
2968              (s->device == PCI_DEVICE_ID_ENSONIQ_ES1371 && s->rev == ES1371REV_ES1373_8))) {
2969                 cssr |= CSTAT_5880_AC97_RST;
2970                 outl(cssr, s->io+ES1371_REG_STATUS);
2971                 /* need to delay around 20ms(bleech) to give
2972                    some CODECs enough time to wakeup */
2973                 tmo = jiffies + (HZ / 50) + 1;
2974                 for (;;) {
2975                         tmo2 = tmo - jiffies;
2976                         if (tmo2 <= 0)
2977                                 break;
2978                         schedule_timeout(tmo2);
2979                 }
2980         }
2981         /* AC97 warm reset to start the bitclk */
2982         outl(s->ctrl | CTRL_SYNCRES, s->io+ES1371_REG_CONTROL);
2983         udelay(2);
2984         outl(s->ctrl, s->io+ES1371_REG_CONTROL);
2985         /* init the sample rate converter */
2986         src_init(s);
2987         /* codec init */
2988         if (!ac97_probe_codec(s->codec)) {
2989                 res = -ENODEV;
2990                 goto err_gp;
2991         }
2992         /* set default values */
2993
2994         fs = get_fs();
2995         set_fs(KERNEL_DS);
2996         val = SOUND_MASK_LINE;
2997         mixdev_ioctl(s->codec, SOUND_MIXER_WRITE_RECSRC, (unsigned long)&val);
2998         for (i = 0; i < sizeof(initvol)/sizeof(initvol[0]); i++) {
2999                 val = initvol[i].vol;
3000                 mixdev_ioctl(s->codec, initvol[i].mixch, (unsigned long)&val);
3001         }
3002         /* mute master and PCM when in S/PDIF mode */
3003         if (s->spdif_volume != -1) {
3004                 val = 0x0000;
3005                 s->codec->mixer_ioctl(s->codec, SOUND_MIXER_WRITE_VOLUME, (unsigned long)&val);
3006                 s->codec->mixer_ioctl(s->codec, SOUND_MIXER_WRITE_PCM, (unsigned long)&val);
3007         }
3008         set_fs(fs);
3009         /* turn on S/PDIF output driver if requested */
3010         outl(cssr, s->io+ES1371_REG_STATUS);
3011
3012         es1371_register_gameport(s);
3013
3014         /* store it in the driver field */
3015         pci_set_drvdata(pcidev, s);
3016         /* put it into driver list */
3017         list_add_tail(&s->devs, &devs);
3018         /* increment devindex */
3019         if (devindex < NR_DEVICE-1)
3020                 devindex++;
3021         return 0;
3022
3023  err_gp:
3024 #ifdef ES1371_DEBUG
3025         if (s->ps)
3026                 remove_proc_entry("es1371", NULL);
3027 #endif
3028         unregister_sound_midi(s->dev_midi);
3029  err_dev4:
3030         unregister_sound_dsp(s->dev_dac);
3031  err_dev3:
3032         unregister_sound_mixer(s->codec->dev_mixer);
3033  err_dev2:
3034         unregister_sound_dsp(s->dev_audio);
3035  err_dev1:
3036         printk(KERN_ERR PFX "cannot register misc device\n");
3037         free_irq(s->irq, s);
3038  err_irq:
3039         release_region(s->io, ES1371_EXTENT);
3040  err_region:
3041  err_codec:
3042         ac97_release_codec(s->codec);
3043         kfree(s);
3044         return res;
3045 }
3046
3047 static void __devexit es1371_remove(struct pci_dev *dev)
3048 {
3049         struct es1371_state *s = pci_get_drvdata(dev);
3050
3051         if (!s)
3052                 return;
3053         list_del(&s->devs);
3054 #ifdef ES1371_DEBUG
3055         if (s->ps)
3056                 remove_proc_entry("es1371", NULL);
3057 #endif /* ES1371_DEBUG */
3058         outl(0, s->io+ES1371_REG_CONTROL); /* switch everything off */
3059         outl(0, s->io+ES1371_REG_SERIAL_CONTROL); /* clear serial interrupts */
3060         synchronize_irq(s->irq);
3061         free_irq(s->irq, s);
3062         es1371_unregister_gameport(s);
3063         release_region(s->io, ES1371_EXTENT);
3064         unregister_sound_dsp(s->dev_audio);
3065         unregister_sound_mixer(s->codec->dev_mixer);
3066         unregister_sound_dsp(s->dev_dac);
3067         unregister_sound_midi(s->dev_midi);
3068         ac97_release_codec(s->codec);
3069         kfree(s);
3070         pci_set_drvdata(dev, NULL);
3071 }
3072
3073 static struct pci_device_id id_table[] = {
3074         { PCI_VENDOR_ID_ENSONIQ, PCI_DEVICE_ID_ENSONIQ_ES1371, PCI_ANY_ID, PCI_ANY_ID, 0, 0 },
3075         { PCI_VENDOR_ID_ENSONIQ, PCI_DEVICE_ID_ENSONIQ_CT5880, PCI_ANY_ID, PCI_ANY_ID, 0, 0 },
3076         { PCI_VENDOR_ID_ECTIVA, PCI_DEVICE_ID_ECTIVA_EV1938, PCI_ANY_ID, PCI_ANY_ID, 0, 0 },
3077         { 0, }
3078 };
3079
3080 MODULE_DEVICE_TABLE(pci, id_table);
3081
3082 static struct pci_driver es1371_driver = {
3083         .name           = "es1371",
3084         .id_table       = id_table,
3085         .probe          = es1371_probe,
3086         .remove         = __devexit_p(es1371_remove),
3087 };
3088
3089 static int __init init_es1371(void)
3090 {
3091         printk(KERN_INFO PFX "version v0.32 time " __TIME__ " " __DATE__ "\n");
3092         return pci_module_init(&es1371_driver);
3093 }
3094
3095 static void __exit cleanup_es1371(void)
3096 {
3097         printk(KERN_INFO PFX "unloading\n");
3098         pci_unregister_driver(&es1371_driver);
3099 }
3100
3101 module_init(init_es1371);
3102 module_exit(cleanup_es1371);
3103
3104 /* --------------------------------------------------------------------- */
3105
3106 #ifndef MODULE
3107
3108 /* format is: es1371=[spdif,[nomix,[amplifier]]] */
3109
3110 static int __init es1371_setup(char *str)
3111 {
3112         static unsigned __initdata nr_dev = 0;
3113
3114         if (nr_dev >= NR_DEVICE)
3115                 return 0;
3116
3117         (void)
3118         ((get_option(&str, &spdif[nr_dev]) == 2)
3119          && (get_option(&str, &nomix[nr_dev]) == 2)
3120          && (get_option(&str, &amplifier[nr_dev])));
3121
3122         nr_dev++;
3123         return 1;
3124 }
3125
3126 __setup("es1371=", es1371_setup);
3127
3128 #endif /* MODULE */