1 #ifndef __SPI_BITBANG_H
2 #define __SPI_BITBANG_H
5 * Mix this utility code with some glue code to get one of several types of
6 * simple SPI master driver. Two do polled word-at-a-time I/O:
8 * - GPIO/parport bitbangers. Provide chipselect() and txrx_word[](),
9 * expanding the per-word routines from the inline templates below.
11 * - Drivers for controllers resembling bare shift registers. Provide
12 * chipselect() and txrx_word[](), with custom setup()/cleanup() methods
13 * that use your controller's clock and chipselect registers.
15 * Some hardware works well with requests at spi_transfer scope:
17 * - Drivers leveraging smarter hardware, with fifos or DMA; or for half
18 * duplex (MicroWire) controllers. Provide chipslect() and txrx_bufs(),
19 * and custom setup()/cleanup() methods.
22 struct workqueue_struct *workqueue;
23 struct work_struct work;
26 struct list_head queue;
30 struct spi_master *master;
32 /* setup_transfer() changes clock and/or wordsize to match settings
33 * for this transfer; zeroes restore defaults from spi_device.
35 int (*setup_transfer)(struct spi_device *spi,
36 struct spi_transfer *t);
38 void (*chipselect)(struct spi_device *spi, int is_on);
39 #define BITBANG_CS_ACTIVE 1 /* normally nCS, active low */
40 #define BITBANG_CS_INACTIVE 0
42 /* txrx_bufs() may handle dma mapping for transfers that don't
43 * already have one (transfer.{tx,rx}_dma is zero), or use PIO
45 int (*txrx_bufs)(struct spi_device *spi, struct spi_transfer *t);
47 /* txrx_word[SPI_MODE_*]() just looks like a shift register */
48 u32 (*txrx_word[4])(struct spi_device *spi,
53 /* you can call these default bitbang->master methods from your custom
54 * methods, if you like.
56 extern int spi_bitbang_setup(struct spi_device *spi);
57 extern void spi_bitbang_cleanup(struct spi_device *spi);
58 extern int spi_bitbang_transfer(struct spi_device *spi, struct spi_message *m);
59 extern int spi_bitbang_setup_transfer(struct spi_device *spi,
60 struct spi_transfer *t);
62 /* start or stop queue processing */
63 extern int spi_bitbang_start(struct spi_bitbang *spi);
64 extern int spi_bitbang_stop(struct spi_bitbang *spi);
66 #endif /* __SPI_BITBANG_H */
68 /*-------------------------------------------------------------------------*/
70 #ifdef EXPAND_BITBANG_TXRX
73 * The code that knows what GPIO pins do what should have declared four
74 * functions, ideally as inlines, before #defining EXPAND_BITBANG_TXRX
75 * and including this header:
77 * void setsck(struct spi_device *, int is_on);
78 * void setmosi(struct spi_device *, int is_on);
79 * int getmiso(struct spi_device *);
80 * void spidelay(unsigned);
82 * A non-inlined routine would call bitbang_txrx_*() routines. The
83 * main loop could easily compile down to a handful of instructions,
84 * especially if the delay is a NOP (to run at peak speed).
86 * Since this is software, the timings may not be exactly what your board's
87 * chips need ... there may be several reasons you'd need to tweak timings
88 * in these routines, not just make to make it faster or slower to match a
89 * particular CPU clock rate.
93 bitbang_txrx_be_cpha0(struct spi_device *spi,
94 unsigned nsecs, unsigned cpol,
97 /* if (cpol == 0) this is SPI_MODE_0; else this is SPI_MODE_2 */
99 /* clock starts at inactive polarity */
100 for (word <<= (32 - bits); likely(bits); bits--) {
102 /* setup MSB (to slave) on trailing edge */
103 setmosi(spi, word & (1 << 31));
104 spidelay(nsecs); /* T(setup) */
109 /* sample MSB (from slave) on leading edge */
111 word |= getmiso(spi);
118 bitbang_txrx_be_cpha1(struct spi_device *spi,
119 unsigned nsecs, unsigned cpol,
122 /* if (cpol == 0) this is SPI_MODE_1; else this is SPI_MODE_3 */
124 /* clock starts at inactive polarity */
125 for (word <<= (32 - bits); likely(bits); bits--) {
127 /* setup MSB (to slave) on leading edge */
129 setmosi(spi, word & (1 << 31));
130 spidelay(nsecs); /* T(setup) */
135 /* sample MSB (from slave) on trailing edge */
137 word |= getmiso(spi);
142 #endif /* EXPAND_BITBANG_TXRX */