2 * Copyright (C) 2005 David Brownell
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
23 * INTERFACES between SPI master-side drivers and SPI infrastructure.
24 * (There's no SPI slave support for Linux yet...)
26 extern struct bus_type spi_bus_type;
29 * struct spi_device - Master side proxy for an SPI slave device
30 * @dev: Driver model representation of the device.
31 * @master: SPI controller used with the device.
32 * @max_speed_hz: Maximum clock rate to be used with this chip
33 * (on this board); may be changed by the device's driver.
34 * The spi_transfer.speed_hz can override this for each transfer.
35 * @chip_select: Chipselect, distinguishing chips handled by @master.
36 * @mode: The spi mode defines how data is clocked out and in.
37 * This may be changed by the device's driver.
38 * The "active low" default for chipselect mode can be overridden
39 * (by specifying SPI_CS_HIGH) as can the "MSB first" default for
40 * each word in a transfer (by specifying SPI_LSB_FIRST).
41 * @bits_per_word: Data transfers involve one or more words; word sizes
42 * like eight or 12 bits are common. In-memory wordsizes are
43 * powers of two bytes (e.g. 20 bit samples use 32 bits).
44 * This may be changed by the device's driver, or left at the
45 * default (0) indicating protocol words are eight bit bytes.
46 * The spi_transfer.bits_per_word can override this for each transfer.
47 * @irq: Negative, or the number passed to request_irq() to receive
48 * interrupts from this device.
49 * @controller_state: Controller's runtime state
50 * @controller_data: Board-specific definitions for controller, such as
51 * FIFO initialization parameters; from board_info.controller_data
52 * @modalias: Name of the driver to use with this device, or an alias
53 * for that name. This appears in the sysfs "modalias" attribute
54 * for driver coldplugging, and in uevents used for hotplugging
56 * A @spi_device is used to interchange data between an SPI slave
57 * (usually a discrete chip) and CPU memory.
59 * In @dev, the platform_data is used to hold information about this
60 * device that's meaningful to the device's protocol driver, but not
61 * to its controller. One example might be an identifier for a chip
62 * variant with slightly different functionality; another might be
63 * information about how this particular board wires the chip's pins.
67 struct spi_master *master;
71 #define SPI_CPHA 0x01 /* clock phase */
72 #define SPI_CPOL 0x02 /* clock polarity */
73 #define SPI_MODE_0 (0|0) /* (original MicroWire) */
74 #define SPI_MODE_1 (0|SPI_CPHA)
75 #define SPI_MODE_2 (SPI_CPOL|0)
76 #define SPI_MODE_3 (SPI_CPOL|SPI_CPHA)
77 #define SPI_CS_HIGH 0x04 /* chipselect active high? */
78 #define SPI_LSB_FIRST 0x08 /* per-word bits-on-wire */
79 #define SPI_3WIRE 0x10 /* SI/SO signals shared */
82 void *controller_state;
83 void *controller_data;
87 * likely need more hooks for more protocol options affecting how
88 * the controller talks to each chip, like:
89 * - memory packing (12 bit samples into low bits, others zeroed)
91 * - drop chipselect after each word
97 static inline struct spi_device *to_spi_device(struct device *dev)
99 return dev ? container_of(dev, struct spi_device, dev) : NULL;
102 /* most drivers won't need to care about device refcounting */
103 static inline struct spi_device *spi_dev_get(struct spi_device *spi)
105 return (spi && get_device(&spi->dev)) ? spi : NULL;
108 static inline void spi_dev_put(struct spi_device *spi)
111 put_device(&spi->dev);
114 /* ctldata is for the bus_master driver's runtime state */
115 static inline void *spi_get_ctldata(struct spi_device *spi)
117 return spi->controller_state;
120 static inline void spi_set_ctldata(struct spi_device *spi, void *state)
122 spi->controller_state = state;
125 /* device driver data */
127 static inline void spi_set_drvdata(struct spi_device *spi, void *data)
129 dev_set_drvdata(&spi->dev, data);
132 static inline void *spi_get_drvdata(struct spi_device *spi)
134 return dev_get_drvdata(&spi->dev);
142 int (*probe)(struct spi_device *spi);
143 int (*remove)(struct spi_device *spi);
144 void (*shutdown)(struct spi_device *spi);
145 int (*suspend)(struct spi_device *spi, pm_message_t mesg);
146 int (*resume)(struct spi_device *spi);
147 struct device_driver driver;
150 static inline struct spi_driver *to_spi_driver(struct device_driver *drv)
152 return drv ? container_of(drv, struct spi_driver, driver) : NULL;
155 extern int spi_register_driver(struct spi_driver *sdrv);
158 * spi_unregister_driver - reverse effect of spi_register_driver
159 * @sdrv: the driver to unregister
162 static inline void spi_unregister_driver(struct spi_driver *sdrv)
165 driver_unregister(&sdrv->driver);
170 * struct spi_master - interface to SPI master controller
171 * @cdev: class interface to this driver
172 * @bus_num: board-specific (and often SOC-specific) identifier for a
173 * given SPI controller.
174 * @num_chipselect: chipselects are used to distinguish individual
175 * SPI slaves, and are numbered from zero to num_chipselects.
176 * each slave has a chipselect signal, but it's common that not
177 * every chipselect is connected to a slave.
178 * @setup: updates the device mode and clocking records used by a
179 * device's SPI controller; protocol code may call this. This
180 * must fail if an unrecognized or unsupported mode is requested.
181 * It's always safe to call this unless transfers are pending on
182 * the device whose settings are being modified.
183 * @transfer: adds a message to the controller's transfer queue.
184 * @cleanup: frees controller-specific state
186 * Each SPI master controller can communicate with one or more @spi_device
187 * children. These make a small bus, sharing MOSI, MISO and SCK signals
188 * but not chip select signals. Each device may be configured to use a
189 * different clock rate, since those shared signals are ignored unless
190 * the chip is selected.
192 * The driver for an SPI controller manages access to those devices through
193 * a queue of spi_message transactions, copying data between CPU memory and
194 * an SPI slave device. For each such message it queues, it calls the
195 * message's completion function when the transaction completes.
198 struct class_device cdev;
200 /* other than negative (== assign one dynamically), bus_num is fully
201 * board-specific. usually that simplifies to being SOC-specific.
202 * example: one SOC has three SPI controllers, numbered 0..2,
203 * and one board's schematics might show it using SPI-2. software
204 * would normally use bus_num=2 for that controller.
208 /* chipselects will be integral to many controllers; some others
209 * might use board-specific GPIOs.
213 /* setup mode and clock, etc (spi driver may call many times) */
214 int (*setup)(struct spi_device *spi);
216 /* bidirectional bulk transfers
218 * + The transfer() method may not sleep; its main role is
219 * just to add the message to the queue.
220 * + For now there's no remove-from-queue operation, or
221 * any other request management
222 * + To a given spi_device, message queueing is pure fifo
224 * + The master's main job is to process its message queue,
225 * selecting a chip then transferring data
226 * + If there are multiple spi_device children, the i/o queue
227 * arbitration algorithm is unspecified (round robin, fifo,
228 * priority, reservations, preemption, etc)
230 * + Chipselect stays active during the entire message
231 * (unless modified by spi_transfer.cs_change != 0).
232 * + The message transfers use clock and SPI mode parameters
233 * previously established by setup() for this device
235 int (*transfer)(struct spi_device *spi,
236 struct spi_message *mesg);
238 /* called on release() to free memory provided by spi_master */
239 void (*cleanup)(struct spi_device *spi);
242 static inline void *spi_master_get_devdata(struct spi_master *master)
244 return class_get_devdata(&master->cdev);
247 static inline void spi_master_set_devdata(struct spi_master *master, void *data)
249 class_set_devdata(&master->cdev, data);
252 static inline struct spi_master *spi_master_get(struct spi_master *master)
254 if (!master || !class_device_get(&master->cdev))
259 static inline void spi_master_put(struct spi_master *master)
262 class_device_put(&master->cdev);
266 /* the spi driver core manages memory for the spi_master classdev */
267 extern struct spi_master *
268 spi_alloc_master(struct device *host, unsigned size);
270 extern int spi_register_master(struct spi_master *master);
271 extern void spi_unregister_master(struct spi_master *master);
273 extern struct spi_master *spi_busnum_to_master(u16 busnum);
275 /*---------------------------------------------------------------------------*/
278 * I/O INTERFACE between SPI controller and protocol drivers
280 * Protocol drivers use a queue of spi_messages, each transferring data
281 * between the controller and memory buffers.
283 * The spi_messages themselves consist of a series of read+write transfer
284 * segments. Those segments always read the same number of bits as they
285 * write; but one or the other is easily ignored by passing a null buffer
286 * pointer. (This is unlike most types of I/O API, because SPI hardware
289 * NOTE: Allocation of spi_transfer and spi_message memory is entirely
290 * up to the protocol driver, which guarantees the integrity of both (as
291 * well as the data buffers) for as long as the message is queued.
295 * struct spi_transfer - a read/write buffer pair
296 * @tx_buf: data to be written (dma-safe memory), or NULL
297 * @rx_buf: data to be read (dma-safe memory), or NULL
298 * @tx_dma: DMA address of tx_buf, if @spi_message.is_dma_mapped
299 * @rx_dma: DMA address of rx_buf, if @spi_message.is_dma_mapped
300 * @len: size of rx and tx buffers (in bytes)
301 * @speed_hz: Select a speed other then the device default for this
302 * transfer. If 0 the default (from @spi_device) is used.
303 * @bits_per_word: select a bits_per_word other then the device default
304 * for this transfer. If 0 the default (from @spi_device) is used.
305 * @cs_change: affects chipselect after this transfer completes
306 * @delay_usecs: microseconds to delay after this transfer before
307 * (optionally) changing the chipselect status, then starting
308 * the next transfer or completing this @spi_message.
309 * @transfer_list: transfers are sequenced through @spi_message.transfers
311 * SPI transfers always write the same number of bytes as they read.
312 * Protocol drivers should always provide @rx_buf and/or @tx_buf.
313 * In some cases, they may also want to provide DMA addresses for
314 * the data being transferred; that may reduce overhead, when the
315 * underlying driver uses dma.
317 * If the transmit buffer is null, zeroes will be shifted out
318 * while filling @rx_buf. If the receive buffer is null, the data
319 * shifted in will be discarded. Only "len" bytes shift out (or in).
320 * It's an error to try to shift out a partial word. (For example, by
321 * shifting out three bytes with word size of sixteen or twenty bits;
322 * the former uses two bytes per word, the latter uses four bytes.)
324 * In-memory data values are always in native CPU byte order, translated
325 * from the wire byte order (big-endian except with SPI_LSB_FIRST). So
326 * for example when bits_per_word is sixteen, buffers are 2N bytes long
327 * (@len = 2N) and hold N sixteen bit words in CPU byte order.
329 * When the word size of the SPI transfer is not a power-of-two multiple
330 * of eight bits, those in-memory words include extra bits. In-memory
331 * words are always seen by protocol drivers as right-justified, so the
332 * undefined (rx) or unused (tx) bits are always the most significant bits.
334 * All SPI transfers start with the relevant chipselect active. Normally
335 * it stays selected until after the last transfer in a message. Drivers
336 * can affect the chipselect signal using cs_change.
338 * (i) If the transfer isn't the last one in the message, this flag is
339 * used to make the chipselect briefly go inactive in the middle of the
340 * message. Toggling chipselect in this way may be needed to terminate
341 * a chip command, letting a single spi_message perform all of group of
342 * chip transactions together.
344 * (ii) When the transfer is the last one in the message, the chip may
345 * stay selected until the next transfer. On multi-device SPI busses
346 * with nothing blocking messages going to other devices, this is just
347 * a performance hint; starting a message to another device deselects
348 * this one. But in other cases, this can be used to ensure correctness.
349 * Some devices need protocol transactions to be built from a series of
350 * spi_message submissions, where the content of one message is determined
351 * by the results of previous messages and where the whole transaction
352 * ends when the chipselect goes intactive.
354 * The code that submits an spi_message (and its spi_transfers)
355 * to the lower layers is responsible for managing its memory.
356 * Zero-initialize every field you don't set up explicitly, to
357 * insulate against future API updates. After you submit a message
358 * and its transfers, ignore them until its completion callback.
360 struct spi_transfer {
361 /* it's ok if tx_buf == rx_buf (right?)
362 * for MicroWire, one buffer must be null
363 * buffers must work with dma_*map_single() calls, unless
364 * spi_message.is_dma_mapped reports a pre-existing mapping
373 unsigned cs_change:1;
378 struct list_head transfer_list;
382 * struct spi_message - one multi-segment SPI transaction
383 * @transfers: list of transfer segments in this transaction
384 * @spi: SPI device to which the transaction is queued
385 * @is_dma_mapped: if true, the caller provided both dma and cpu virtual
386 * addresses for each transfer buffer
387 * @complete: called to report transaction completions
388 * @context: the argument to complete() when it's called
389 * @actual_length: the total number of bytes that were transferred in all
390 * successful segments
391 * @status: zero for success, else negative errno
392 * @queue: for use by whichever driver currently owns the message
393 * @state: for use by whichever driver currently owns the message
395 * A @spi_message is used to execute an atomic sequence of data transfers,
396 * each represented by a struct spi_transfer. The sequence is "atomic"
397 * in the sense that no other spi_message may use that SPI bus until that
398 * sequence completes. On some systems, many such sequences can execute as
399 * as single programmed DMA transfer. On all systems, these messages are
400 * queued, and might complete after transactions to other devices. Messages
401 * sent to a given spi_device are alway executed in FIFO order.
403 * The code that submits an spi_message (and its spi_transfers)
404 * to the lower layers is responsible for managing its memory.
405 * Zero-initialize every field you don't set up explicitly, to
406 * insulate against future API updates. After you submit a message
407 * and its transfers, ignore them until its completion callback.
410 struct list_head transfers;
412 struct spi_device *spi;
414 unsigned is_dma_mapped:1;
416 /* REVISIT: we might want a flag affecting the behavior of the
417 * last transfer ... allowing things like "read 16 bit length L"
418 * immediately followed by "read L bytes". Basically imposing
419 * a specific message scheduling algorithm.
421 * Some controller drivers (message-at-a-time queue processing)
422 * could provide that as their default scheduling algorithm. But
423 * others (with multi-message pipelines) could need a flag to
424 * tell them about such special cases.
427 /* completion is reported through a callback */
428 void (*complete)(void *context);
430 unsigned actual_length;
433 /* for optional use by whatever driver currently owns the
434 * spi_message ... between calls to spi_async and then later
435 * complete(), that's the spi_master controller driver.
437 struct list_head queue;
441 static inline void spi_message_init(struct spi_message *m)
443 memset(m, 0, sizeof *m);
444 INIT_LIST_HEAD(&m->transfers);
448 spi_message_add_tail(struct spi_transfer *t, struct spi_message *m)
450 list_add_tail(&t->transfer_list, &m->transfers);
454 spi_transfer_del(struct spi_transfer *t)
456 list_del(&t->transfer_list);
459 /* It's fine to embed message and transaction structures in other data
460 * structures so long as you don't free them while they're in use.
463 static inline struct spi_message *spi_message_alloc(unsigned ntrans, gfp_t flags)
465 struct spi_message *m;
467 m = kzalloc(sizeof(struct spi_message)
468 + ntrans * sizeof(struct spi_transfer),
472 struct spi_transfer *t = (struct spi_transfer *)(m + 1);
474 INIT_LIST_HEAD(&m->transfers);
475 for (i = 0; i < ntrans; i++, t++)
476 spi_message_add_tail(t, m);
481 static inline void spi_message_free(struct spi_message *m)
487 * spi_setup - setup SPI mode and clock rate
488 * @spi: the device whose settings are being modified
489 * Context: can sleep, and no requests are queued to the device
491 * SPI protocol drivers may need to update the transfer mode if the
492 * device doesn't work with its default. They may likewise need
493 * to update clock rates or word sizes from initial values. This function
494 * changes those settings, and must be called from a context that can sleep.
495 * Except for SPI_CS_HIGH, which takes effect immediately, the changes take
496 * effect the next time the device is selected and data is transferred to
497 * or from it. When this function returns, the spi device is deselected.
499 * Note that this call will fail if the protocol driver specifies an option
500 * that the underlying controller or its driver does not support. For
501 * example, not all hardware supports wire transfers using nine bit words,
502 * LSB-first wire encoding, or active-high chipselects.
505 spi_setup(struct spi_device *spi)
507 return spi->master->setup(spi);
512 * spi_async - asynchronous SPI transfer
513 * @spi: device with which data will be exchanged
514 * @message: describes the data transfers, including completion callback
515 * Context: any (irqs may be blocked, etc)
517 * This call may be used in_irq and other contexts which can't sleep,
518 * as well as from task contexts which can sleep.
520 * The completion callback is invoked in a context which can't sleep.
521 * Before that invocation, the value of message->status is undefined.
522 * When the callback is issued, message->status holds either zero (to
523 * indicate complete success) or a negative error code. After that
524 * callback returns, the driver which issued the transfer request may
525 * deallocate the associated memory; it's no longer in use by any SPI
526 * core or controller driver code.
528 * Note that although all messages to a spi_device are handled in
529 * FIFO order, messages may go to different devices in other orders.
530 * Some device might be higher priority, or have various "hard" access
531 * time requirements, for example.
533 * On detection of any fault during the transfer, processing of
534 * the entire message is aborted, and the device is deselected.
535 * Until returning from the associated message completion callback,
536 * no other spi_message queued to that device will be processed.
537 * (This rule applies equally to all the synchronous transfer calls,
538 * which are wrappers around this core asynchronous primitive.)
541 spi_async(struct spi_device *spi, struct spi_message *message)
544 return spi->master->transfer(spi, message);
547 /*---------------------------------------------------------------------------*/
549 /* All these synchronous SPI transfer routines are utilities layered
550 * over the core async transfer primitive. Here, "synchronous" means
551 * they will sleep uninterruptibly until the async transfer completes.
554 extern int spi_sync(struct spi_device *spi, struct spi_message *message);
557 * spi_write - SPI synchronous write
558 * @spi: device to which data will be written
560 * @len: data buffer size
563 * This writes the buffer and returns zero or a negative error code.
564 * Callable only from contexts that can sleep.
567 spi_write(struct spi_device *spi, const u8 *buf, size_t len)
569 struct spi_transfer t = {
573 struct spi_message m;
575 spi_message_init(&m);
576 spi_message_add_tail(&t, &m);
577 return spi_sync(spi, &m);
581 * spi_read - SPI synchronous read
582 * @spi: device from which data will be read
584 * @len: data buffer size
587 * This reads the buffer and returns zero or a negative error code.
588 * Callable only from contexts that can sleep.
591 spi_read(struct spi_device *spi, u8 *buf, size_t len)
593 struct spi_transfer t = {
597 struct spi_message m;
599 spi_message_init(&m);
600 spi_message_add_tail(&t, &m);
601 return spi_sync(spi, &m);
604 /* this copies txbuf and rxbuf data; for small transfers only! */
605 extern int spi_write_then_read(struct spi_device *spi,
606 const u8 *txbuf, unsigned n_tx,
607 u8 *rxbuf, unsigned n_rx);
610 * spi_w8r8 - SPI synchronous 8 bit write followed by 8 bit read
611 * @spi: device with which data will be exchanged
612 * @cmd: command to be written before data is read back
615 * This returns the (unsigned) eight bit number returned by the
616 * device, or else a negative error code. Callable only from
617 * contexts that can sleep.
619 static inline ssize_t spi_w8r8(struct spi_device *spi, u8 cmd)
624 status = spi_write_then_read(spi, &cmd, 1, &result, 1);
626 /* return negative errno or unsigned value */
627 return (status < 0) ? status : result;
631 * spi_w8r16 - SPI synchronous 8 bit write followed by 16 bit read
632 * @spi: device with which data will be exchanged
633 * @cmd: command to be written before data is read back
636 * This returns the (unsigned) sixteen bit number returned by the
637 * device, or else a negative error code. Callable only from
638 * contexts that can sleep.
640 * The number is returned in wire-order, which is at least sometimes
643 static inline ssize_t spi_w8r16(struct spi_device *spi, u8 cmd)
648 status = spi_write_then_read(spi, &cmd, 1, (u8 *) &result, 2);
650 /* return negative errno or unsigned value */
651 return (status < 0) ? status : result;
654 /*---------------------------------------------------------------------------*/
657 * INTERFACE between board init code and SPI infrastructure.
659 * No SPI driver ever sees these SPI device table segments, but
660 * it's how the SPI core (or adapters that get hotplugged) grows
661 * the driver model tree.
663 * As a rule, SPI devices can't be probed. Instead, board init code
664 * provides a table listing the devices which are present, with enough
665 * information to bind and set up the device's driver. There's basic
666 * support for nonstatic configurations too; enough to handle adding
667 * parport adapters, or microcontrollers acting as USB-to-SPI bridges.
670 /* board-specific information about each SPI device */
671 struct spi_board_info {
672 /* the device name and module name are coupled, like platform_bus;
673 * "modalias" is normally the driver name.
675 * platform_data goes to spi_device.dev.platform_data,
676 * controller_data goes to spi_device.controller_data,
679 char modalias[KOBJ_NAME_LEN];
680 const void *platform_data;
681 void *controller_data;
684 /* slower signaling on noisy or low voltage boards */
688 /* bus_num is board specific and matches the bus_num of some
689 * spi_master that will probably be registered later.
691 * chip_select reflects how this chip is wired to that master;
692 * it's less than num_chipselect.
697 /* mode becomes spi_device.mode, and is essential for chips
698 * where the default of SPI_CS_HIGH = 0 is wrong.
702 /* ... may need additional spi_device chip config data here.
703 * avoid stuff protocol drivers can set; but include stuff
704 * needed to behave without being bound to a driver:
705 * - quirks like clock rate mattering when not selected
711 spi_register_board_info(struct spi_board_info const *info, unsigned n);
713 /* board init code may ignore whether SPI is configured or not */
715 spi_register_board_info(struct spi_board_info const *info, unsigned n)
720 /* If you're hotplugging an adapter with devices (parport, usb, etc)
721 * use spi_new_device() to describe each device. You can also call
722 * spi_unregister_device() to start making that device vanish, but
723 * normally that would be handled by spi_unregister_master().
725 extern struct spi_device *
726 spi_new_device(struct spi_master *, struct spi_board_info *);
729 spi_unregister_device(struct spi_device *spi)
732 device_unregister(&spi->dev);
735 #endif /* __LINUX_SPI_H */