2 /* Common Flash Interface structures
3 * See http://support.intel.com/design/flash/technote/index.htm
4 * $Id: cfi.h,v 1.57 2005/11/15 23:28:17 tpoynor Exp $
10 #include <linux/delay.h>
11 #include <linux/types.h>
12 #include <linux/interrupt.h>
13 #include <linux/mtd/flashchip.h>
14 #include <linux/mtd/map.h>
15 #include <linux/mtd/cfi_endian.h>
17 #ifdef CONFIG_MTD_CFI_I1
18 #define cfi_interleave(cfi) 1
19 #define cfi_interleave_is_1(cfi) (cfi_interleave(cfi) == 1)
21 #define cfi_interleave_is_1(cfi) (0)
24 #ifdef CONFIG_MTD_CFI_I2
25 # ifdef cfi_interleave
26 # undef cfi_interleave
27 # define cfi_interleave(cfi) ((cfi)->interleave)
29 # define cfi_interleave(cfi) 2
31 #define cfi_interleave_is_2(cfi) (cfi_interleave(cfi) == 2)
33 #define cfi_interleave_is_2(cfi) (0)
36 #ifdef CONFIG_MTD_CFI_I4
37 # ifdef cfi_interleave
38 # undef cfi_interleave
39 # define cfi_interleave(cfi) ((cfi)->interleave)
41 # define cfi_interleave(cfi) 4
43 #define cfi_interleave_is_4(cfi) (cfi_interleave(cfi) == 4)
45 #define cfi_interleave_is_4(cfi) (0)
48 #ifdef CONFIG_MTD_CFI_I8
49 # ifdef cfi_interleave
50 # undef cfi_interleave
51 # define cfi_interleave(cfi) ((cfi)->interleave)
53 # define cfi_interleave(cfi) 8
55 #define cfi_interleave_is_8(cfi) (cfi_interleave(cfi) == 8)
57 #define cfi_interleave_is_8(cfi) (0)
60 static inline int cfi_interleave_supported(int i)
63 #ifdef CONFIG_MTD_CFI_I1
66 #ifdef CONFIG_MTD_CFI_I2
69 #ifdef CONFIG_MTD_CFI_I4
72 #ifdef CONFIG_MTD_CFI_I8
83 /* NB: these values must represents the number of bytes needed to meet the
84 * device type (x8, x16, x32). Eg. a 32 bit device is 4 x 8 bytes.
85 * These numbers are used in calculations.
87 #define CFI_DEVICETYPE_X8 (8 / 8)
88 #define CFI_DEVICETYPE_X16 (16 / 8)
89 #define CFI_DEVICETYPE_X32 (32 / 8)
90 #define CFI_DEVICETYPE_X64 (64 / 8)
92 /* NB: We keep these structures in memory in HOST byteorder, except
93 * where individually noted.
96 /* Basic Query Structure */
107 uint8_t WordWriteTimeoutTyp;
108 uint8_t BufWriteTimeoutTyp;
109 uint8_t BlockEraseTimeoutTyp;
110 uint8_t ChipEraseTimeoutTyp;
111 uint8_t WordWriteTimeoutMax;
112 uint8_t BufWriteTimeoutMax;
113 uint8_t BlockEraseTimeoutMax;
114 uint8_t ChipEraseTimeoutMax;
116 uint16_t InterfaceDesc;
117 uint16_t MaxBufWriteSize;
118 uint8_t NumEraseRegions;
119 uint32_t EraseRegionInfo[0]; /* Not host ordered */
120 } __attribute__((packed));
122 /* Extended Query Structure for both PRI and ALT */
124 struct cfi_extquery {
126 uint8_t MajorVersion;
127 uint8_t MinorVersion;
128 } __attribute__((packed));
130 /* Vendor-Specific PRI for Intel/Sharp Extended Command Set (0x0001) */
132 struct cfi_pri_intelext {
134 uint8_t MajorVersion;
135 uint8_t MinorVersion;
136 uint32_t FeatureSupport; /* if bit 31 is set then an additional uint32_t feature
137 block follows - FIXME - not currently supported */
138 uint8_t SuspendCmdSupport;
139 uint16_t BlkStatusRegMask;
142 uint8_t NumProtectionFields;
143 uint16_t ProtRegAddr;
144 uint8_t FactProtRegSize;
145 uint8_t UserProtRegSize;
147 } __attribute__((packed));
149 struct cfi_intelext_otpinfo {
150 uint32_t ProtRegAddr;
152 uint8_t FactProtRegSize;
154 uint8_t UserProtRegSize;
155 } __attribute__((packed));
157 struct cfi_intelext_blockinfo {
158 uint16_t NumIdentBlocks;
160 uint16_t MinBlockEraseCycles;
163 } __attribute__((packed));
165 struct cfi_intelext_regioninfo {
166 uint16_t NumIdentPartitions;
167 uint8_t NumOpAllowed;
168 uint8_t NumOpAllowedSimProgMode;
169 uint8_t NumOpAllowedSimEraMode;
170 uint8_t NumBlockTypes;
171 struct cfi_intelext_blockinfo BlockTypes[1];
172 } __attribute__((packed));
174 struct cfi_intelext_programming_regioninfo {
175 uint8_t ProgRegShift;
177 uint8_t ControlValid;
179 uint8_t ControlInvalid;
181 } __attribute__((packed));
183 /* Vendor-Specific PRI for AMD/Fujitsu Extended Command Set (0x0002) */
185 struct cfi_pri_amdstd {
187 uint8_t MajorVersion;
188 uint8_t MinorVersion;
189 uint8_t SiliconRevision; /* bits 1-0: Address Sensitive Unlock */
190 uint8_t EraseSuspend;
192 uint8_t TmpBlkUnprotect;
193 uint8_t BlkProtUnprot;
194 uint8_t SimultaneousOps;
200 } __attribute__((packed));
202 struct cfi_pri_query {
204 uint32_t ProtField[1]; /* Not host ordered */
205 } __attribute__((packed));
207 struct cfi_bri_query {
208 uint8_t PageModeReadCap;
210 uint32_t ConfField[1]; /* Not host ordered */
211 } __attribute__((packed));
213 #define P_ID_NONE 0x0000
214 #define P_ID_INTEL_EXT 0x0001
215 #define P_ID_AMD_STD 0x0002
216 #define P_ID_INTEL_STD 0x0003
217 #define P_ID_AMD_EXT 0x0004
218 #define P_ID_WINBOND 0x0006
219 #define P_ID_ST_ADV 0x0020
220 #define P_ID_MITSUBISHI_STD 0x0100
221 #define P_ID_MITSUBISHI_EXT 0x0101
222 #define P_ID_SST_PAGE 0x0102
223 #define P_ID_INTEL_PERFORMANCE 0x0200
224 #define P_ID_INTEL_DATA 0x0210
225 #define P_ID_RESERVED 0xffff
228 #define CFI_MODE_CFI 1
229 #define CFI_MODE_JEDEC 0
236 int cfi_mode; /* Are we a JEDEC device pretending to be CFI? */
239 struct mtd_info *(*cmdset_setup)(struct map_info *);
240 struct cfi_ident *cfiq; /* For now only one. We insist that all devs
241 must be of the same type. */
244 unsigned long chipshift; /* Because they're of the same type */
245 const char *im_name; /* inter_module name for cmdset_setup */
246 struct flchip chips[0]; /* per-chip data structure for each chip */
250 * Returns the command address according to the given geometry.
252 static inline uint32_t cfi_build_cmd_addr(uint32_t cmd_ofs, int interleave, int type)
254 return (cmd_ofs * type) * interleave;
258 * Transforms the CFI command for the given geometry (bus width & interleave).
259 * It looks too long to be inline, but in the common case it should almost all
260 * get optimised away.
262 static inline map_word cfi_build_cmd(u_long cmd, struct map_info *map, struct cfi_private *cfi)
264 map_word val = { {0} };
265 int wordwidth, words_per_bus, chip_mode, chips_per_word;
266 unsigned long onecmd;
269 /* We do it this way to give the compiler a fighting chance
270 of optimising away all the crap for 'bankwidth' larger than
271 an unsigned long, in the common case where that support is
273 if (map_bankwidth_is_large(map)) {
274 wordwidth = sizeof(unsigned long);
275 words_per_bus = (map_bankwidth(map)) / wordwidth; // i.e. normally 1
277 wordwidth = map_bankwidth(map);
281 chip_mode = map_bankwidth(map) / cfi_interleave(cfi);
282 chips_per_word = wordwidth * cfi_interleave(cfi) / map_bankwidth(map);
284 /* First, determine what the bit-pattern should be for a single
285 device, according to chip mode and endianness... */
292 onecmd = cpu_to_cfi16(cmd);
295 onecmd = cpu_to_cfi32(cmd);
299 /* Now replicate it across the size of an unsigned long, or
300 just to the bus width as appropriate */
301 switch (chips_per_word) {
303 #if BITS_PER_LONG >= 64
305 onecmd |= (onecmd << (chip_mode * 32));
308 onecmd |= (onecmd << (chip_mode * 16));
310 onecmd |= (onecmd << (chip_mode * 8));
315 /* And finally, for the multi-word case, replicate it
316 in all words in the structure */
317 for (i=0; i < words_per_bus; i++) {
323 #define CMD(x) cfi_build_cmd((x), map, cfi)
326 static inline unsigned long cfi_merge_status(map_word val, struct map_info *map,
327 struct cfi_private *cfi)
329 int wordwidth, words_per_bus, chip_mode, chips_per_word;
330 unsigned long onestat, res = 0;
333 /* We do it this way to give the compiler a fighting chance
334 of optimising away all the crap for 'bankwidth' larger than
335 an unsigned long, in the common case where that support is
337 if (map_bankwidth_is_large(map)) {
338 wordwidth = sizeof(unsigned long);
339 words_per_bus = (map_bankwidth(map)) / wordwidth; // i.e. normally 1
341 wordwidth = map_bankwidth(map);
345 chip_mode = map_bankwidth(map) / cfi_interleave(cfi);
346 chips_per_word = wordwidth * cfi_interleave(cfi) / map_bankwidth(map);
349 /* Or all status words together */
350 for (i=1; i < words_per_bus; i++) {
355 switch(chips_per_word) {
357 #if BITS_PER_LONG >= 64
359 res |= (onestat >> (chip_mode * 32));
362 res |= (onestat >> (chip_mode * 16));
364 res |= (onestat >> (chip_mode * 8));
369 /* Last, determine what the bit-pattern should be for a single
370 device, according to chip mode and endianness... */
375 res = cfi16_to_cpu(res);
378 res = cfi32_to_cpu(res);
385 #define MERGESTATUS(x) cfi_merge_status((x), map, cfi)
389 * Sends a CFI command to a bank of flash for the given geometry.
391 * Returns the offset in flash where the command was written.
392 * If prev_val is non-null, it will be set to the value at the command address,
393 * before the command was written.
395 static inline uint32_t cfi_send_gen_cmd(u_char cmd, uint32_t cmd_addr, uint32_t base,
396 struct map_info *map, struct cfi_private *cfi,
397 int type, map_word *prev_val)
400 uint32_t addr = base + cfi_build_cmd_addr(cmd_addr, cfi_interleave(cfi), type);
402 val = cfi_build_cmd(cmd, map, cfi);
405 *prev_val = map_read(map, addr);
407 map_write(map, val, addr);
412 static inline uint8_t cfi_read_query(struct map_info *map, uint32_t addr)
414 map_word val = map_read(map, addr);
416 if (map_bankwidth_is_1(map)) {
418 } else if (map_bankwidth_is_2(map)) {
419 return cfi16_to_cpu(val.x[0]);
421 /* No point in a 64-bit byteswap since that would just be
422 swapping the responses from different chips, and we are
423 only interested in one chip (a representative sample) */
424 return cfi32_to_cpu(val.x[0]);
428 static inline uint16_t cfi_read_query16(struct map_info *map, uint32_t addr)
430 map_word val = map_read(map, addr);
432 if (map_bankwidth_is_1(map)) {
433 return val.x[0] & 0xff;
434 } else if (map_bankwidth_is_2(map)) {
435 return cfi16_to_cpu(val.x[0]);
437 /* No point in a 64-bit byteswap since that would just be
438 swapping the responses from different chips, and we are
439 only interested in one chip (a representative sample) */
440 return cfi32_to_cpu(val.x[0]);
444 static inline void cfi_udelay(int us)
447 msleep((us+999)/1000);
454 struct cfi_extquery *cfi_read_pri(struct map_info *map, uint16_t adr, uint16_t size,
459 void (*fixup)(struct mtd_info *mtd, void* param);
463 #define CFI_MFR_ANY 0xffff
464 #define CFI_ID_ANY 0xffff
466 #define CFI_MFR_AMD 0x0001
467 #define CFI_MFR_ST 0x0020 /* STMicroelectronics */
469 void cfi_fixup(struct mtd_info *mtd, struct cfi_fixup* fixups);
471 typedef int (*varsize_frob_t)(struct map_info *map, struct flchip *chip,
472 unsigned long adr, int len, void *thunk);
474 int cfi_varsize_frob(struct mtd_info *mtd, varsize_frob_t frob,
475 loff_t ofs, size_t len, void *thunk);
478 #endif /* __MTD_CFI_H__ */