2 * include/linux/mmc/sdio.h
4 * Copyright 2006-2007 Pierre Ossman
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or (at
9 * your option) any later version.
15 /* SDIO commands type argument response */
16 #define SD_IO_SEND_OP_COND 5 /* bcr [23:0] OCR R4 */
17 #define SD_IO_RW_DIRECT 52 /* ac [31:0] See below R5 */
20 * SD_IO_RW_DIRECT argument format:
23 * [30:28] Function number
25 * [25:9] Register address
34 r : detected and set for the actual command response
35 x : detected and set during command execution. the host must poll
36 the card by sending status command in order to read these bits.
38 a : according to the card state
39 b : always related to the previous command. Reception of
40 a valid command will clear it (with a delay of one command)
44 #define R5_COM_CRC_ERROR (1 << 15) /* er, b */
45 #define R5_ILLEGAL_COMMAND (1 << 14) /* er, b */
46 #define R5_ERROR (1 << 11) /* erx, c */
47 #define R5_FUNCTION_NUMBER (1 << 9) /* er, c */
48 #define R5_OUT_OF_RANGE (1 << 8) /* er, c */
49 #define R5_STATUS(x) (x & 0xCB00)
50 #define R5_IO_CURRENT_STATE(x) ((x & 0x3000) >> 12) /* s, b */
53 * Card Common Control Registers (CCCR)
56 #define SDIO_CCCR_CCCR 0x00
58 #define SDIO_CCCR_REV_1_00 0 /* CCCR/FBR Version 1.00 */
59 #define SDIO_CCCR_REV_1_10 1 /* CCCR/FBR Version 1.10 */
60 #define SDIO_CCCR_REV_1_20 2 /* CCCR/FBR Version 1.20 */
62 #define SDIO_SDIO_REV_1_00 0 /* SDIO Spec Version 1.00 */
63 #define SDIO_SDIO_REV_1_10 1 /* SDIO Spec Version 1.10 */
64 #define SDIO_SDIO_REV_1_20 2 /* SDIO Spec Version 1.20 */
65 #define SDIO_SDIO_REV_2_00 3 /* SDIO Spec Version 2.00 */
67 #define SDIO_CCCR_SD 0x01
69 #define SDIO_SD_REV_1_01 0 /* SD Physical Spec Version 1.01 */
70 #define SDIO_SD_REV_1_10 1 /* SD Physical Spec Version 1.10 */
71 #define SDIO_SD_REV_2_00 2 /* SD Physical Spec Version 2.00 */
73 #define SDIO_CCCR_IOEx 0x02
74 #define SDIO_CCCR_IORx 0x03
76 #define SDIO_CCCR_IENx 0x04 /* Function/Master Interrupt Enable */
77 #define SDIO_CCCR_INTx 0x05 /* Function Interrupt Pending */
79 #define SDIO_CCCR_ABORT 0x06 /* function abort/card reset */
81 #define SDIO_CCCR_IF 0x07 /* bus interface controls */
83 #define SDIO_BUS_WIDTH_1BIT 0x00
84 #define SDIO_BUS_WIDTH_4BIT 0x02
86 #define SDIO_BUS_CD_DISABLE 0x80 /* disable pull-up on DAT3 (pin 1) */
88 #define SDIO_CCCR_CAPS 0x08
90 #define SDIO_CCCR_CAP_SDC 0x01 /* can do CMD52 while data transfer */
91 #define SDIO_CCCR_CAP_SMB 0x02 /* can do multi-block xfers (CMD53) */
92 #define SDIO_CCCR_CAP_SRW 0x04 /* supports read-wait protocol */
93 #define SDIO_CCCR_CAP_SBS 0x08 /* supports suspend/resume */
94 #define SDIO_CCCR_CAP_S4MI 0x10 /* interrupt during 4-bit CMD53 */
95 #define SDIO_CCCR_CAP_E4MI 0x20 /* enable ints during 4-bit CMD53 */
96 #define SDIO_CCCR_CAP_LSC 0x40 /* low speed card */
97 #define SDIO_CCCR_CAP_4BLS 0x80 /* 4 bit low speed card */
99 #define SDIO_CCCR_CIS 0x09 /* common CIS pointer (3 bytes) */
101 /* Following 4 regs are valid only if SBS is set */
102 #define SDIO_CCCR_SUSPEND 0x0c
103 #define SDIO_CCCR_SELx 0x0d
104 #define SDIO_CCCR_EXECx 0x0e
105 #define SDIO_CCCR_READYx 0x0f
107 #define SDIO_CCCR_BLKSIZE 0x10
109 #define SDIO_CCCR_POWER 0x12
111 #define SDIO_POWER_SMPC 0x01 /* Supports Master Power Control */
112 #define SDIO_POWER_EMPC 0x02 /* Enable Master Power Control */
114 #define SDIO_CCCR_SPEED 0x13
116 #define SDIO_SPEED_SHS 0x01 /* Supports High-Speed mode */
117 #define SDIO_SPEED_EHS 0x02 /* Enable High-Speed mode */
120 * Function Basic Registers (FBR)
123 #define SDIO_FBR_STD_IF 0x00
125 #define SDIO_FBR_SUPPORTS_CSA 0x40 /* supports Code Storage Area */
126 #define SDIO_FBR_ENABLE_CSA 0x80 /* enable Code Storage Area */
128 #define SDIO_FBR_STD_IF_EXT 0x01
130 #define SDIO_FBR_POWER 0x02
132 #define SDIO_FBR_POWER_SPS 0x01 /* Supports Power Selection */
133 #define SDIO_FBR_POWER_EPS 0x02 /* Enable (low) Power Selection */
135 #define SDIO_FBR_CIS 0x09 /* CIS pointer (3 bytes) */
138 #define SDIO_FBR_CSA 0x0C /* CSA pointer (3 bytes) */
140 #define SDIO_FBR_CSA_DATA 0x0F
142 #define SDIO_FBR_BLKSIZE 0x10 /* block size (2 bytes) */