1 #ifndef __ASM_PARAVIRT_H
2 #define __ASM_PARAVIRT_H
3 /* Various instructions on x86 need to be replaced for
4 * para-virtualization: those hooks are defined here. */
10 /* Bitmask of what can be clobbered: usually at least eax. */
12 #define CLBR_EAX (1 << 0)
13 #define CLBR_ECX (1 << 1)
14 #define CLBR_EDX (1 << 2)
17 #define CLBR_RSI (1 << 3)
18 #define CLBR_RDI (1 << 4)
19 #define CLBR_R8 (1 << 5)
20 #define CLBR_R9 (1 << 6)
21 #define CLBR_R10 (1 << 7)
22 #define CLBR_R11 (1 << 8)
23 #define CLBR_ANY ((1 << 9) - 1)
24 #include <asm/desc_defs.h>
26 /* CLBR_ANY should match all regs platform has. For i386, that's just it */
27 #define CLBR_ANY ((1 << 3) - 1)
31 #include <linux/types.h>
32 #include <linux/cpumask.h>
33 #include <asm/kmap_types.h>
34 #include <asm/desc_defs.h>
45 unsigned int kernel_rpl;
46 int shared_kernel_pmd;
53 * Patch may replace one of the defined code sequences with
54 * arbitrary code, subject to the same register constraints.
55 * This generally means the code is not free to clobber any
56 * registers other than EAX. The patch function should return
57 * the number of bytes of code generated, as we nop pad the
58 * rest in generic code.
60 unsigned (*patch)(u8 type, u16 clobber, void *insnbuf,
61 unsigned long addr, unsigned len);
63 /* Basic arch-specific setup */
64 void (*arch_setup)(void);
65 char *(*memory_setup)(void);
66 void (*post_allocator_init)(void);
68 /* Print a banner to identify the environment */
74 /* Set deferred update mode, used for batching operations. */
80 void (*time_init)(void);
82 /* Set and set time of day */
83 unsigned long (*get_wallclock)(void);
84 int (*set_wallclock)(unsigned long);
86 unsigned long long (*sched_clock)(void);
87 unsigned long (*get_cpu_khz)(void);
91 /* hooks for various privileged instructions */
92 unsigned long (*get_debugreg)(int regno);
93 void (*set_debugreg)(int regno, unsigned long value);
97 unsigned long (*read_cr0)(void);
98 void (*write_cr0)(unsigned long);
100 unsigned long (*read_cr4_safe)(void);
101 unsigned long (*read_cr4)(void);
102 void (*write_cr4)(unsigned long);
105 unsigned long (*read_cr8)(void);
106 void (*write_cr8)(unsigned long);
109 /* Segment descriptor handling */
110 void (*load_tr_desc)(void);
111 void (*load_gdt)(const struct desc_ptr *);
112 void (*load_idt)(const struct desc_ptr *);
113 void (*store_gdt)(struct desc_ptr *);
114 void (*store_idt)(struct desc_ptr *);
115 void (*set_ldt)(const void *desc, unsigned entries);
116 unsigned long (*store_tr)(void);
117 void (*load_tls)(struct thread_struct *t, unsigned int cpu);
118 void (*write_ldt_entry)(struct desc_struct *ldt, int entrynum,
120 void (*write_gdt_entry)(struct desc_struct *,
121 int entrynum, const void *desc, int size);
122 void (*write_idt_entry)(gate_desc *,
123 int entrynum, const gate_desc *gate);
124 void (*load_sp0)(struct tss_struct *tss, struct thread_struct *t);
126 void (*set_iopl_mask)(unsigned mask);
128 void (*wbinvd)(void);
129 void (*io_delay)(void);
131 /* cpuid emulation, mostly so that caps bits can be disabled */
132 void (*cpuid)(unsigned int *eax, unsigned int *ebx,
133 unsigned int *ecx, unsigned int *edx);
135 /* MSR, PMC and TSR operations.
136 err = 0/-EFAULT. wrmsr returns 0/-EFAULT. */
137 u64 (*read_msr)(unsigned int msr, int *err);
138 int (*write_msr)(unsigned int msr, unsigned low, unsigned high);
140 u64 (*read_tsc)(void);
141 u64 (*read_pmc)(int counter);
142 unsigned long long (*read_tscp)(unsigned int *aux);
144 /* These two are jmp to, not actually called. */
145 void (*irq_enable_syscall_ret)(void);
148 void (*swapgs)(void);
150 struct pv_lazy_ops lazy_mode;
154 void (*init_IRQ)(void);
157 * Get/set interrupt state. save_fl and restore_fl are only
158 * expected to use X86_EFLAGS_IF; all other bits
159 * returned from save_fl are undefined, and may be ignored by
162 unsigned long (*save_fl)(void);
163 void (*restore_fl)(unsigned long);
164 void (*irq_disable)(void);
165 void (*irq_enable)(void);
166 void (*safe_halt)(void);
171 #ifdef CONFIG_X86_LOCAL_APIC
173 * Direct APIC operations, principally for VMI. Ideally
174 * these shouldn't be in this interface.
176 void (*apic_write)(unsigned long reg, u32 v);
177 void (*apic_write_atomic)(unsigned long reg, u32 v);
178 u32 (*apic_read)(unsigned long reg);
179 void (*setup_boot_clock)(void);
180 void (*setup_secondary_clock)(void);
182 void (*startup_ipi_hook)(int phys_apicid,
183 unsigned long start_eip,
184 unsigned long start_esp);
190 * Called before/after init_mm pagetable setup. setup_start
191 * may reset %cr3, and may pre-install parts of the pagetable;
192 * pagetable setup is expected to preserve any existing
195 void (*pagetable_setup_start)(pgd_t *pgd_base);
196 void (*pagetable_setup_done)(pgd_t *pgd_base);
198 unsigned long (*read_cr2)(void);
199 void (*write_cr2)(unsigned long);
201 unsigned long (*read_cr3)(void);
202 void (*write_cr3)(unsigned long);
205 * Hooks for intercepting the creation/use/destruction of an
208 void (*activate_mm)(struct mm_struct *prev,
209 struct mm_struct *next);
210 void (*dup_mmap)(struct mm_struct *oldmm,
211 struct mm_struct *mm);
212 void (*exit_mmap)(struct mm_struct *mm);
216 void (*flush_tlb_user)(void);
217 void (*flush_tlb_kernel)(void);
218 void (*flush_tlb_single)(unsigned long addr);
219 void (*flush_tlb_others)(const cpumask_t *cpus, struct mm_struct *mm,
222 /* Hooks for allocating and freeing a pagetable top-level */
223 int (*pgd_alloc)(struct mm_struct *mm);
224 void (*pgd_free)(struct mm_struct *mm, pgd_t *pgd);
227 * Hooks for allocating/releasing pagetable pages when they're
228 * attached to a pagetable
230 void (*alloc_pte)(struct mm_struct *mm, u32 pfn);
231 void (*alloc_pmd)(struct mm_struct *mm, u32 pfn);
232 void (*alloc_pmd_clone)(u32 pfn, u32 clonepfn, u32 start, u32 count);
233 void (*alloc_pud)(struct mm_struct *mm, u32 pfn);
234 void (*release_pte)(u32 pfn);
235 void (*release_pmd)(u32 pfn);
236 void (*release_pud)(u32 pfn);
238 /* Pagetable manipulation functions */
239 void (*set_pte)(pte_t *ptep, pte_t pteval);
240 void (*set_pte_at)(struct mm_struct *mm, unsigned long addr,
241 pte_t *ptep, pte_t pteval);
242 void (*set_pmd)(pmd_t *pmdp, pmd_t pmdval);
243 void (*pte_update)(struct mm_struct *mm, unsigned long addr,
245 void (*pte_update_defer)(struct mm_struct *mm,
246 unsigned long addr, pte_t *ptep);
248 pte_t (*ptep_modify_prot_start)(struct mm_struct *mm, unsigned long addr,
250 void (*ptep_modify_prot_commit)(struct mm_struct *mm, unsigned long addr,
251 pte_t *ptep, pte_t pte);
253 pteval_t (*pte_val)(pte_t);
254 pteval_t (*pte_flags)(pte_t);
255 pte_t (*make_pte)(pteval_t pte);
257 pgdval_t (*pgd_val)(pgd_t);
258 pgd_t (*make_pgd)(pgdval_t pgd);
260 #if PAGETABLE_LEVELS >= 3
261 #ifdef CONFIG_X86_PAE
262 void (*set_pte_atomic)(pte_t *ptep, pte_t pteval);
263 void (*set_pte_present)(struct mm_struct *mm, unsigned long addr,
264 pte_t *ptep, pte_t pte);
265 void (*pte_clear)(struct mm_struct *mm, unsigned long addr,
267 void (*pmd_clear)(pmd_t *pmdp);
269 #endif /* CONFIG_X86_PAE */
271 void (*set_pud)(pud_t *pudp, pud_t pudval);
273 pmdval_t (*pmd_val)(pmd_t);
274 pmd_t (*make_pmd)(pmdval_t pmd);
276 #if PAGETABLE_LEVELS == 4
277 pudval_t (*pud_val)(pud_t);
278 pud_t (*make_pud)(pudval_t pud);
280 void (*set_pgd)(pgd_t *pudp, pgd_t pgdval);
281 #endif /* PAGETABLE_LEVELS == 4 */
282 #endif /* PAGETABLE_LEVELS >= 3 */
284 #ifdef CONFIG_HIGHPTE
285 void *(*kmap_atomic_pte)(struct page *page, enum km_type type);
288 struct pv_lazy_ops lazy_mode;
292 /* Sometimes the physical address is a pfn, and sometimes its
293 an mfn. We can tell which is which from the index. */
294 void (*set_fixmap)(unsigned /* enum fixed_addresses */ idx,
295 unsigned long phys, pgprot_t flags);
298 /* This contains all the paravirt structures: we get a convenient
299 * number for each function using the offset which we use to indicate
301 struct paravirt_patch_template {
302 struct pv_init_ops pv_init_ops;
303 struct pv_time_ops pv_time_ops;
304 struct pv_cpu_ops pv_cpu_ops;
305 struct pv_irq_ops pv_irq_ops;
306 struct pv_apic_ops pv_apic_ops;
307 struct pv_mmu_ops pv_mmu_ops;
310 extern struct pv_info pv_info;
311 extern struct pv_init_ops pv_init_ops;
312 extern struct pv_time_ops pv_time_ops;
313 extern struct pv_cpu_ops pv_cpu_ops;
314 extern struct pv_irq_ops pv_irq_ops;
315 extern struct pv_apic_ops pv_apic_ops;
316 extern struct pv_mmu_ops pv_mmu_ops;
318 #define PARAVIRT_PATCH(x) \
319 (offsetof(struct paravirt_patch_template, x) / sizeof(void *))
321 #define paravirt_type(op) \
322 [paravirt_typenum] "i" (PARAVIRT_PATCH(op)), \
323 [paravirt_opptr] "m" (op)
324 #define paravirt_clobber(clobber) \
325 [paravirt_clobber] "i" (clobber)
328 * Generate some code, and mark it as patchable by the
329 * apply_paravirt() alternate instruction patcher.
331 #define _paravirt_alt(insn_string, type, clobber) \
332 "771:\n\t" insn_string "\n" "772:\n" \
333 ".pushsection .parainstructions,\"a\"\n" \
336 " .byte " type "\n" \
337 " .byte 772b-771b\n" \
338 " .short " clobber "\n" \
341 /* Generate patchable code, with the default asm parameters. */
342 #define paravirt_alt(insn_string) \
343 _paravirt_alt(insn_string, "%c[paravirt_typenum]", "%c[paravirt_clobber]")
345 /* Simple instruction patching code. */
346 #define DEF_NATIVE(ops, name, code) \
347 extern const char start_##ops##_##name[], end_##ops##_##name[]; \
348 asm("start_" #ops "_" #name ": " code "; end_" #ops "_" #name ":")
350 unsigned paravirt_patch_nop(void);
351 unsigned paravirt_patch_ignore(unsigned len);
352 unsigned paravirt_patch_call(void *insnbuf,
353 const void *target, u16 tgt_clobbers,
354 unsigned long addr, u16 site_clobbers,
356 unsigned paravirt_patch_jmp(void *insnbuf, const void *target,
357 unsigned long addr, unsigned len);
358 unsigned paravirt_patch_default(u8 type, u16 clobbers, void *insnbuf,
359 unsigned long addr, unsigned len);
361 unsigned paravirt_patch_insns(void *insnbuf, unsigned len,
362 const char *start, const char *end);
364 unsigned native_patch(u8 type, u16 clobbers, void *ibuf,
365 unsigned long addr, unsigned len);
367 int paravirt_disable_iospace(void);
370 * This generates an indirect call based on the operation type number.
371 * The type number, computed in PARAVIRT_PATCH, is derived from the
372 * offset into the paravirt_patch_template structure, and can therefore be
373 * freely converted back into a structure offset.
375 #define PARAVIRT_CALL "call *%[paravirt_opptr];"
378 * These macros are intended to wrap calls through one of the paravirt
379 * ops structs, so that they can be later identified and patched at
382 * Normally, a call to a pv_op function is a simple indirect call:
383 * (pv_op_struct.operations)(args...).
385 * Unfortunately, this is a relatively slow operation for modern CPUs,
386 * because it cannot necessarily determine what the destination
387 * address is. In this case, the address is a runtime constant, so at
388 * the very least we can patch the call to e a simple direct call, or
389 * ideally, patch an inline implementation into the callsite. (Direct
390 * calls are essentially free, because the call and return addresses
391 * are completely predictable.)
393 * For i386, these macros rely on the standard gcc "regparm(3)" calling
394 * convention, in which the first three arguments are placed in %eax,
395 * %edx, %ecx (in that order), and the remaining arguments are placed
396 * on the stack. All caller-save registers (eax,edx,ecx) are expected
397 * to be modified (either clobbered or used for return values).
398 * X86_64, on the other hand, already specifies a register-based calling
399 * conventions, returning at %rax, with parameteres going on %rdi, %rsi,
400 * %rdx, and %rcx. Note that for this reason, x86_64 does not need any
401 * special handling for dealing with 4 arguments, unlike i386.
402 * However, x86_64 also have to clobber all caller saved registers, which
403 * unfortunately, are quite a bit (r8 - r11)
405 * The call instruction itself is marked by placing its start address
406 * and size into the .parainstructions section, so that
407 * apply_paravirt() in arch/i386/kernel/alternative.c can do the
408 * appropriate patching under the control of the backend pv_init_ops
411 * Unfortunately there's no way to get gcc to generate the args setup
412 * for the call, and then allow the call itself to be generated by an
413 * inline asm. Because of this, we must do the complete arg setup and
414 * return value handling from within these macros. This is fairly
417 * There are 5 sets of PVOP_* macros for dealing with 0-4 arguments.
418 * It could be extended to more arguments, but there would be little
419 * to be gained from that. For each number of arguments, there are
420 * the two VCALL and CALL variants for void and non-void functions.
422 * When there is a return value, the invoker of the macro must specify
423 * the return type. The macro then uses sizeof() on that type to
424 * determine whether its a 32 or 64 bit value, and places the return
425 * in the right register(s) (just %eax for 32-bit, and %edx:%eax for
426 * 64-bit). For x86_64 machines, it just returns at %rax regardless of
427 * the return value size.
429 * 64-bit arguments are passed as a pair of adjacent 32-bit arguments
430 * i386 also passes 64-bit arguments as a pair of adjacent 32-bit arguments
433 * Small structures are passed and returned in registers. The macro
434 * calling convention can't directly deal with this, so the wrapper
435 * functions must do this.
437 * These PVOP_* macros are only defined within this header. This
438 * means that all uses must be wrapped in inline functions. This also
439 * makes sure the incoming and outgoing types are always correct.
442 #define PVOP_VCALL_ARGS unsigned long __eax, __edx, __ecx
443 #define PVOP_CALL_ARGS PVOP_VCALL_ARGS
444 #define PVOP_VCALL_CLOBBERS "=a" (__eax), "=d" (__edx), \
446 #define PVOP_CALL_CLOBBERS PVOP_VCALL_CLOBBERS
447 #define EXTRA_CLOBBERS
448 #define VEXTRA_CLOBBERS
450 #define PVOP_VCALL_ARGS unsigned long __edi, __esi, __edx, __ecx
451 #define PVOP_CALL_ARGS PVOP_VCALL_ARGS, __eax
452 #define PVOP_VCALL_CLOBBERS "=D" (__edi), \
453 "=S" (__esi), "=d" (__edx), \
456 #define PVOP_CALL_CLOBBERS PVOP_VCALL_CLOBBERS, "=a" (__eax)
458 #define EXTRA_CLOBBERS , "r8", "r9", "r10", "r11"
459 #define VEXTRA_CLOBBERS , "rax", "r8", "r9", "r10", "r11"
462 #define __PVOP_CALL(rettype, op, pre, post, ...) \
466 /* This is 32-bit specific, but is okay in 64-bit */ \
467 /* since this condition will never hold */ \
468 if (sizeof(rettype) > sizeof(unsigned long)) { \
470 paravirt_alt(PARAVIRT_CALL) \
472 : PVOP_CALL_CLOBBERS \
473 : paravirt_type(op), \
474 paravirt_clobber(CLBR_ANY), \
476 : "memory", "cc" EXTRA_CLOBBERS); \
477 __ret = (rettype)((((u64)__edx) << 32) | __eax); \
480 paravirt_alt(PARAVIRT_CALL) \
482 : PVOP_CALL_CLOBBERS \
483 : paravirt_type(op), \
484 paravirt_clobber(CLBR_ANY), \
486 : "memory", "cc" EXTRA_CLOBBERS); \
487 __ret = (rettype)__eax; \
491 #define __PVOP_VCALL(op, pre, post, ...) \
495 paravirt_alt(PARAVIRT_CALL) \
497 : PVOP_VCALL_CLOBBERS \
498 : paravirt_type(op), \
499 paravirt_clobber(CLBR_ANY), \
501 : "memory", "cc" VEXTRA_CLOBBERS); \
504 #define PVOP_CALL0(rettype, op) \
505 __PVOP_CALL(rettype, op, "", "")
506 #define PVOP_VCALL0(op) \
507 __PVOP_VCALL(op, "", "")
509 #define PVOP_CALL1(rettype, op, arg1) \
510 __PVOP_CALL(rettype, op, "", "", "0" ((unsigned long)(arg1)))
511 #define PVOP_VCALL1(op, arg1) \
512 __PVOP_VCALL(op, "", "", "0" ((unsigned long)(arg1)))
514 #define PVOP_CALL2(rettype, op, arg1, arg2) \
515 __PVOP_CALL(rettype, op, "", "", "0" ((unsigned long)(arg1)), \
516 "1" ((unsigned long)(arg2)))
517 #define PVOP_VCALL2(op, arg1, arg2) \
518 __PVOP_VCALL(op, "", "", "0" ((unsigned long)(arg1)), \
519 "1" ((unsigned long)(arg2)))
521 #define PVOP_CALL3(rettype, op, arg1, arg2, arg3) \
522 __PVOP_CALL(rettype, op, "", "", "0" ((unsigned long)(arg1)), \
523 "1"((unsigned long)(arg2)), "2"((unsigned long)(arg3)))
524 #define PVOP_VCALL3(op, arg1, arg2, arg3) \
525 __PVOP_VCALL(op, "", "", "0" ((unsigned long)(arg1)), \
526 "1"((unsigned long)(arg2)), "2"((unsigned long)(arg3)))
528 /* This is the only difference in x86_64. We can make it much simpler */
530 #define PVOP_CALL4(rettype, op, arg1, arg2, arg3, arg4) \
531 __PVOP_CALL(rettype, op, \
532 "push %[_arg4];", "lea 4(%%esp),%%esp;", \
533 "0" ((u32)(arg1)), "1" ((u32)(arg2)), \
534 "2" ((u32)(arg3)), [_arg4] "mr" ((u32)(arg4)))
535 #define PVOP_VCALL4(op, arg1, arg2, arg3, arg4) \
537 "push %[_arg4];", "lea 4(%%esp),%%esp;", \
538 "0" ((u32)(arg1)), "1" ((u32)(arg2)), \
539 "2" ((u32)(arg3)), [_arg4] "mr" ((u32)(arg4)))
541 #define PVOP_CALL4(rettype, op, arg1, arg2, arg3, arg4) \
542 __PVOP_CALL(rettype, op, "", "", "0" ((unsigned long)(arg1)), \
543 "1"((unsigned long)(arg2)), "2"((unsigned long)(arg3)), \
544 "3"((unsigned long)(arg4)))
545 #define PVOP_VCALL4(op, arg1, arg2, arg3, arg4) \
546 __PVOP_VCALL(op, "", "", "0" ((unsigned long)(arg1)), \
547 "1"((unsigned long)(arg2)), "2"((unsigned long)(arg3)), \
548 "3"((unsigned long)(arg4)))
551 static inline int paravirt_enabled(void)
553 return pv_info.paravirt_enabled;
556 static inline void load_sp0(struct tss_struct *tss,
557 struct thread_struct *thread)
559 PVOP_VCALL2(pv_cpu_ops.load_sp0, tss, thread);
562 #define ARCH_SETUP pv_init_ops.arch_setup();
563 static inline unsigned long get_wallclock(void)
565 return PVOP_CALL0(unsigned long, pv_time_ops.get_wallclock);
568 static inline int set_wallclock(unsigned long nowtime)
570 return PVOP_CALL1(int, pv_time_ops.set_wallclock, nowtime);
573 static inline void (*choose_time_init(void))(void)
575 return pv_time_ops.time_init;
578 /* The paravirtualized CPUID instruction. */
579 static inline void __cpuid(unsigned int *eax, unsigned int *ebx,
580 unsigned int *ecx, unsigned int *edx)
582 PVOP_VCALL4(pv_cpu_ops.cpuid, eax, ebx, ecx, edx);
586 * These special macros can be used to get or set a debugging register
588 static inline unsigned long paravirt_get_debugreg(int reg)
590 return PVOP_CALL1(unsigned long, pv_cpu_ops.get_debugreg, reg);
592 #define get_debugreg(var, reg) var = paravirt_get_debugreg(reg)
593 static inline void set_debugreg(unsigned long val, int reg)
595 PVOP_VCALL2(pv_cpu_ops.set_debugreg, reg, val);
598 static inline void clts(void)
600 PVOP_VCALL0(pv_cpu_ops.clts);
603 static inline unsigned long read_cr0(void)
605 return PVOP_CALL0(unsigned long, pv_cpu_ops.read_cr0);
608 static inline void write_cr0(unsigned long x)
610 PVOP_VCALL1(pv_cpu_ops.write_cr0, x);
613 static inline unsigned long read_cr2(void)
615 return PVOP_CALL0(unsigned long, pv_mmu_ops.read_cr2);
618 static inline void write_cr2(unsigned long x)
620 PVOP_VCALL1(pv_mmu_ops.write_cr2, x);
623 static inline unsigned long read_cr3(void)
625 return PVOP_CALL0(unsigned long, pv_mmu_ops.read_cr3);
628 static inline void write_cr3(unsigned long x)
630 PVOP_VCALL1(pv_mmu_ops.write_cr3, x);
633 static inline unsigned long read_cr4(void)
635 return PVOP_CALL0(unsigned long, pv_cpu_ops.read_cr4);
637 static inline unsigned long read_cr4_safe(void)
639 return PVOP_CALL0(unsigned long, pv_cpu_ops.read_cr4_safe);
642 static inline void write_cr4(unsigned long x)
644 PVOP_VCALL1(pv_cpu_ops.write_cr4, x);
648 static inline unsigned long read_cr8(void)
650 return PVOP_CALL0(unsigned long, pv_cpu_ops.read_cr8);
653 static inline void write_cr8(unsigned long x)
655 PVOP_VCALL1(pv_cpu_ops.write_cr8, x);
659 static inline void raw_safe_halt(void)
661 PVOP_VCALL0(pv_irq_ops.safe_halt);
664 static inline void halt(void)
666 PVOP_VCALL0(pv_irq_ops.safe_halt);
669 static inline void wbinvd(void)
671 PVOP_VCALL0(pv_cpu_ops.wbinvd);
674 #define get_kernel_rpl() (pv_info.kernel_rpl)
676 static inline u64 paravirt_read_msr(unsigned msr, int *err)
678 return PVOP_CALL2(u64, pv_cpu_ops.read_msr, msr, err);
680 static inline int paravirt_write_msr(unsigned msr, unsigned low, unsigned high)
682 return PVOP_CALL3(int, pv_cpu_ops.write_msr, msr, low, high);
685 /* These should all do BUG_ON(_err), but our headers are too tangled. */
686 #define rdmsr(msr, val1, val2) \
689 u64 _l = paravirt_read_msr(msr, &_err); \
694 #define wrmsr(msr, val1, val2) \
696 paravirt_write_msr(msr, val1, val2); \
699 #define rdmsrl(msr, val) \
702 val = paravirt_read_msr(msr, &_err); \
705 #define wrmsrl(msr, val) wrmsr(msr, (u32)((u64)(val)), ((u64)(val))>>32)
706 #define wrmsr_safe(msr, a, b) paravirt_write_msr(msr, a, b)
708 /* rdmsr with exception handling */
709 #define rdmsr_safe(msr, a, b) \
712 u64 _l = paravirt_read_msr(msr, &_err); \
718 static inline int rdmsrl_safe(unsigned msr, unsigned long long *p)
722 *p = paravirt_read_msr(msr, &err);
726 static inline u64 paravirt_read_tsc(void)
728 return PVOP_CALL0(u64, pv_cpu_ops.read_tsc);
731 #define rdtscl(low) \
733 u64 _l = paravirt_read_tsc(); \
737 #define rdtscll(val) (val = paravirt_read_tsc())
739 static inline unsigned long long paravirt_sched_clock(void)
741 return PVOP_CALL0(unsigned long long, pv_time_ops.sched_clock);
743 #define calculate_cpu_khz() (pv_time_ops.get_cpu_khz())
745 static inline unsigned long long paravirt_read_pmc(int counter)
747 return PVOP_CALL1(u64, pv_cpu_ops.read_pmc, counter);
750 #define rdpmc(counter, low, high) \
752 u64 _l = paravirt_read_pmc(counter); \
757 static inline unsigned long long paravirt_rdtscp(unsigned int *aux)
759 return PVOP_CALL1(u64, pv_cpu_ops.read_tscp, aux);
762 #define rdtscp(low, high, aux) \
765 unsigned long __val = paravirt_rdtscp(&__aux); \
766 (low) = (u32)__val; \
767 (high) = (u32)(__val >> 32); \
771 #define rdtscpll(val, aux) \
773 unsigned long __aux; \
774 val = paravirt_rdtscp(&__aux); \
778 static inline void load_TR_desc(void)
780 PVOP_VCALL0(pv_cpu_ops.load_tr_desc);
782 static inline void load_gdt(const struct desc_ptr *dtr)
784 PVOP_VCALL1(pv_cpu_ops.load_gdt, dtr);
786 static inline void load_idt(const struct desc_ptr *dtr)
788 PVOP_VCALL1(pv_cpu_ops.load_idt, dtr);
790 static inline void set_ldt(const void *addr, unsigned entries)
792 PVOP_VCALL2(pv_cpu_ops.set_ldt, addr, entries);
794 static inline void store_gdt(struct desc_ptr *dtr)
796 PVOP_VCALL1(pv_cpu_ops.store_gdt, dtr);
798 static inline void store_idt(struct desc_ptr *dtr)
800 PVOP_VCALL1(pv_cpu_ops.store_idt, dtr);
802 static inline unsigned long paravirt_store_tr(void)
804 return PVOP_CALL0(unsigned long, pv_cpu_ops.store_tr);
806 #define store_tr(tr) ((tr) = paravirt_store_tr())
807 static inline void load_TLS(struct thread_struct *t, unsigned cpu)
809 PVOP_VCALL2(pv_cpu_ops.load_tls, t, cpu);
812 static inline void write_ldt_entry(struct desc_struct *dt, int entry,
815 PVOP_VCALL3(pv_cpu_ops.write_ldt_entry, dt, entry, desc);
818 static inline void write_gdt_entry(struct desc_struct *dt, int entry,
819 void *desc, int type)
821 PVOP_VCALL4(pv_cpu_ops.write_gdt_entry, dt, entry, desc, type);
824 static inline void write_idt_entry(gate_desc *dt, int entry, const gate_desc *g)
826 PVOP_VCALL3(pv_cpu_ops.write_idt_entry, dt, entry, g);
828 static inline void set_iopl_mask(unsigned mask)
830 PVOP_VCALL1(pv_cpu_ops.set_iopl_mask, mask);
833 /* The paravirtualized I/O functions */
834 static inline void slow_down_io(void)
836 pv_cpu_ops.io_delay();
837 #ifdef REALLY_SLOW_IO
838 pv_cpu_ops.io_delay();
839 pv_cpu_ops.io_delay();
840 pv_cpu_ops.io_delay();
844 #ifdef CONFIG_X86_LOCAL_APIC
846 * Basic functions accessing APICs.
848 static inline void apic_write(unsigned long reg, u32 v)
850 PVOP_VCALL2(pv_apic_ops.apic_write, reg, v);
853 static inline void apic_write_atomic(unsigned long reg, u32 v)
855 PVOP_VCALL2(pv_apic_ops.apic_write_atomic, reg, v);
858 static inline u32 apic_read(unsigned long reg)
860 return PVOP_CALL1(unsigned long, pv_apic_ops.apic_read, reg);
863 static inline void setup_boot_clock(void)
865 PVOP_VCALL0(pv_apic_ops.setup_boot_clock);
868 static inline void setup_secondary_clock(void)
870 PVOP_VCALL0(pv_apic_ops.setup_secondary_clock);
874 static inline void paravirt_post_allocator_init(void)
876 if (pv_init_ops.post_allocator_init)
877 (*pv_init_ops.post_allocator_init)();
880 static inline void paravirt_pagetable_setup_start(pgd_t *base)
882 (*pv_mmu_ops.pagetable_setup_start)(base);
885 static inline void paravirt_pagetable_setup_done(pgd_t *base)
887 (*pv_mmu_ops.pagetable_setup_done)(base);
891 static inline void startup_ipi_hook(int phys_apicid, unsigned long start_eip,
892 unsigned long start_esp)
894 PVOP_VCALL3(pv_apic_ops.startup_ipi_hook,
895 phys_apicid, start_eip, start_esp);
899 static inline void paravirt_activate_mm(struct mm_struct *prev,
900 struct mm_struct *next)
902 PVOP_VCALL2(pv_mmu_ops.activate_mm, prev, next);
905 static inline void arch_dup_mmap(struct mm_struct *oldmm,
906 struct mm_struct *mm)
908 PVOP_VCALL2(pv_mmu_ops.dup_mmap, oldmm, mm);
911 static inline void arch_exit_mmap(struct mm_struct *mm)
913 PVOP_VCALL1(pv_mmu_ops.exit_mmap, mm);
916 static inline void __flush_tlb(void)
918 PVOP_VCALL0(pv_mmu_ops.flush_tlb_user);
920 static inline void __flush_tlb_global(void)
922 PVOP_VCALL0(pv_mmu_ops.flush_tlb_kernel);
924 static inline void __flush_tlb_single(unsigned long addr)
926 PVOP_VCALL1(pv_mmu_ops.flush_tlb_single, addr);
929 static inline void flush_tlb_others(cpumask_t cpumask, struct mm_struct *mm,
932 PVOP_VCALL3(pv_mmu_ops.flush_tlb_others, &cpumask, mm, va);
935 static inline int paravirt_pgd_alloc(struct mm_struct *mm)
937 return PVOP_CALL1(int, pv_mmu_ops.pgd_alloc, mm);
940 static inline void paravirt_pgd_free(struct mm_struct *mm, pgd_t *pgd)
942 PVOP_VCALL2(pv_mmu_ops.pgd_free, mm, pgd);
945 static inline void paravirt_alloc_pte(struct mm_struct *mm, unsigned pfn)
947 PVOP_VCALL2(pv_mmu_ops.alloc_pte, mm, pfn);
949 static inline void paravirt_release_pte(unsigned pfn)
951 PVOP_VCALL1(pv_mmu_ops.release_pte, pfn);
954 static inline void paravirt_alloc_pmd(struct mm_struct *mm, unsigned pfn)
956 PVOP_VCALL2(pv_mmu_ops.alloc_pmd, mm, pfn);
959 static inline void paravirt_alloc_pmd_clone(unsigned pfn, unsigned clonepfn,
960 unsigned start, unsigned count)
962 PVOP_VCALL4(pv_mmu_ops.alloc_pmd_clone, pfn, clonepfn, start, count);
964 static inline void paravirt_release_pmd(unsigned pfn)
966 PVOP_VCALL1(pv_mmu_ops.release_pmd, pfn);
969 static inline void paravirt_alloc_pud(struct mm_struct *mm, unsigned pfn)
971 PVOP_VCALL2(pv_mmu_ops.alloc_pud, mm, pfn);
973 static inline void paravirt_release_pud(unsigned pfn)
975 PVOP_VCALL1(pv_mmu_ops.release_pud, pfn);
978 #ifdef CONFIG_HIGHPTE
979 static inline void *kmap_atomic_pte(struct page *page, enum km_type type)
982 ret = PVOP_CALL2(unsigned long, pv_mmu_ops.kmap_atomic_pte, page, type);
987 static inline void pte_update(struct mm_struct *mm, unsigned long addr,
990 PVOP_VCALL3(pv_mmu_ops.pte_update, mm, addr, ptep);
993 static inline void pte_update_defer(struct mm_struct *mm, unsigned long addr,
996 PVOP_VCALL3(pv_mmu_ops.pte_update_defer, mm, addr, ptep);
999 static inline pte_t __pte(pteval_t val)
1003 if (sizeof(pteval_t) > sizeof(long))
1004 ret = PVOP_CALL2(pteval_t,
1005 pv_mmu_ops.make_pte,
1006 val, (u64)val >> 32);
1008 ret = PVOP_CALL1(pteval_t,
1009 pv_mmu_ops.make_pte,
1012 return (pte_t) { .pte = ret };
1015 static inline pteval_t pte_val(pte_t pte)
1019 if (sizeof(pteval_t) > sizeof(long))
1020 ret = PVOP_CALL2(pteval_t, pv_mmu_ops.pte_val,
1021 pte.pte, (u64)pte.pte >> 32);
1023 ret = PVOP_CALL1(pteval_t, pv_mmu_ops.pte_val,
1029 static inline pteval_t pte_flags(pte_t pte)
1033 if (sizeof(pteval_t) > sizeof(long))
1034 ret = PVOP_CALL2(pteval_t, pv_mmu_ops.pte_flags,
1035 pte.pte, (u64)pte.pte >> 32);
1037 ret = PVOP_CALL1(pteval_t, pv_mmu_ops.pte_flags,
1043 static inline pgd_t __pgd(pgdval_t val)
1047 if (sizeof(pgdval_t) > sizeof(long))
1048 ret = PVOP_CALL2(pgdval_t, pv_mmu_ops.make_pgd,
1049 val, (u64)val >> 32);
1051 ret = PVOP_CALL1(pgdval_t, pv_mmu_ops.make_pgd,
1054 return (pgd_t) { ret };
1057 static inline pgdval_t pgd_val(pgd_t pgd)
1061 if (sizeof(pgdval_t) > sizeof(long))
1062 ret = PVOP_CALL2(pgdval_t, pv_mmu_ops.pgd_val,
1063 pgd.pgd, (u64)pgd.pgd >> 32);
1065 ret = PVOP_CALL1(pgdval_t, pv_mmu_ops.pgd_val,
1071 #define __HAVE_ARCH_PTEP_MODIFY_PROT_TRANSACTION
1072 static inline pte_t ptep_modify_prot_start(struct mm_struct *mm, unsigned long addr,
1077 ret = PVOP_CALL3(pteval_t, pv_mmu_ops.ptep_modify_prot_start,
1080 return (pte_t) { .pte = ret };
1083 static inline void ptep_modify_prot_commit(struct mm_struct *mm, unsigned long addr,
1084 pte_t *ptep, pte_t pte)
1086 if (sizeof(pteval_t) > sizeof(long))
1088 pv_mmu_ops.ptep_modify_prot_commit(mm, addr, ptep, pte);
1090 PVOP_VCALL4(pv_mmu_ops.ptep_modify_prot_commit,
1091 mm, addr, ptep, pte.pte);
1094 static inline void set_pte(pte_t *ptep, pte_t pte)
1096 if (sizeof(pteval_t) > sizeof(long))
1097 PVOP_VCALL3(pv_mmu_ops.set_pte, ptep,
1098 pte.pte, (u64)pte.pte >> 32);
1100 PVOP_VCALL2(pv_mmu_ops.set_pte, ptep,
1104 static inline void set_pte_at(struct mm_struct *mm, unsigned long addr,
1105 pte_t *ptep, pte_t pte)
1107 if (sizeof(pteval_t) > sizeof(long))
1109 pv_mmu_ops.set_pte_at(mm, addr, ptep, pte);
1111 PVOP_VCALL4(pv_mmu_ops.set_pte_at, mm, addr, ptep, pte.pte);
1114 static inline void set_pmd(pmd_t *pmdp, pmd_t pmd)
1116 pmdval_t val = native_pmd_val(pmd);
1118 if (sizeof(pmdval_t) > sizeof(long))
1119 PVOP_VCALL3(pv_mmu_ops.set_pmd, pmdp, val, (u64)val >> 32);
1121 PVOP_VCALL2(pv_mmu_ops.set_pmd, pmdp, val);
1124 #if PAGETABLE_LEVELS >= 3
1125 static inline pmd_t __pmd(pmdval_t val)
1129 if (sizeof(pmdval_t) > sizeof(long))
1130 ret = PVOP_CALL2(pmdval_t, pv_mmu_ops.make_pmd,
1131 val, (u64)val >> 32);
1133 ret = PVOP_CALL1(pmdval_t, pv_mmu_ops.make_pmd,
1136 return (pmd_t) { ret };
1139 static inline pmdval_t pmd_val(pmd_t pmd)
1143 if (sizeof(pmdval_t) > sizeof(long))
1144 ret = PVOP_CALL2(pmdval_t, pv_mmu_ops.pmd_val,
1145 pmd.pmd, (u64)pmd.pmd >> 32);
1147 ret = PVOP_CALL1(pmdval_t, pv_mmu_ops.pmd_val,
1153 static inline void set_pud(pud_t *pudp, pud_t pud)
1155 pudval_t val = native_pud_val(pud);
1157 if (sizeof(pudval_t) > sizeof(long))
1158 PVOP_VCALL3(pv_mmu_ops.set_pud, pudp,
1159 val, (u64)val >> 32);
1161 PVOP_VCALL2(pv_mmu_ops.set_pud, pudp,
1164 #if PAGETABLE_LEVELS == 4
1165 static inline pud_t __pud(pudval_t val)
1169 if (sizeof(pudval_t) > sizeof(long))
1170 ret = PVOP_CALL2(pudval_t, pv_mmu_ops.make_pud,
1171 val, (u64)val >> 32);
1173 ret = PVOP_CALL1(pudval_t, pv_mmu_ops.make_pud,
1176 return (pud_t) { ret };
1179 static inline pudval_t pud_val(pud_t pud)
1183 if (sizeof(pudval_t) > sizeof(long))
1184 ret = PVOP_CALL2(pudval_t, pv_mmu_ops.pud_val,
1185 pud.pud, (u64)pud.pud >> 32);
1187 ret = PVOP_CALL1(pudval_t, pv_mmu_ops.pud_val,
1193 static inline void set_pgd(pgd_t *pgdp, pgd_t pgd)
1195 pgdval_t val = native_pgd_val(pgd);
1197 if (sizeof(pgdval_t) > sizeof(long))
1198 PVOP_VCALL3(pv_mmu_ops.set_pgd, pgdp,
1199 val, (u64)val >> 32);
1201 PVOP_VCALL2(pv_mmu_ops.set_pgd, pgdp,
1205 static inline void pgd_clear(pgd_t *pgdp)
1207 set_pgd(pgdp, __pgd(0));
1210 static inline void pud_clear(pud_t *pudp)
1212 set_pud(pudp, __pud(0));
1215 #endif /* PAGETABLE_LEVELS == 4 */
1217 #endif /* PAGETABLE_LEVELS >= 3 */
1219 #ifdef CONFIG_X86_PAE
1220 /* Special-case pte-setting operations for PAE, which can't update a
1221 64-bit pte atomically */
1222 static inline void set_pte_atomic(pte_t *ptep, pte_t pte)
1224 PVOP_VCALL3(pv_mmu_ops.set_pte_atomic, ptep,
1225 pte.pte, pte.pte >> 32);
1228 static inline void set_pte_present(struct mm_struct *mm, unsigned long addr,
1229 pte_t *ptep, pte_t pte)
1232 pv_mmu_ops.set_pte_present(mm, addr, ptep, pte);
1235 static inline void pte_clear(struct mm_struct *mm, unsigned long addr,
1238 PVOP_VCALL3(pv_mmu_ops.pte_clear, mm, addr, ptep);
1241 static inline void pmd_clear(pmd_t *pmdp)
1243 PVOP_VCALL1(pv_mmu_ops.pmd_clear, pmdp);
1245 #else /* !CONFIG_X86_PAE */
1246 static inline void set_pte_atomic(pte_t *ptep, pte_t pte)
1251 static inline void set_pte_present(struct mm_struct *mm, unsigned long addr,
1252 pte_t *ptep, pte_t pte)
1257 static inline void pte_clear(struct mm_struct *mm, unsigned long addr,
1260 set_pte_at(mm, addr, ptep, __pte(0));
1263 static inline void pmd_clear(pmd_t *pmdp)
1265 set_pmd(pmdp, __pmd(0));
1267 #endif /* CONFIG_X86_PAE */
1269 /* Lazy mode for batching updates / context switch */
1270 enum paravirt_lazy_mode {
1276 enum paravirt_lazy_mode paravirt_get_lazy_mode(void);
1277 void paravirt_enter_lazy_cpu(void);
1278 void paravirt_leave_lazy_cpu(void);
1279 void paravirt_enter_lazy_mmu(void);
1280 void paravirt_leave_lazy_mmu(void);
1281 void paravirt_leave_lazy(enum paravirt_lazy_mode mode);
1283 #define __HAVE_ARCH_ENTER_LAZY_CPU_MODE
1284 static inline void arch_enter_lazy_cpu_mode(void)
1286 PVOP_VCALL0(pv_cpu_ops.lazy_mode.enter);
1289 static inline void arch_leave_lazy_cpu_mode(void)
1291 PVOP_VCALL0(pv_cpu_ops.lazy_mode.leave);
1294 static inline void arch_flush_lazy_cpu_mode(void)
1296 if (unlikely(paravirt_get_lazy_mode() == PARAVIRT_LAZY_CPU)) {
1297 arch_leave_lazy_cpu_mode();
1298 arch_enter_lazy_cpu_mode();
1303 #define __HAVE_ARCH_ENTER_LAZY_MMU_MODE
1304 static inline void arch_enter_lazy_mmu_mode(void)
1306 PVOP_VCALL0(pv_mmu_ops.lazy_mode.enter);
1309 static inline void arch_leave_lazy_mmu_mode(void)
1311 PVOP_VCALL0(pv_mmu_ops.lazy_mode.leave);
1314 static inline void arch_flush_lazy_mmu_mode(void)
1316 if (unlikely(paravirt_get_lazy_mode() == PARAVIRT_LAZY_MMU)) {
1317 arch_leave_lazy_mmu_mode();
1318 arch_enter_lazy_mmu_mode();
1322 static inline void __set_fixmap(unsigned /* enum fixed_addresses */ idx,
1323 unsigned long phys, pgprot_t flags)
1325 pv_mmu_ops.set_fixmap(idx, phys, flags);
1328 void _paravirt_nop(void);
1329 #define paravirt_nop ((void *)_paravirt_nop)
1331 /* These all sit in the .parainstructions section to tell us what to patch. */
1332 struct paravirt_patch_site {
1333 u8 *instr; /* original instructions */
1334 u8 instrtype; /* type of this instruction */
1335 u8 len; /* length of original instruction */
1336 u16 clobbers; /* what registers you may clobber */
1339 extern struct paravirt_patch_site __parainstructions[],
1340 __parainstructions_end[];
1342 #ifdef CONFIG_X86_32
1343 #define PV_SAVE_REGS "pushl %%ecx; pushl %%edx;"
1344 #define PV_RESTORE_REGS "popl %%edx; popl %%ecx"
1345 #define PV_FLAGS_ARG "0"
1346 #define PV_EXTRA_CLOBBERS
1347 #define PV_VEXTRA_CLOBBERS
1349 /* We save some registers, but all of them, that's too much. We clobber all
1350 * caller saved registers but the argument parameter */
1351 #define PV_SAVE_REGS "pushq %%rdi;"
1352 #define PV_RESTORE_REGS "popq %%rdi;"
1353 #define PV_EXTRA_CLOBBERS EXTRA_CLOBBERS, "rcx" , "rdx"
1354 #define PV_VEXTRA_CLOBBERS EXTRA_CLOBBERS, "rdi", "rcx" , "rdx"
1355 #define PV_FLAGS_ARG "D"
1358 static inline unsigned long __raw_local_save_flags(void)
1362 asm volatile(paravirt_alt(PV_SAVE_REGS
1366 : paravirt_type(pv_irq_ops.save_fl),
1367 paravirt_clobber(CLBR_EAX)
1368 : "memory", "cc" PV_VEXTRA_CLOBBERS);
1372 static inline void raw_local_irq_restore(unsigned long f)
1374 asm volatile(paravirt_alt(PV_SAVE_REGS
1379 paravirt_type(pv_irq_ops.restore_fl),
1380 paravirt_clobber(CLBR_EAX)
1381 : "memory", "cc" PV_EXTRA_CLOBBERS);
1384 static inline void raw_local_irq_disable(void)
1386 asm volatile(paravirt_alt(PV_SAVE_REGS
1390 : paravirt_type(pv_irq_ops.irq_disable),
1391 paravirt_clobber(CLBR_EAX)
1392 : "memory", "eax", "cc" PV_EXTRA_CLOBBERS);
1395 static inline void raw_local_irq_enable(void)
1397 asm volatile(paravirt_alt(PV_SAVE_REGS
1401 : paravirt_type(pv_irq_ops.irq_enable),
1402 paravirt_clobber(CLBR_EAX)
1403 : "memory", "eax", "cc" PV_EXTRA_CLOBBERS);
1406 static inline unsigned long __raw_local_irq_save(void)
1410 f = __raw_local_save_flags();
1411 raw_local_irq_disable();
1415 /* Make sure as little as possible of this mess escapes. */
1416 #undef PARAVIRT_CALL
1430 #else /* __ASSEMBLY__ */
1432 #define _PVSITE(ptype, clobbers, ops, word, algn) \
1436 .pushsection .parainstructions,"a"; \
1445 #ifdef CONFIG_X86_64
1446 #define PV_SAVE_REGS pushq %rax; pushq %rdi; pushq %rcx; pushq %rdx
1447 #define PV_RESTORE_REGS popq %rdx; popq %rcx; popq %rdi; popq %rax
1448 #define PARA_PATCH(struct, off) ((PARAVIRT_PATCH_##struct + (off)) / 8)
1449 #define PARA_SITE(ptype, clobbers, ops) _PVSITE(ptype, clobbers, ops, .quad, 8)
1451 #define PV_SAVE_REGS pushl %eax; pushl %edi; pushl %ecx; pushl %edx
1452 #define PV_RESTORE_REGS popl %edx; popl %ecx; popl %edi; popl %eax
1453 #define PARA_PATCH(struct, off) ((PARAVIRT_PATCH_##struct + (off)) / 4)
1454 #define PARA_SITE(ptype, clobbers, ops) _PVSITE(ptype, clobbers, ops, .long, 4)
1457 #define INTERRUPT_RETURN \
1458 PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_iret), CLBR_NONE, \
1459 jmp *%cs:pv_cpu_ops+PV_CPU_iret)
1461 #define DISABLE_INTERRUPTS(clobbers) \
1462 PARA_SITE(PARA_PATCH(pv_irq_ops, PV_IRQ_irq_disable), clobbers, \
1464 call *%cs:pv_irq_ops+PV_IRQ_irq_disable; \
1467 #define ENABLE_INTERRUPTS(clobbers) \
1468 PARA_SITE(PARA_PATCH(pv_irq_ops, PV_IRQ_irq_enable), clobbers, \
1470 call *%cs:pv_irq_ops+PV_IRQ_irq_enable; \
1473 #define ENABLE_INTERRUPTS_SYSCALL_RET \
1474 PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_irq_enable_syscall_ret),\
1476 jmp *%cs:pv_cpu_ops+PV_CPU_irq_enable_syscall_ret)
1479 #ifdef CONFIG_X86_32
1480 #define GET_CR0_INTO_EAX \
1481 push %ecx; push %edx; \
1482 call *pv_cpu_ops+PV_CPU_read_cr0; \
1486 PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_swapgs), CLBR_NONE, \
1488 call *pv_cpu_ops+PV_CPU_swapgs; \
1492 #define GET_CR2_INTO_RCX \
1493 call *pv_mmu_ops+PV_MMU_read_cr2; \
1499 #endif /* __ASSEMBLY__ */
1500 #endif /* CONFIG_PARAVIRT */
1501 #endif /* __ASM_PARAVIRT_H */