1 #ifndef __ASM_PARAVIRT_H
2 #define __ASM_PARAVIRT_H
3 /* Various instructions on x86 need to be replaced for
4 * para-virtualization: those hooks are defined here. */
10 /* Bitmask of what can be clobbered: usually at least eax. */
12 #define CLBR_EAX (1 << 0)
13 #define CLBR_ECX (1 << 1)
14 #define CLBR_EDX (1 << 2)
17 #define CLBR_RSI (1 << 3)
18 #define CLBR_RDI (1 << 4)
19 #define CLBR_R8 (1 << 5)
20 #define CLBR_R9 (1 << 6)
21 #define CLBR_R10 (1 << 7)
22 #define CLBR_R11 (1 << 8)
23 #define CLBR_ANY ((1 << 9) - 1)
24 #include <asm/desc_defs.h>
26 /* CLBR_ANY should match all regs platform has. For i386, that's just it */
27 #define CLBR_ANY ((1 << 3) - 1)
31 #include <linux/types.h>
32 #include <linux/cpumask.h>
33 #include <asm/kmap_types.h>
34 #include <asm/desc_defs.h>
45 unsigned int kernel_rpl;
46 int shared_kernel_pmd;
53 * Patch may replace one of the defined code sequences with
54 * arbitrary code, subject to the same register constraints.
55 * This generally means the code is not free to clobber any
56 * registers other than EAX. The patch function should return
57 * the number of bytes of code generated, as we nop pad the
58 * rest in generic code.
60 unsigned (*patch)(u8 type, u16 clobber, void *insnbuf,
61 unsigned long addr, unsigned len);
63 /* Basic arch-specific setup */
64 void (*arch_setup)(void);
65 char *(*memory_setup)(void);
66 void (*post_allocator_init)(void);
68 /* Print a banner to identify the environment */
74 /* Set deferred update mode, used for batching operations. */
80 void (*time_init)(void);
82 /* Set and set time of day */
83 unsigned long (*get_wallclock)(void);
84 int (*set_wallclock)(unsigned long);
86 unsigned long long (*sched_clock)(void);
87 unsigned long (*get_cpu_khz)(void);
91 /* hooks for various privileged instructions */
92 unsigned long (*get_debugreg)(int regno);
93 void (*set_debugreg)(int regno, unsigned long value);
97 unsigned long (*read_cr0)(void);
98 void (*write_cr0)(unsigned long);
100 unsigned long (*read_cr4_safe)(void);
101 unsigned long (*read_cr4)(void);
102 void (*write_cr4)(unsigned long);
104 /* Segment descriptor handling */
105 void (*load_tr_desc)(void);
106 void (*load_gdt)(const struct desc_ptr *);
107 void (*load_idt)(const struct desc_ptr *);
108 void (*store_gdt)(struct desc_ptr *);
109 void (*store_idt)(struct desc_ptr *);
110 void (*set_ldt)(const void *desc, unsigned entries);
111 unsigned long (*store_tr)(void);
112 void (*load_tls)(struct thread_struct *t, unsigned int cpu);
113 void (*write_ldt_entry)(struct desc_struct *ldt, int entrynum,
115 void (*write_gdt_entry)(struct desc_struct *,
116 int entrynum, const void *desc, int size);
117 void (*write_idt_entry)(gate_desc *,
118 int entrynum, const gate_desc *gate);
119 void (*load_sp0)(struct tss_struct *tss, struct thread_struct *t);
121 void (*set_iopl_mask)(unsigned mask);
123 void (*wbinvd)(void);
124 void (*io_delay)(void);
126 /* cpuid emulation, mostly so that caps bits can be disabled */
127 void (*cpuid)(unsigned int *eax, unsigned int *ebx,
128 unsigned int *ecx, unsigned int *edx);
130 /* MSR, PMC and TSR operations.
131 err = 0/-EFAULT. wrmsr returns 0/-EFAULT. */
132 u64 (*read_msr)(unsigned int msr, int *err);
133 int (*write_msr)(unsigned int msr, unsigned low, unsigned high);
135 u64 (*read_tsc)(void);
136 u64 (*read_pmc)(int counter);
137 unsigned long long (*read_tscp)(unsigned int *aux);
139 /* These two are jmp to, not actually called. */
140 void (*irq_enable_syscall_ret)(void);
143 void (*swapgs)(void);
145 struct pv_lazy_ops lazy_mode;
149 void (*init_IRQ)(void);
152 * Get/set interrupt state. save_fl and restore_fl are only
153 * expected to use X86_EFLAGS_IF; all other bits
154 * returned from save_fl are undefined, and may be ignored by
157 unsigned long (*save_fl)(void);
158 void (*restore_fl)(unsigned long);
159 void (*irq_disable)(void);
160 void (*irq_enable)(void);
161 void (*safe_halt)(void);
166 #ifdef CONFIG_X86_LOCAL_APIC
168 * Direct APIC operations, principally for VMI. Ideally
169 * these shouldn't be in this interface.
171 void (*apic_write)(unsigned long reg, u32 v);
172 void (*apic_write_atomic)(unsigned long reg, u32 v);
173 u32 (*apic_read)(unsigned long reg);
174 void (*setup_boot_clock)(void);
175 void (*setup_secondary_clock)(void);
177 void (*startup_ipi_hook)(int phys_apicid,
178 unsigned long start_eip,
179 unsigned long start_esp);
185 * Called before/after init_mm pagetable setup. setup_start
186 * may reset %cr3, and may pre-install parts of the pagetable;
187 * pagetable setup is expected to preserve any existing
190 void (*pagetable_setup_start)(pgd_t *pgd_base);
191 void (*pagetable_setup_done)(pgd_t *pgd_base);
193 unsigned long (*read_cr2)(void);
194 void (*write_cr2)(unsigned long);
196 unsigned long (*read_cr3)(void);
197 void (*write_cr3)(unsigned long);
200 * Hooks for intercepting the creation/use/destruction of an
203 void (*activate_mm)(struct mm_struct *prev,
204 struct mm_struct *next);
205 void (*dup_mmap)(struct mm_struct *oldmm,
206 struct mm_struct *mm);
207 void (*exit_mmap)(struct mm_struct *mm);
211 void (*flush_tlb_user)(void);
212 void (*flush_tlb_kernel)(void);
213 void (*flush_tlb_single)(unsigned long addr);
214 void (*flush_tlb_others)(const cpumask_t *cpus, struct mm_struct *mm,
217 /* Hooks for allocating/releasing pagetable pages */
218 void (*alloc_pt)(struct mm_struct *mm, u32 pfn);
219 void (*alloc_pd)(u32 pfn);
220 void (*alloc_pd_clone)(u32 pfn, u32 clonepfn, u32 start, u32 count);
221 void (*release_pt)(u32 pfn);
222 void (*release_pd)(u32 pfn);
224 /* Pagetable manipulation functions */
225 void (*set_pte)(pte_t *ptep, pte_t pteval);
226 void (*set_pte_at)(struct mm_struct *mm, unsigned long addr,
227 pte_t *ptep, pte_t pteval);
228 void (*set_pmd)(pmd_t *pmdp, pmd_t pmdval);
229 void (*pte_update)(struct mm_struct *mm, unsigned long addr, pte_t *ptep);
230 void (*pte_update_defer)(struct mm_struct *mm,
231 unsigned long addr, pte_t *ptep);
233 #ifdef CONFIG_X86_PAE
234 void (*set_pte_atomic)(pte_t *ptep, pte_t pteval);
235 void (*set_pte_present)(struct mm_struct *mm, unsigned long addr,
236 pte_t *ptep, pte_t pte);
237 void (*set_pud)(pud_t *pudp, pud_t pudval);
238 void (*pte_clear)(struct mm_struct *mm, unsigned long addr, pte_t *ptep);
239 void (*pmd_clear)(pmd_t *pmdp);
241 unsigned long long (*pte_val)(pte_t);
242 unsigned long long (*pmd_val)(pmd_t);
243 unsigned long long (*pgd_val)(pgd_t);
245 pte_t (*make_pte)(unsigned long long pte);
246 pmd_t (*make_pmd)(unsigned long long pmd);
247 pgd_t (*make_pgd)(unsigned long long pgd);
249 unsigned long (*pte_val)(pte_t);
250 unsigned long (*pgd_val)(pgd_t);
252 pte_t (*make_pte)(unsigned long pte);
253 pgd_t (*make_pgd)(unsigned long pgd);
256 #ifdef CONFIG_HIGHPTE
257 void *(*kmap_atomic_pte)(struct page *page, enum km_type type);
260 struct pv_lazy_ops lazy_mode;
263 /* This contains all the paravirt structures: we get a convenient
264 * number for each function using the offset which we use to indicate
266 struct paravirt_patch_template
268 struct pv_init_ops pv_init_ops;
269 struct pv_time_ops pv_time_ops;
270 struct pv_cpu_ops pv_cpu_ops;
271 struct pv_irq_ops pv_irq_ops;
272 struct pv_apic_ops pv_apic_ops;
273 struct pv_mmu_ops pv_mmu_ops;
276 extern struct pv_info pv_info;
277 extern struct pv_init_ops pv_init_ops;
278 extern struct pv_time_ops pv_time_ops;
279 extern struct pv_cpu_ops pv_cpu_ops;
280 extern struct pv_irq_ops pv_irq_ops;
281 extern struct pv_apic_ops pv_apic_ops;
282 extern struct pv_mmu_ops pv_mmu_ops;
284 #define PARAVIRT_PATCH(x) \
285 (offsetof(struct paravirt_patch_template, x) / sizeof(void *))
287 #define paravirt_type(op) \
288 [paravirt_typenum] "i" (PARAVIRT_PATCH(op)), \
289 [paravirt_opptr] "m" (op)
290 #define paravirt_clobber(clobber) \
291 [paravirt_clobber] "i" (clobber)
294 * Generate some code, and mark it as patchable by the
295 * apply_paravirt() alternate instruction patcher.
297 #define _paravirt_alt(insn_string, type, clobber) \
298 "771:\n\t" insn_string "\n" "772:\n" \
299 ".pushsection .parainstructions,\"a\"\n" \
302 " .byte " type "\n" \
303 " .byte 772b-771b\n" \
304 " .short " clobber "\n" \
307 /* Generate patchable code, with the default asm parameters. */
308 #define paravirt_alt(insn_string) \
309 _paravirt_alt(insn_string, "%c[paravirt_typenum]", "%c[paravirt_clobber]")
311 unsigned paravirt_patch_nop(void);
312 unsigned paravirt_patch_ignore(unsigned len);
313 unsigned paravirt_patch_call(void *insnbuf,
314 const void *target, u16 tgt_clobbers,
315 unsigned long addr, u16 site_clobbers,
317 unsigned paravirt_patch_jmp(void *insnbuf, const void *target,
318 unsigned long addr, unsigned len);
319 unsigned paravirt_patch_default(u8 type, u16 clobbers, void *insnbuf,
320 unsigned long addr, unsigned len);
322 unsigned paravirt_patch_insns(void *insnbuf, unsigned len,
323 const char *start, const char *end);
325 int paravirt_disable_iospace(void);
328 * This generates an indirect call based on the operation type number.
329 * The type number, computed in PARAVIRT_PATCH, is derived from the
330 * offset into the paravirt_patch_template structure, and can therefore be
331 * freely converted back into a structure offset.
333 #define PARAVIRT_CALL "call *%[paravirt_opptr];"
336 * These macros are intended to wrap calls through one of the paravirt
337 * ops structs, so that they can be later identified and patched at
340 * Normally, a call to a pv_op function is a simple indirect call:
341 * (pv_op_struct.operations)(args...).
343 * Unfortunately, this is a relatively slow operation for modern CPUs,
344 * because it cannot necessarily determine what the destination
345 * address is. In this case, the address is a runtime constant, so at
346 * the very least we can patch the call to e a simple direct call, or
347 * ideally, patch an inline implementation into the callsite. (Direct
348 * calls are essentially free, because the call and return addresses
349 * are completely predictable.)
351 * For i386, these macros rely on the standard gcc "regparm(3)" calling
352 * convention, in which the first three arguments are placed in %eax,
353 * %edx, %ecx (in that order), and the remaining arguments are placed
354 * on the stack. All caller-save registers (eax,edx,ecx) are expected
355 * to be modified (either clobbered or used for return values).
356 * X86_64, on the other hand, already specifies a register-based calling
357 * conventions, returning at %rax, with parameteres going on %rdi, %rsi,
358 * %rdx, and %rcx. Note that for this reason, x86_64 does not need any
359 * special handling for dealing with 4 arguments, unlike i386.
360 * However, x86_64 also have to clobber all caller saved registers, which
361 * unfortunately, are quite a bit (r8 - r11)
363 * The call instruction itself is marked by placing its start address
364 * and size into the .parainstructions section, so that
365 * apply_paravirt() in arch/i386/kernel/alternative.c can do the
366 * appropriate patching under the control of the backend pv_init_ops
369 * Unfortunately there's no way to get gcc to generate the args setup
370 * for the call, and then allow the call itself to be generated by an
371 * inline asm. Because of this, we must do the complete arg setup and
372 * return value handling from within these macros. This is fairly
375 * There are 5 sets of PVOP_* macros for dealing with 0-4 arguments.
376 * It could be extended to more arguments, but there would be little
377 * to be gained from that. For each number of arguments, there are
378 * the two VCALL and CALL variants for void and non-void functions.
380 * When there is a return value, the invoker of the macro must specify
381 * the return type. The macro then uses sizeof() on that type to
382 * determine whether its a 32 or 64 bit value, and places the return
383 * in the right register(s) (just %eax for 32-bit, and %edx:%eax for
384 * 64-bit). For x86_64 machines, it just returns at %rax regardless of
385 * the return value size.
387 * 64-bit arguments are passed as a pair of adjacent 32-bit arguments
388 * i386 also passes 64-bit arguments as a pair of adjacent 32-bit arguments
391 * Small structures are passed and returned in registers. The macro
392 * calling convention can't directly deal with this, so the wrapper
393 * functions must do this.
395 * These PVOP_* macros are only defined within this header. This
396 * means that all uses must be wrapped in inline functions. This also
397 * makes sure the incoming and outgoing types are always correct.
400 #define PVOP_VCALL_ARGS unsigned long __eax, __edx, __ecx
401 #define PVOP_CALL_ARGS PVOP_VCALL_ARGS
402 #define PVOP_VCALL_CLOBBERS "=a" (__eax), "=d" (__edx), \
404 #define PVOP_CALL_CLOBBERS PVOP_VCALL_CLOBBERS
405 #define EXTRA_CLOBBERS
406 #define VEXTRA_CLOBBERS
408 #define PVOP_VCALL_ARGS unsigned long __edi, __esi, __edx, __ecx
409 #define PVOP_CALL_ARGS PVOP_VCALL_ARGS, __eax
410 #define PVOP_VCALL_CLOBBERS "=D" (__edi), \
411 "=S" (__esi), "=d" (__edx), \
414 #define PVOP_CALL_CLOBBERS PVOP_VCALL_CLOBBERS, "=a" (__eax)
416 #define EXTRA_CLOBBERS , "r8", "r9", "r10", "r11"
417 #define VEXTRA_CLOBBERS , "rax", "r8", "r9", "r10", "r11"
420 #define __PVOP_CALL(rettype, op, pre, post, ...) \
424 /* This is 32-bit specific, but is okay in 64-bit */ \
425 /* since this condition will never hold */ \
426 if (sizeof(rettype) > sizeof(unsigned long)) { \
428 paravirt_alt(PARAVIRT_CALL) \
430 : PVOP_CALL_CLOBBERS \
431 : paravirt_type(op), \
432 paravirt_clobber(CLBR_ANY), \
434 : "memory", "cc" EXTRA_CLOBBERS); \
435 __ret = (rettype)((((u64)__edx) << 32) | __eax); \
438 paravirt_alt(PARAVIRT_CALL) \
440 : PVOP_CALL_CLOBBERS \
441 : paravirt_type(op), \
442 paravirt_clobber(CLBR_ANY), \
444 : "memory", "cc" EXTRA_CLOBBERS); \
445 __ret = (rettype)__eax; \
449 #define __PVOP_VCALL(op, pre, post, ...) \
453 paravirt_alt(PARAVIRT_CALL) \
455 : PVOP_VCALL_CLOBBERS \
456 : paravirt_type(op), \
457 paravirt_clobber(CLBR_ANY), \
459 : "memory", "cc" VEXTRA_CLOBBERS); \
462 #define PVOP_CALL0(rettype, op) \
463 __PVOP_CALL(rettype, op, "", "")
464 #define PVOP_VCALL0(op) \
465 __PVOP_VCALL(op, "", "")
467 #define PVOP_CALL1(rettype, op, arg1) \
468 __PVOP_CALL(rettype, op, "", "", "0" ((unsigned long)(arg1)))
469 #define PVOP_VCALL1(op, arg1) \
470 __PVOP_VCALL(op, "", "", "0" ((unsigned long)(arg1)))
472 #define PVOP_CALL2(rettype, op, arg1, arg2) \
473 __PVOP_CALL(rettype, op, "", "", "0" ((unsigned long)(arg1)), \
474 "1" ((unsigned long)(arg2)))
475 #define PVOP_VCALL2(op, arg1, arg2) \
476 __PVOP_VCALL(op, "", "", "0" ((unsigned long)(arg1)), \
477 "1" ((unsigned long)(arg2)))
479 #define PVOP_CALL3(rettype, op, arg1, arg2, arg3) \
480 __PVOP_CALL(rettype, op, "", "", "0" ((unsigned long)(arg1)), \
481 "1"((unsigned long)(arg2)), "2"((unsigned long)(arg3)))
482 #define PVOP_VCALL3(op, arg1, arg2, arg3) \
483 __PVOP_VCALL(op, "", "", "0" ((unsigned long)(arg1)), \
484 "1"((unsigned long)(arg2)), "2"((unsigned long)(arg3)))
486 /* This is the only difference in x86_64. We can make it much simpler */
488 #define PVOP_CALL4(rettype, op, arg1, arg2, arg3, arg4) \
489 __PVOP_CALL(rettype, op, \
490 "push %[_arg4];", "lea 4(%%esp),%%esp;", \
491 "0" ((u32)(arg1)), "1" ((u32)(arg2)), \
492 "2" ((u32)(arg3)), [_arg4] "mr" ((u32)(arg4)))
493 #define PVOP_VCALL4(op, arg1, arg2, arg3, arg4) \
495 "push %[_arg4];", "lea 4(%%esp),%%esp;", \
496 "0" ((u32)(arg1)), "1" ((u32)(arg2)), \
497 "2" ((u32)(arg3)), [_arg4] "mr" ((u32)(arg4)))
499 #define PVOP_CALL4(rettype, op, arg1, arg2, arg3, arg4) \
500 __PVOP_CALL(rettype, op, "", "", "0" ((unsigned long)(arg1)), \
501 "1"((unsigned long)(arg2)), "2"((unsigned long)(arg3)), \
502 "3"((unsigned long)(arg4)))
503 #define PVOP_VCALL4(op, arg1, arg2, arg3, arg4) \
504 __PVOP_VCALL(op, "", "", "0" ((unsigned long)(arg1)), \
505 "1"((unsigned long)(arg2)), "2"((unsigned long)(arg3)), \
506 "3"((unsigned long)(arg4)))
509 static inline int paravirt_enabled(void)
511 return pv_info.paravirt_enabled;
514 static inline void load_sp0(struct tss_struct *tss,
515 struct thread_struct *thread)
517 PVOP_VCALL2(pv_cpu_ops.load_sp0, tss, thread);
520 #define ARCH_SETUP pv_init_ops.arch_setup();
521 static inline unsigned long get_wallclock(void)
523 return PVOP_CALL0(unsigned long, pv_time_ops.get_wallclock);
526 static inline int set_wallclock(unsigned long nowtime)
528 return PVOP_CALL1(int, pv_time_ops.set_wallclock, nowtime);
531 static inline void (*choose_time_init(void))(void)
533 return pv_time_ops.time_init;
536 /* The paravirtualized CPUID instruction. */
537 static inline void __cpuid(unsigned int *eax, unsigned int *ebx,
538 unsigned int *ecx, unsigned int *edx)
540 PVOP_VCALL4(pv_cpu_ops.cpuid, eax, ebx, ecx, edx);
544 * These special macros can be used to get or set a debugging register
546 static inline unsigned long paravirt_get_debugreg(int reg)
548 return PVOP_CALL1(unsigned long, pv_cpu_ops.get_debugreg, reg);
550 #define get_debugreg(var, reg) var = paravirt_get_debugreg(reg)
551 static inline void set_debugreg(unsigned long val, int reg)
553 PVOP_VCALL2(pv_cpu_ops.set_debugreg, reg, val);
556 static inline void clts(void)
558 PVOP_VCALL0(pv_cpu_ops.clts);
561 static inline unsigned long read_cr0(void)
563 return PVOP_CALL0(unsigned long, pv_cpu_ops.read_cr0);
566 static inline void write_cr0(unsigned long x)
568 PVOP_VCALL1(pv_cpu_ops.write_cr0, x);
571 static inline unsigned long read_cr2(void)
573 return PVOP_CALL0(unsigned long, pv_mmu_ops.read_cr2);
576 static inline void write_cr2(unsigned long x)
578 PVOP_VCALL1(pv_mmu_ops.write_cr2, x);
581 static inline unsigned long read_cr3(void)
583 return PVOP_CALL0(unsigned long, pv_mmu_ops.read_cr3);
586 static inline void write_cr3(unsigned long x)
588 PVOP_VCALL1(pv_mmu_ops.write_cr3, x);
591 static inline unsigned long read_cr4(void)
593 return PVOP_CALL0(unsigned long, pv_cpu_ops.read_cr4);
595 static inline unsigned long read_cr4_safe(void)
597 return PVOP_CALL0(unsigned long, pv_cpu_ops.read_cr4_safe);
600 static inline void write_cr4(unsigned long x)
602 PVOP_VCALL1(pv_cpu_ops.write_cr4, x);
605 static inline void raw_safe_halt(void)
607 PVOP_VCALL0(pv_irq_ops.safe_halt);
610 static inline void halt(void)
612 PVOP_VCALL0(pv_irq_ops.safe_halt);
615 static inline void wbinvd(void)
617 PVOP_VCALL0(pv_cpu_ops.wbinvd);
620 #define get_kernel_rpl() (pv_info.kernel_rpl)
622 static inline u64 paravirt_read_msr(unsigned msr, int *err)
624 return PVOP_CALL2(u64, pv_cpu_ops.read_msr, msr, err);
626 static inline int paravirt_write_msr(unsigned msr, unsigned low, unsigned high)
628 return PVOP_CALL3(int, pv_cpu_ops.write_msr, msr, low, high);
631 /* These should all do BUG_ON(_err), but our headers are too tangled. */
632 #define rdmsr(msr,val1,val2) do { \
634 u64 _l = paravirt_read_msr(msr, &_err); \
639 #define wrmsr(msr,val1,val2) do { \
640 paravirt_write_msr(msr, val1, val2); \
643 #define rdmsrl(msr,val) do { \
645 val = paravirt_read_msr(msr, &_err); \
648 #define wrmsrl(msr,val) wrmsr(msr, (u32)((u64)(val)), ((u64)(val))>>32)
649 #define wrmsr_safe(msr,a,b) paravirt_write_msr(msr, a, b)
651 /* rdmsr with exception handling */
652 #define rdmsr_safe(msr,a,b) ({ \
654 u64 _l = paravirt_read_msr(msr, &_err); \
660 static inline u64 paravirt_read_tsc(void)
662 return PVOP_CALL0(u64, pv_cpu_ops.read_tsc);
665 #define rdtscl(low) do { \
666 u64 _l = paravirt_read_tsc(); \
670 #define rdtscll(val) (val = paravirt_read_tsc())
672 static inline unsigned long long paravirt_sched_clock(void)
674 return PVOP_CALL0(unsigned long long, pv_time_ops.sched_clock);
676 #define calculate_cpu_khz() (pv_time_ops.get_cpu_khz())
678 static inline unsigned long long paravirt_read_pmc(int counter)
680 return PVOP_CALL1(u64, pv_cpu_ops.read_pmc, counter);
683 #define rdpmc(counter,low,high) do { \
684 u64 _l = paravirt_read_pmc(counter); \
689 static inline unsigned long long paravirt_rdtscp(unsigned int *aux)
691 return PVOP_CALL1(u64, pv_cpu_ops.read_tscp, aux);
694 #define rdtscp(low, high, aux) \
697 unsigned long __val = paravirt_rdtscp(&__aux); \
698 (low) = (u32)__val; \
699 (high) = (u32)(__val >> 32); \
703 #define rdtscpll(val, aux) \
705 unsigned long __aux; \
706 val = paravirt_rdtscp(&__aux); \
710 static inline void load_TR_desc(void)
712 PVOP_VCALL0(pv_cpu_ops.load_tr_desc);
714 static inline void load_gdt(const struct desc_ptr *dtr)
716 PVOP_VCALL1(pv_cpu_ops.load_gdt, dtr);
718 static inline void load_idt(const struct desc_ptr *dtr)
720 PVOP_VCALL1(pv_cpu_ops.load_idt, dtr);
722 static inline void set_ldt(const void *addr, unsigned entries)
724 PVOP_VCALL2(pv_cpu_ops.set_ldt, addr, entries);
726 static inline void store_gdt(struct desc_ptr *dtr)
728 PVOP_VCALL1(pv_cpu_ops.store_gdt, dtr);
730 static inline void store_idt(struct desc_ptr *dtr)
732 PVOP_VCALL1(pv_cpu_ops.store_idt, dtr);
734 static inline unsigned long paravirt_store_tr(void)
736 return PVOP_CALL0(unsigned long, pv_cpu_ops.store_tr);
738 #define store_tr(tr) ((tr) = paravirt_store_tr())
739 static inline void load_TLS(struct thread_struct *t, unsigned cpu)
741 PVOP_VCALL2(pv_cpu_ops.load_tls, t, cpu);
744 static inline void write_ldt_entry(struct desc_struct *dt, int entry,
747 PVOP_VCALL3(pv_cpu_ops.write_ldt_entry, dt, entry, desc);
750 static inline void write_gdt_entry(struct desc_struct *dt, int entry,
751 void *desc, int type)
753 PVOP_VCALL4(pv_cpu_ops.write_gdt_entry, dt, entry, desc, type);
756 static inline void write_idt_entry(gate_desc *dt, int entry, const gate_desc *g)
758 PVOP_VCALL3(pv_cpu_ops.write_idt_entry, dt, entry, g);
760 static inline void set_iopl_mask(unsigned mask)
762 PVOP_VCALL1(pv_cpu_ops.set_iopl_mask, mask);
765 /* The paravirtualized I/O functions */
766 static inline void slow_down_io(void) {
767 pv_cpu_ops.io_delay();
768 #ifdef REALLY_SLOW_IO
769 pv_cpu_ops.io_delay();
770 pv_cpu_ops.io_delay();
771 pv_cpu_ops.io_delay();
775 #ifdef CONFIG_X86_LOCAL_APIC
777 * Basic functions accessing APICs.
779 static inline void apic_write(unsigned long reg, u32 v)
781 PVOP_VCALL2(pv_apic_ops.apic_write, reg, v);
784 static inline void apic_write_atomic(unsigned long reg, u32 v)
786 PVOP_VCALL2(pv_apic_ops.apic_write_atomic, reg, v);
789 static inline u32 apic_read(unsigned long reg)
791 return PVOP_CALL1(unsigned long, pv_apic_ops.apic_read, reg);
794 static inline void setup_boot_clock(void)
796 PVOP_VCALL0(pv_apic_ops.setup_boot_clock);
799 static inline void setup_secondary_clock(void)
801 PVOP_VCALL0(pv_apic_ops.setup_secondary_clock);
805 static inline void paravirt_post_allocator_init(void)
807 if (pv_init_ops.post_allocator_init)
808 (*pv_init_ops.post_allocator_init)();
811 static inline void paravirt_pagetable_setup_start(pgd_t *base)
813 (*pv_mmu_ops.pagetable_setup_start)(base);
816 static inline void paravirt_pagetable_setup_done(pgd_t *base)
818 (*pv_mmu_ops.pagetable_setup_done)(base);
822 static inline void startup_ipi_hook(int phys_apicid, unsigned long start_eip,
823 unsigned long start_esp)
825 PVOP_VCALL3(pv_apic_ops.startup_ipi_hook,
826 phys_apicid, start_eip, start_esp);
830 static inline void paravirt_activate_mm(struct mm_struct *prev,
831 struct mm_struct *next)
833 PVOP_VCALL2(pv_mmu_ops.activate_mm, prev, next);
836 static inline void arch_dup_mmap(struct mm_struct *oldmm,
837 struct mm_struct *mm)
839 PVOP_VCALL2(pv_mmu_ops.dup_mmap, oldmm, mm);
842 static inline void arch_exit_mmap(struct mm_struct *mm)
844 PVOP_VCALL1(pv_mmu_ops.exit_mmap, mm);
847 static inline void __flush_tlb(void)
849 PVOP_VCALL0(pv_mmu_ops.flush_tlb_user);
851 static inline void __flush_tlb_global(void)
853 PVOP_VCALL0(pv_mmu_ops.flush_tlb_kernel);
855 static inline void __flush_tlb_single(unsigned long addr)
857 PVOP_VCALL1(pv_mmu_ops.flush_tlb_single, addr);
860 static inline void flush_tlb_others(cpumask_t cpumask, struct mm_struct *mm,
863 PVOP_VCALL3(pv_mmu_ops.flush_tlb_others, &cpumask, mm, va);
866 static inline void paravirt_alloc_pt(struct mm_struct *mm, unsigned pfn)
868 PVOP_VCALL2(pv_mmu_ops.alloc_pt, mm, pfn);
870 static inline void paravirt_release_pt(unsigned pfn)
872 PVOP_VCALL1(pv_mmu_ops.release_pt, pfn);
875 static inline void paravirt_alloc_pd(unsigned pfn)
877 PVOP_VCALL1(pv_mmu_ops.alloc_pd, pfn);
880 static inline void paravirt_alloc_pd_clone(unsigned pfn, unsigned clonepfn,
881 unsigned start, unsigned count)
883 PVOP_VCALL4(pv_mmu_ops.alloc_pd_clone, pfn, clonepfn, start, count);
885 static inline void paravirt_release_pd(unsigned pfn)
887 PVOP_VCALL1(pv_mmu_ops.release_pd, pfn);
890 #ifdef CONFIG_HIGHPTE
891 static inline void *kmap_atomic_pte(struct page *page, enum km_type type)
894 ret = PVOP_CALL2(unsigned long, pv_mmu_ops.kmap_atomic_pte, page, type);
899 static inline void pte_update(struct mm_struct *mm, unsigned long addr,
902 PVOP_VCALL3(pv_mmu_ops.pte_update, mm, addr, ptep);
905 static inline void pte_update_defer(struct mm_struct *mm, unsigned long addr,
908 PVOP_VCALL3(pv_mmu_ops.pte_update_defer, mm, addr, ptep);
911 #ifdef CONFIG_X86_PAE
912 static inline pte_t __pte(unsigned long long val)
914 unsigned long long ret = PVOP_CALL2(unsigned long long,
917 return (pte_t) { ret, ret >> 32 };
920 static inline pmd_t __pmd(unsigned long long val)
922 return (pmd_t) { PVOP_CALL2(unsigned long long, pv_mmu_ops.make_pmd,
926 static inline pgd_t __pgd(unsigned long long val)
928 return (pgd_t) { PVOP_CALL2(unsigned long long, pv_mmu_ops.make_pgd,
932 static inline unsigned long long pte_val(pte_t x)
934 return PVOP_CALL2(unsigned long long, pv_mmu_ops.pte_val,
935 x.pte_low, x.pte_high);
938 static inline unsigned long long pmd_val(pmd_t x)
940 return PVOP_CALL2(unsigned long long, pv_mmu_ops.pmd_val,
944 static inline unsigned long long pgd_val(pgd_t x)
946 return PVOP_CALL2(unsigned long long, pv_mmu_ops.pgd_val,
950 static inline void set_pte(pte_t *ptep, pte_t pteval)
952 PVOP_VCALL3(pv_mmu_ops.set_pte, ptep, pteval.pte_low, pteval.pte_high);
955 static inline void set_pte_at(struct mm_struct *mm, unsigned long addr,
956 pte_t *ptep, pte_t pteval)
959 pv_mmu_ops.set_pte_at(mm, addr, ptep, pteval);
962 static inline void set_pte_atomic(pte_t *ptep, pte_t pteval)
964 PVOP_VCALL3(pv_mmu_ops.set_pte_atomic, ptep,
965 pteval.pte_low, pteval.pte_high);
968 static inline void set_pte_present(struct mm_struct *mm, unsigned long addr,
969 pte_t *ptep, pte_t pte)
972 pv_mmu_ops.set_pte_present(mm, addr, ptep, pte);
975 static inline void set_pmd(pmd_t *pmdp, pmd_t pmdval)
977 PVOP_VCALL3(pv_mmu_ops.set_pmd, pmdp,
978 pmdval.pmd, pmdval.pmd >> 32);
981 static inline void set_pud(pud_t *pudp, pud_t pudval)
983 PVOP_VCALL3(pv_mmu_ops.set_pud, pudp,
984 pudval.pgd.pgd, pudval.pgd.pgd >> 32);
987 static inline void pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
989 PVOP_VCALL3(pv_mmu_ops.pte_clear, mm, addr, ptep);
992 static inline void pmd_clear(pmd_t *pmdp)
994 PVOP_VCALL1(pv_mmu_ops.pmd_clear, pmdp);
997 #else /* !CONFIG_X86_PAE */
999 static inline pte_t __pte(unsigned long val)
1001 return (pte_t) { PVOP_CALL1(unsigned long, pv_mmu_ops.make_pte, val) };
1004 static inline pgd_t __pgd(unsigned long val)
1006 return (pgd_t) { PVOP_CALL1(unsigned long, pv_mmu_ops.make_pgd, val) };
1009 static inline unsigned long pte_val(pte_t x)
1011 return PVOP_CALL1(unsigned long, pv_mmu_ops.pte_val, x.pte_low);
1014 static inline unsigned long pgd_val(pgd_t x)
1016 return PVOP_CALL1(unsigned long, pv_mmu_ops.pgd_val, x.pgd);
1019 static inline void set_pte(pte_t *ptep, pte_t pteval)
1021 PVOP_VCALL2(pv_mmu_ops.set_pte, ptep, pteval.pte_low);
1024 static inline void set_pte_at(struct mm_struct *mm, unsigned long addr,
1025 pte_t *ptep, pte_t pteval)
1027 PVOP_VCALL4(pv_mmu_ops.set_pte_at, mm, addr, ptep, pteval.pte_low);
1030 static inline void set_pmd(pmd_t *pmdp, pmd_t pmdval)
1032 PVOP_VCALL2(pv_mmu_ops.set_pmd, pmdp, pmdval.pud.pgd.pgd);
1034 #endif /* CONFIG_X86_PAE */
1036 /* Lazy mode for batching updates / context switch */
1037 enum paravirt_lazy_mode {
1043 enum paravirt_lazy_mode paravirt_get_lazy_mode(void);
1044 void paravirt_enter_lazy_cpu(void);
1045 void paravirt_leave_lazy_cpu(void);
1046 void paravirt_enter_lazy_mmu(void);
1047 void paravirt_leave_lazy_mmu(void);
1048 void paravirt_leave_lazy(enum paravirt_lazy_mode mode);
1050 #define __HAVE_ARCH_ENTER_LAZY_CPU_MODE
1051 static inline void arch_enter_lazy_cpu_mode(void)
1053 PVOP_VCALL0(pv_cpu_ops.lazy_mode.enter);
1056 static inline void arch_leave_lazy_cpu_mode(void)
1058 PVOP_VCALL0(pv_cpu_ops.lazy_mode.leave);
1061 static inline void arch_flush_lazy_cpu_mode(void)
1063 if (unlikely(paravirt_get_lazy_mode() == PARAVIRT_LAZY_CPU)) {
1064 arch_leave_lazy_cpu_mode();
1065 arch_enter_lazy_cpu_mode();
1070 #define __HAVE_ARCH_ENTER_LAZY_MMU_MODE
1071 static inline void arch_enter_lazy_mmu_mode(void)
1073 PVOP_VCALL0(pv_mmu_ops.lazy_mode.enter);
1076 static inline void arch_leave_lazy_mmu_mode(void)
1078 PVOP_VCALL0(pv_mmu_ops.lazy_mode.leave);
1081 static inline void arch_flush_lazy_mmu_mode(void)
1083 if (unlikely(paravirt_get_lazy_mode() == PARAVIRT_LAZY_MMU)) {
1084 arch_leave_lazy_mmu_mode();
1085 arch_enter_lazy_mmu_mode();
1089 void _paravirt_nop(void);
1090 #define paravirt_nop ((void *)_paravirt_nop)
1092 /* These all sit in the .parainstructions section to tell us what to patch. */
1093 struct paravirt_patch_site {
1094 u8 *instr; /* original instructions */
1095 u8 instrtype; /* type of this instruction */
1096 u8 len; /* length of original instruction */
1097 u16 clobbers; /* what registers you may clobber */
1100 extern struct paravirt_patch_site __parainstructions[],
1101 __parainstructions_end[];
1103 #ifdef CONFIG_X86_32
1104 #define PV_SAVE_REGS "pushl %%ecx; pushl %%edx;"
1105 #define PV_RESTORE_REGS "popl %%edx; popl %%ecx"
1106 #define PV_FLAGS_ARG "0"
1107 #define PV_EXTRA_CLOBBERS
1108 #define PV_VEXTRA_CLOBBERS
1110 /* We save some registers, but all of them, that's too much. We clobber all
1111 * caller saved registers but the argument parameter */
1112 #define PV_SAVE_REGS "pushq %%rdi;"
1113 #define PV_RESTORE_REGS "popq %%rdi;"
1114 #define PV_EXTRA_CLOBBERS EXTRA_CLOBBERS, "rcx" , "rdx"
1115 #define PV_VEXTRA_CLOBBERS EXTRA_CLOBBERS, "rdi", "rcx" , "rdx"
1116 #define PV_FLAGS_ARG "D"
1119 static inline unsigned long __raw_local_save_flags(void)
1123 asm volatile(paravirt_alt(PV_SAVE_REGS
1127 : paravirt_type(pv_irq_ops.save_fl),
1128 paravirt_clobber(CLBR_EAX)
1129 : "memory", "cc" PV_VEXTRA_CLOBBERS);
1133 static inline void raw_local_irq_restore(unsigned long f)
1135 asm volatile(paravirt_alt(PV_SAVE_REGS
1140 paravirt_type(pv_irq_ops.restore_fl),
1141 paravirt_clobber(CLBR_EAX)
1142 : "memory", "cc" PV_EXTRA_CLOBBERS);
1145 static inline void raw_local_irq_disable(void)
1147 asm volatile(paravirt_alt(PV_SAVE_REGS
1151 : paravirt_type(pv_irq_ops.irq_disable),
1152 paravirt_clobber(CLBR_EAX)
1153 : "memory", "eax", "cc" PV_EXTRA_CLOBBERS);
1156 static inline void raw_local_irq_enable(void)
1158 asm volatile(paravirt_alt(PV_SAVE_REGS
1162 : paravirt_type(pv_irq_ops.irq_enable),
1163 paravirt_clobber(CLBR_EAX)
1164 : "memory", "eax", "cc" PV_EXTRA_CLOBBERS);
1167 static inline unsigned long __raw_local_irq_save(void)
1171 f = __raw_local_save_flags();
1172 raw_local_irq_disable();
1176 /* Make sure as little as possible of this mess escapes. */
1177 #undef PARAVIRT_CALL
1191 #else /* __ASSEMBLY__ */
1193 #define _PVSITE(ptype, clobbers, ops, word, algn) \
1197 .pushsection .parainstructions,"a"; \
1206 #ifdef CONFIG_X86_64
1207 #define PV_SAVE_REGS pushq %rax; pushq %rdi; pushq %rcx; pushq %rdx
1208 #define PV_RESTORE_REGS popq %rdx; popq %rcx; popq %rdi; popq %rax
1209 #define PARA_PATCH(struct, off) ((PARAVIRT_PATCH_##struct + (off)) / 8)
1210 #define PARA_SITE(ptype, clobbers, ops) _PVSITE(ptype, clobbers, ops, .quad, 8)
1212 #define PV_SAVE_REGS pushl %eax; pushl %edi; pushl %ecx; pushl %edx
1213 #define PV_RESTORE_REGS popl %edx; popl %ecx; popl %edi; popl %eax
1214 #define PARA_PATCH(struct, off) ((PARAVIRT_PATCH_##struct + (off)) / 4)
1215 #define PARA_SITE(ptype, clobbers, ops) _PVSITE(ptype, clobbers, ops, .long, 4)
1218 #define INTERRUPT_RETURN \
1219 PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_iret), CLBR_NONE, \
1220 jmp *%cs:pv_cpu_ops+PV_CPU_iret)
1222 #define DISABLE_INTERRUPTS(clobbers) \
1223 PARA_SITE(PARA_PATCH(pv_irq_ops, PV_IRQ_irq_disable), clobbers, \
1225 call *%cs:pv_irq_ops+PV_IRQ_irq_disable; \
1228 #define ENABLE_INTERRUPTS(clobbers) \
1229 PARA_SITE(PARA_PATCH(pv_irq_ops, PV_IRQ_irq_enable), clobbers, \
1231 call *%cs:pv_irq_ops+PV_IRQ_irq_enable; \
1234 #define ENABLE_INTERRUPTS_SYSCALL_RET \
1235 PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_irq_enable_syscall_ret),\
1237 jmp *%cs:pv_cpu_ops+PV_CPU_irq_enable_syscall_ret)
1240 #ifdef CONFIG_X86_32
1241 #define GET_CR0_INTO_EAX \
1242 push %ecx; push %edx; \
1243 call *pv_cpu_ops+PV_CPU_read_cr0; \
1247 PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_swapgs), CLBR_NONE, \
1249 call *pv_cpu_ops+PV_CPU_swapgs; \
1253 #define GET_CR2_INTO_RCX \
1254 call *pv_mmu_ops+PV_MMU_read_cr2; \
1260 #endif /* __ASSEMBLY__ */
1261 #endif /* CONFIG_PARAVIRT */
1262 #endif /* __ASM_PARAVIRT_H */