1 #ifndef _AM_X86_MPSPEC_H
2 #define _AM_X86_MPSPEC_H
4 #include <linux/init.h>
6 #include <asm/mpspec_def.h>
9 #include <mach_mpspec.h>
11 extern unsigned int def_to_bigsmp;
12 extern int apic_version[MAX_APICS];
13 extern u8 apicid_2_node[];
16 #define MAX_APICID 256
20 #define MAX_MP_BUSSES 256
21 /* Each PCI slot may be a combo card with its own bus. 4 IRQ pins per slot. */
22 #define MAX_IRQ_SOURCES (MAX_MP_BUSSES * 4)
24 extern void early_find_smp_config(void);
25 extern void early_get_smp_config(void);
29 #if defined(CONFIG_MCA) || defined(CONFIG_EISA)
30 extern int mp_bus_id_to_type[MAX_MP_BUSSES];
33 extern DECLARE_BITMAP(mp_bus_not_pci, MAX_MP_BUSSES);
35 extern unsigned int boot_cpu_physical_apicid;
36 extern int smp_found_config;
37 extern int mpc_default_type;
38 extern unsigned long mp_lapic_addr;
40 extern void find_smp_config(void);
41 extern void get_smp_config(void);
43 void __cpuinit generic_processor_info(int apicid, int version);
45 extern void mp_register_ioapic(int id, u32 address, u32 gsi_base);
46 extern void mp_override_legacy_irq(u8 bus_irq, u8 polarity, u8 trigger,
48 extern void mp_config_acpi_legacy_irqs(void);
49 extern int mp_register_gsi(u32 gsi, int edge_level, int active_high_low);
50 #endif /* CONFIG_ACPI */
52 #define PHYSID_ARRAY_SIZE BITS_TO_LONGS(MAX_APICS)
55 unsigned long mask[PHYSID_ARRAY_SIZE];
58 typedef struct physid_mask physid_mask_t;
60 #define physid_set(physid, map) set_bit(physid, (map).mask)
61 #define physid_clear(physid, map) clear_bit(physid, (map).mask)
62 #define physid_isset(physid, map) test_bit(physid, (map).mask)
63 #define physid_test_and_set(physid, map) \
64 test_and_set_bit(physid, (map).mask)
66 #define physids_and(dst, src1, src2) \
67 bitmap_and((dst).mask, (src1).mask, (src2).mask, MAX_APICS)
69 #define physids_or(dst, src1, src2) \
70 bitmap_or((dst).mask, (src1).mask, (src2).mask, MAX_APICS)
72 #define physids_clear(map) \
73 bitmap_zero((map).mask, MAX_APICS)
75 #define physids_complement(dst, src) \
76 bitmap_complement((dst).mask, (src).mask, MAX_APICS)
78 #define physids_empty(map) \
79 bitmap_empty((map).mask, MAX_APICS)
81 #define physids_equal(map1, map2) \
82 bitmap_equal((map1).mask, (map2).mask, MAX_APICS)
84 #define physids_weight(map) \
85 bitmap_weight((map).mask, MAX_APICS)
87 #define physids_shift_right(d, s, n) \
88 bitmap_shift_right((d).mask, (s).mask, n, MAX_APICS)
90 #define physids_shift_left(d, s, n) \
91 bitmap_shift_left((d).mask, (s).mask, n, MAX_APICS)
93 #define physids_coerce(map) ((map).mask[0])
95 #define physids_promote(physids) \
97 physid_mask_t __physid_mask = PHYSID_MASK_NONE; \
98 __physid_mask.mask[0] = physids; \
102 #define physid_mask_of_physid(physid) \
104 physid_mask_t __physid_mask = PHYSID_MASK_NONE; \
105 physid_set(physid, __physid_mask); \
109 #define PHYSID_MASK_ALL { {[0 ... PHYSID_ARRAY_SIZE-1] = ~0UL} }
110 #define PHYSID_MASK_NONE { {[0 ... PHYSID_ARRAY_SIZE-1] = 0UL} }
112 extern physid_mask_t phys_cpu_present_map;