1 #ifndef __X86_64_MMU_CONTEXT_H
2 #define __X86_64_MMU_CONTEXT_H
5 #include <asm/atomic.h>
6 #include <asm/pgalloc.h>
8 #include <asm/pgtable.h>
9 #include <asm/tlbflush.h>
10 #ifndef CONFIG_PARAVIRT
11 #include <asm-generic/mm_hooks.h>
15 * possibly do the LDT unload here?
17 int init_new_context(struct task_struct *tsk, struct mm_struct *mm);
18 void destroy_context(struct mm_struct *mm);
20 static inline void enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk)
23 if (read_pda(mmu_state) == TLBSTATE_OK)
24 write_pda(mmu_state, TLBSTATE_LAZY);
28 static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next,
29 struct task_struct *tsk)
31 unsigned cpu = smp_processor_id();
32 if (likely(prev != next)) {
33 /* stop flush ipis for the previous mm */
34 cpu_clear(cpu, prev->cpu_vm_mask);
36 write_pda(mmu_state, TLBSTATE_OK);
37 write_pda(active_mm, next);
39 cpu_set(cpu, next->cpu_vm_mask);
42 if (unlikely(next->context.ldt != prev->context.ldt))
43 load_LDT_nolock(&next->context);
47 write_pda(mmu_state, TLBSTATE_OK);
48 if (read_pda(active_mm) != next)
50 if (!cpu_test_and_set(cpu, next->cpu_vm_mask)) {
51 /* We were in lazy tlb mode and leave_mm disabled
52 * tlb flush IPI delivery. We must reload CR3
53 * to make sure to use no freed page tables.
56 load_LDT_nolock(&next->context);
62 #define deactivate_mm(tsk,mm) do { \
64 asm volatile("movl %0,%%fs"::"r"(0)); \
67 #define activate_mm(prev, next) \
68 switch_mm((prev),(next),NULL)