1 #ifndef _ASM_I386_DMA_MAPPING_H
2 #define _ASM_I386_DMA_MAPPING_H
5 #include <linux/scatterlist.h>
11 #define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f)
12 #define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h)
14 void *dma_alloc_coherent(struct device *dev, size_t size,
15 dma_addr_t *dma_handle, gfp_t flag);
17 void dma_free_coherent(struct device *dev, size_t size,
18 void *vaddr, dma_addr_t dma_handle);
20 static inline dma_addr_t
21 dma_map_page(struct device *dev, struct page *page, unsigned long offset,
22 size_t size, enum dma_data_direction direction)
24 BUG_ON(!valid_dma_direction(direction));
25 return page_to_phys(page) + offset;
29 dma_unmap_page(struct device *dev, dma_addr_t dma_address, size_t size,
30 enum dma_data_direction direction)
32 BUG_ON(!valid_dma_direction(direction));
36 dma_sync_single_for_cpu(struct device *dev, dma_addr_t dma_handle, size_t size,
37 enum dma_data_direction direction)
42 dma_sync_single_for_device(struct device *dev, dma_addr_t dma_handle, size_t size,
43 enum dma_data_direction direction)
45 flush_write_buffers();
49 dma_sync_single_range_for_cpu(struct device *dev, dma_addr_t dma_handle,
50 unsigned long offset, size_t size,
51 enum dma_data_direction direction)
56 dma_sync_single_range_for_device(struct device *dev, dma_addr_t dma_handle,
57 unsigned long offset, size_t size,
58 enum dma_data_direction direction)
60 flush_write_buffers();
64 dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg, int nelems,
65 enum dma_data_direction direction)
70 dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg, int nelems,
71 enum dma_data_direction direction)
73 flush_write_buffers();
77 dma_mapping_error(dma_addr_t dma_addr)
82 extern int forbid_dac;
85 dma_supported(struct device *dev, u64 mask)
88 * we fall back to GFP_DMA when the mask isn't all 1s,
89 * so we can't guarantee allocations that must be
90 * within a tighter range than GFP_DMA..
95 /* Work around chipset bugs */
96 if (forbid_dac > 0 && mask > 0xffffffffULL)
103 dma_set_mask(struct device *dev, u64 mask)
105 if(!dev->dma_mask || !dma_supported(dev, mask))
108 *dev->dma_mask = mask;
114 dma_get_cache_alignment(void)
116 /* no easy way to get cache size on all x86, so return the
117 * maximum possible, to be safe */
118 return (1 << INTERNODE_CACHE_SHIFT);
121 #define dma_is_consistent(d, h) (1)
124 dma_cache_sync(struct device *dev, void *vaddr, size_t size,
125 enum dma_data_direction direction)
127 flush_write_buffers();
130 #define ARCH_HAS_DMA_DECLARE_COHERENT_MEMORY
132 dma_declare_coherent_memory(struct device *dev, dma_addr_t bus_addr,
133 dma_addr_t device_addr, size_t size, int flags);
136 dma_release_declared_memory(struct device *dev);
139 dma_mark_declared_memory_occupied(struct device *dev,
140 dma_addr_t device_addr, size_t size);