1 /* $Id: pgtable.h,v 1.156 2002/02/09 19:49:31 davem Exp $
2 * pgtable.h: SpitFire page table operations.
4 * Copyright 1996,1997 David S. Miller (davem@caip.rutgers.edu)
5 * Copyright 1997,1998 Jakub Jelinek (jj@sunsite.mff.cuni.cz)
8 #ifndef _SPARC64_PGTABLE_H
9 #define _SPARC64_PGTABLE_H
11 /* This file contains the functions and defines necessary to modify and use
12 * the SpitFire page tables.
15 #include <asm-generic/pgtable-nopud.h>
17 #include <linux/config.h>
18 #include <linux/compiler.h>
19 #include <asm/types.h>
20 #include <asm/spitfire.h>
22 #include <asm/system.h>
24 #include <asm/processor.h>
25 #include <asm/const.h>
27 /* The kernel image occupies 0x4000000 to 0x1000000 (4MB --> 32MB).
28 * The page copy blockops can use 0x2000000 to 0x4000000.
29 * The TSB is mapped in the 0x4000000 to 0x6000000 range.
30 * The PROM resides in an area spanning 0xf0000000 to 0x100000000.
31 * The vmalloc area spans 0x100000000 to 0x200000000.
32 * Since modules need to be in the lowest 32-bits of the address space,
33 * we place them right before the OBP area from 0x10000000 to 0xf0000000.
34 * There is a single static kernel PMD which maps from 0x0 to address
37 #define TLBTEMP_BASE _AC(0x0000000002000000,UL)
38 #define TSBMAP_BASE _AC(0x0000000004000000,UL)
39 #define MODULES_VADDR _AC(0x0000000010000000,UL)
40 #define MODULES_LEN _AC(0x00000000e0000000,UL)
41 #define MODULES_END _AC(0x00000000f0000000,UL)
42 #define LOW_OBP_ADDRESS _AC(0x00000000f0000000,UL)
43 #define HI_OBP_ADDRESS _AC(0x0000000100000000,UL)
44 #define VMALLOC_START _AC(0x0000000100000000,UL)
45 #define VMALLOC_END _AC(0x0000000200000000,UL)
47 /* XXX All of this needs to be rethought so we can take advantage
48 * XXX cheetah's full 64-bit virtual address space, ie. no more hole
49 * XXX in the middle like on spitfire. -DaveM
52 * Given a virtual address, the lowest PAGE_SHIFT bits determine offset
53 * into the page; the next higher PAGE_SHIFT-3 bits determine the pte#
54 * in the proper pagetable (the -3 is from the 8 byte ptes, and each page
55 * table is a single page long). The next higher PMD_BITS determine pmd#
56 * in the proper pmdtable (where we must have PMD_BITS <= (PAGE_SHIFT-2)
57 * since the pmd entries are 4 bytes, and each pmd page is a single page
58 * long). Finally, the higher few bits determine pgde#.
61 /* PMD_SHIFT determines the size of the area a second-level page
64 #define PMD_SHIFT (PAGE_SHIFT + (PAGE_SHIFT-3))
65 #define PMD_SIZE (_AC(1,UL) << PMD_SHIFT)
66 #define PMD_MASK (~(PMD_SIZE-1))
67 #define PMD_BITS (PAGE_SHIFT - 2)
69 /* PGDIR_SHIFT determines what a third-level page table entry can map */
70 #define PGDIR_SHIFT (PAGE_SHIFT + (PAGE_SHIFT-3) + PMD_BITS)
71 #define PGDIR_SIZE (_AC(1,UL) << PGDIR_SHIFT)
72 #define PGDIR_MASK (~(PGDIR_SIZE-1))
73 #define PGDIR_BITS (PAGE_SHIFT - 2)
77 #include <linux/sched.h>
79 /* Entries per page directory level. */
80 #define PTRS_PER_PTE (1UL << (PAGE_SHIFT-3))
81 #define PTRS_PER_PMD (1UL << PMD_BITS)
82 #define PTRS_PER_PGD (1UL << PGDIR_BITS)
84 /* Kernel has a separate 44bit address space. */
85 #define FIRST_USER_ADDRESS 0
87 #define pte_ERROR(e) __builtin_trap()
88 #define pmd_ERROR(e) __builtin_trap()
89 #define pgd_ERROR(e) __builtin_trap()
91 #endif /* !(__ASSEMBLY__) */
93 /* PTE bits which are the same in SUN4U and SUN4V format. */
94 #define _PAGE_VALID 0x8000000000000000 /* Valid TTE */
95 #define _PAGE_R 0x8000000000000000 /* Keep ref bit up to date*/
97 /* These are actually filled in at boot time by sun4{u,v}_pgprot_init() */
98 #define __P000 __pgprot(0)
99 #define __P001 __pgprot(0)
100 #define __P010 __pgprot(0)
101 #define __P011 __pgprot(0)
102 #define __P100 __pgprot(0)
103 #define __P101 __pgprot(0)
104 #define __P110 __pgprot(0)
105 #define __P111 __pgprot(0)
107 #define __S000 __pgprot(0)
108 #define __S001 __pgprot(0)
109 #define __S010 __pgprot(0)
110 #define __S011 __pgprot(0)
111 #define __S100 __pgprot(0)
112 #define __S101 __pgprot(0)
113 #define __S110 __pgprot(0)
114 #define __S111 __pgprot(0)
118 extern pte_t mk_pte_io(unsigned long, pgprot_t, int, unsigned long);
120 extern unsigned long pte_sz_bits(unsigned long size);
122 extern pgprot_t PAGE_KERNEL;
123 extern pgprot_t PAGE_KERNEL_LOCKED;
124 extern pgprot_t PAGE_COPY;
126 /* XXX This uglyness is for the atyfb driver's sparc mmap() support. XXX */
127 extern unsigned long _PAGE_IE;
128 extern unsigned long _PAGE_E;
129 extern unsigned long _PAGE_CACHE;
131 extern unsigned long pg_iobits;
132 extern unsigned long _PAGE_ALL_SZ_BITS;
133 extern unsigned long _PAGE_SZBITS;
135 extern unsigned long phys_base;
136 extern unsigned long pfn_base;
138 extern struct page *mem_map_zero;
139 #define ZERO_PAGE(vaddr) (mem_map_zero)
141 /* PFNs are real physical page numbers. However, mem_map only begins to record
142 * per-page information starting at pfn_base. This is to handle systems where
143 * the first physical page in the machine is at some huge physical address,
144 * such as 4GB. This is common on a partitioned E10000, for example.
146 extern pte_t pfn_pte(unsigned long, pgprot_t);
147 #define mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), (pgprot))
148 extern unsigned long pte_pfn(pte_t);
149 #define pte_page(x) pfn_to_page(pte_pfn(x))
150 extern pte_t pte_modify(pte_t, pgprot_t);
152 #define pmd_set(pmdp, ptep) \
153 (pmd_val(*(pmdp)) = (__pa((unsigned long) (ptep)) >> 11UL))
154 #define pud_set(pudp, pmdp) \
155 (pud_val(*(pudp)) = (__pa((unsigned long) (pmdp)) >> 11UL))
156 #define __pmd_page(pmd) \
157 ((unsigned long) __va((((unsigned long)pmd_val(pmd))<<11UL)))
158 #define pmd_page(pmd) virt_to_page((void *)__pmd_page(pmd))
159 #define pud_page(pud) \
160 ((unsigned long) __va((((unsigned long)pud_val(pud))<<11UL)))
161 #define pmd_none(pmd) (!pmd_val(pmd))
162 #define pmd_bad(pmd) (0)
163 #define pmd_present(pmd) (pmd_val(pmd) != 0U)
164 #define pmd_clear(pmdp) (pmd_val(*(pmdp)) = 0U)
165 #define pud_none(pud) (!pud_val(pud))
166 #define pud_bad(pud) (0)
167 #define pud_present(pud) (pud_val(pud) != 0U)
168 #define pud_clear(pudp) (pud_val(*(pudp)) = 0U)
170 /* Same in both SUN4V and SUN4U. */
171 #define pte_none(pte) (!pte_val(pte))
173 extern unsigned long pte_present(pte_t);
175 /* The following only work if pte_present() is true.
176 * Undefined behaviour if not..
178 extern unsigned long pte_read(pte_t);
179 extern unsigned long pte_exec(pte_t);
180 extern unsigned long pte_write(pte_t);
181 extern unsigned long pte_dirty(pte_t);
182 extern unsigned long pte_young(pte_t);
183 extern pte_t pte_wrprotect(pte_t);
184 extern pte_t pte_rdprotect(pte_t);
185 extern pte_t pte_mkclean(pte_t);
186 extern pte_t pte_mkold(pte_t);
188 /* Be very careful when you change these three, they are delicate. */
189 extern pte_t pte_mkyoung(pte_t);
190 extern pte_t pte_mkwrite(pte_t);
191 extern pte_t pte_mkdirty(pte_t);
192 extern pte_t pte_mkhuge(pte_t);
194 /* to find an entry in a page-table-directory. */
195 #define pgd_index(address) (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD - 1))
196 #define pgd_offset(mm, address) ((mm)->pgd + pgd_index(address))
198 /* to find an entry in a kernel page-table-directory */
199 #define pgd_offset_k(address) pgd_offset(&init_mm, address)
201 /* Find an entry in the second-level page table.. */
202 #define pmd_offset(pudp, address) \
203 ((pmd_t *) pud_page(*(pudp)) + \
204 (((address) >> PMD_SHIFT) & (PTRS_PER_PMD-1)))
206 /* Find an entry in the third-level page table.. */
207 #define pte_index(dir, address) \
208 ((pte_t *) __pmd_page(*(dir)) + \
209 ((address >> PAGE_SHIFT) & (PTRS_PER_PTE - 1)))
210 #define pte_offset_kernel pte_index
211 #define pte_offset_map pte_index
212 #define pte_offset_map_nested pte_index
213 #define pte_unmap(pte) do { } while (0)
214 #define pte_unmap_nested(pte) do { } while (0)
216 /* Actual page table PTE updates. */
217 extern void tlb_batch_add(struct mm_struct *mm, unsigned long vaddr, pte_t *ptep, pte_t orig);
219 static inline void set_pte_at(struct mm_struct *mm, unsigned long addr, pte_t *ptep, pte_t pte)
225 /* It is more efficient to let flush_tlb_kernel_range()
226 * handle init_mm tlb flushes.
228 * SUN4V NOTE: _PAGE_VALID is the same value in both the SUN4U
229 * and SUN4V pte layout, so this inline test is fine.
231 if (likely(mm != &init_mm) && (pte_val(orig) & _PAGE_VALID))
232 tlb_batch_add(mm, addr, ptep, orig);
235 #define pte_clear(mm,addr,ptep) \
236 set_pte_at((mm), (addr), (ptep), __pte(0UL))
238 extern pgd_t swapper_pg_dir[2048];
239 extern pmd_t swapper_low_pmd_dir[2048];
241 extern void paging_init(void);
242 extern unsigned long find_ecache_flush_span(unsigned long size);
244 /* These do nothing with the way I have things setup. */
245 #define mmu_lockarea(vaddr, len) (vaddr)
246 #define mmu_unlockarea(vaddr, len) do { } while(0)
248 struct vm_area_struct;
249 extern void update_mmu_cache(struct vm_area_struct *, unsigned long, pte_t);
251 /* Encode and de-code a swap entry */
252 #define __swp_type(entry) (((entry).val >> PAGE_SHIFT) & 0xffUL)
253 #define __swp_offset(entry) ((entry).val >> (PAGE_SHIFT + 8UL))
254 #define __swp_entry(type, offset) \
257 (((long)(type) << PAGE_SHIFT) | \
258 ((long)(offset) << (PAGE_SHIFT + 8UL))) \
260 #define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) })
261 #define __swp_entry_to_pte(x) ((pte_t) { (x).val })
263 /* File offset in PTE support. */
264 extern unsigned long pte_file(pte_t);
265 #define pte_to_pgoff(pte) (pte_val(pte) >> PAGE_SHIFT)
266 extern pte_t pgoff_to_pte(unsigned long);
267 #define PTE_FILE_MAX_BITS (64UL - PAGE_SHIFT - 1UL)
269 extern unsigned long prom_virt_to_phys(unsigned long, int *);
271 extern unsigned long sun4u_get_pte(unsigned long);
273 static inline unsigned long __get_phys(unsigned long addr)
275 return sun4u_get_pte(addr);
278 static inline int __get_iospace(unsigned long addr)
280 return ((sun4u_get_pte(addr) & 0xf0000000) >> 28);
283 extern unsigned long *sparc64_valid_addr_bitmap;
285 /* Needs to be defined here and not in linux/mm.h, as it is arch dependent */
286 #define kern_addr_valid(addr) \
287 (test_bit(__pa((unsigned long)(addr))>>22, sparc64_valid_addr_bitmap))
289 extern int io_remap_pfn_range(struct vm_area_struct *vma, unsigned long from,
291 unsigned long size, pgprot_t prot);
293 /* Clear virtual and physical cachability, set side-effect bit. */
294 extern pgprot_t pgprot_noncached(pgprot_t);
297 * For sparc32&64, the pfn in io_remap_pfn_range() carries <iospace> in
298 * its high 4 bits. These macros/functions put it there or get it from there.
300 #define MK_IOSPACE_PFN(space, pfn) (pfn | (space << (BITS_PER_LONG - 4)))
301 #define GET_IOSPACE(pfn) (pfn >> (BITS_PER_LONG - 4))
302 #define GET_PFN(pfn) (pfn & 0x0fffffffffffffffUL)
304 #include <asm-generic/pgtable.h>
306 /* We provide our own get_unmapped_area to cope with VA holes for userland */
307 #define HAVE_ARCH_UNMAPPED_AREA
309 /* We provide a special get_unmapped_area for framebuffer mmaps to try and use
310 * the largest alignment possible such that larget PTEs can be used.
312 extern unsigned long get_fb_unmapped_area(struct file *filp, unsigned long,
313 unsigned long, unsigned long,
315 #define HAVE_ARCH_FB_UNMAPPED_AREA
317 extern void pgtable_cache_init(void);
318 extern void sun4v_register_fault_status(void);
319 extern void sun4v_ktsb_register(void);
321 #endif /* !(__ASSEMBLY__) */
323 #endif /* !(_SPARC64_PGTABLE_H) */