1 /* $Id: pgtable.h,v 1.156 2002/02/09 19:49:31 davem Exp $
2 * pgtable.h: SpitFire page table operations.
4 * Copyright 1996,1997 David S. Miller (davem@caip.rutgers.edu)
5 * Copyright 1997,1998 Jakub Jelinek (jj@sunsite.mff.cuni.cz)
8 #ifndef _SPARC64_PGTABLE_H
9 #define _SPARC64_PGTABLE_H
11 /* This file contains the functions and defines necessary to modify and use
12 * the SpitFire page tables.
15 #include <asm-generic/pgtable-nopud.h>
17 #include <linux/config.h>
18 #include <linux/compiler.h>
19 #include <asm/types.h>
20 #include <asm/spitfire.h>
22 #include <asm/system.h>
24 #include <asm/processor.h>
25 #include <asm/const.h>
27 /* The kernel image occupies 0x4000000 to 0x1000000 (4MB --> 32MB).
28 * The page copy blockops can use 0x2000000 to 0x4000000.
29 * The TSB is mapped in the 0x4000000 to 0x6000000 range.
30 * The PROM resides in an area spanning 0xf0000000 to 0x100000000.
31 * The vmalloc area spans 0x100000000 to 0x200000000.
32 * Since modules need to be in the lowest 32-bits of the address space,
33 * we place them right before the OBP area from 0x10000000 to 0xf0000000.
34 * There is a single static kernel PMD which maps from 0x0 to address
37 #define TLBTEMP_BASE _AC(0x0000000002000000,UL)
38 #define TSBMAP_BASE _AC(0x0000000004000000,UL)
39 #define MODULES_VADDR _AC(0x0000000010000000,UL)
40 #define MODULES_LEN _AC(0x00000000e0000000,UL)
41 #define MODULES_END _AC(0x00000000f0000000,UL)
42 #define LOW_OBP_ADDRESS _AC(0x00000000f0000000,UL)
43 #define HI_OBP_ADDRESS _AC(0x0000000100000000,UL)
44 #define VMALLOC_START _AC(0x0000000100000000,UL)
45 #define VMALLOC_END _AC(0x0000000200000000,UL)
47 /* XXX All of this needs to be rethought so we can take advantage
48 * XXX cheetah's full 64-bit virtual address space, ie. no more hole
49 * XXX in the middle like on spitfire. -DaveM
52 * Given a virtual address, the lowest PAGE_SHIFT bits determine offset
53 * into the page; the next higher PAGE_SHIFT-3 bits determine the pte#
54 * in the proper pagetable (the -3 is from the 8 byte ptes, and each page
55 * table is a single page long). The next higher PMD_BITS determine pmd#
56 * in the proper pmdtable (where we must have PMD_BITS <= (PAGE_SHIFT-2)
57 * since the pmd entries are 4 bytes, and each pmd page is a single page
58 * long). Finally, the higher few bits determine pgde#.
61 /* PMD_SHIFT determines the size of the area a second-level page
64 #define PMD_SHIFT (PAGE_SHIFT + (PAGE_SHIFT-3))
65 #define PMD_SIZE (_AC(1,UL) << PMD_SHIFT)
66 #define PMD_MASK (~(PMD_SIZE-1))
67 #define PMD_BITS (PAGE_SHIFT - 2)
69 /* PGDIR_SHIFT determines what a third-level page table entry can map */
70 #define PGDIR_SHIFT (PAGE_SHIFT + (PAGE_SHIFT-3) + PMD_BITS)
71 #define PGDIR_SIZE (_AC(1,UL) << PGDIR_SHIFT)
72 #define PGDIR_MASK (~(PGDIR_SIZE-1))
73 #define PGDIR_BITS (PAGE_SHIFT - 2)
77 #include <linux/sched.h>
79 /* Entries per page directory level. */
80 #define PTRS_PER_PTE (1UL << (PAGE_SHIFT-3))
81 #define PTRS_PER_PMD (1UL << PMD_BITS)
82 #define PTRS_PER_PGD (1UL << PGDIR_BITS)
84 /* Kernel has a separate 44bit address space. */
85 #define FIRST_USER_ADDRESS 0
87 #define pte_ERROR(e) __builtin_trap()
88 #define pmd_ERROR(e) __builtin_trap()
89 #define pgd_ERROR(e) __builtin_trap()
91 #endif /* !(__ASSEMBLY__) */
93 /* Spitfire/Cheetah TTE bits. */
94 #define _PAGE_VALID _AC(0x8000000000000000,UL) /* Valid TTE */
95 #define _PAGE_R _AC(0x8000000000000000,UL) /* Keep ref bit up to date*/
96 #define _PAGE_SZ4MB _AC(0x6000000000000000,UL) /* 4MB Page */
97 #define _PAGE_SZ512K _AC(0x4000000000000000,UL) /* 512K Page */
98 #define _PAGE_SZ64K _AC(0x2000000000000000,UL) /* 64K Page */
99 #define _PAGE_SZ8K _AC(0x0000000000000000,UL) /* 8K Page */
100 #define _PAGE_NFO _AC(0x1000000000000000,UL) /* No Fault Only */
101 #define _PAGE_IE _AC(0x0800000000000000,UL) /* Invert Endianness */
102 #define _PAGE_SOFT2 _AC(0x07FC000000000000,UL) /* Software bits, set 2 */
103 #define _PAGE_RES1 _AC(0x0002000000000000,UL) /* Reserved */
104 #define _PAGE_SZ32MB _AC(0x0001000000000000,UL) /* (Panther) 32MB page */
105 #define _PAGE_SZ256MB _AC(0x2001000000000000,UL) /* (Panther) 256MB page */
106 #define _PAGE_SN _AC(0x0000800000000000,UL) /* (Cheetah) Snoop */
107 #define _PAGE_RES2 _AC(0x0000780000000000,UL) /* Reserved */
108 #define _PAGE_PADDR_SF _AC(0x000001FFFFFFE000,UL) /* (Spitfire) paddr[40:13]*/
109 #define _PAGE_PADDR _AC(0x000007FFFFFFE000,UL) /* (Cheetah) paddr[42:13] */
110 #define _PAGE_SOFT _AC(0x0000000000001F80,UL) /* Software bits */
111 #define _PAGE_L _AC(0x0000000000000040,UL) /* Locked TTE */
112 #define _PAGE_CP _AC(0x0000000000000020,UL) /* Cacheable in P-Cache */
113 #define _PAGE_CV _AC(0x0000000000000010,UL) /* Cacheable in V-Cache */
114 #define _PAGE_E _AC(0x0000000000000008,UL) /* side-Effect */
115 #define _PAGE_P _AC(0x0000000000000004,UL) /* Privileged Page */
116 #define _PAGE_W _AC(0x0000000000000002,UL) /* Writable */
117 #define _PAGE_G _AC(0x0000000000000001,UL) /* Global */
119 #define _PAGE_ALL_SZ_BITS \
120 (_PAGE_SZ4MB | _PAGE_SZ512K | _PAGE_SZ64K | \
121 _PAGE_SZ8K | _PAGE_SZ32MB | _PAGE_SZ256MB)
123 /* Here are the SpitFire software bits we use in the TTE's.
125 * WARNING: If you are going to try and start using some
126 * of the soft2 bits, you will need to make
127 * modifications to the swap entry implementation.
128 * For example, one thing that could happen is that
129 * swp_entry_to_pte() would BUG_ON() if you tried
130 * to use one of the soft2 bits for _PAGE_FILE.
132 * Like other architectures, I have aliased _PAGE_FILE with
133 * _PAGE_MODIFIED. This works because _PAGE_FILE is never
134 * interpreted that way unless _PAGE_PRESENT is clear.
136 #define _PAGE_EXEC _AC(0x0000000000001000,UL) /* Executable SW bit */
137 #define _PAGE_MODIFIED _AC(0x0000000000000800,UL) /* Modified (dirty) */
138 #define _PAGE_FILE _AC(0x0000000000000800,UL) /* Pagecache page */
139 #define _PAGE_ACCESSED _AC(0x0000000000000400,UL) /* Accessed (ref'd) */
140 #define _PAGE_READ _AC(0x0000000000000200,UL) /* Readable SW Bit */
141 #define _PAGE_WRITE _AC(0x0000000000000100,UL) /* Writable SW Bit */
142 #define _PAGE_PRESENT _AC(0x0000000000000080,UL) /* Present */
145 #define _PAGE_SZBITS _PAGE_SZ8K
146 #elif PAGE_SHIFT == 16
147 #define _PAGE_SZBITS _PAGE_SZ64K
148 #elif PAGE_SHIFT == 19
149 #define _PAGE_SZBITS _PAGE_SZ512K
150 #elif PAGE_SHIFT == 22
151 #define _PAGE_SZBITS _PAGE_SZ4MB
153 #error Wrong PAGE_SHIFT specified
156 #if defined(CONFIG_HUGETLB_PAGE_SIZE_4MB)
157 #define _PAGE_SZHUGE _PAGE_SZ4MB
158 #elif defined(CONFIG_HUGETLB_PAGE_SIZE_512K)
159 #define _PAGE_SZHUGE _PAGE_SZ512K
160 #elif defined(CONFIG_HUGETLB_PAGE_SIZE_64K)
161 #define _PAGE_SZHUGE _PAGE_SZ64K
164 #define _PAGE_CACHE (_PAGE_CP | _PAGE_CV)
166 #define __DIRTY_BITS (_PAGE_MODIFIED | _PAGE_WRITE | _PAGE_W)
167 #define __ACCESS_BITS (_PAGE_ACCESSED | _PAGE_READ | _PAGE_R)
168 #define __PRIV_BITS _PAGE_P
170 #define PAGE_NONE __pgprot (_PAGE_PRESENT | _PAGE_ACCESSED | _PAGE_CACHE)
172 /* Don't set the TTE _PAGE_W bit here, else the dirty bit never gets set. */
173 #define PAGE_SHARED __pgprot (_PAGE_PRESENT | _PAGE_VALID | _PAGE_CACHE | \
174 __ACCESS_BITS | _PAGE_WRITE | _PAGE_EXEC)
176 #define PAGE_COPY __pgprot (_PAGE_PRESENT | _PAGE_VALID | _PAGE_CACHE | \
177 __ACCESS_BITS | _PAGE_EXEC)
179 #define PAGE_READONLY __pgprot (_PAGE_PRESENT | _PAGE_VALID | _PAGE_CACHE | \
180 __ACCESS_BITS | _PAGE_EXEC)
182 #define PAGE_KERNEL __pgprot (_PAGE_PRESENT | _PAGE_VALID | _PAGE_CACHE | \
184 __ACCESS_BITS | __DIRTY_BITS | _PAGE_EXEC)
186 #define PAGE_SHARED_NOEXEC __pgprot (_PAGE_PRESENT | _PAGE_VALID | \
188 __ACCESS_BITS | _PAGE_WRITE)
190 #define PAGE_COPY_NOEXEC __pgprot (_PAGE_PRESENT | _PAGE_VALID | \
191 _PAGE_CACHE | __ACCESS_BITS)
193 #define PAGE_READONLY_NOEXEC __pgprot (_PAGE_PRESENT | _PAGE_VALID | \
194 _PAGE_CACHE | __ACCESS_BITS)
196 #define _PFN_MASK _PAGE_PADDR
198 #define pg_iobits (_PAGE_VALID | _PAGE_PRESENT | __DIRTY_BITS | \
199 __ACCESS_BITS | _PAGE_E)
201 #define __P000 PAGE_NONE
202 #define __P001 PAGE_READONLY_NOEXEC
203 #define __P010 PAGE_COPY_NOEXEC
204 #define __P011 PAGE_COPY_NOEXEC
205 #define __P100 PAGE_READONLY
206 #define __P101 PAGE_READONLY
207 #define __P110 PAGE_COPY
208 #define __P111 PAGE_COPY
210 #define __S000 PAGE_NONE
211 #define __S001 PAGE_READONLY_NOEXEC
212 #define __S010 PAGE_SHARED_NOEXEC
213 #define __S011 PAGE_SHARED_NOEXEC
214 #define __S100 PAGE_READONLY
215 #define __S101 PAGE_READONLY
216 #define __S110 PAGE_SHARED
217 #define __S111 PAGE_SHARED
221 extern unsigned long phys_base;
222 extern unsigned long pfn_base;
224 extern struct page *mem_map_zero;
225 #define ZERO_PAGE(vaddr) (mem_map_zero)
227 /* PFNs are real physical page numbers. However, mem_map only begins to record
228 * per-page information starting at pfn_base. This is to handle systems where
229 * the first physical page in the machine is at some huge physical address,
230 * such as 4GB. This is common on a partitioned E10000, for example.
233 #define pfn_pte(pfn, prot) \
234 __pte(((pfn) << PAGE_SHIFT) | pgprot_val(prot) | _PAGE_SZBITS)
235 #define mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), (pgprot))
237 #define pte_pfn(x) ((pte_val(x) & _PAGE_PADDR)>>PAGE_SHIFT)
238 #define pte_page(x) pfn_to_page(pte_pfn(x))
240 static inline pte_t pte_modify(pte_t orig_pte, pgprot_t new_prot)
243 const unsigned long preserve_mask = (_PFN_MASK |
244 _PAGE_MODIFIED | _PAGE_ACCESSED |
245 _PAGE_CACHE | _PAGE_E |
246 _PAGE_PRESENT | _PAGE_SZBITS);
248 pte_val(__pte) = (pte_val(orig_pte) & preserve_mask) |
249 (pgprot_val(new_prot) & ~preserve_mask);
253 #define pmd_set(pmdp, ptep) \
254 (pmd_val(*(pmdp)) = (__pa((unsigned long) (ptep)) >> 11UL))
255 #define pud_set(pudp, pmdp) \
256 (pud_val(*(pudp)) = (__pa((unsigned long) (pmdp)) >> 11UL))
257 #define __pmd_page(pmd) \
258 ((unsigned long) __va((((unsigned long)pmd_val(pmd))<<11UL)))
259 #define pmd_page(pmd) virt_to_page((void *)__pmd_page(pmd))
260 #define pud_page(pud) \
261 ((unsigned long) __va((((unsigned long)pud_val(pud))<<11UL)))
262 #define pte_none(pte) (!pte_val(pte))
263 #define pte_present(pte) (pte_val(pte) & _PAGE_PRESENT)
264 #define pmd_none(pmd) (!pmd_val(pmd))
265 #define pmd_bad(pmd) (0)
266 #define pmd_present(pmd) (pmd_val(pmd) != 0U)
267 #define pmd_clear(pmdp) (pmd_val(*(pmdp)) = 0U)
268 #define pud_none(pud) (!pud_val(pud))
269 #define pud_bad(pud) (0)
270 #define pud_present(pud) (pud_val(pud) != 0U)
271 #define pud_clear(pudp) (pud_val(*(pudp)) = 0U)
273 /* The following only work if pte_present() is true.
274 * Undefined behaviour if not..
276 #define pte_read(pte) (pte_val(pte) & _PAGE_READ)
277 #define pte_exec(pte) (pte_val(pte) & _PAGE_EXEC)
278 #define pte_write(pte) (pte_val(pte) & _PAGE_WRITE)
279 #define pte_dirty(pte) (pte_val(pte) & _PAGE_MODIFIED)
280 #define pte_young(pte) (pte_val(pte) & _PAGE_ACCESSED)
281 #define pte_wrprotect(pte) (__pte(pte_val(pte) & ~(_PAGE_WRITE|_PAGE_W)))
282 #define pte_rdprotect(pte) \
283 (__pte(((pte_val(pte)<<1UL)>>1UL) & ~_PAGE_READ))
284 #define pte_mkclean(pte) \
285 (__pte(pte_val(pte) & ~(_PAGE_MODIFIED|_PAGE_W)))
286 #define pte_mkold(pte) \
287 (__pte(((pte_val(pte)<<1UL)>>1UL) & ~_PAGE_ACCESSED))
289 /* Permanent address of a page. */
290 #define __page_address(page) page_address(page)
292 /* Be very careful when you change these three, they are delicate. */
293 #define pte_mkyoung(pte) (__pte(pte_val(pte) | _PAGE_ACCESSED | _PAGE_R))
294 #define pte_mkwrite(pte) (__pte(pte_val(pte) | _PAGE_WRITE))
295 #define pte_mkdirty(pte) (__pte(pte_val(pte) | _PAGE_MODIFIED | _PAGE_W))
296 #define pte_mkhuge(pte) (__pte(pte_val(pte) | _PAGE_SZHUGE))
298 /* to find an entry in a page-table-directory. */
299 #define pgd_index(address) (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD - 1))
300 #define pgd_offset(mm, address) ((mm)->pgd + pgd_index(address))
302 /* to find an entry in a kernel page-table-directory */
303 #define pgd_offset_k(address) pgd_offset(&init_mm, address)
305 /* Find an entry in the second-level page table.. */
306 #define pmd_offset(pudp, address) \
307 ((pmd_t *) pud_page(*(pudp)) + \
308 (((address) >> PMD_SHIFT) & (PTRS_PER_PMD-1)))
310 /* Find an entry in the third-level page table.. */
311 #define pte_index(dir, address) \
312 ((pte_t *) __pmd_page(*(dir)) + \
313 ((address >> PAGE_SHIFT) & (PTRS_PER_PTE - 1)))
314 #define pte_offset_kernel pte_index
315 #define pte_offset_map pte_index
316 #define pte_offset_map_nested pte_index
317 #define pte_unmap(pte) do { } while (0)
318 #define pte_unmap_nested(pte) do { } while (0)
320 /* Actual page table PTE updates. */
321 extern void tlb_batch_add(struct mm_struct *mm, unsigned long vaddr, pte_t *ptep, pte_t orig);
323 static inline void set_pte_at(struct mm_struct *mm, unsigned long addr, pte_t *ptep, pte_t pte)
329 /* It is more efficient to let flush_tlb_kernel_range()
330 * handle init_mm tlb flushes.
332 if (likely(mm != &init_mm) && (pte_val(orig) & _PAGE_VALID))
333 tlb_batch_add(mm, addr, ptep, orig);
336 #define pte_clear(mm,addr,ptep) \
337 set_pte_at((mm), (addr), (ptep), __pte(0UL))
339 extern pgd_t swapper_pg_dir[2048];
340 extern pmd_t swapper_low_pmd_dir[2048];
342 extern void paging_init(void);
343 extern unsigned long find_ecache_flush_span(unsigned long size);
345 /* These do nothing with the way I have things setup. */
346 #define mmu_lockarea(vaddr, len) (vaddr)
347 #define mmu_unlockarea(vaddr, len) do { } while(0)
349 struct vm_area_struct;
350 extern void update_mmu_cache(struct vm_area_struct *, unsigned long, pte_t);
352 /* Encode and de-code a swap entry */
353 #define __swp_type(entry) (((entry).val >> PAGE_SHIFT) & 0xffUL)
354 #define __swp_offset(entry) ((entry).val >> (PAGE_SHIFT + 8UL))
355 #define __swp_entry(type, offset) \
358 (((long)(type) << PAGE_SHIFT) | \
359 ((long)(offset) << (PAGE_SHIFT + 8UL))) \
361 #define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) })
362 #define __swp_entry_to_pte(x) ((pte_t) { (x).val })
364 /* File offset in PTE support. */
365 #define pte_file(pte) (pte_val(pte) & _PAGE_FILE)
366 #define pte_to_pgoff(pte) (pte_val(pte) >> PAGE_SHIFT)
367 #define pgoff_to_pte(off) (__pte(((off) << PAGE_SHIFT) | _PAGE_FILE))
368 #define PTE_FILE_MAX_BITS (64UL - PAGE_SHIFT - 1UL)
370 extern unsigned long prom_virt_to_phys(unsigned long, int *);
372 static __inline__ unsigned long
373 sun4u_get_pte (unsigned long addr)
380 if (addr >= PAGE_OFFSET)
381 return addr & _PAGE_PADDR;
382 if ((addr >= LOW_OBP_ADDRESS) && (addr < HI_OBP_ADDRESS))
383 return prom_virt_to_phys(addr, NULL);
384 pgdp = pgd_offset_k(addr);
385 pudp = pud_offset(pgdp, addr);
386 pmdp = pmd_offset(pudp, addr);
387 ptep = pte_offset_kernel(pmdp, addr);
388 return pte_val(*ptep) & _PAGE_PADDR;
391 static __inline__ unsigned long
392 __get_phys (unsigned long addr)
394 return sun4u_get_pte (addr);
397 static __inline__ int
398 __get_iospace (unsigned long addr)
400 return ((sun4u_get_pte (addr) & 0xf0000000) >> 28);
403 extern unsigned long *sparc64_valid_addr_bitmap;
405 /* Needs to be defined here and not in linux/mm.h, as it is arch dependent */
406 #define kern_addr_valid(addr) \
407 (test_bit(__pa((unsigned long)(addr))>>22, sparc64_valid_addr_bitmap))
409 extern int io_remap_pfn_range(struct vm_area_struct *vma, unsigned long from,
411 unsigned long size, pgprot_t prot);
413 /* Clear virtual and physical cachability, set side-effect bit. */
414 #define pgprot_noncached(prot) \
415 (__pgprot((pgprot_val(prot) & ~(_PAGE_CP | _PAGE_CV)) | \
419 * For sparc32&64, the pfn in io_remap_pfn_range() carries <iospace> in
420 * its high 4 bits. These macros/functions put it there or get it from there.
422 #define MK_IOSPACE_PFN(space, pfn) (pfn | (space << (BITS_PER_LONG - 4)))
423 #define GET_IOSPACE(pfn) (pfn >> (BITS_PER_LONG - 4))
424 #define GET_PFN(pfn) (pfn & 0x0fffffffffffffffUL)
426 #include <asm-generic/pgtable.h>
428 /* We provide our own get_unmapped_area to cope with VA holes for userland */
429 #define HAVE_ARCH_UNMAPPED_AREA
431 /* We provide a special get_unmapped_area for framebuffer mmaps to try and use
432 * the largest alignment possible such that larget PTEs can be used.
434 extern unsigned long get_fb_unmapped_area(struct file *filp, unsigned long,
435 unsigned long, unsigned long,
437 #define HAVE_ARCH_FB_UNMAPPED_AREA
439 extern void pgtable_cache_init(void);
440 extern void sun4v_register_fault_status(void);
442 #endif /* !(__ASSEMBLY__) */
444 #endif /* !(_SPARC64_PGTABLE_H) */