]> err.no Git - linux-2.6/blob - include/asm-sparc64/head.h
[SPARC64]: Add prom_{start,stop}cpu_cpuid().
[linux-2.6] / include / asm-sparc64 / head.h
1 /* $Id: head.h,v 1.30 1997/08/08 08:34:33 jj Exp $ */
2 #ifndef _SPARC64_HEAD_H
3 #define _SPARC64_HEAD_H
4
5 #include <asm/pstate.h>
6
7         /* wrpr %g0, val, %gl */
8 #define SET_GL(val)     \
9         .word   0xa1902000 | val
10
11 #define KERNBASE        0x400000
12
13 #define PTREGS_OFF      (STACK_BIAS + STACKFRAME_SZ)
14
15 #define __CHEETAH_ID    0x003e0014
16 #define __JALAPENO_ID   0x003e0016
17 #define __SERRANO_ID    0x003e0022
18
19 #define CHEETAH_MANUF           0x003e
20 #define CHEETAH_IMPL            0x0014 /* Ultra-III   */
21 #define CHEETAH_PLUS_IMPL       0x0015 /* Ultra-III+  */
22 #define JALAPENO_IMPL           0x0016 /* Ultra-IIIi  */
23 #define JAGUAR_IMPL             0x0018 /* Ultra-IV    */
24 #define PANTHER_IMPL            0x0019 /* Ultra-IV+   */
25 #define SERRANO_IMPL            0x0022 /* Ultra-IIIi+ */
26
27 #define BRANCH_IF_SUN4V(tmp1,label)             \
28         sethi   %hi(is_sun4v), %tmp1;           \
29         lduw    [%tmp1 + %lo(is_sun4v)], %tmp1; \
30         brnz,pn %tmp1, label;                   \
31          nop
32
33 #define BRANCH_IF_CHEETAH_BASE(tmp1,tmp2,label) \
34         rdpr    %ver, %tmp1;                    \
35         sethi   %hi(__CHEETAH_ID), %tmp2;       \
36         srlx    %tmp1, 32, %tmp1;               \
37         or      %tmp2, %lo(__CHEETAH_ID), %tmp2;\
38         cmp     %tmp1, %tmp2;                   \
39         be,pn   %icc, label;                    \
40          nop;
41
42 #define BRANCH_IF_JALAPENO(tmp1,tmp2,label)     \
43         rdpr    %ver, %tmp1;                    \
44         sethi   %hi(__JALAPENO_ID), %tmp2;      \
45         srlx    %tmp1, 32, %tmp1;               \
46         or      %tmp2, %lo(__JALAPENO_ID), %tmp2;\
47         cmp     %tmp1, %tmp2;                   \
48         be,pn   %icc, label;                    \
49          nop;
50
51 #define BRANCH_IF_CHEETAH_PLUS_OR_FOLLOWON(tmp1,tmp2,label)     \
52         rdpr    %ver, %tmp1;                    \
53         srlx    %tmp1, (32 + 16), %tmp2;        \
54         cmp     %tmp2, CHEETAH_MANUF;           \
55         bne,pt  %xcc, 99f;                      \
56          sllx   %tmp1, 16, %tmp1;               \
57         srlx    %tmp1, (32 + 16), %tmp2;        \
58         cmp     %tmp2, CHEETAH_PLUS_IMPL;       \
59         bgeu,pt %xcc, label;                    \
60 99:      nop;
61
62 #define BRANCH_IF_ANY_CHEETAH(tmp1,tmp2,label)  \
63         rdpr    %ver, %tmp1;                    \
64         srlx    %tmp1, (32 + 16), %tmp2;        \
65         cmp     %tmp2, CHEETAH_MANUF;           \
66         bne,pt  %xcc, 99f;                      \
67          sllx   %tmp1, 16, %tmp1;               \
68         srlx    %tmp1, (32 + 16), %tmp2;        \
69         cmp     %tmp2, CHEETAH_IMPL;            \
70         bgeu,pt %xcc, label;                    \
71 99:      nop;
72
73 #endif /* !(_SPARC64_HEAD_H) */