err.no Git - linux-2.6/blob - include/asm-sh/system.h

   1 #ifndef __ASM_SH_SYSTEM_H
   2 #define __ASM_SH_SYSTEM_H
   3
   4 /*
   5  * Copyright (C) 1999, 2000  Niibe Yutaka  &  Kaz Kojima
   6  * Copyright (C) 2002 Paul Mundt
   7  */
   8
   9 #include <asm/types.h>
  10
  11 /*
  12  *      switch_to() should switch tasks to task nr n, first
  13  */
  14
  15 #define switch_to(prev, next, last) do {                                \
  16  struct task_struct *__last;                                            \
  17  register unsigned long *__ts1 __asm__ ("r1") = &prev->thread.sp;       \
  18  register unsigned long *__ts2 __asm__ ("r2") = &prev->thread.pc;       \
  19  register unsigned long *__ts4 __asm__ ("r4") = (unsigned long *)prev;  \
  20  register unsigned long *__ts5 __asm__ ("r5") = (unsigned long *)next;  \
  21  register unsigned long *__ts6 __asm__ ("r6") = &next->thread.sp;       \
  22  register unsigned long __ts7 __asm__ ("r7") = next->thread.pc;         \
  23  __asm__ __volatile__ (".balign 4\n\t"                                  \
  24                        "stc.l   gbr, @-r15\n\t"                         \
  25                        "sts.l   pr, @-r15\n\t"                          \
  26                        "mov.l   r8, @-r15\n\t"                          \
  27                        "mov.l   r9, @-r15\n\t"                          \
  28                        "mov.l   r10, @-r15\n\t"                         \
  29                        "mov.l   r11, @-r15\n\t"                         \
  30                        "mov.l   r12, @-r15\n\t"                         \
  31                        "mov.l   r13, @-r15\n\t"                         \
  32                        "mov.l   r14, @-r15\n\t"                         \
  33                        "mov.l   r15, @r1        ! save SP\n\t"          \
  34                        "mov.l   @r6, r15        ! change to new stack\n\t" \
  35                        "mova    1f, %0\n\t"                             \
  36                        "mov.l   %0, @r2         ! save PC\n\t"          \
  37                        "mov.l   2f, %0\n\t"                             \
  38                        "jmp     @%0             ! call __switch_to\n\t" \
  39                        " lds    r7, pr          !  with return to new PC\n\t" \
  40                        ".balign 4\n"                                    \
  41                        "2:\n\t"                                         \
  42                        ".long   __switch_to\n"                          \
  43                        "1:\n\t"                                         \
  44                        "mov.l   @r15+, r14\n\t"                         \
  45                        "mov.l   @r15+, r13\n\t"                         \
  46                        "mov.l   @r15+, r12\n\t"                         \
  47                        "mov.l   @r15+, r11\n\t"                         \
  48                        "mov.l   @r15+, r10\n\t"                         \
  49                        "mov.l   @r15+, r9\n\t"                          \
  50                        "mov.l   @r15+, r8\n\t"                          \
  51                        "lds.l   @r15+, pr\n\t"                          \
  52                        "ldc.l   @r15+, gbr\n\t"                         \
  53                        : "=z" (__last)                                  \
  54                        : "r" (__ts1), "r" (__ts2), "r" (__ts4),         \
  55                          "r" (__ts5), "r" (__ts6), "r" (__ts7)          \
  56                        : "r3", "t");                                    \
  57         last = __last;                                                  \
  58 } while (0)
  59
  60 /*
  61  * On SMP systems, when the scheduler does migration-cost autodetection,
  62  * it needs a way to flush as much of the CPU's caches as possible.
  63  *
  64  * TODO: fill this in!
  65  */
  66 static inline void sched_cacheflush(void)
  67 {
  68 }
  69
  70 #define nop() __asm__ __volatile__ ("nop")
  71
  72
  73 #define xchg(ptr,x) ((__typeof__(*(ptr)))__xchg((unsigned long)(x),(ptr),sizeof(*(ptr))))
  74
  75 static __inline__ unsigned long tas(volatile int *m)
  76 { /* #define tas(ptr) (xchg((ptr),1)) */
  77         unsigned long retval;
  78
  79         __asm__ __volatile__ ("tas.b    @%1\n\t"
  80                               "movt     %0"
  81                               : "=r" (retval): "r" (m): "t", "memory");
  82         return retval;
  83 }
  84
  85 extern void __xchg_called_with_bad_pointer(void);
  86
  87 #ifdef CONFIG_CPU_SH4A
  88 #define mb()    __asm__ __volatile__ ("synco": : :"memory")
  89 #define rmb()   mb()
  90 #define wmb()   __asm__ __volatile__ ("synco": : :"memory")
  91 #define read_barrier_depends()  do { } while(0)
  92 #else
  93 #define mb()    __asm__ __volatile__ ("": : :"memory")
  94 #define rmb()   mb()
  95 #define wmb()   __asm__ __volatile__ ("": : :"memory")
  96 #define read_barrier_depends()  do { } while(0)
  97 #endif
  98
  99 #ifdef CONFIG_SMP
 100 #define smp_mb()        mb()
 101 #define smp_rmb()       rmb()
 102 #define smp_wmb()       wmb()
 103 #define smp_read_barrier_depends()      read_barrier_depends()
 104 #else
 105 #define smp_mb()        barrier()
 106 #define smp_rmb()       barrier()
 107 #define smp_wmb()       barrier()
 108 #define smp_read_barrier_depends()      do { } while(0)
 109 #endif
 110
 111 #define set_mb(var, value) do { xchg(&var, value); } while (0)
 112
 113 /* Interrupt Control */
 114 static __inline__ void local_irq_enable(void)
 115 {
 116         unsigned long __dummy0, __dummy1;
 117
 118         __asm__ __volatile__("stc       sr, %0\n\t"
 119                              "and       %1, %0\n\t"
 120                              "stc       r6_bank, %1\n\t"
 121                              "or        %1, %0\n\t"
 122                              "ldc       %0, sr"
 123                              : "=&r" (__dummy0), "=r" (__dummy1)
 124                              : "1" (~0x000000f0)
 125                              : "memory");
 126 }
 127
 128 static __inline__ void local_irq_disable(void)
 129 {
 130         unsigned long __dummy;
 131         __asm__ __volatile__("stc       sr, %0\n\t"
 132                              "or        #0xf0, %0\n\t"
 133                              "ldc       %0, sr"
 134                              : "=&z" (__dummy)
 135                              : /* no inputs */
 136                              : "memory");
 137 }
 138
 139 #define local_save_flags(x) \
 140         __asm__("stc sr, %0; and #0xf0, %0" : "=&z" (x) :/**/: "memory" )
 141
 142 #define irqs_disabled()                 \
 143 ({                                      \
 144         unsigned long flags;            \
 145         local_save_flags(flags);        \
 146         (flags != 0);                   \
 147 })
 148
 149 static __inline__ unsigned long local_irq_save(void)
 150 {
 151         unsigned long flags, __dummy;
 152
 153         __asm__ __volatile__("stc       sr, %1\n\t"
 154                              "mov       %1, %0\n\t"
 155                              "or        #0xf0, %0\n\t"
 156                              "ldc       %0, sr\n\t"
 157                              "mov       %1, %0\n\t"
 158                              "and       #0xf0, %0"
 159                              : "=&z" (flags), "=&r" (__dummy)
 160                              :/**/
 161                              : "memory" );
 162         return flags;
 163 }
 164
 165 #ifdef DEBUG_CLI_STI
 166 static __inline__ void  local_irq_restore(unsigned long x)
 167 {
 168         if ((x & 0x000000f0) != 0x000000f0)
 169                 local_irq_enable();
 170         else {
 171                 unsigned long flags;
 172                 local_save_flags(flags);
 173
 174                 if (flags == 0) {
 175                         extern void dump_stack(void);
 176                         printk(KERN_ERR "BUG!\n");
 177                         dump_stack();
 178                         local_irq_disable();
 179                 }
 180         }
 181 }
 182 #else
 183 #define local_irq_restore(x) do {                       \
 184         if ((x & 0x000000f0) != 0x000000f0)             \
 185                 local_irq_enable();                             \
 186 } while (0)
 187 #endif
 188
 189 #define really_restore_flags(x) do {                    \
 190         if ((x & 0x000000f0) != 0x000000f0)             \
 191                 local_irq_enable();                             \
 192         else                                            \
 193                 local_irq_disable();                            \
 194 } while (0)
 195
 196 /*
 197  * Jump to P2 area.
 198  * When handling TLB or caches, we need to do it from P2 area.
 199  */
 200 #define jump_to_P2()                    \
 201 do {                                    \
 202         unsigned long __dummy;          \
 203         __asm__ __volatile__(           \
 204                 "mov.l  1f, %0\n\t"     \
 205                 "or     %1, %0\n\t"     \
 206                 "jmp    @%0\n\t"        \
 207                 " nop\n\t"              \
 208                 ".balign 4\n"           \
 209                 "1:     .long 2f\n"     \
 210                 "2:"                    \
 211                 : "=&r" (__dummy)       \
 212                 : "r" (0x20000000));    \
 213 } while (0)
 214
 215 /*
 216  * Back to P1 area.
 217  */
 218 #define back_to_P1()                                    \
 219 do {                                                    \
 220         unsigned long __dummy;                          \
 221         __asm__ __volatile__(                           \
 222                 "nop;nop;nop;nop;nop;nop;nop\n\t"       \
 223                 "mov.l  1f, %0\n\t"                     \
 224                 "jmp    @%0\n\t"                        \
 225                 " nop\n\t"                              \
 226                 ".balign 4\n"                           \
 227                 "1:     .long 2f\n"                     \
 228                 "2:"                                    \
 229                 : "=&r" (__dummy));                     \
 230 } while (0)
 231
 232 /* For spinlocks etc */
 233 #define local_irq_save(x)       x = local_irq_save()
 234
 235 static __inline__ unsigned long xchg_u32(volatile int * m, unsigned long val)
 236 {
 237         unsigned long flags, retval;
 238
 239         local_irq_save(flags);
 240         retval = *m;
 241         *m = val;
 242         local_irq_restore(flags);
 243         return retval;
 244 }
 245
 246 static __inline__ unsigned long xchg_u8(volatile unsigned char * m, unsigned long val)
 247 {
 248         unsigned long flags, retval;
 249
 250         local_irq_save(flags);
 251         retval = *m;
 252         *m = val & 0xff;
 253         local_irq_restore(flags);
 254         return retval;
 255 }
 256
 257 static __inline__ unsigned long __xchg(unsigned long x, volatile void * ptr, int size)
 258 {
 259         switch (size) {
 260         case 4:
 261                 return xchg_u32(ptr, x);
 262                 break;
 263         case 1:
 264                 return xchg_u8(ptr, x);
 265                 break;
 266         }
 267         __xchg_called_with_bad_pointer();
 268         return x;
 269 }
 270
 271 static inline unsigned long __cmpxchg_u32(volatile int * m, unsigned long old,
 272         unsigned long new)
 273 {
 274         __u32 retval;
 275         unsigned long flags;
 276
 277         local_irq_save(flags);
 278         retval = *m;
 279         if (retval == old)
 280                 *m = new;
 281         local_irq_restore(flags);       /* implies memory barrier  */
 282         return retval;
 283 }
 284
 285 /* This function doesn't exist, so you'll get a linker error
 286  * if something tries to do an invalid cmpxchg(). */
 287 extern void __cmpxchg_called_with_bad_pointer(void);
 288
 289 #define __HAVE_ARCH_CMPXCHG 1
 290
 291 static inline unsigned long __cmpxchg(volatile void * ptr, unsigned long old,
 292                 unsigned long new, int size)
 293 {
 294         switch (size) {
 295         case 4:
 296                 return __cmpxchg_u32(ptr, old, new);
 297         }
 298         __cmpxchg_called_with_bad_pointer();
 299         return old;
 300 }
 301
 302 #define cmpxchg(ptr,o,n)                                                 \
 303   ({                                                                     \
 304      __typeof__(*(ptr)) _o_ = (o);                                       \
 305      __typeof__(*(ptr)) _n_ = (n);                                       \
 306      (__typeof__(*(ptr))) __cmpxchg((ptr), (unsigned long)_o_,           \
 307                                     (unsigned long)_n_, sizeof(*(ptr))); \
 308   })
 309
 310 /* XXX
 311  * disable hlt during certain critical i/o operations
 312  */
 313 #define HAVE_DISABLE_HLT
 314 void disable_hlt(void);
 315 void enable_hlt(void);
 316
 317 #define arch_align_stack(x) (x)
 318
 319 #endif