2 * include/asm-s390/pgtable.h
5 * Copyright (C) 1999,2000 IBM Deutschland Entwicklung GmbH, IBM Corporation
6 * Author(s): Hartmut Penner (hp@de.ibm.com)
7 * Ulrich Weigand (weigand@de.ibm.com)
8 * Martin Schwidefsky (schwidefsky@de.ibm.com)
10 * Derived from "include/asm-i386/pgtable.h"
13 #ifndef _ASM_S390_PGTABLE_H
14 #define _ASM_S390_PGTABLE_H
17 * The Linux memory management assumes a three-level page table setup. For
18 * s390 31 bit we "fold" the mid level into the top-level page table, so
19 * that we physically have the same two-level page table as the s390 mmu
20 * expects in 31 bit mode. For s390 64 bit we use three of the five levels
21 * the hardware provides (region first and region second tables are not
24 * The "pgd_xxx()" functions are trivial for a folded two-level
25 * setup: the pgd is never bad, and a pmd always exists (as it's folded
28 * This file contains the functions and defines necessary to modify and use
29 * the S390 page table tree.
32 #include <linux/mm_types.h>
33 #include <asm/bitops.h>
35 #include <asm/processor.h>
37 extern pgd_t swapper_pg_dir[] __attribute__ ((aligned (4096)));
38 extern void paging_init(void);
39 extern void vmem_map_init(void);
42 * The S390 doesn't have any external MMU info: the kernel page
43 * tables contain all the necessary information.
45 #define update_mmu_cache(vma, address, pte) do { } while (0)
48 * ZERO_PAGE is a global shared page that is always zero: used
49 * for zero-mapped memory areas etc..
51 extern char empty_zero_page[PAGE_SIZE];
52 #define ZERO_PAGE(vaddr) (virt_to_page(empty_zero_page))
53 #endif /* !__ASSEMBLY__ */
56 * PMD_SHIFT determines the size of the area a second-level page
58 * PGDIR_SHIFT determines what a third-level page table entry can map
63 # define PGDIR_SHIFT 20
67 # define PGDIR_SHIFT 42
68 #endif /* __s390x__ */
70 #define PMD_SIZE (1UL << PMD_SHIFT)
71 #define PMD_MASK (~(PMD_SIZE-1))
72 #define PUD_SIZE (1UL << PUD_SHIFT)
73 #define PUD_MASK (~(PUD_SIZE-1))
74 #define PGDIR_SIZE (1UL << PGDIR_SHIFT)
75 #define PGDIR_MASK (~(PGDIR_SIZE-1))
78 * entries per page directory level: the S390 is two-level, so
79 * we don't really have any PMD directory physically.
80 * for S390 segment-table entries are combined to one PGD
81 * that leads to 1024 pte per pgd
83 #define PTRS_PER_PTE 256
85 #define PTRS_PER_PMD 1
86 #define PTRS_PER_PUD 1
88 #define PTRS_PER_PMD 2048
89 #define PTRS_PER_PUD 2048
90 #endif /* __s390x__ */
91 #define PTRS_PER_PGD 2048
93 #define FIRST_USER_ADDRESS 0
95 #define pte_ERROR(e) \
96 printk("%s:%d: bad pte %p.\n", __FILE__, __LINE__, (void *) pte_val(e))
97 #define pmd_ERROR(e) \
98 printk("%s:%d: bad pmd %p.\n", __FILE__, __LINE__, (void *) pmd_val(e))
99 #define pud_ERROR(e) \
100 printk("%s:%d: bad pud %p.\n", __FILE__, __LINE__, (void *) pud_val(e))
101 #define pgd_ERROR(e) \
102 printk("%s:%d: bad pgd %p.\n", __FILE__, __LINE__, (void *) pgd_val(e))
106 * The vmalloc area will always be on the topmost area of the kernel
107 * mapping. We reserve 96MB (31bit) / 1GB (64bit) for vmalloc,
108 * which should be enough for any sane case.
109 * By putting vmalloc at the top, we maximise the gap between physical
110 * memory and vmalloc to catch misplaced memory accesses. As a side
111 * effect, this also makes sure that 64 bit module code cannot be used
112 * as system call address.
115 #define VMALLOC_START 0x78000000UL
116 #define VMALLOC_END 0x7e000000UL
117 #define VMEM_MAP_END 0x80000000UL
118 #else /* __s390x__ */
119 #define VMALLOC_START 0x3e000000000UL
120 #define VMALLOC_END 0x3e040000000UL
121 #define VMEM_MAP_END 0x40000000000UL
122 #endif /* __s390x__ */
125 * VMEM_MAX_PHYS is the highest physical address that can be added to the 1:1
126 * mapping. This needs to be calculated at compile time since the size of the
127 * VMEM_MAP is static but the size of struct page can change.
129 #define VMEM_MAX_PAGES ((VMEM_MAP_END - VMALLOC_END) / sizeof(struct page))
130 #define VMEM_MAX_PFN min(VMALLOC_START >> PAGE_SHIFT, VMEM_MAX_PAGES)
131 #define VMEM_MAX_PHYS ((VMEM_MAX_PFN << PAGE_SHIFT) & ~((16 << 20) - 1))
132 #define vmemmap ((struct page *) VMALLOC_END)
135 * A 31 bit pagetable entry of S390 has following format:
138 * 00000000001111111111222222222233
139 * 01234567890123456789012345678901
141 * I Page-Invalid Bit: Page is not available for address-translation
142 * P Page-Protection Bit: Store access not possible for page
144 * A 31 bit segmenttable entry of S390 has following format:
145 * | P-table origin | |PTL
147 * 00000000001111111111222222222233
148 * 01234567890123456789012345678901
150 * I Segment-Invalid Bit: Segment is not available for address-translation
151 * C Common-Segment Bit: Segment is not private (PoP 3-30)
152 * PTL Page-Table-Length: Page-table length (PTL+1*16 entries -> up to 256)
154 * The 31 bit segmenttable origin of S390 has following format:
156 * |S-table origin | | STL |
158 * 00000000001111111111222222222233
159 * 01234567890123456789012345678901
161 * X Space-Switch event:
162 * G Segment-Invalid Bit: *
163 * P Private-Space Bit: Segment is not private (PoP 3-30)
164 * S Storage-Alteration:
165 * STL Segment-Table-Length: Segment-table length (STL+1*16 entries -> up to 2048)
167 * A 64 bit pagetable entry of S390 has following format:
169 * 0000000000111111111122222222223333333333444444444455555555556666
170 * 0123456789012345678901234567890123456789012345678901234567890123
172 * I Page-Invalid Bit: Page is not available for address-translation
173 * P Page-Protection Bit: Store access not possible for page
175 * A 64 bit segmenttable entry of S390 has following format:
176 * | P-table origin | TT
177 * 0000000000111111111122222222223333333333444444444455555555556666
178 * 0123456789012345678901234567890123456789012345678901234567890123
180 * I Segment-Invalid Bit: Segment is not available for address-translation
181 * C Common-Segment Bit: Segment is not private (PoP 3-30)
182 * P Page-Protection Bit: Store access not possible for page
185 * A 64 bit region table entry of S390 has following format:
186 * | S-table origin | TF TTTL
187 * 0000000000111111111122222222223333333333444444444455555555556666
188 * 0123456789012345678901234567890123456789012345678901234567890123
190 * I Segment-Invalid Bit: Segment is not available for address-translation
195 * The 64 bit regiontable origin of S390 has following format:
196 * | region table origon | DTTL
197 * 0000000000111111111122222222223333333333444444444455555555556666
198 * 0123456789012345678901234567890123456789012345678901234567890123
200 * X Space-Switch event:
201 * G Segment-Invalid Bit:
202 * P Private-Space Bit:
203 * S Storage-Alteration:
207 * A storage key has the following format:
211 * F : fetch protection bit
216 /* Hardware bits in the page table entry */
217 #define _PAGE_RO 0x200 /* HW read-only bit */
218 #define _PAGE_INVALID 0x400 /* HW invalid bit */
220 /* Software bits in the page table entry */
221 #define _PAGE_SWT 0x001 /* SW pte type bit t */
222 #define _PAGE_SWX 0x002 /* SW pte type bit x */
223 #define _PAGE_SPECIAL 0x004 /* SW associated with special page */
224 #define __HAVE_ARCH_PTE_SPECIAL
226 /* Set of bits not changed in pte_modify */
227 #define _PAGE_CHG_MASK (PAGE_MASK | _PAGE_SPECIAL)
229 /* Six different types of pages. */
230 #define _PAGE_TYPE_EMPTY 0x400
231 #define _PAGE_TYPE_NONE 0x401
232 #define _PAGE_TYPE_SWAP 0x403
233 #define _PAGE_TYPE_FILE 0x601 /* bit 0x002 is used for offset !! */
234 #define _PAGE_TYPE_RO 0x200
235 #define _PAGE_TYPE_RW 0x000
236 #define _PAGE_TYPE_EX_RO 0x202
237 #define _PAGE_TYPE_EX_RW 0x002
240 * Only four types for huge pages, using the invalid bit and protection bit
241 * of a segment table entry.
243 #define _HPAGE_TYPE_EMPTY 0x020 /* _SEGMENT_ENTRY_INV */
244 #define _HPAGE_TYPE_NONE 0x220
245 #define _HPAGE_TYPE_RO 0x200 /* _SEGMENT_ENTRY_RO */
246 #define _HPAGE_TYPE_RW 0x000
249 * PTE type bits are rather complicated. handle_pte_fault uses pte_present,
250 * pte_none and pte_file to find out the pte type WITHOUT holding the page
251 * table lock. ptep_clear_flush on the other hand uses ptep_clear_flush to
252 * invalidate a given pte. ipte sets the hw invalid bit and clears all tlbs
253 * for the page. The page table entry is set to _PAGE_TYPE_EMPTY afterwards.
254 * This change is done while holding the lock, but the intermediate step
255 * of a previously valid pte with the hw invalid bit set can be observed by
256 * handle_pte_fault. That makes it necessary that all valid pte types with
257 * the hw invalid bit set must be distinguishable from the four pte types
258 * empty, none, swap and file.
261 * _PAGE_TYPE_EMPTY 1000 -> 1000
262 * _PAGE_TYPE_NONE 1001 -> 1001
263 * _PAGE_TYPE_SWAP 1011 -> 1011
264 * _PAGE_TYPE_FILE 11?1 -> 11?1
265 * _PAGE_TYPE_RO 0100 -> 1100
266 * _PAGE_TYPE_RW 0000 -> 1000
267 * _PAGE_TYPE_EX_RO 0110 -> 1110
268 * _PAGE_TYPE_EX_RW 0010 -> 1010
270 * pte_none is true for bits combinations 1000, 1010, 1100, 1110
271 * pte_present is true for bits combinations 0000, 0010, 0100, 0110, 1001
272 * pte_file is true for bits combinations 1101, 1111
273 * swap pte is 1011 and 0001, 0011, 0101, 0111 are invalid.
276 /* Page status table bits for virtualization */
277 #define RCP_PCL_BIT 55
278 #define RCP_HR_BIT 54
279 #define RCP_HC_BIT 53
280 #define RCP_GR_BIT 50
281 #define RCP_GC_BIT 49
285 /* Bits in the segment table address-space-control-element */
286 #define _ASCE_SPACE_SWITCH 0x80000000UL /* space switch event */
287 #define _ASCE_ORIGIN_MASK 0x7ffff000UL /* segment table origin */
288 #define _ASCE_PRIVATE_SPACE 0x100 /* private space control */
289 #define _ASCE_ALT_EVENT 0x80 /* storage alteration event control */
290 #define _ASCE_TABLE_LENGTH 0x7f /* 128 x 64 entries = 8k */
292 /* Bits in the segment table entry */
293 #define _SEGMENT_ENTRY_ORIGIN 0x7fffffc0UL /* page table origin */
294 #define _SEGMENT_ENTRY_INV 0x20 /* invalid segment table entry */
295 #define _SEGMENT_ENTRY_COMMON 0x10 /* common segment bit */
296 #define _SEGMENT_ENTRY_PTL 0x0f /* page table length */
298 #define _SEGMENT_ENTRY (_SEGMENT_ENTRY_PTL)
299 #define _SEGMENT_ENTRY_EMPTY (_SEGMENT_ENTRY_INV)
301 #else /* __s390x__ */
303 /* Bits in the segment/region table address-space-control-element */
304 #define _ASCE_ORIGIN ~0xfffUL/* segment table origin */
305 #define _ASCE_PRIVATE_SPACE 0x100 /* private space control */
306 #define _ASCE_ALT_EVENT 0x80 /* storage alteration event control */
307 #define _ASCE_SPACE_SWITCH 0x40 /* space switch event */
308 #define _ASCE_REAL_SPACE 0x20 /* real space control */
309 #define _ASCE_TYPE_MASK 0x0c /* asce table type mask */
310 #define _ASCE_TYPE_REGION1 0x0c /* region first table type */
311 #define _ASCE_TYPE_REGION2 0x08 /* region second table type */
312 #define _ASCE_TYPE_REGION3 0x04 /* region third table type */
313 #define _ASCE_TYPE_SEGMENT 0x00 /* segment table type */
314 #define _ASCE_TABLE_LENGTH 0x03 /* region table length */
316 /* Bits in the region table entry */
317 #define _REGION_ENTRY_ORIGIN ~0xfffUL/* region/segment table origin */
318 #define _REGION_ENTRY_INV 0x20 /* invalid region table entry */
319 #define _REGION_ENTRY_TYPE_MASK 0x0c /* region/segment table type mask */
320 #define _REGION_ENTRY_TYPE_R1 0x0c /* region first table type */
321 #define _REGION_ENTRY_TYPE_R2 0x08 /* region second table type */
322 #define _REGION_ENTRY_TYPE_R3 0x04 /* region third table type */
323 #define _REGION_ENTRY_LENGTH 0x03 /* region third length */
325 #define _REGION1_ENTRY (_REGION_ENTRY_TYPE_R1 | _REGION_ENTRY_LENGTH)
326 #define _REGION1_ENTRY_EMPTY (_REGION_ENTRY_TYPE_R1 | _REGION_ENTRY_INV)
327 #define _REGION2_ENTRY (_REGION_ENTRY_TYPE_R2 | _REGION_ENTRY_LENGTH)
328 #define _REGION2_ENTRY_EMPTY (_REGION_ENTRY_TYPE_R2 | _REGION_ENTRY_INV)
329 #define _REGION3_ENTRY (_REGION_ENTRY_TYPE_R3 | _REGION_ENTRY_LENGTH)
330 #define _REGION3_ENTRY_EMPTY (_REGION_ENTRY_TYPE_R3 | _REGION_ENTRY_INV)
332 /* Bits in the segment table entry */
333 #define _SEGMENT_ENTRY_ORIGIN ~0x7ffUL/* segment table origin */
334 #define _SEGMENT_ENTRY_RO 0x200 /* page protection bit */
335 #define _SEGMENT_ENTRY_INV 0x20 /* invalid segment table entry */
337 #define _SEGMENT_ENTRY (0)
338 #define _SEGMENT_ENTRY_EMPTY (_SEGMENT_ENTRY_INV)
340 #define _SEGMENT_ENTRY_LARGE 0x400 /* STE-format control, large page */
341 #define _SEGMENT_ENTRY_CO 0x100 /* change-recording override */
343 #endif /* __s390x__ */
346 * A user page table pointer has the space-switch-event bit, the
347 * private-space-control bit and the storage-alteration-event-control
348 * bit set. A kernel page table pointer doesn't need them.
350 #define _ASCE_USER_BITS (_ASCE_SPACE_SWITCH | _ASCE_PRIVATE_SPACE | \
353 /* Bits int the storage key */
354 #define _PAGE_CHANGED 0x02 /* HW changed bit */
355 #define _PAGE_REFERENCED 0x04 /* HW referenced bit */
358 * Page protection definitions.
360 #define PAGE_NONE __pgprot(_PAGE_TYPE_NONE)
361 #define PAGE_RO __pgprot(_PAGE_TYPE_RO)
362 #define PAGE_RW __pgprot(_PAGE_TYPE_RW)
363 #define PAGE_EX_RO __pgprot(_PAGE_TYPE_EX_RO)
364 #define PAGE_EX_RW __pgprot(_PAGE_TYPE_EX_RW)
366 #define PAGE_KERNEL PAGE_RW
367 #define PAGE_COPY PAGE_RO
370 * Dependent on the EXEC_PROTECT option s390 can do execute protection.
371 * Write permission always implies read permission. In theory with a
372 * primary/secondary page table execute only can be implemented but
373 * it would cost an additional bit in the pte to distinguish all the
374 * different pte types. To avoid that execute permission currently
375 * implies read permission as well.
378 #define __P000 PAGE_NONE
379 #define __P001 PAGE_RO
380 #define __P010 PAGE_RO
381 #define __P011 PAGE_RO
382 #define __P100 PAGE_EX_RO
383 #define __P101 PAGE_EX_RO
384 #define __P110 PAGE_EX_RO
385 #define __P111 PAGE_EX_RO
387 #define __S000 PAGE_NONE
388 #define __S001 PAGE_RO
389 #define __S010 PAGE_RW
390 #define __S011 PAGE_RW
391 #define __S100 PAGE_EX_RO
392 #define __S101 PAGE_EX_RO
393 #define __S110 PAGE_EX_RW
394 #define __S111 PAGE_EX_RW
397 # define PxD_SHADOW_SHIFT 1
398 #else /* __s390x__ */
399 # define PxD_SHADOW_SHIFT 2
400 #endif /* __s390x__ */
402 static inline void *get_shadow_table(void *table)
404 unsigned long addr, offset;
407 addr = (unsigned long) table;
408 offset = addr & ((PAGE_SIZE << PxD_SHADOW_SHIFT) - 1);
409 page = virt_to_page((void *)(addr ^ offset));
410 return (void *)(addr_t)(page->index ? (page->index | offset) : 0UL);
414 * Certain architectures need to do special things when PTEs
415 * within a page table are directly modified. Thus, the following
416 * hook is made available.
418 static inline void set_pte_at(struct mm_struct *mm, unsigned long addr,
419 pte_t *ptep, pte_t entry)
422 if (mm->context.noexec) {
423 if (!(pte_val(entry) & _PAGE_INVALID) &&
424 (pte_val(entry) & _PAGE_SWX))
425 pte_val(entry) |= _PAGE_RO;
427 pte_val(entry) = _PAGE_TYPE_EMPTY;
428 ptep[PTRS_PER_PTE] = entry;
433 * pgd/pmd/pte query functions
437 static inline int pgd_present(pgd_t pgd) { return 1; }
438 static inline int pgd_none(pgd_t pgd) { return 0; }
439 static inline int pgd_bad(pgd_t pgd) { return 0; }
441 static inline int pud_present(pud_t pud) { return 1; }
442 static inline int pud_none(pud_t pud) { return 0; }
443 static inline int pud_bad(pud_t pud) { return 0; }
445 #else /* __s390x__ */
447 static inline int pgd_present(pgd_t pgd)
449 if ((pgd_val(pgd) & _REGION_ENTRY_TYPE_MASK) < _REGION_ENTRY_TYPE_R2)
451 return (pgd_val(pgd) & _REGION_ENTRY_ORIGIN) != 0UL;
454 static inline int pgd_none(pgd_t pgd)
456 if ((pgd_val(pgd) & _REGION_ENTRY_TYPE_MASK) < _REGION_ENTRY_TYPE_R2)
458 return (pgd_val(pgd) & _REGION_ENTRY_INV) != 0UL;
461 static inline int pgd_bad(pgd_t pgd)
464 * With dynamic page table levels the pgd can be a region table
465 * entry or a segment table entry. Check for the bit that are
466 * invalid for either table entry.
469 ~_SEGMENT_ENTRY_ORIGIN & ~_REGION_ENTRY_INV &
470 ~_REGION_ENTRY_TYPE_MASK & ~_REGION_ENTRY_LENGTH;
471 return (pgd_val(pgd) & mask) != 0;
474 static inline int pud_present(pud_t pud)
476 if ((pud_val(pud) & _REGION_ENTRY_TYPE_MASK) < _REGION_ENTRY_TYPE_R3)
478 return (pud_val(pud) & _REGION_ENTRY_ORIGIN) != 0UL;
481 static inline int pud_none(pud_t pud)
483 if ((pud_val(pud) & _REGION_ENTRY_TYPE_MASK) < _REGION_ENTRY_TYPE_R3)
485 return (pud_val(pud) & _REGION_ENTRY_INV) != 0UL;
488 static inline int pud_bad(pud_t pud)
491 * With dynamic page table levels the pud can be a region table
492 * entry or a segment table entry. Check for the bit that are
493 * invalid for either table entry.
496 ~_SEGMENT_ENTRY_ORIGIN & ~_REGION_ENTRY_INV &
497 ~_REGION_ENTRY_TYPE_MASK & ~_REGION_ENTRY_LENGTH;
498 return (pud_val(pud) & mask) != 0;
501 #endif /* __s390x__ */
503 static inline int pmd_present(pmd_t pmd)
505 return (pmd_val(pmd) & _SEGMENT_ENTRY_ORIGIN) != 0UL;
508 static inline int pmd_none(pmd_t pmd)
510 return (pmd_val(pmd) & _SEGMENT_ENTRY_INV) != 0UL;
513 static inline int pmd_bad(pmd_t pmd)
515 unsigned long mask = ~_SEGMENT_ENTRY_ORIGIN & ~_SEGMENT_ENTRY_INV;
516 return (pmd_val(pmd) & mask) != _SEGMENT_ENTRY;
519 static inline int pte_none(pte_t pte)
521 return (pte_val(pte) & _PAGE_INVALID) && !(pte_val(pte) & _PAGE_SWT);
524 static inline int pte_present(pte_t pte)
526 unsigned long mask = _PAGE_RO | _PAGE_INVALID | _PAGE_SWT | _PAGE_SWX;
527 return (pte_val(pte) & mask) == _PAGE_TYPE_NONE ||
528 (!(pte_val(pte) & _PAGE_INVALID) &&
529 !(pte_val(pte) & _PAGE_SWT));
532 static inline int pte_file(pte_t pte)
534 unsigned long mask = _PAGE_RO | _PAGE_INVALID | _PAGE_SWT;
535 return (pte_val(pte) & mask) == _PAGE_TYPE_FILE;
538 static inline int pte_special(pte_t pte)
540 return (pte_val(pte) & _PAGE_SPECIAL);
543 #define __HAVE_ARCH_PTE_SAME
544 #define pte_same(a,b) (pte_val(a) == pte_val(b))
546 static inline void rcp_lock(pte_t *ptep)
549 unsigned long *pgste = (unsigned long *) (ptep + PTRS_PER_PTE);
551 while (test_and_set_bit(RCP_PCL_BIT, pgste))
556 static inline void rcp_unlock(pte_t *ptep)
559 unsigned long *pgste = (unsigned long *) (ptep + PTRS_PER_PTE);
560 clear_bit(RCP_PCL_BIT, pgste);
565 /* forward declaration for SetPageUptodate in page-flags.h*/
566 static inline void page_clear_dirty(struct page *page);
567 #include <linux/page-flags.h>
569 static inline void ptep_rcp_copy(pte_t *ptep)
572 struct page *page = virt_to_page(pte_val(*ptep));
574 unsigned long *pgste = (unsigned long *) (ptep + PTRS_PER_PTE);
576 skey = page_get_storage_key(page_to_phys(page));
577 if (skey & _PAGE_CHANGED)
578 set_bit_simple(RCP_GC_BIT, pgste);
579 if (skey & _PAGE_REFERENCED)
580 set_bit_simple(RCP_GR_BIT, pgste);
581 if (test_and_clear_bit_simple(RCP_HC_BIT, pgste))
583 if (test_and_clear_bit_simple(RCP_HR_BIT, pgste))
584 SetPageReferenced(page);
589 * query functions pte_write/pte_dirty/pte_young only work if
590 * pte_present() is true. Undefined behaviour if not..
592 static inline int pte_write(pte_t pte)
594 return (pte_val(pte) & _PAGE_RO) == 0;
597 static inline int pte_dirty(pte_t pte)
599 /* A pte is neither clean nor dirty on s/390. The dirty bit
600 * is in the storage key. See page_test_and_clear_dirty for
606 static inline int pte_young(pte_t pte)
608 /* A pte is neither young nor old on s/390. The young bit
609 * is in the storage key. See page_test_and_clear_young for
616 * pgd/pmd/pte modification functions
621 #define pgd_clear(pgd) do { } while (0)
622 #define pud_clear(pud) do { } while (0)
624 #else /* __s390x__ */
626 static inline void pgd_clear_kernel(pgd_t * pgd)
628 if ((pgd_val(*pgd) & _REGION_ENTRY_TYPE_MASK) == _REGION_ENTRY_TYPE_R2)
629 pgd_val(*pgd) = _REGION2_ENTRY_EMPTY;
632 static inline void pgd_clear(pgd_t * pgd)
634 pgd_t *shadow = get_shadow_table(pgd);
636 pgd_clear_kernel(pgd);
638 pgd_clear_kernel(shadow);
641 static inline void pud_clear_kernel(pud_t *pud)
643 if ((pud_val(*pud) & _REGION_ENTRY_TYPE_MASK) == _REGION_ENTRY_TYPE_R3)
644 pud_val(*pud) = _REGION3_ENTRY_EMPTY;
647 static inline void pud_clear(pud_t *pud)
649 pud_t *shadow = get_shadow_table(pud);
651 pud_clear_kernel(pud);
653 pud_clear_kernel(shadow);
656 #endif /* __s390x__ */
658 static inline void pmd_clear_kernel(pmd_t * pmdp)
660 pmd_val(*pmdp) = _SEGMENT_ENTRY_EMPTY;
663 static inline void pmd_clear(pmd_t *pmd)
665 pmd_t *shadow = get_shadow_table(pmd);
667 pmd_clear_kernel(pmd);
669 pmd_clear_kernel(shadow);
672 static inline void pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
674 if (mm->context.pgstes)
676 pte_val(*ptep) = _PAGE_TYPE_EMPTY;
677 if (mm->context.noexec)
678 pte_val(ptep[PTRS_PER_PTE]) = _PAGE_TYPE_EMPTY;
682 * The following pte modification functions only work if
683 * pte_present() is true. Undefined behaviour if not..
685 static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
687 pte_val(pte) &= _PAGE_CHG_MASK;
688 pte_val(pte) |= pgprot_val(newprot);
692 static inline pte_t pte_wrprotect(pte_t pte)
694 /* Do not clobber _PAGE_TYPE_NONE pages! */
695 if (!(pte_val(pte) & _PAGE_INVALID))
696 pte_val(pte) |= _PAGE_RO;
700 static inline pte_t pte_mkwrite(pte_t pte)
702 pte_val(pte) &= ~_PAGE_RO;
706 static inline pte_t pte_mkclean(pte_t pte)
708 /* The only user of pte_mkclean is the fork() code.
709 We must *not* clear the *physical* page dirty bit
710 just because fork() wants to clear the dirty bit in
711 *one* of the page's mappings. So we just do nothing. */
715 static inline pte_t pte_mkdirty(pte_t pte)
717 /* We do not explicitly set the dirty bit because the
718 * sske instruction is slow. It is faster to let the
719 * next instruction set the dirty bit.
724 static inline pte_t pte_mkold(pte_t pte)
726 /* S/390 doesn't keep its dirty/referenced bit in the pte.
727 * There is no point in clearing the real referenced bit.
732 static inline pte_t pte_mkyoung(pte_t pte)
734 /* S/390 doesn't keep its dirty/referenced bit in the pte.
735 * There is no point in setting the real referenced bit.
740 static inline pte_t pte_mkspecial(pte_t pte)
742 pte_val(pte) |= _PAGE_SPECIAL;
746 #define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
747 static inline int ptep_test_and_clear_young(struct vm_area_struct *vma,
748 unsigned long addr, pte_t *ptep)
751 unsigned long physpage;
753 unsigned long *pgste;
755 if (!vma->vm_mm->context.pgstes)
757 physpage = pte_val(*ptep) & PAGE_MASK;
758 pgste = (unsigned long *) (ptep + PTRS_PER_PTE);
760 young = ((page_get_storage_key(physpage) & _PAGE_REFERENCED) != 0);
763 set_bit_simple(RCP_GR_BIT, pgste);
764 young |= test_and_clear_bit_simple(RCP_HR_BIT, pgste);
771 #define __HAVE_ARCH_PTEP_CLEAR_YOUNG_FLUSH
772 static inline int ptep_clear_flush_young(struct vm_area_struct *vma,
773 unsigned long address, pte_t *ptep)
775 /* No need to flush TLB
776 * On s390 reference bits are in storage key and never in TLB
777 * With virtualization we handle the reference bit, without we
778 * we can simply return */
780 return ptep_test_and_clear_young(vma, address, ptep);
785 static inline void __ptep_ipte(unsigned long address, pte_t *ptep)
787 if (!(pte_val(*ptep) & _PAGE_INVALID)) {
789 /* pto must point to the start of the segment table */
790 pte_t *pto = (pte_t *) (((unsigned long) ptep) & 0x7ffffc00);
792 /* ipte in zarch mode can do the math */
797 : "=m" (*ptep) : "m" (*ptep),
798 "a" (pto), "a" (address));
802 static inline void ptep_invalidate(struct mm_struct *mm,
803 unsigned long address, pte_t *ptep)
805 if (mm->context.pgstes) {
807 __ptep_ipte(address, ptep);
809 pte_val(*ptep) = _PAGE_TYPE_EMPTY;
813 __ptep_ipte(address, ptep);
814 pte_val(*ptep) = _PAGE_TYPE_EMPTY;
815 if (mm->context.noexec) {
816 __ptep_ipte(address, ptep + PTRS_PER_PTE);
817 pte_val(*(ptep + PTRS_PER_PTE)) = _PAGE_TYPE_EMPTY;
822 * This is hard to understand. ptep_get_and_clear and ptep_clear_flush
823 * both clear the TLB for the unmapped pte. The reason is that
824 * ptep_get_and_clear is used in common code (e.g. change_pte_range)
825 * to modify an active pte. The sequence is
826 * 1) ptep_get_and_clear
829 * On s390 the tlb needs to get flushed with the modification of the pte
830 * if the pte is active. The only way how this can be implemented is to
831 * have ptep_get_and_clear do the tlb flush. In exchange flush_tlb_range
834 #define __HAVE_ARCH_PTEP_GET_AND_CLEAR
835 #define ptep_get_and_clear(__mm, __address, __ptep) \
837 pte_t __pte = *(__ptep); \
838 if (atomic_read(&(__mm)->mm_users) > 1 || \
839 (__mm) != current->active_mm) \
840 ptep_invalidate(__mm, __address, __ptep); \
842 pte_clear((__mm), (__address), (__ptep)); \
846 #define __HAVE_ARCH_PTEP_CLEAR_FLUSH
847 static inline pte_t ptep_clear_flush(struct vm_area_struct *vma,
848 unsigned long address, pte_t *ptep)
851 ptep_invalidate(vma->vm_mm, address, ptep);
856 * The batched pte unmap code uses ptep_get_and_clear_full to clear the
857 * ptes. Here an optimization is possible. tlb_gather_mmu flushes all
858 * tlbs of an mm if it can guarantee that the ptes of the mm_struct
859 * cannot be accessed while the batched unmap is running. In this case
860 * full==1 and a simple pte_clear is enough. See tlb.h.
862 #define __HAVE_ARCH_PTEP_GET_AND_CLEAR_FULL
863 static inline pte_t ptep_get_and_clear_full(struct mm_struct *mm,
865 pte_t *ptep, int full)
870 pte_clear(mm, addr, ptep);
872 ptep_invalidate(mm, addr, ptep);
876 #define __HAVE_ARCH_PTEP_SET_WRPROTECT
877 #define ptep_set_wrprotect(__mm, __addr, __ptep) \
879 pte_t __pte = *(__ptep); \
880 if (pte_write(__pte)) { \
881 if (atomic_read(&(__mm)->mm_users) > 1 || \
882 (__mm) != current->active_mm) \
883 ptep_invalidate(__mm, __addr, __ptep); \
884 set_pte_at(__mm, __addr, __ptep, pte_wrprotect(__pte)); \
888 #define __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS
889 #define ptep_set_access_flags(__vma, __addr, __ptep, __entry, __dirty) \
891 int __changed = !pte_same(*(__ptep), __entry); \
893 ptep_invalidate((__vma)->vm_mm, __addr, __ptep); \
894 set_pte_at((__vma)->vm_mm, __addr, __ptep, __entry); \
900 * Test and clear dirty bit in storage key.
901 * We can't clear the changed bit atomically. This is a potential
902 * race against modification of the referenced bit. This function
903 * should therefore only be called if it is not mapped in any
906 #define __HAVE_ARCH_PAGE_TEST_DIRTY
907 static inline int page_test_dirty(struct page *page)
909 return (page_get_storage_key(page_to_phys(page)) & _PAGE_CHANGED) != 0;
912 #define __HAVE_ARCH_PAGE_CLEAR_DIRTY
913 static inline void page_clear_dirty(struct page *page)
915 page_set_storage_key(page_to_phys(page), PAGE_DEFAULT_KEY);
919 * Test and clear referenced bit in storage key.
921 #define __HAVE_ARCH_PAGE_TEST_AND_CLEAR_YOUNG
922 static inline int page_test_and_clear_young(struct page *page)
924 unsigned long physpage = page_to_phys(page);
931 : "=d" (ccode) : "a" (physpage) : "cc" );
936 * Conversion functions: convert a page and protection to a page entry,
937 * and a page entry and page directory to the page they refer to.
939 static inline pte_t mk_pte_phys(unsigned long physpage, pgprot_t pgprot)
942 pte_val(__pte) = physpage + pgprot_val(pgprot);
946 static inline pte_t mk_pte(struct page *page, pgprot_t pgprot)
948 unsigned long physpage = page_to_phys(page);
950 return mk_pte_phys(physpage, pgprot);
953 #define pgd_index(address) (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD-1))
954 #define pud_index(address) (((address) >> PUD_SHIFT) & (PTRS_PER_PUD-1))
955 #define pmd_index(address) (((address) >> PMD_SHIFT) & (PTRS_PER_PMD-1))
956 #define pte_index(address) (((address) >> PAGE_SHIFT) & (PTRS_PER_PTE-1))
958 #define pgd_offset(mm, address) ((mm)->pgd + pgd_index(address))
959 #define pgd_offset_k(address) pgd_offset(&init_mm, address)
963 #define pmd_deref(pmd) (pmd_val(pmd) & _SEGMENT_ENTRY_ORIGIN)
964 #define pud_deref(pmd) ({ BUG(); 0UL; })
965 #define pgd_deref(pmd) ({ BUG(); 0UL; })
967 #define pud_offset(pgd, address) ((pud_t *) pgd)
968 #define pmd_offset(pud, address) ((pmd_t *) pud + pmd_index(address))
970 #else /* __s390x__ */
972 #define pmd_deref(pmd) (pmd_val(pmd) & _SEGMENT_ENTRY_ORIGIN)
973 #define pud_deref(pud) (pud_val(pud) & _REGION_ENTRY_ORIGIN)
974 #define pgd_deref(pgd) (pgd_val(pgd) & _REGION_ENTRY_ORIGIN)
976 static inline pud_t *pud_offset(pgd_t *pgd, unsigned long address)
978 pud_t *pud = (pud_t *) pgd;
979 if ((pgd_val(*pgd) & _REGION_ENTRY_TYPE_MASK) == _REGION_ENTRY_TYPE_R2)
980 pud = (pud_t *) pgd_deref(*pgd);
981 return pud + pud_index(address);
984 static inline pmd_t *pmd_offset(pud_t *pud, unsigned long address)
986 pmd_t *pmd = (pmd_t *) pud;
987 if ((pud_val(*pud) & _REGION_ENTRY_TYPE_MASK) == _REGION_ENTRY_TYPE_R3)
988 pmd = (pmd_t *) pud_deref(*pud);
989 return pmd + pmd_index(address);
992 #endif /* __s390x__ */
994 #define pfn_pte(pfn,pgprot) mk_pte_phys(__pa((pfn) << PAGE_SHIFT),(pgprot))
995 #define pte_pfn(x) (pte_val(x) >> PAGE_SHIFT)
996 #define pte_page(x) pfn_to_page(pte_pfn(x))
998 #define pmd_page(pmd) pfn_to_page(pmd_val(pmd) >> PAGE_SHIFT)
1000 /* Find an entry in the lowest level page table.. */
1001 #define pte_offset(pmd, addr) ((pte_t *) pmd_deref(*(pmd)) + pte_index(addr))
1002 #define pte_offset_kernel(pmd, address) pte_offset(pmd,address)
1003 #define pte_offset_map(pmd, address) pte_offset_kernel(pmd, address)
1004 #define pte_offset_map_nested(pmd, address) pte_offset_kernel(pmd, address)
1005 #define pte_unmap(pte) do { } while (0)
1006 #define pte_unmap_nested(pte) do { } while (0)
1009 * 31 bit swap entry format:
1010 * A page-table entry has some bits we have to treat in a special way.
1011 * Bits 0, 20 and bit 23 have to be zero, otherwise an specification
1012 * exception will occur instead of a page translation exception. The
1013 * specifiation exception has the bad habit not to store necessary
1014 * information in the lowcore.
1015 * Bit 21 and bit 22 are the page invalid bit and the page protection
1016 * bit. We set both to indicate a swapped page.
1017 * Bit 30 and 31 are used to distinguish the different page types. For
1018 * a swapped page these bits need to be zero.
1019 * This leaves the bits 1-19 and bits 24-29 to store type and offset.
1020 * We use the 5 bits from 25-29 for the type and the 20 bits from 1-19
1021 * plus 24 for the offset.
1022 * 0| offset |0110|o|type |00|
1023 * 0 0000000001111111111 2222 2 22222 33
1024 * 0 1234567890123456789 0123 4 56789 01
1026 * 64 bit swap entry format:
1027 * A page-table entry has some bits we have to treat in a special way.
1028 * Bits 52 and bit 55 have to be zero, otherwise an specification
1029 * exception will occur instead of a page translation exception. The
1030 * specifiation exception has the bad habit not to store necessary
1031 * information in the lowcore.
1032 * Bit 53 and bit 54 are the page invalid bit and the page protection
1033 * bit. We set both to indicate a swapped page.
1034 * Bit 62 and 63 are used to distinguish the different page types. For
1035 * a swapped page these bits need to be zero.
1036 * This leaves the bits 0-51 and bits 56-61 to store type and offset.
1037 * We use the 5 bits from 57-61 for the type and the 53 bits from 0-51
1038 * plus 56 for the offset.
1039 * | offset |0110|o|type |00|
1040 * 0000000000111111111122222222223333333333444444444455 5555 5 55566 66
1041 * 0123456789012345678901234567890123456789012345678901 2345 6 78901 23
1044 #define __SWP_OFFSET_MASK (~0UL >> 12)
1046 #define __SWP_OFFSET_MASK (~0UL >> 11)
1048 static inline pte_t mk_swap_pte(unsigned long type, unsigned long offset)
1051 offset &= __SWP_OFFSET_MASK;
1052 pte_val(pte) = _PAGE_TYPE_SWAP | ((type & 0x1f) << 2) |
1053 ((offset & 1UL) << 7) | ((offset & ~1UL) << 11);
1057 #define __swp_type(entry) (((entry).val >> 2) & 0x1f)
1058 #define __swp_offset(entry) (((entry).val >> 11) | (((entry).val >> 7) & 1))
1059 #define __swp_entry(type,offset) ((swp_entry_t) { pte_val(mk_swap_pte((type),(offset))) })
1061 #define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) })
1062 #define __swp_entry_to_pte(x) ((pte_t) { (x).val })
1065 # define PTE_FILE_MAX_BITS 26
1066 #else /* __s390x__ */
1067 # define PTE_FILE_MAX_BITS 59
1068 #endif /* __s390x__ */
1070 #define pte_to_pgoff(__pte) \
1071 ((((__pte).pte >> 12) << 7) + (((__pte).pte >> 1) & 0x7f))
1073 #define pgoff_to_pte(__off) \
1074 ((pte_t) { ((((__off) & 0x7f) << 1) + (((__off) >> 7) << 12)) \
1075 | _PAGE_TYPE_FILE })
1077 #endif /* !__ASSEMBLY__ */
1079 #define kern_addr_valid(addr) (1)
1081 extern int vmem_add_mapping(unsigned long start, unsigned long size);
1082 extern int vmem_remove_mapping(unsigned long start, unsigned long size);
1083 extern int s390_enable_sie(void);
1086 * No page table caches to initialise
1088 #define pgtable_cache_init() do { } while (0)
1090 #include <asm-generic/pgtable.h>
1092 #endif /* _S390_PAGE_H */