2 * PowerPC memory management structures
4 * Dave Engebretsen & Mike Corrigan <{engebret|mikejc}@us.ibm.com>
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version
10 * 2 of the License, or (at your option) any later version.
16 #include <linux/config.h>
17 #include <asm/ppc_asm.h> /* for ASM_CONST */
24 #define STE_ESID_V 0x80
25 #define STE_ESID_KS 0x20
26 #define STE_ESID_KP 0x10
27 #define STE_ESID_N 0x08
29 #define STE_VSID_SHIFT 12
31 /* Location of cpu0's segment table */
32 #define STAB0_PAGE 0x6
33 #define STAB0_PHYS_ADDR (STAB0_PAGE<<12)
36 extern char initial_stab[];
37 #endif /* ! __ASSEMBLY */
43 #define SLB_NUM_BOLTED 3
44 #define SLB_CACHE_ENTRIES 8
46 /* Bits in the SLB ESID word */
47 #define SLB_ESID_V ASM_CONST(0x0000000008000000) /* valid */
49 /* Bits in the SLB VSID word */
50 #define SLB_VSID_SHIFT 12
51 #define SLB_VSID_KS ASM_CONST(0x0000000000000800)
52 #define SLB_VSID_KP ASM_CONST(0x0000000000000400)
53 #define SLB_VSID_N ASM_CONST(0x0000000000000200) /* no-execute */
54 #define SLB_VSID_L ASM_CONST(0x0000000000000100) /* largepage */
55 #define SLB_VSID_C ASM_CONST(0x0000000000000080) /* class */
56 #define SLB_VSID_LS ASM_CONST(0x0000000000000070) /* size of largepage */
58 #define SLB_VSID_KERNEL (SLB_VSID_KP)
59 #define SLB_VSID_USER (SLB_VSID_KP|SLB_VSID_KS|SLB_VSID_C)
61 #define SLBIE_C (0x08000000)
67 #define HPTES_PER_GROUP 8
69 #define HPTE_V_AVPN_SHIFT 7
70 #define HPTE_V_AVPN ASM_CONST(0xffffffffffffff80)
71 #define HPTE_V_AVPN_VAL(x) (((x) & HPTE_V_AVPN) >> HPTE_V_AVPN_SHIFT)
72 #define HPTE_V_BOLTED ASM_CONST(0x0000000000000010)
73 #define HPTE_V_LOCK ASM_CONST(0x0000000000000008)
74 #define HPTE_V_LARGE ASM_CONST(0x0000000000000004)
75 #define HPTE_V_SECONDARY ASM_CONST(0x0000000000000002)
76 #define HPTE_V_VALID ASM_CONST(0x0000000000000001)
78 #define HPTE_R_PP0 ASM_CONST(0x8000000000000000)
79 #define HPTE_R_TS ASM_CONST(0x4000000000000000)
80 #define HPTE_R_RPN_SHIFT 12
81 #define HPTE_R_RPN ASM_CONST(0x3ffffffffffff000)
82 #define HPTE_R_FLAGS ASM_CONST(0x00000000000003ff)
83 #define HPTE_R_PP ASM_CONST(0x0000000000000003)
85 /* Values for PP (assumes Ks=0, Kp=1) */
86 /* pp0 will always be 0 for linux */
87 #define PP_RWXX 0 /* Supervisor read/write, User none */
88 #define PP_RWRX 1 /* Supervisor read/write, User read */
89 #define PP_RWRW 2 /* Supervisor read/write, User read/write */
90 #define PP_RXRX 3 /* Supervisor read, User read */
99 extern hpte_t *htab_address;
100 extern unsigned long htab_hash_mask;
102 static inline unsigned long hpt_hash(unsigned long vpn, int large)
115 return (vsid & 0x7fffffffffUL) ^ page;
118 static inline void __tlbie(unsigned long va, int large)
120 /* clear top 16 bits, non SLS segment */
121 va &= ~(0xffffULL << 48);
125 asm volatile("tlbie %0,1" : : "r"(va) : "memory");
128 asm volatile("tlbie %0,0" : : "r"(va) : "memory");
132 static inline void tlbie(unsigned long va, int large)
134 asm volatile("ptesync": : :"memory");
136 asm volatile("eieio; tlbsync; ptesync": : :"memory");
139 static inline void __tlbiel(unsigned long va)
141 /* clear top 16 bits, non SLS segment */
142 va &= ~(0xffffULL << 48);
146 * Thanks to Alan Modra we are now able to use machine specific
147 * assembly instructions (like tlbiel) by using the gas -many flag.
148 * However we have to support older toolchains so for the moment
152 asm volatile("tlbiel %0" : : "r"(va) : "memory");
154 asm volatile(".long 0x7c000224 | (%0 << 11)" : : "r"(va) : "memory");
158 static inline void tlbiel(unsigned long va)
160 asm volatile("ptesync": : :"memory");
162 asm volatile("ptesync": : :"memory");
165 static inline unsigned long slot2va(unsigned long hpte_v, unsigned long slot)
167 unsigned long avpn = HPTE_V_AVPN_VAL(hpte_v);
172 if (! (hpte_v & HPTE_V_LARGE)) {
173 unsigned long vpi, pteg;
175 pteg = slot / HPTES_PER_GROUP;
176 if (hpte_v & HPTE_V_SECONDARY)
179 vpi = ((va >> 28) ^ pteg) & htab_hash_mask;
181 va |= vpi << PAGE_SHIFT;
188 * Handle a fault by adding an HPTE. If the address can't be determined
189 * to be valid via Linux page tables, return 1. If handled return 0
191 extern int __hash_page(unsigned long ea, unsigned long access,
192 unsigned long vsid, pte_t *ptep, unsigned long trap,
195 extern void htab_finish_init(void);
197 extern void hpte_init_native(void);
198 extern void hpte_init_lpar(void);
199 extern void hpte_init_iSeries(void);
201 extern long pSeries_lpar_hpte_insert(unsigned long hpte_group,
202 unsigned long va, unsigned long prpn,
203 unsigned long vflags,
204 unsigned long rflags);
205 extern long native_hpte_insert(unsigned long hpte_group, unsigned long va,
207 unsigned long vflags, unsigned long rflags);
209 extern long iSeries_hpte_bolt_or_insert(unsigned long hpte_group,
210 unsigned long va, unsigned long prpn,
211 unsigned long vflags, unsigned long rflags);
213 extern void stabs_alloc(void);
215 #endif /* __ASSEMBLY__ */
220 * We first generate a 36-bit "proto-VSID". For kernel addresses this
221 * is equal to the ESID, for user addresses it is:
222 * (context << 15) | (esid & 0x7fff)
224 * The two forms are distinguishable because the top bit is 0 for user
225 * addresses, whereas the top two bits are 1 for kernel addresses.
226 * Proto-VSIDs with the top two bits equal to 0b10 are reserved for
229 * The proto-VSIDs are then scrambled into real VSIDs with the
230 * multiplicative hash:
232 * VSID = (proto-VSID * VSID_MULTIPLIER) % VSID_MODULUS
233 * where VSID_MULTIPLIER = 268435399 = 0xFFFFFC7
234 * VSID_MODULUS = 2^36-1 = 0xFFFFFFFFF
236 * This scramble is only well defined for proto-VSIDs below
237 * 0xFFFFFFFFF, so both proto-VSID and actual VSID 0xFFFFFFFFF are
238 * reserved. VSID_MULTIPLIER is prime, so in particular it is
239 * co-prime to VSID_MODULUS, making this a 1:1 scrambling function.
240 * Because the modulus is 2^n-1 we can compute it efficiently without
241 * a divide or extra multiply (see below).
243 * This scheme has several advantages over older methods:
245 * - We have VSIDs allocated for every kernel address
246 * (i.e. everything above 0xC000000000000000), except the very top
247 * segment, which simplifies several things.
249 * - We allow for 15 significant bits of ESID and 20 bits of
250 * context for user addresses. i.e. 8T (43 bits) of address space for
251 * up to 1M contexts (although the page table structure and context
252 * allocation will need changes to take advantage of this).
254 * - The scramble function gives robust scattering in the hash
255 * table (at least based on some initial results). The previous
256 * method was more susceptible to pathological cases giving excessive
260 * WARNING - If you change these you must make sure the asm
261 * implementations in slb_allocate (slb_low.S), do_stab_bolted
262 * (head.S) and ASM_VSID_SCRAMBLE (below) are changed accordingly.
264 * You'll also need to change the precomputed VSID values in head.S
265 * which are used by the iSeries firmware.
268 #define VSID_MULTIPLIER ASM_CONST(200730139) /* 28-bit prime */
270 #define VSID_MODULUS ((1UL<<VSID_BITS)-1)
272 #define CONTEXT_BITS 19
273 #define USER_ESID_BITS 16
275 #define USER_VSID_RANGE (1UL << (USER_ESID_BITS + SID_SHIFT))
278 * This macro generates asm code to compute the VSID scramble
279 * function. Used in slb_allocate() and do_stab_bolted. The function
280 * computed is: (protovsid*VSID_MULTIPLIER) % VSID_MODULUS
282 * rt = register continaing the proto-VSID and into which the
283 * VSID will be stored
284 * rx = scratch register (clobbered)
286 * - rt and rx must be different registers
287 * - The answer will end up in the low 36 bits of rt. The higher
288 * bits may contain other garbage, so you may need to mask the
291 #define ASM_VSID_SCRAMBLE(rt, rx) \
292 lis rx,VSID_MULTIPLIER@h; \
293 ori rx,rx,VSID_MULTIPLIER@l; \
294 mulld rt,rt,rx; /* rt = rt * MULTIPLIER */ \
296 srdi rx,rt,VSID_BITS; \
297 clrldi rt,rt,(64-VSID_BITS); \
298 add rt,rt,rx; /* add high and low bits */ \
299 /* Now, r3 == VSID (mod 2^36-1), and lies between 0 and \
300 * 2^36-1+2^28-1. That in particular means that if r3 >= \
301 * 2^36-1, then r3+1 has the 2^36 bit set. So, if r3+1 has \
302 * the bit clear, r3 already has the answer we want, if it \
303 * doesn't, the answer is the low 36 bits of r3+1. So in all \
304 * cases the answer is the low 36 bits of (r3 + ((r3+1) >> 36))*/\
306 srdi rx,rx,VSID_BITS; /* extract 2^36 bit */ \
312 typedef unsigned long mm_context_id_t;
316 #ifdef CONFIG_HUGETLB_PAGE
317 u16 low_htlb_areas, high_htlb_areas;
322 static inline unsigned long vsid_scramble(unsigned long protovsid)
325 /* The code below is equivalent to this function for arguments
326 * < 2^VSID_BITS, which is all this should ever be called
327 * with. However gcc is not clever enough to compute the
328 * modulus (2^n-1) without a second multiply. */
329 return ((protovsid * VSID_MULTIPLIER) % VSID_MODULUS);
333 x = protovsid * VSID_MULTIPLIER;
334 x = (x >> VSID_BITS) + (x & VSID_MODULUS);
335 return (x + ((x+1) >> VSID_BITS)) & VSID_MODULUS;
339 /* This is only valid for addresses >= KERNELBASE */
340 static inline unsigned long get_kernel_vsid(unsigned long ea)
342 return vsid_scramble(ea >> SID_SHIFT);
345 /* This is only valid for user addresses (which are below 2^41) */
346 static inline unsigned long get_vsid(unsigned long context, unsigned long ea)
348 return vsid_scramble((context << USER_ESID_BITS)
349 | (ea >> SID_SHIFT));
352 #define VSID_SCRAMBLE(pvsid) (((pvsid) * VSID_MULTIPLIER) % VSID_MODULUS)
353 #define KERNEL_VSID(ea) VSID_SCRAMBLE(GET_ESID(ea))
355 #endif /* __ASSEMBLY */
357 #endif /* _PPC64_MMU_H_ */