2 * Provides the Hypervisor PCI calls for iSeries Linux Parition.
3 * Copyright (C) 2001 <Wayne G Holm> <IBM Corporation>
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the:
17 * Free Software Foundation, Inc.,
18 * 59 Temple Place, Suite 330,
19 * Boston, MA 02111-1307 USA
22 * Created, Jan 9, 2001
28 #include <asm/iSeries/HvCallSc.h>
29 #include <asm/iSeries/HvTypes.h>
32 * DSA == Direct Select Address
33 * this struct must be 64 bits in total
35 struct HvCallPci_DsaAddr {
36 u16 busNumber; /* PHB index? */
37 u8 subBusNumber; /* PCI bus number? */
38 u8 deviceId; /* device and function? */
45 struct HvCallPci_DsaAddr Dsa;
48 struct HvCallPci_LoadReturn {
53 enum HvCallPci_DeviceType {
54 HvCallPci_NodeDevice = 1,
55 HvCallPci_SpDevice = 2,
56 HvCallPci_IopDevice = 3,
57 HvCallPci_BridgeDevice = 4,
58 HvCallPci_MultiFunctionDevice = 5,
59 HvCallPci_IoaDevice = 6
63 struct HvCallPci_DeviceInfo {
64 u32 deviceType; /* See DeviceType enum for values */
67 struct HvCallPci_BusUnitInfo {
68 u32 sizeReturned; /* length of data returned */
69 u32 deviceType; /* see DeviceType enum for values */
72 struct HvCallPci_BridgeInfo {
73 struct HvCallPci_BusUnitInfo busUnitInfo; /* Generic bus unit info */
74 u8 subBusNumber; /* Bus number of secondary bus */
75 u8 maxAgents; /* Max idsels on secondary bus */
76 u8 maxSubBusNumber; /* Max Sub Bus */
77 u8 logicalSlotNumber; /* Logical Slot Number for IOA */
82 * Maximum BusUnitInfo buffer size. Provided for clients so
83 * they can allocate a buffer big enough for any type of bus
84 * unit. Increase as needed.
86 enum {HvCallPci_MaxBusUnitInfoSize = 128};
88 struct HvCallPci_BarParms {
99 enum HvCallPci_VpdType {
100 HvCallPci_BusVpd = 1,
101 HvCallPci_BusAdapterVpd = 2
104 #define HvCallPciConfigLoad8 HvCallPci + 0
105 #define HvCallPciConfigLoad16 HvCallPci + 1
106 #define HvCallPciConfigLoad32 HvCallPci + 2
107 #define HvCallPciConfigStore8 HvCallPci + 3
108 #define HvCallPciConfigStore16 HvCallPci + 4
109 #define HvCallPciConfigStore32 HvCallPci + 5
110 #define HvCallPciEoi HvCallPci + 16
111 #define HvCallPciGetBarParms HvCallPci + 18
112 #define HvCallPciMaskFisr HvCallPci + 20
113 #define HvCallPciUnmaskFisr HvCallPci + 21
114 #define HvCallPciSetSlotReset HvCallPci + 25
115 #define HvCallPciGetDeviceInfo HvCallPci + 27
116 #define HvCallPciGetCardVpd HvCallPci + 28
117 #define HvCallPciBarLoad8 HvCallPci + 40
118 #define HvCallPciBarLoad16 HvCallPci + 41
119 #define HvCallPciBarLoad32 HvCallPci + 42
120 #define HvCallPciBarLoad64 HvCallPci + 43
121 #define HvCallPciBarStore8 HvCallPci + 44
122 #define HvCallPciBarStore16 HvCallPci + 45
123 #define HvCallPciBarStore32 HvCallPci + 46
124 #define HvCallPciBarStore64 HvCallPci + 47
125 #define HvCallPciMaskInterrupts HvCallPci + 48
126 #define HvCallPciUnmaskInterrupts HvCallPci + 49
127 #define HvCallPciGetBusUnitInfo HvCallPci + 50
129 static inline u64 HvCallPci_configLoad8(u16 busNumber, u8 subBusNumber,
130 u8 deviceId, u32 offset, u8 *value)
132 struct HvCallPci_DsaAddr dsa;
133 struct HvCallPci_LoadReturn retVal;
137 dsa.busNumber = busNumber;
138 dsa.subBusNumber = subBusNumber;
139 dsa.deviceId = deviceId;
141 HvCall3Ret16(HvCallPciConfigLoad8, &retVal, *(u64 *)&dsa, offset, 0);
143 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
145 *value = retVal.value;
150 static inline u64 HvCallPci_configLoad16(u16 busNumber, u8 subBusNumber,
151 u8 deviceId, u32 offset, u16 *value)
153 struct HvCallPci_DsaAddr dsa;
154 struct HvCallPci_LoadReturn retVal;
158 dsa.busNumber = busNumber;
159 dsa.subBusNumber = subBusNumber;
160 dsa.deviceId = deviceId;
162 HvCall3Ret16(HvCallPciConfigLoad16, &retVal, *(u64 *)&dsa, offset, 0);
164 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
166 *value = retVal.value;
171 static inline u64 HvCallPci_configLoad32(u16 busNumber, u8 subBusNumber,
172 u8 deviceId, u32 offset, u32 *value)
174 struct HvCallPci_DsaAddr dsa;
175 struct HvCallPci_LoadReturn retVal;
179 dsa.busNumber = busNumber;
180 dsa.subBusNumber = subBusNumber;
181 dsa.deviceId = deviceId;
183 HvCall3Ret16(HvCallPciConfigLoad32, &retVal, *(u64 *)&dsa, offset, 0);
185 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
187 *value = retVal.value;
192 static inline u64 HvCallPci_configStore8(u16 busNumber, u8 subBusNumber,
193 u8 deviceId, u32 offset, u8 value)
195 struct HvCallPci_DsaAddr dsa;
200 dsa.busNumber = busNumber;
201 dsa.subBusNumber = subBusNumber;
202 dsa.deviceId = deviceId;
204 retVal = HvCall4(HvCallPciConfigStore8, *(u64 *)&dsa, offset, value, 0);
206 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
211 static inline u64 HvCallPci_configStore16(u16 busNumber, u8 subBusNumber,
212 u8 deviceId, u32 offset, u16 value)
214 struct HvCallPci_DsaAddr dsa;
219 dsa.busNumber = busNumber;
220 dsa.subBusNumber = subBusNumber;
221 dsa.deviceId = deviceId;
223 retVal = HvCall4(HvCallPciConfigStore16, *(u64 *)&dsa, offset, value, 0);
225 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
230 static inline u64 HvCallPci_configStore32(u16 busNumber, u8 subBusNumber,
231 u8 deviceId, u32 offset, u32 value)
233 struct HvCallPci_DsaAddr dsa;
238 dsa.busNumber = busNumber;
239 dsa.subBusNumber = subBusNumber;
240 dsa.deviceId = deviceId;
242 retVal = HvCall4(HvCallPciConfigStore32, *(u64 *)&dsa, offset, value, 0);
244 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
249 static inline u64 HvCallPci_barLoad8(u16 busNumberParm, u8 subBusParm,
250 u8 deviceIdParm, u8 barNumberParm, u64 offsetParm,
253 struct HvCallPci_DsaAddr dsa;
254 struct HvCallPci_LoadReturn retVal;
258 dsa.busNumber = busNumberParm;
259 dsa.subBusNumber = subBusParm;
260 dsa.deviceId = deviceIdParm;
261 dsa.barNumber = barNumberParm;
263 HvCall3Ret16(HvCallPciBarLoad8, &retVal, *(u64 *)&dsa, offsetParm, 0);
265 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
267 *valueParm = retVal.value;
272 static inline u64 HvCallPci_barLoad16(u16 busNumberParm, u8 subBusParm,
273 u8 deviceIdParm, u8 barNumberParm, u64 offsetParm,
276 struct HvCallPci_DsaAddr dsa;
277 struct HvCallPci_LoadReturn retVal;
281 dsa.busNumber = busNumberParm;
282 dsa.subBusNumber = subBusParm;
283 dsa.deviceId = deviceIdParm;
284 dsa.barNumber = barNumberParm;
286 HvCall3Ret16(HvCallPciBarLoad16, &retVal, *(u64 *)&dsa, offsetParm, 0);
288 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
290 *valueParm = retVal.value;
295 static inline u64 HvCallPci_barLoad32(u16 busNumberParm, u8 subBusParm,
296 u8 deviceIdParm, u8 barNumberParm, u64 offsetParm,
299 struct HvCallPci_DsaAddr dsa;
300 struct HvCallPci_LoadReturn retVal;
304 dsa.busNumber = busNumberParm;
305 dsa.subBusNumber = subBusParm;
306 dsa.deviceId = deviceIdParm;
307 dsa.barNumber = barNumberParm;
309 HvCall3Ret16(HvCallPciBarLoad32, &retVal, *(u64 *)&dsa, offsetParm, 0);
311 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
313 *valueParm = retVal.value;
318 static inline u64 HvCallPci_barLoad64(u16 busNumberParm, u8 subBusParm,
319 u8 deviceIdParm, u8 barNumberParm, u64 offsetParm,
322 struct HvCallPci_DsaAddr dsa;
323 struct HvCallPci_LoadReturn retVal;
327 dsa.busNumber = busNumberParm;
328 dsa.subBusNumber = subBusParm;
329 dsa.deviceId = deviceIdParm;
330 dsa.barNumber = barNumberParm;
332 HvCall3Ret16(HvCallPciBarLoad64, &retVal, *(u64 *)&dsa, offsetParm, 0);
334 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
336 *valueParm = retVal.value;
341 static inline u64 HvCallPci_barStore8(u16 busNumberParm, u8 subBusParm,
342 u8 deviceIdParm, u8 barNumberParm, u64 offsetParm,
345 struct HvCallPci_DsaAddr dsa;
350 dsa.busNumber = busNumberParm;
351 dsa.subBusNumber = subBusParm;
352 dsa.deviceId = deviceIdParm;
353 dsa.barNumber = barNumberParm;
355 retVal = HvCall4(HvCallPciBarStore8, *(u64 *)&dsa, offsetParm, valueParm, 0);
357 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
362 static inline u64 HvCallPci_barStore16(u16 busNumberParm, u8 subBusParm,
363 u8 deviceIdParm, u8 barNumberParm, u64 offsetParm,
366 struct HvCallPci_DsaAddr dsa;
371 dsa.busNumber = busNumberParm;
372 dsa.subBusNumber = subBusParm;
373 dsa.deviceId = deviceIdParm;
374 dsa.barNumber = barNumberParm;
376 retVal = HvCall4(HvCallPciBarStore16, *(u64 *)&dsa, offsetParm, valueParm, 0);
378 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
383 static inline u64 HvCallPci_barStore32(u16 busNumberParm, u8 subBusParm,
384 u8 deviceIdParm, u8 barNumberParm, u64 offsetParm,
387 struct HvCallPci_DsaAddr dsa;
392 dsa.busNumber = busNumberParm;
393 dsa.subBusNumber = subBusParm;
394 dsa.deviceId = deviceIdParm;
395 dsa.barNumber = barNumberParm;
397 retVal = HvCall4(HvCallPciBarStore32, *(u64 *)&dsa, offsetParm, valueParm, 0);
399 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
404 static inline u64 HvCallPci_barStore64(u16 busNumberParm, u8 subBusParm,
405 u8 deviceIdParm, u8 barNumberParm, u64 offsetParm,
408 struct HvCallPci_DsaAddr dsa;
413 dsa.busNumber = busNumberParm;
414 dsa.subBusNumber = subBusParm;
415 dsa.deviceId = deviceIdParm;
416 dsa.barNumber = barNumberParm;
418 retVal = HvCall4(HvCallPciBarStore64, *(u64 *)&dsa, offsetParm, valueParm, 0);
420 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
425 static inline u64 HvCallPci_eoi(u16 busNumberParm, u8 subBusParm,
428 struct HvCallPci_DsaAddr dsa;
429 struct HvCallPci_LoadReturn retVal;
433 dsa.busNumber = busNumberParm;
434 dsa.subBusNumber = subBusParm;
435 dsa.deviceId = deviceIdParm;
437 HvCall1Ret16(HvCallPciEoi, &retVal, *(u64*)&dsa);
439 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
444 static inline u64 HvCallPci_getBarParms(u16 busNumberParm, u8 subBusParm,
445 u8 deviceIdParm, u8 barNumberParm, u64 parms, u32 sizeofParms)
447 struct HvCallPci_DsaAddr dsa;
452 dsa.busNumber = busNumberParm;
453 dsa.subBusNumber = subBusParm;
454 dsa.deviceId = deviceIdParm;
455 dsa.barNumber = barNumberParm;
457 retVal = HvCall3(HvCallPciGetBarParms, *(u64*)&dsa, parms, sizeofParms);
459 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
464 static inline u64 HvCallPci_maskFisr(u16 busNumberParm, u8 subBusParm,
465 u8 deviceIdParm, u64 fisrMask)
467 struct HvCallPci_DsaAddr dsa;
472 dsa.busNumber = busNumberParm;
473 dsa.subBusNumber = subBusParm;
474 dsa.deviceId = deviceIdParm;
476 retVal = HvCall2(HvCallPciMaskFisr, *(u64*)&dsa, fisrMask);
478 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
483 static inline u64 HvCallPci_unmaskFisr(u16 busNumberParm, u8 subBusParm,
484 u8 deviceIdParm, u64 fisrMask)
486 struct HvCallPci_DsaAddr dsa;
491 dsa.busNumber = busNumberParm;
492 dsa.subBusNumber = subBusParm;
493 dsa.deviceId = deviceIdParm;
495 retVal = HvCall2(HvCallPciUnmaskFisr, *(u64*)&dsa, fisrMask);
497 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
502 static inline u64 HvCallPci_setSlotReset(u16 busNumberParm, u8 subBusParm,
503 u8 deviceIdParm, u64 onNotOff)
505 struct HvCallPci_DsaAddr dsa;
510 dsa.busNumber = busNumberParm;
511 dsa.subBusNumber = subBusParm;
512 dsa.deviceId = deviceIdParm;
514 retVal = HvCall2(HvCallPciSetSlotReset, *(u64*)&dsa, onNotOff);
516 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
521 static inline u64 HvCallPci_getDeviceInfo(u16 busNumberParm, u8 subBusParm,
522 u8 deviceNumberParm, u64 parms, u32 sizeofParms)
524 struct HvCallPci_DsaAddr dsa;
529 dsa.busNumber = busNumberParm;
530 dsa.subBusNumber = subBusParm;
531 dsa.deviceId = deviceNumberParm << 4;
533 retVal = HvCall3(HvCallPciGetDeviceInfo, *(u64*)&dsa, parms, sizeofParms);
535 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
540 static inline u64 HvCallPci_maskInterrupts(u16 busNumberParm, u8 subBusParm,
541 u8 deviceIdParm, u64 interruptMask)
543 struct HvCallPci_DsaAddr dsa;
548 dsa.busNumber = busNumberParm;
549 dsa.subBusNumber = subBusParm;
550 dsa.deviceId = deviceIdParm;
552 retVal = HvCall2(HvCallPciMaskInterrupts, *(u64*)&dsa, interruptMask);
554 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
559 static inline u64 HvCallPci_unmaskInterrupts(u16 busNumberParm, u8 subBusParm,
560 u8 deviceIdParm, u64 interruptMask)
562 struct HvCallPci_DsaAddr dsa;
567 dsa.busNumber = busNumberParm;
568 dsa.subBusNumber = subBusParm;
569 dsa.deviceId = deviceIdParm;
571 retVal = HvCall2(HvCallPciUnmaskInterrupts, *(u64*)&dsa, interruptMask);
573 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
578 static inline u64 HvCallPci_getBusUnitInfo(u16 busNumberParm, u8 subBusParm,
579 u8 deviceIdParm, u64 parms, u32 sizeofParms)
581 struct HvCallPci_DsaAddr dsa;
586 dsa.busNumber = busNumberParm;
587 dsa.subBusNumber = subBusParm;
588 dsa.deviceId = deviceIdParm;
590 retVal = HvCall3(HvCallPciGetBusUnitInfo, *(u64*)&dsa, parms, sizeofParms);
592 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
597 static inline int HvCallPci_getBusVpd(u16 busNumParm, u64 destParm,
601 u64 xRc = HvCall4(HvCallPciGetCardVpd, busNumParm, destParm, sizeParm, HvCallPci_BusVpd);
602 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
606 xRetSize = xRc & 0xFFFF;
610 static inline int HvCallPci_getBusAdapterVpd(u16 busNumParm, u64 destParm,
614 u64 xRc = HvCall4(HvCallPciGetCardVpd, busNumParm, destParm, sizeParm, HvCallPci_BusAdapterVpd);
615 // getPaca()->adjustHmtForNoOfSpinLocksHeld();
619 xRetSize = xRc & 0xFFFF;
623 #endif /* _HVCALLPCI_H */