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1 /*
2  * Provides the Hypervisor PCI calls for iSeries Linux Parition.
3  * Copyright (C) 2001  <Wayne G Holm> <IBM Corporation>
4  *
5  * This program is free software; you can redistribute it and/or modify
6  * it under the terms of the GNU General Public License as published by
7  * the Free Software Foundation; either version 2 of the License, or
8  * (at your option) any later version.
9  *
10  * This program is distributed in the hope that it will be useful,
11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
13  * GNU General Public License for more details.
14  *
15  * You should have received a copy of the GNU General Public License
16  * along with this program; if not, write to the:
17  * Free Software Foundation, Inc.,
18  * 59 Temple Place, Suite 330,
19  * Boston, MA  02111-1307  USA
20  *
21  * Change Activity:
22  *   Created, Jan 9, 2001
23  */
24
25 #ifndef _HVCALLPCI_H
26 #define _HVCALLPCI_H
27
28 #include <asm/iSeries/HvCallSc.h>
29 #include <asm/iSeries/HvTypes.h>
30
31 /*
32  * DSA == Direct Select Address
33  * this struct must be 64 bits in total
34  */
35 struct HvCallPci_DsaAddr {
36         u16             busNumber;              /* PHB index? */
37         u8              subBusNumber;           /* PCI bus number? */
38         u8              deviceId;               /* device and function? */
39         u8              barNumber;
40         u8              reserved[3];
41 };
42
43 union HvDsaMap {
44         u64     DsaAddr;
45         struct HvCallPci_DsaAddr Dsa;
46 };
47
48 struct HvCallPci_LoadReturn {
49         u64             rc;
50         u64             value;
51 };
52
53 enum HvCallPci_DeviceType {
54         HvCallPci_NodeDevice    = 1,
55         HvCallPci_SpDevice      = 2,
56         HvCallPci_IopDevice     = 3,
57         HvCallPci_BridgeDevice  = 4,
58         HvCallPci_MultiFunctionDevice = 5,
59         HvCallPci_IoaDevice     = 6
60 };
61
62
63 struct HvCallPci_DeviceInfo {
64         u32     deviceType;             /* See DeviceType enum for values */
65 };
66
67 struct HvCallPci_BusUnitInfo {
68         u32     sizeReturned;           /* length of data returned */
69         u32     deviceType;             /* see DeviceType enum for values */
70 };
71
72 struct HvCallPci_BridgeInfo {
73         struct HvCallPci_BusUnitInfo busUnitInfo;  /* Generic bus unit info */
74         u8              subBusNumber;   /* Bus number of secondary bus */
75         u8              maxAgents;      /* Max idsels on secondary bus */
76         u8              maxSubBusNumber; /* Max Sub Bus */
77         u8              logicalSlotNumber; /* Logical Slot Number for IOA */
78 };
79
80
81 /*
82  * Maximum BusUnitInfo buffer size.  Provided for clients so
83  * they can allocate a buffer big enough for any type of bus
84  * unit.  Increase as needed.
85  */
86 enum {HvCallPci_MaxBusUnitInfoSize = 128};
87
88 struct HvCallPci_BarParms {
89         u64             vaddr;
90         u64             raddr;
91         u64             size;
92         u64             protectStart;
93         u64             protectEnd;
94         u64             relocationOffset;
95         u64             pciAddress;
96         u64             reserved[3];
97 };
98
99 enum HvCallPci_VpdType {
100         HvCallPci_BusVpd        = 1,
101         HvCallPci_BusAdapterVpd = 2
102 };
103
104 #define HvCallPciConfigLoad8            HvCallPci + 0
105 #define HvCallPciConfigLoad16           HvCallPci + 1
106 #define HvCallPciConfigLoad32           HvCallPci + 2
107 #define HvCallPciConfigStore8           HvCallPci + 3
108 #define HvCallPciConfigStore16          HvCallPci + 4
109 #define HvCallPciConfigStore32          HvCallPci + 5
110 #define HvCallPciEoi                    HvCallPci + 16
111 #define HvCallPciGetBarParms            HvCallPci + 18
112 #define HvCallPciMaskFisr               HvCallPci + 20
113 #define HvCallPciUnmaskFisr             HvCallPci + 21
114 #define HvCallPciSetSlotReset           HvCallPci + 25
115 #define HvCallPciGetDeviceInfo          HvCallPci + 27
116 #define HvCallPciGetCardVpd             HvCallPci + 28
117 #define HvCallPciBarLoad8               HvCallPci + 40
118 #define HvCallPciBarLoad16              HvCallPci + 41
119 #define HvCallPciBarLoad32              HvCallPci + 42
120 #define HvCallPciBarLoad64              HvCallPci + 43
121 #define HvCallPciBarStore8              HvCallPci + 44
122 #define HvCallPciBarStore16             HvCallPci + 45
123 #define HvCallPciBarStore32             HvCallPci + 46
124 #define HvCallPciBarStore64             HvCallPci + 47
125 #define HvCallPciMaskInterrupts         HvCallPci + 48
126 #define HvCallPciUnmaskInterrupts       HvCallPci + 49
127 #define HvCallPciGetBusUnitInfo         HvCallPci + 50
128
129 static inline u64 HvCallPci_configLoad8(u16 busNumber, u8 subBusNumber,
130                 u8 deviceId, u32 offset, u8 *value)
131 {
132         struct HvCallPci_DsaAddr dsa;
133         struct HvCallPci_LoadReturn retVal;
134
135         *((u64*)&dsa) = 0;
136
137         dsa.busNumber = busNumber;
138         dsa.subBusNumber = subBusNumber;
139         dsa.deviceId = deviceId;
140
141         HvCall3Ret16(HvCallPciConfigLoad8, &retVal, *(u64 *)&dsa, offset, 0);
142
143         // getPaca()->adjustHmtForNoOfSpinLocksHeld();
144
145         *value = retVal.value;
146
147         return retVal.rc;
148 }
149
150 static inline u64 HvCallPci_configLoad16(u16 busNumber, u8 subBusNumber,
151                 u8 deviceId, u32 offset, u16 *value)
152 {
153         struct HvCallPci_DsaAddr dsa;
154         struct HvCallPci_LoadReturn retVal;
155
156         *((u64*)&dsa) = 0;
157
158         dsa.busNumber = busNumber;
159         dsa.subBusNumber = subBusNumber;
160         dsa.deviceId = deviceId;
161
162         HvCall3Ret16(HvCallPciConfigLoad16, &retVal, *(u64 *)&dsa, offset, 0);
163
164         // getPaca()->adjustHmtForNoOfSpinLocksHeld();
165
166         *value = retVal.value;
167
168         return retVal.rc;
169 }
170
171 static inline u64 HvCallPci_configLoad32(u16 busNumber, u8 subBusNumber,
172                 u8 deviceId, u32 offset, u32 *value)
173 {
174         struct HvCallPci_DsaAddr dsa;
175         struct HvCallPci_LoadReturn retVal;
176
177         *((u64*)&dsa) = 0;
178
179         dsa.busNumber = busNumber;
180         dsa.subBusNumber = subBusNumber;
181         dsa.deviceId = deviceId;
182
183         HvCall3Ret16(HvCallPciConfigLoad32, &retVal, *(u64 *)&dsa, offset, 0);
184
185         // getPaca()->adjustHmtForNoOfSpinLocksHeld();
186
187         *value = retVal.value;
188
189         return retVal.rc;
190 }
191
192 static inline u64 HvCallPci_configStore8(u16 busNumber, u8 subBusNumber,
193                 u8 deviceId, u32 offset, u8 value)
194 {
195         struct HvCallPci_DsaAddr dsa;
196         u64 retVal;
197
198         *((u64*)&dsa) = 0;
199
200         dsa.busNumber = busNumber;
201         dsa.subBusNumber = subBusNumber;
202         dsa.deviceId = deviceId;
203
204         retVal = HvCall4(HvCallPciConfigStore8, *(u64 *)&dsa, offset, value, 0);
205
206         // getPaca()->adjustHmtForNoOfSpinLocksHeld();
207
208         return retVal;
209 }
210
211 static inline u64 HvCallPci_configStore16(u16 busNumber, u8 subBusNumber,
212                 u8 deviceId, u32 offset, u16 value)
213 {
214         struct HvCallPci_DsaAddr dsa;
215         u64 retVal;
216
217         *((u64*)&dsa) = 0;
218
219         dsa.busNumber = busNumber;
220         dsa.subBusNumber = subBusNumber;
221         dsa.deviceId = deviceId;
222
223         retVal = HvCall4(HvCallPciConfigStore16, *(u64 *)&dsa, offset, value, 0);
224
225         // getPaca()->adjustHmtForNoOfSpinLocksHeld();
226
227         return retVal;
228 }
229
230 static inline u64 HvCallPci_configStore32(u16 busNumber, u8 subBusNumber,
231                 u8 deviceId, u32 offset, u32 value)
232 {
233         struct HvCallPci_DsaAddr dsa;
234         u64 retVal;
235
236         *((u64*)&dsa) = 0;
237
238         dsa.busNumber = busNumber;
239         dsa.subBusNumber = subBusNumber;
240         dsa.deviceId = deviceId;
241
242         retVal = HvCall4(HvCallPciConfigStore32, *(u64 *)&dsa, offset, value, 0);
243
244         // getPaca()->adjustHmtForNoOfSpinLocksHeld();
245
246         return retVal;
247 }
248
249 static inline u64 HvCallPci_barLoad8(u16 busNumberParm, u8 subBusParm,
250                 u8 deviceIdParm, u8 barNumberParm, u64 offsetParm,
251                 u8 *valueParm)
252 {
253         struct HvCallPci_DsaAddr dsa;
254         struct HvCallPci_LoadReturn retVal;
255
256         *((u64*)&dsa) = 0;
257
258         dsa.busNumber = busNumberParm;
259         dsa.subBusNumber = subBusParm;
260         dsa.deviceId = deviceIdParm;
261         dsa.barNumber = barNumberParm;
262
263         HvCall3Ret16(HvCallPciBarLoad8, &retVal, *(u64 *)&dsa, offsetParm, 0);
264
265         // getPaca()->adjustHmtForNoOfSpinLocksHeld();
266
267         *valueParm = retVal.value;
268
269         return retVal.rc;
270 }
271
272 static inline u64 HvCallPci_barLoad16(u16 busNumberParm, u8 subBusParm,
273                 u8 deviceIdParm, u8 barNumberParm, u64 offsetParm,
274                 u16 *valueParm)
275 {
276         struct HvCallPci_DsaAddr dsa;
277         struct HvCallPci_LoadReturn retVal;
278
279         *((u64*)&dsa) = 0;
280
281         dsa.busNumber = busNumberParm;
282         dsa.subBusNumber = subBusParm;
283         dsa.deviceId = deviceIdParm;
284         dsa.barNumber = barNumberParm;
285
286         HvCall3Ret16(HvCallPciBarLoad16, &retVal, *(u64 *)&dsa, offsetParm, 0);
287
288         // getPaca()->adjustHmtForNoOfSpinLocksHeld();
289
290         *valueParm = retVal.value;
291
292         return retVal.rc;
293 }
294
295 static inline u64 HvCallPci_barLoad32(u16 busNumberParm, u8 subBusParm,
296                 u8 deviceIdParm, u8 barNumberParm, u64 offsetParm,
297                 u32 *valueParm)
298 {
299         struct HvCallPci_DsaAddr dsa;
300         struct HvCallPci_LoadReturn retVal;
301
302         *((u64*)&dsa) = 0;
303
304         dsa.busNumber = busNumberParm;
305         dsa.subBusNumber = subBusParm;
306         dsa.deviceId = deviceIdParm;
307         dsa.barNumber = barNumberParm;
308
309         HvCall3Ret16(HvCallPciBarLoad32, &retVal, *(u64 *)&dsa, offsetParm, 0);
310
311         // getPaca()->adjustHmtForNoOfSpinLocksHeld();
312
313         *valueParm = retVal.value;
314
315         return retVal.rc;
316 }
317
318 static inline u64 HvCallPci_barLoad64(u16 busNumberParm, u8 subBusParm,
319                 u8 deviceIdParm, u8 barNumberParm, u64 offsetParm,
320                 u64 *valueParm)
321 {
322         struct HvCallPci_DsaAddr dsa;
323         struct HvCallPci_LoadReturn retVal;
324
325         *((u64*)&dsa) = 0;
326
327         dsa.busNumber = busNumberParm;
328         dsa.subBusNumber = subBusParm;
329         dsa.deviceId = deviceIdParm;
330         dsa.barNumber = barNumberParm;
331
332         HvCall3Ret16(HvCallPciBarLoad64, &retVal, *(u64 *)&dsa, offsetParm, 0);
333
334         // getPaca()->adjustHmtForNoOfSpinLocksHeld();
335
336         *valueParm = retVal.value;
337
338         return retVal.rc;
339 }
340
341 static inline u64 HvCallPci_barStore8(u16 busNumberParm, u8 subBusParm,
342                 u8 deviceIdParm, u8 barNumberParm, u64 offsetParm,
343                 u8 valueParm)
344 {
345         struct HvCallPci_DsaAddr dsa;
346         u64 retVal;
347
348         *((u64*)&dsa) = 0;
349
350         dsa.busNumber = busNumberParm;
351         dsa.subBusNumber = subBusParm;
352         dsa.deviceId = deviceIdParm;
353         dsa.barNumber = barNumberParm;
354
355         retVal = HvCall4(HvCallPciBarStore8, *(u64 *)&dsa, offsetParm, valueParm, 0);
356
357         // getPaca()->adjustHmtForNoOfSpinLocksHeld();
358
359         return retVal;
360 }
361
362 static inline u64 HvCallPci_barStore16(u16 busNumberParm, u8 subBusParm,
363                 u8 deviceIdParm, u8 barNumberParm, u64 offsetParm,
364                 u16 valueParm)
365 {
366         struct HvCallPci_DsaAddr dsa;
367         u64 retVal;
368
369         *((u64*)&dsa) = 0;
370
371         dsa.busNumber = busNumberParm;
372         dsa.subBusNumber = subBusParm;
373         dsa.deviceId = deviceIdParm;
374         dsa.barNumber = barNumberParm;
375
376         retVal = HvCall4(HvCallPciBarStore16, *(u64 *)&dsa, offsetParm, valueParm, 0);
377
378         // getPaca()->adjustHmtForNoOfSpinLocksHeld();
379
380         return retVal;
381 }
382
383 static inline u64 HvCallPci_barStore32(u16 busNumberParm, u8 subBusParm,
384                 u8 deviceIdParm, u8 barNumberParm, u64 offsetParm,
385                 u32 valueParm)
386 {
387         struct HvCallPci_DsaAddr dsa;
388         u64 retVal;
389
390         *((u64*)&dsa) = 0;
391
392         dsa.busNumber = busNumberParm;
393         dsa.subBusNumber = subBusParm;
394         dsa.deviceId = deviceIdParm;
395         dsa.barNumber = barNumberParm;
396
397         retVal = HvCall4(HvCallPciBarStore32, *(u64 *)&dsa, offsetParm, valueParm, 0);
398
399         // getPaca()->adjustHmtForNoOfSpinLocksHeld();
400
401         return retVal;
402 }
403
404 static inline u64 HvCallPci_barStore64(u16 busNumberParm, u8 subBusParm,
405                 u8 deviceIdParm, u8 barNumberParm, u64 offsetParm,
406                 u64 valueParm)
407 {
408         struct HvCallPci_DsaAddr dsa;
409         u64 retVal;
410
411         *((u64*)&dsa) = 0;
412
413         dsa.busNumber = busNumberParm;
414         dsa.subBusNumber = subBusParm;
415         dsa.deviceId = deviceIdParm;
416         dsa.barNumber = barNumberParm;
417
418         retVal = HvCall4(HvCallPciBarStore64, *(u64 *)&dsa, offsetParm, valueParm, 0);
419
420         // getPaca()->adjustHmtForNoOfSpinLocksHeld();
421
422         return retVal;
423 }
424
425 static inline u64 HvCallPci_eoi(u16 busNumberParm, u8 subBusParm,
426                 u8 deviceIdParm)
427 {
428         struct HvCallPci_DsaAddr dsa;
429         struct HvCallPci_LoadReturn retVal;
430
431         *((u64*)&dsa) = 0;
432
433         dsa.busNumber = busNumberParm;
434         dsa.subBusNumber = subBusParm;
435         dsa.deviceId = deviceIdParm;
436
437         HvCall1Ret16(HvCallPciEoi, &retVal, *(u64*)&dsa);
438
439         // getPaca()->adjustHmtForNoOfSpinLocksHeld();
440
441         return retVal.rc;
442 }
443
444 static inline u64 HvCallPci_getBarParms(u16 busNumberParm, u8 subBusParm,
445                 u8 deviceIdParm, u8 barNumberParm, u64 parms, u32 sizeofParms)
446 {
447         struct HvCallPci_DsaAddr dsa;
448         u64 retVal;
449
450         *((u64*)&dsa) = 0;
451
452         dsa.busNumber = busNumberParm;
453         dsa.subBusNumber = subBusParm;
454         dsa.deviceId = deviceIdParm;
455         dsa.barNumber = barNumberParm;
456
457         retVal = HvCall3(HvCallPciGetBarParms, *(u64*)&dsa, parms, sizeofParms);
458
459         // getPaca()->adjustHmtForNoOfSpinLocksHeld();
460
461         return retVal;
462 }
463
464 static inline u64 HvCallPci_maskFisr(u16 busNumberParm, u8 subBusParm,
465                 u8 deviceIdParm, u64 fisrMask)
466 {
467         struct HvCallPci_DsaAddr dsa;
468         u64 retVal;
469
470         *((u64*)&dsa) = 0;
471
472         dsa.busNumber = busNumberParm;
473         dsa.subBusNumber = subBusParm;
474         dsa.deviceId = deviceIdParm;
475
476         retVal = HvCall2(HvCallPciMaskFisr, *(u64*)&dsa, fisrMask);
477
478         // getPaca()->adjustHmtForNoOfSpinLocksHeld();
479
480         return retVal;
481 }
482
483 static inline u64 HvCallPci_unmaskFisr(u16 busNumberParm, u8 subBusParm,
484                 u8 deviceIdParm, u64 fisrMask)
485 {
486         struct HvCallPci_DsaAddr dsa;
487         u64 retVal;
488
489         *((u64*)&dsa) = 0;
490
491         dsa.busNumber = busNumberParm;
492         dsa.subBusNumber = subBusParm;
493         dsa.deviceId = deviceIdParm;
494
495         retVal = HvCall2(HvCallPciUnmaskFisr, *(u64*)&dsa, fisrMask);
496
497         // getPaca()->adjustHmtForNoOfSpinLocksHeld();
498
499         return retVal;
500 }
501
502 static inline u64 HvCallPci_setSlotReset(u16 busNumberParm, u8 subBusParm,
503                 u8 deviceIdParm, u64 onNotOff)
504 {
505         struct HvCallPci_DsaAddr dsa;
506         u64 retVal;
507
508         *((u64*)&dsa) = 0;
509
510         dsa.busNumber = busNumberParm;
511         dsa.subBusNumber = subBusParm;
512         dsa.deviceId = deviceIdParm;
513
514         retVal = HvCall2(HvCallPciSetSlotReset, *(u64*)&dsa, onNotOff);
515
516         // getPaca()->adjustHmtForNoOfSpinLocksHeld();
517
518         return retVal;
519 }
520
521 static inline u64 HvCallPci_getDeviceInfo(u16 busNumberParm, u8 subBusParm,
522                 u8 deviceNumberParm, u64 parms, u32 sizeofParms)
523 {
524         struct HvCallPci_DsaAddr dsa;
525         u64 retVal;
526
527         *((u64*)&dsa) = 0;
528
529         dsa.busNumber = busNumberParm;
530         dsa.subBusNumber = subBusParm;
531         dsa.deviceId = deviceNumberParm << 4;
532
533         retVal = HvCall3(HvCallPciGetDeviceInfo, *(u64*)&dsa, parms, sizeofParms);
534
535         // getPaca()->adjustHmtForNoOfSpinLocksHeld();
536
537         return retVal;
538 }
539
540 static inline u64 HvCallPci_maskInterrupts(u16 busNumberParm, u8 subBusParm,
541                 u8 deviceIdParm, u64 interruptMask)
542 {
543         struct HvCallPci_DsaAddr dsa;
544         u64 retVal;
545
546         *((u64*)&dsa) = 0;
547
548         dsa.busNumber = busNumberParm;
549         dsa.subBusNumber = subBusParm;
550         dsa.deviceId = deviceIdParm;
551
552         retVal = HvCall2(HvCallPciMaskInterrupts, *(u64*)&dsa, interruptMask);
553
554         // getPaca()->adjustHmtForNoOfSpinLocksHeld();
555
556         return retVal;
557 }
558
559 static inline u64 HvCallPci_unmaskInterrupts(u16 busNumberParm, u8 subBusParm,
560                 u8 deviceIdParm, u64 interruptMask)
561 {
562         struct HvCallPci_DsaAddr dsa;
563         u64 retVal;
564
565         *((u64*)&dsa) = 0;
566
567         dsa.busNumber = busNumberParm;
568         dsa.subBusNumber = subBusParm;
569         dsa.deviceId = deviceIdParm;
570
571         retVal = HvCall2(HvCallPciUnmaskInterrupts, *(u64*)&dsa, interruptMask);
572
573         // getPaca()->adjustHmtForNoOfSpinLocksHeld();
574
575         return retVal;
576 }
577
578 static inline u64 HvCallPci_getBusUnitInfo(u16 busNumberParm, u8 subBusParm,
579                 u8 deviceIdParm, u64 parms, u32 sizeofParms)
580 {
581         struct HvCallPci_DsaAddr dsa;
582         u64 retVal;
583
584         *((u64*)&dsa) = 0;
585
586         dsa.busNumber = busNumberParm;
587         dsa.subBusNumber = subBusParm;
588         dsa.deviceId = deviceIdParm;
589
590         retVal = HvCall3(HvCallPciGetBusUnitInfo, *(u64*)&dsa, parms, sizeofParms);
591
592         // getPaca()->adjustHmtForNoOfSpinLocksHeld();
593
594         return retVal;
595 }
596
597 static inline int HvCallPci_getBusVpd(u16 busNumParm, u64 destParm,
598                 u16 sizeParm)
599 {
600         int xRetSize;
601         u64 xRc = HvCall4(HvCallPciGetCardVpd, busNumParm, destParm, sizeParm, HvCallPci_BusVpd);
602         // getPaca()->adjustHmtForNoOfSpinLocksHeld();
603         if (xRc == -1)
604                 xRetSize = -1;
605         else
606                 xRetSize = xRc & 0xFFFF;
607         return xRetSize;
608 }
609
610 static inline int HvCallPci_getBusAdapterVpd(u16 busNumParm, u64 destParm,
611                 u16 sizeParm)
612 {
613         int xRetSize;
614         u64 xRc = HvCall4(HvCallPciGetCardVpd, busNumParm, destParm, sizeParm, HvCallPci_BusAdapterVpd);
615         // getPaca()->adjustHmtForNoOfSpinLocksHeld();
616         if (xRc == -1)
617                 xRetSize = -1;
618         else
619                 xRetSize = xRc & 0xFFFF;
620         return xRetSize;
621 }
622
623 #endif /* _HVCALLPCI_H */