2 * Copyright (C) 1999 Cort Dougan <cort@cs.nmt.edu>
7 #include <linux/kernel.h>
9 #include <asm/hw_irq.h>
13 * The sync instruction guarantees that all memory accesses initiated
14 * by this processor have been performed (with respect to all other
15 * mechanisms that access memory). The eieio instruction is a barrier
16 * providing an ordering (separately) for (a) cacheable stores and (b)
17 * loads and stores to non-cacheable memory (e.g. I/O devices).
19 * mb() prevents loads and stores being reordered across this point.
20 * rmb() prevents loads being reordered across this point.
21 * wmb() prevents stores being reordered across this point.
22 * read_barrier_depends() prevents data-dependent loads being reordered
23 * across this point (nop on PPC).
25 * We can use the eieio instruction for wmb, but since it doesn't
26 * give any ordering guarantees about loads, we have to use the
27 * stronger but slower sync instruction for mb and rmb.
29 #define mb() __asm__ __volatile__ ("sync" : : : "memory")
30 #define rmb() __asm__ __volatile__ ("sync" : : : "memory")
31 #define wmb() __asm__ __volatile__ ("eieio" : : : "memory")
32 #define read_barrier_depends() do { } while(0)
34 #define set_mb(var, value) do { var = value; mb(); } while (0)
38 #define smp_rmb() rmb()
39 #define smp_wmb() __asm__ __volatile__ ("eieio" : : : "memory")
40 #define smp_read_barrier_depends() read_barrier_depends()
42 #define smp_mb() barrier()
43 #define smp_rmb() barrier()
44 #define smp_wmb() barrier()
45 #define smp_read_barrier_depends() do { } while(0)
46 #endif /* CONFIG_SMP */
52 extern void print_backtrace(unsigned long *);
53 extern void show_regs(struct pt_regs * regs);
54 extern void flush_instruction_cache(void);
55 extern void hard_reset_now(void);
56 extern void poweroff_now(void);
57 extern int set_dabr(unsigned long dabr);
59 extern long _get_L2CR(void);
60 extern long _get_L3CR(void);
61 extern void _set_L2CR(unsigned long);
62 extern void _set_L3CR(unsigned long);
64 #define _get_L2CR() 0L
65 #define _get_L3CR() 0L
66 #define _set_L2CR(val) do { } while(0)
67 #define _set_L3CR(val) do { } while(0)
69 extern void via_cuda_init(void);
70 extern void pmac_nvram_init(void);
71 extern void chrp_nvram_init(void);
72 extern void read_rtc_time(void);
73 extern void pmac_find_display(void);
74 extern void giveup_fpu(struct task_struct *);
75 extern void disable_kernel_fp(void);
76 extern void enable_kernel_fp(void);
77 extern void flush_fp_to_thread(struct task_struct *);
78 extern void enable_kernel_altivec(void);
79 extern void giveup_altivec(struct task_struct *);
80 extern void load_up_altivec(struct task_struct *);
81 extern int emulate_altivec(struct pt_regs *);
82 extern void giveup_spe(struct task_struct *);
83 extern void load_up_spe(struct task_struct *);
84 extern int fix_alignment(struct pt_regs *);
85 extern void cvt_fd(float *from, double *to, struct thread_struct *thread);
86 extern void cvt_df(double *from, float *to, struct thread_struct *thread);
89 extern void discard_lazy_cpu_state(void);
91 static inline void discard_lazy_cpu_state(void)
97 extern void flush_altivec_to_thread(struct task_struct *);
99 static inline void flush_altivec_to_thread(struct task_struct *t)
105 extern void flush_spe_to_thread(struct task_struct *);
107 static inline void flush_spe_to_thread(struct task_struct *t)
112 extern int call_rtas(const char *, int, int, unsigned long *, ...);
113 extern void cacheable_memzero(void *p, unsigned int nb);
114 extern void *cacheable_memcpy(void *, const void *, unsigned int);
115 extern int do_page_fault(struct pt_regs *, unsigned long, unsigned long);
116 extern void bad_page_fault(struct pt_regs *, unsigned long, int);
117 extern int die(const char *, struct pt_regs *, long);
118 extern void _exception(int, struct pt_regs *, int, unsigned long);
119 void _nmask_and_or_msr(unsigned long nmask, unsigned long or_val);
121 #ifdef CONFIG_BOOKE_WDT
122 extern u32 booke_wdt_enabled;
123 extern u32 booke_wdt_period;
124 #endif /* CONFIG_BOOKE_WDT */
127 extern void note_scsi_host(struct device_node *, void *);
129 extern struct task_struct *__switch_to(struct task_struct *,
130 struct task_struct *);
131 #define switch_to(prev, next, last) ((last) = __switch_to((prev), (next)))
133 struct thread_struct;
134 extern struct task_struct *_switch(struct thread_struct *prev,
135 struct thread_struct *next);
137 extern unsigned int rtas_data;
139 static __inline__ unsigned long
140 xchg_u32(volatile void *p, unsigned long val)
144 __asm__ __volatile__ ("\n\
149 : "=&r" (prev), "=m" (*(volatile unsigned long *)p)
150 : "r" (p), "r" (val), "m" (*(volatile unsigned long *)p)
157 * This function doesn't exist, so you'll get a linker error
158 * if something tries to do an invalid xchg().
160 extern void __xchg_called_with_bad_pointer(void);
162 #define xchg(ptr,x) ((__typeof__(*(ptr)))__xchg((unsigned long)(x),(ptr),sizeof(*(ptr))))
164 static inline unsigned long __xchg(unsigned long x, volatile void *ptr, int size)
168 return (unsigned long) xchg_u32(ptr, x);
169 #if 0 /* xchg_u64 doesn't exist on 32-bit PPC */
171 return (unsigned long) xchg_u64(ptr, x);
174 __xchg_called_with_bad_pointer();
180 extern inline void * xchg_ptr(void * m, void * val)
182 return (void *) xchg_u32(m, (unsigned long) val);
186 #define __HAVE_ARCH_CMPXCHG 1
188 static __inline__ unsigned long
189 __cmpxchg_u32(volatile unsigned int *p, unsigned int old, unsigned int new)
193 __asm__ __volatile__ ("\n\
202 #endif /* CONFIG_SMP */
204 : "=&r" (prev), "=m" (*p)
205 : "r" (p), "r" (old), "r" (new), "m" (*p)
211 /* This function doesn't exist, so you'll get a linker error
212 if something tries to do an invalid cmpxchg(). */
213 extern void __cmpxchg_called_with_bad_pointer(void);
215 static __inline__ unsigned long
216 __cmpxchg(volatile void *ptr, unsigned long old, unsigned long new, int size)
220 return __cmpxchg_u32(ptr, old, new);
221 #if 0 /* we don't have __cmpxchg_u64 on 32-bit PPC */
223 return __cmpxchg_u64(ptr, old, new);
226 __cmpxchg_called_with_bad_pointer();
230 #define cmpxchg(ptr,o,n) \
232 __typeof__(*(ptr)) _o_ = (o); \
233 __typeof__(*(ptr)) _n_ = (n); \
234 (__typeof__(*(ptr))) __cmpxchg((ptr), (unsigned long)_o_, \
235 (unsigned long)_n_, sizeof(*(ptr))); \
238 #define arch_align_stack(x) (x)
240 #endif /* __KERNEL__ */
241 #endif /* __PPC_SYSTEM_H */