1 #ifndef _ASM_POWERPC_PTRACE_H
2 #define _ASM_POWERPC_PTRACE_H
5 * Copyright (C) 2001 PPC64 Team, IBM Corp
7 * This struct defines the way the registers are stored on the
8 * kernel stack during a system call or other kernel entry.
10 * this should only contain volatile regs
11 * since we can keep non-volatile in the thread_struct
12 * should set this up when only volatiles are saved
15 * Since this is going on the stack, *CARE MUST BE TAKEN* to insure
16 * that the overall structure is a multiple of 16 bytes in length.
18 * Note that the offsets of the fields in this struct correspond with
19 * the PT_* values below. This simplifies arch/powerpc/kernel/ptrace.c.
21 * This program is free software; you can redistribute it and/or
22 * modify it under the terms of the GNU General Public License
23 * as published by the Free Software Foundation; either version
24 * 2 of the License, or (at your option) any later version.
30 unsigned long gpr[32];
33 unsigned long orig_gpr3; /* Used for restarting system calls */
39 unsigned long softe; /* Soft enabled/disabled */
41 unsigned long mq; /* 601 only (not used at present) */
42 /* Used on APUS to hold IPL value. */
44 unsigned long trap; /* Reason for being here */
45 /* N.B. for critical exceptions on 4xx, the dar and dsisr
46 fields are overloaded to hold srr0 and srr1. */
47 unsigned long dar; /* Fault registers */
48 unsigned long dsisr; /* on 4xx/Book-E used for ESR */
49 unsigned long result; /* Result of a system call */
52 #endif /* __ASSEMBLY__ */
58 #define __ARCH_WANT_COMPAT_SYS_PTRACE
60 #define STACK_FRAME_OVERHEAD 112 /* size of minimum stack frame */
61 #define STACK_FRAME_LR_SAVE 2 /* Location of LR in stack frame */
62 #define STACK_FRAME_REGS_MARKER ASM_CONST(0x7265677368657265)
63 #define STACK_INT_FRAME_SIZE (sizeof(struct pt_regs) + \
64 STACK_FRAME_OVERHEAD + 288)
65 #define STACK_FRAME_MARKER 12
67 /* Size of dummy stack frame allocated when calling signal handler. */
68 #define __SIGNAL_FRAMESIZE 128
69 #define __SIGNAL_FRAMESIZE32 64
71 #else /* __powerpc64__ */
73 #define STACK_FRAME_OVERHEAD 16 /* size of minimum stack frame */
74 #define STACK_FRAME_LR_SAVE 1 /* Location of LR in stack frame */
75 #define STACK_FRAME_REGS_MARKER ASM_CONST(0x72656773)
76 #define STACK_INT_FRAME_SIZE (sizeof(struct pt_regs) + STACK_FRAME_OVERHEAD)
77 #define STACK_FRAME_MARKER 2
79 /* Size of stack frame allocated when calling signal handler. */
80 #define __SIGNAL_FRAMESIZE 64
82 #endif /* __powerpc64__ */
86 #define instruction_pointer(regs) ((regs)->nip)
87 #define regs_return_value(regs) ((regs)->gpr[3])
90 extern unsigned long profile_pc(struct pt_regs *regs);
92 #define profile_pc(regs) instruction_pointer(regs)
96 #define user_mode(regs) ((((regs)->msr) >> MSR_PR_LG) & 0x1)
98 #define user_mode(regs) (((regs)->msr & MSR_PR) != 0)
101 #define force_successful_syscall_return() \
103 set_thread_flag(TIF_NOERROR); \
107 extern unsigned long ptrace_get_reg(struct task_struct *task, int regno);
108 extern int ptrace_put_reg(struct task_struct *task, int regno,
112 * We use the least-significant bit of the trap field to indicate
113 * whether we have saved the full set of registers, or only a
114 * partial set. A 1 there means the partial set.
115 * On 4xx we use the next bit to indicate whether the exception
116 * is a critical exception (1 means it is).
118 #define FULL_REGS(regs) (((regs)->trap & 1) == 0)
119 #ifndef __powerpc64__
120 #define IS_CRITICAL_EXC(regs) (((regs)->trap & 2) != 0)
121 #define IS_MCHECK_EXC(regs) (((regs)->trap & 4) != 0)
122 #endif /* ! __powerpc64__ */
123 #define TRAP(regs) ((regs)->trap & ~0xF)
125 #define CHECK_FULL_REGS(regs) BUG_ON(regs->trap & 1)
127 #define CHECK_FULL_REGS(regs) \
129 if ((regs)->trap & 1) \
130 printk(KERN_CRIT "%s: partial register set\n", __FUNCTION__); \
132 #endif /* __powerpc64__ */
135 * These are defined as per linux/ptrace.h, which see.
137 #define arch_has_single_step() (1)
138 extern void user_enable_single_step(struct task_struct *);
139 extern void user_disable_single_step(struct task_struct *);
141 #endif /* __ASSEMBLY__ */
143 #endif /* __KERNEL__ */
146 * Offsets used by 'ptrace' system call interface.
147 * These can't be changed without breaking binary compatibility
185 #define PT_ORIG_R3 34
190 #ifndef __powerpc64__
199 #define PT_REGS_COUNT 44
201 #define PT_FPR0 48 /* each FP reg occupies 2 slots in this space */
203 #ifndef __powerpc64__
205 #define PT_FPR31 (PT_FPR0 + 2*31)
206 #define PT_FPSCR (PT_FPR0 + 2*32 + 1)
208 #else /* __powerpc64__ */
210 #define PT_FPSCR (PT_FPR0 + 32) /* each FP reg occupies 1 slot in 64-bit space */
213 #define PT_FPSCR32 (PT_FPR0 + 2*32 + 1) /* each FP reg occupies 2 32-bit userspace slots */
216 #define PT_VR0 82 /* each Vector reg occupies 2 slots in 64-bit */
217 #define PT_VSCR (PT_VR0 + 32*2 + 1)
218 #define PT_VRSAVE (PT_VR0 + 33*2)
221 #define PT_VR0_32 164 /* each Vector reg occupies 4 slots in 32-bit */
222 #define PT_VSCR_32 (PT_VR0 + 32*4 + 3)
223 #define PT_VRSAVE_32 (PT_VR0 + 33*4)
226 #endif /* __powerpc64__ */
229 * Get/set all the altivec registers vr0..vr31, vscr, vrsave, in one go.
230 * The transfer totals 34 quadword. Quadwords 0-31 contain the
231 * corresponding vector registers. Quadword 32 contains the vscr as the
232 * last word (offset 12) within that quadword. Quadword 33 contains the
233 * vrsave as the first word (offset 0) within the quadword.
235 * This definition of the VMX state is compatible with the current PPC32
236 * ptrace interface. This allows signal handling and ptrace to use the same
237 * structures. This also simplifies the implementation of a bi-arch
238 * (combined (32- and 64-bit) gdb.
240 #define PTRACE_GETVRREGS 18
241 #define PTRACE_SETVRREGS 19
243 /* Get/set all the upper 32-bits of the SPE registers, accumulator, and
244 * spefscr, in one go */
245 #define PTRACE_GETEVRREGS 20
246 #define PTRACE_SETEVRREGS 21
249 * Get or set a debug register. The first 16 are DABR registers and the
250 * second 16 are IABR registers.
252 #define PTRACE_GET_DEBUGREG 25
253 #define PTRACE_SET_DEBUGREG 26
255 /* (new) PTRACE requests using the same numbers as x86 and the same
256 * argument ordering. Additionally, they support more registers too
258 #define PTRACE_GETREGS 12
259 #define PTRACE_SETREGS 13
260 #define PTRACE_GETFPREGS 14
261 #define PTRACE_SETFPREGS 15
262 #define PTRACE_GETREGS64 22
263 #define PTRACE_SETREGS64 23
265 /* (old) PTRACE requests with inverted arguments */
266 #define PPC_PTRACE_GETREGS 0x99 /* Get GPRs 0 - 31 */
267 #define PPC_PTRACE_SETREGS 0x98 /* Set GPRs 0 - 31 */
268 #define PPC_PTRACE_GETFPREGS 0x97 /* Get FPRs 0 - 31 */
269 #define PPC_PTRACE_SETFPREGS 0x96 /* Set FPRs 0 - 31 */
271 /* Calls to trace a 64bit program from a 32bit program */
272 #define PPC_PTRACE_PEEKTEXT_3264 0x95
273 #define PPC_PTRACE_PEEKDATA_3264 0x94
274 #define PPC_PTRACE_POKETEXT_3264 0x93
275 #define PPC_PTRACE_POKEDATA_3264 0x92
276 #define PPC_PTRACE_PEEKUSR_3264 0x91
277 #define PPC_PTRACE_POKEUSR_3264 0x90
279 #endif /* _ASM_POWERPC_PTRACE_H */