2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
6 * Copyright (C) 1999 by Ralf Baechle
7 * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
14 * This assumes you have a 1.8432 MHz clock for your UART.
16 * It'd be nice if someone built a serial card with a 24.576 MHz
17 * clock, since the 16550A is capable of handling a top speed of 1.5
18 * megabits/second; but this requires the faster clock.
20 #define BASE_BAUD (1843200 / 16)
22 /* Standard COM flags (except for COM4, because of the 8514 problem) */
23 #ifdef CONFIG_SERIAL_DETECT_IRQ
24 #define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST | ASYNC_AUTO_IRQ)
25 #define STD_COM4_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_AUTO_IRQ)
27 #define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST)
28 #define STD_COM4_FLAGS ASYNC_BOOT_AUTOCONF
31 #ifdef CONFIG_MACH_JAZZ
34 #ifndef CONFIG_OLIVETTI_M700
35 /* Some Jazz machines seem to have an 8MHz crystal clock but I don't know
36 exactly which ones ... XXX */
37 #define JAZZ_BASE_BAUD ( 8000000 / 16 ) /* ( 3072000 / 16) */
39 /* but the M700 isn't such a strange beast */
40 #define JAZZ_BASE_BAUD BASE_BAUD
43 #define _JAZZ_SERIAL_INIT(int, base) \
44 { .baud_base = JAZZ_BASE_BAUD, .irq = int, .flags = STD_COM_FLAGS, \
45 .iomem_base = (u8 *) base, .iomem_reg_shift = 0, \
46 .io_type = SERIAL_IO_MEM }
47 #define JAZZ_SERIAL_PORT_DEFNS \
48 _JAZZ_SERIAL_INIT(JAZZ_SERIAL1_IRQ, JAZZ_SERIAL1_BASE), \
49 _JAZZ_SERIAL_INIT(JAZZ_SERIAL2_IRQ, JAZZ_SERIAL2_BASE),
51 #define JAZZ_SERIAL_PORT_DEFNS
55 * Galileo EV64120 evaluation board
57 #ifdef CONFIG_MIPS_EV64120
58 #include <mach-gt64120.h>
59 #define EV64120_SERIAL_PORT_DEFNS \
60 { .baud_base = EV64120_BASE_BAUD, .irq = EV64120_UART_IRQ, \
61 .flags = STD_COM_FLAGS, \
62 .iomem_base = EV64120_UART0_REGS_BASE, .iomem_reg_shift = 2, \
63 .io_type = SERIAL_IO_MEM }, \
64 { .baud_base = EV64120_BASE_BAUD, .irq = EV64120_UART_IRQ, \
65 .flags = STD_COM_FLAGS, \
66 .iomem_base = EV64120_UART1_REGS_BASE, .iomem_reg_shift = 2, \
67 .io_type = SERIAL_IO_MEM },
69 #define EV64120_SERIAL_PORT_DEFNS
72 #ifdef CONFIG_HAVE_STD_PC_SERIAL_PORT
73 #define STD_SERIAL_PORT_DEFNS \
74 /* UART CLK PORT IRQ FLAGS */ \
75 { 0, BASE_BAUD, 0x3F8, 4, STD_COM_FLAGS }, /* ttyS0 */ \
76 { 0, BASE_BAUD, 0x2F8, 3, STD_COM_FLAGS }, /* ttyS1 */ \
77 { 0, BASE_BAUD, 0x3E8, 4, STD_COM_FLAGS }, /* ttyS2 */ \
78 { 0, BASE_BAUD, 0x2E8, 3, STD_COM4_FLAGS }, /* ttyS3 */
80 #else /* CONFIG_HAVE_STD_PC_SERIAL_PORTS */
81 #define STD_SERIAL_PORT_DEFNS
82 #endif /* CONFIG_HAVE_STD_PC_SERIAL_PORTS */
84 #ifdef CONFIG_MOMENCO_JAGUAR_ATX
85 /* Ordinary NS16552 duart with a 20MHz crystal. */
86 #define JAGUAR_ATX_UART_CLK 20000000
87 #define JAGUAR_ATX_BASE_BAUD (JAGUAR_ATX_UART_CLK / 16)
89 #define JAGUAR_ATX_SERIAL1_IRQ 6
90 #define JAGUAR_ATX_SERIAL1_BASE 0xfd000023L
92 #define _JAGUAR_ATX_SERIAL_INIT(int, base) \
93 { .baud_base = JAGUAR_ATX_BASE_BAUD, irq: int, \
94 .flags = (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST), \
95 .iomem_base = (u8 *) base, iomem_reg_shift: 2, \
96 io_type: SERIAL_IO_MEM }
97 #define MOMENCO_JAGUAR_ATX_SERIAL_PORT_DEFNS \
98 _JAGUAR_ATX_SERIAL_INIT(JAGUAR_ATX_SERIAL1_IRQ, JAGUAR_ATX_SERIAL1_BASE)
100 #define MOMENCO_JAGUAR_ATX_SERIAL_PORT_DEFNS
103 #ifdef CONFIG_MOMENCO_OCELOT_3
104 #define OCELOT_3_BASE_BAUD ( 20000000 / 16 )
105 #define OCELOT_3_SERIAL_IRQ 6
106 #define OCELOT_3_SERIAL_BASE (signed)0xfd000020
108 #define _OCELOT_3_SERIAL_INIT(int, base) \
109 { .baud_base = OCELOT_3_BASE_BAUD, irq: int, \
110 .flags = STD_COM_FLAGS, \
111 .iomem_base = (u8 *) base, iomem_reg_shift: 2, \
112 io_type: SERIAL_IO_MEM }
114 #define MOMENCO_OCELOT_3_SERIAL_PORT_DEFNS \
115 _OCELOT_3_SERIAL_INIT(OCELOT_3_SERIAL_IRQ, OCELOT_3_SERIAL_BASE)
117 #define MOMENCO_OCELOT_3_SERIAL_PORT_DEFNS
120 #ifdef CONFIG_MOMENCO_OCELOT
121 /* Ordinary NS16552 duart with a 20MHz crystal. */
122 #define OCELOT_BASE_BAUD ( 20000000 / 16 )
124 #define OCELOT_SERIAL1_IRQ 4
125 #define OCELOT_SERIAL1_BASE 0xe0001020
127 #define _OCELOT_SERIAL_INIT(int, base) \
128 { .baud_base = OCELOT_BASE_BAUD, .irq = int, .flags = STD_COM_FLAGS, \
129 .iomem_base = (u8 *) base, .iomem_reg_shift = 2, \
130 .io_type = SERIAL_IO_MEM }
131 #define MOMENCO_OCELOT_SERIAL_PORT_DEFNS \
132 _OCELOT_SERIAL_INIT(OCELOT_SERIAL1_IRQ, OCELOT_SERIAL1_BASE)
134 #define MOMENCO_OCELOT_SERIAL_PORT_DEFNS
137 #ifdef CONFIG_MOMENCO_OCELOT_C
138 /* Ordinary NS16552 duart with a 20MHz crystal. */
139 #define OCELOT_C_BASE_BAUD ( 20000000 / 16 )
141 #define OCELOT_C_SERIAL1_IRQ 80
142 #define OCELOT_C_SERIAL1_BASE 0xfd000020
144 #define OCELOT_C_SERIAL2_IRQ 81
145 #define OCELOT_C_SERIAL2_BASE 0xfd000000
147 #define _OCELOT_C_SERIAL_INIT(int, base) \
148 { .baud_base = OCELOT_C_BASE_BAUD, \
150 .flags = STD_COM_FLAGS, \
151 .iomem_base = (u8 *) base, \
152 .iomem_reg_shift = 2, \
153 .io_type = SERIAL_IO_MEM \
155 #define MOMENCO_OCELOT_C_SERIAL_PORT_DEFNS \
156 _OCELOT_C_SERIAL_INIT(OCELOT_C_SERIAL1_IRQ, OCELOT_C_SERIAL1_BASE), \
157 _OCELOT_C_SERIAL_INIT(OCELOT_C_SERIAL2_IRQ, OCELOT_C_SERIAL2_BASE)
159 #define MOMENCO_OCELOT_C_SERIAL_PORT_DEFNS
162 #ifdef CONFIG_DDB5477
163 #include <asm/ddb5xxx/ddb5477.h>
164 #define DDB5477_SERIAL_PORT_DEFNS \
165 { .baud_base = BASE_BAUD, .irq = VRC5477_IRQ_UART0, \
166 .flags = STD_COM_FLAGS, .iomem_base = (u8*)0xbfa04200, \
167 .iomem_reg_shift = 3, .io_type = SERIAL_IO_MEM}, \
168 { .baud_base = BASE_BAUD, .irq = VRC5477_IRQ_UART1, \
169 .flags = STD_COM_FLAGS, .iomem_base = (u8*)0xbfa04240, \
170 .iomem_reg_shift = 3, .io_type = SERIAL_IO_MEM},
172 #define DDB5477_SERIAL_PORT_DEFNS
175 #ifdef CONFIG_SGI_IP32
177 * The IP32 (SGI O2) has standard serial ports (UART 16550A) mapped in memory
178 * They are initialized in ip32_setup
180 #define IP32_SERIAL_PORT_DEFNS \
183 #define IP32_SERIAL_PORT_DEFNS
184 #endif /* CONFIG_SGI_IP32 */
186 #define SERIAL_PORT_DFNS \
187 DDB5477_SERIAL_PORT_DEFNS \
188 EV64120_SERIAL_PORT_DEFNS \
189 IP32_SERIAL_PORT_DEFNS \
190 JAZZ_SERIAL_PORT_DEFNS \
191 STD_SERIAL_PORT_DEFNS \
192 MOMENCO_OCELOT_C_SERIAL_PORT_DEFNS \
193 MOMENCO_OCELOT_SERIAL_PORT_DEFNS \
194 MOMENCO_OCELOT_3_SERIAL_PORT_DEFNS
196 #endif /* _ASM_SERIAL_H */