2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
6 * Copyright (C) 2003, 2004 Ralf Baechle
11 #include <linux/config.h>
24 * RM9000 hazards. When the JTLB is updated by tlbwi or tlbwr, a subsequent
25 * use of the JTLB for instructions should not occur for 4 cpu cycles and use
26 * for data translations should not occur for 3 cpu cycles.
28 #ifdef CONFIG_CPU_RM9000
30 .macro mtc0_tlbw_hazard
33 _ssnop; _ssnop; _ssnop; _ssnop
37 .macro tlbw_eret_hazard
40 _ssnop; _ssnop; _ssnop; _ssnop
47 * The taken branch will result in a two cycle penalty for the two killed
48 * instructions on R4000 / R4400. Other processors only have a single cycle
49 * hazard so this is nice trick to have an optimal code for a range of
52 .macro mtc0_tlbw_hazard
56 .macro tlbw_eret_hazard
62 * The 24K has a 2 cycle mtc0/mfc0 execution hazard.
63 * It is a MIPS32R2 processor so ehb will clear the hazard.
66 #ifdef CONFIG_CPU_MIPSR2
68 * Use a macro for ehb unless explicit support for MIPSR2 is enabled
71 #define irq_enable_hazard
74 #define irq_disable_hazard
77 #elif defined(CONFIG_CPU_R10000) || defined(CONFIG_CPU_RM9000)
80 * R10000 rocks - all hazards handled in hardware, so this becomes a nobrainer.
83 #define irq_enable_hazard
85 #define irq_disable_hazard
90 * Classic MIPS needs 1 - 3 nops or ssnops
92 #define irq_enable_hazard
93 #define irq_disable_hazard \
94 _ssnop; _ssnop; _ssnop
98 #else /* __ASSEMBLY__ */
101 " .macro _ssnop \n\t"
102 " sll $0, $2, 1 \n\t"
106 " sll $0, $0, 3 \n\t"
109 #ifdef CONFIG_CPU_RM9000
112 * RM9000 hazards. When the JTLB is updated by tlbwi or tlbwr, a subsequent
113 * use of the JTLB for instructions should not occur for 4 cpu cycles and use
114 * for data translations should not occur for 3 cpu cycles.
117 #define mtc0_tlbw_hazard() \
118 __asm__ __volatile__( \
120 "_ssnop; _ssnop; _ssnop; _ssnop\n\t" \
123 #define tlbw_use_hazard() \
124 __asm__ __volatile__( \
126 "_ssnop; _ssnop; _ssnop; _ssnop\n\t" \
129 #define back_to_back_c0_hazard() do { } while (0)
134 * Overkill warning ...
136 #define mtc0_tlbw_hazard() \
137 __asm__ __volatile__( \
138 ".set noreorder\n\t" \
139 "nop; nop; nop; nop; nop; nop;\n\t" \
142 #define tlbw_use_hazard() \
143 __asm__ __volatile__( \
144 ".set noreorder\n\t" \
145 "nop; nop; nop; nop; nop; nop;\n\t" \
151 * Interrupt enable/disable hazards
152 * Some processors have hazards when modifying
153 * the status register to change the interrupt state
156 #ifdef CONFIG_CPU_MIPSR2
159 " .macro\tirq_enable_hazard \n\t"
163 " .macro\tirq_disable_hazard \n\t"
167 " .macro\tback_to_back_c0_hazard \n\t"
171 #define irq_enable_hazard() \
172 __asm__ __volatile__( \
175 #define irq_disable_hazard() \
176 __asm__ __volatile__( \
177 "irq_disable_hazard")
179 #define back_to_back_c0_hazard() \
180 __asm__ __volatile__( \
181 "back_to_back_c0_hazard")
183 #elif defined(CONFIG_CPU_R10000) || defined(CONFIG_CPU_RM9000)
186 * R10000 rocks - all hazards handled in hardware, so this becomes a nobrainer.
190 " .macro\tirq_enable_hazard \n\t"
193 " .macro\tirq_disable_hazard \n\t"
196 #define irq_enable_hazard() do { } while (0)
197 #define irq_disable_hazard() do { } while (0)
199 #define back_to_back_c0_hazard() do { } while (0)
204 * Default for classic MIPS processors. Assume worst case hazards but don't
205 * care about the irq_enable_hazard - sooner or later the hardware will
206 * enable it and we don't care when exactly.
211 " # There is a hazard but we do not care \n\t"
213 " .macro\tirq_enable_hazard \n\t"
216 " .macro\tirq_disable_hazard \n\t"
217 " _ssnop; _ssnop; _ssnop \n\t"
220 #define irq_enable_hazard() do { } while (0)
221 #define irq_disable_hazard() \
222 __asm__ __volatile__( \
223 "irq_disable_hazard")
225 #define back_to_back_c0_hazard() \
226 __asm__ __volatile__( \
227 " .set noreorder \n" \
228 " nop; nop; nop \n" \
233 #if defined(CONFIG_CPU_MIPS32_R2) || defined (CONFIG_CPU_MIPS64_R2)
234 #define instruction_hazard() \
237 __asm__ __volatile__( \
246 #define instruction_hazard() do { } while (0)
249 #endif /* __ASSEMBLY__ */
251 #endif /* _ASM_HAZARDS_H */