2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
6 * Copyright (c) 1994 - 1997, 1999, 2000 Ralf Baechle (ralf@gnu.org)
7 * Copyright (c) 1999, 2000 Silicon Graphics, Inc.
12 #include <linux/compiler.h>
13 #include <linux/irqflags.h>
14 #include <linux/types.h>
16 #include <asm/byteorder.h> /* sigh ... */
17 #include <asm/cpu-features.h>
18 #include <asm/sgidefs.h>
21 #if (_MIPS_SZLONG == 32)
23 #define SZLONG_MASK 31UL
26 #elif (_MIPS_SZLONG == 64)
28 #define SZLONG_MASK 63UL
34 * clear_bit() doesn't provide any barrier for the compiler.
36 #define smp_mb__before_clear_bit() smp_mb()
37 #define smp_mb__after_clear_bit() smp_mb()
40 * set_bit - Atomically set a bit in memory
42 * @addr: the address to start counting from
44 * This function is atomic and may not be reordered. See __set_bit()
45 * if you do not require the atomic guarantees.
46 * Note that @nr may be almost arbitrarily large; this function is not
47 * restricted to acting on a single-word quantity.
49 static inline void set_bit(unsigned long nr, volatile unsigned long *addr)
51 unsigned long *m = ((unsigned long *) addr) + (nr >> SZLONG_LOG);
54 if (cpu_has_llsc && R10000_LLSC_WAR) {
57 "1: " __LL "%0, %1 # set_bit \n"
62 : "=&r" (temp), "=m" (*m)
63 : "ir" (1UL << (nr & SZLONG_MASK)), "m" (*m));
64 } else if (cpu_has_llsc) {
67 "1: " __LL "%0, %1 # set_bit \n"
72 : "=&r" (temp), "=m" (*m)
73 : "ir" (1UL << (nr & SZLONG_MASK)), "m" (*m));
75 volatile unsigned long *a = addr;
79 a += nr >> SZLONG_LOG;
80 mask = 1UL << (nr & SZLONG_MASK);
81 local_irq_save(flags);
83 local_irq_restore(flags);
88 * clear_bit - Clears a bit in memory
90 * @addr: Address to start counting from
92 * clear_bit() is atomic and may not be reordered. However, it does
93 * not contain a memory barrier, so if it is used for locking purposes,
94 * you should call smp_mb__before_clear_bit() and/or smp_mb__after_clear_bit()
95 * in order to ensure changes are visible on other processors.
97 static inline void clear_bit(unsigned long nr, volatile unsigned long *addr)
99 unsigned long *m = ((unsigned long *) addr) + (nr >> SZLONG_LOG);
102 if (cpu_has_llsc && R10000_LLSC_WAR) {
103 __asm__ __volatile__(
105 "1: " __LL "%0, %1 # clear_bit \n"
110 : "=&r" (temp), "=m" (*m)
111 : "ir" (~(1UL << (nr & SZLONG_MASK))), "m" (*m));
112 } else if (cpu_has_llsc) {
113 __asm__ __volatile__(
115 "1: " __LL "%0, %1 # clear_bit \n"
120 : "=&r" (temp), "=m" (*m)
121 : "ir" (~(1UL << (nr & SZLONG_MASK))), "m" (*m));
123 volatile unsigned long *a = addr;
127 a += nr >> SZLONG_LOG;
128 mask = 1UL << (nr & SZLONG_MASK);
129 local_irq_save(flags);
131 local_irq_restore(flags);
136 * change_bit - Toggle a bit in memory
138 * @addr: Address to start counting from
140 * change_bit() is atomic and may not be reordered.
141 * Note that @nr may be almost arbitrarily large; this function is not
142 * restricted to acting on a single-word quantity.
144 static inline void change_bit(unsigned long nr, volatile unsigned long *addr)
146 if (cpu_has_llsc && R10000_LLSC_WAR) {
147 unsigned long *m = ((unsigned long *) addr) + (nr >> SZLONG_LOG);
150 __asm__ __volatile__(
152 "1: " __LL "%0, %1 # change_bit \n"
157 : "=&r" (temp), "=m" (*m)
158 : "ir" (1UL << (nr & SZLONG_MASK)), "m" (*m));
159 } else if (cpu_has_llsc) {
160 unsigned long *m = ((unsigned long *) addr) + (nr >> SZLONG_LOG);
163 __asm__ __volatile__(
165 "1: " __LL "%0, %1 # change_bit \n"
170 : "=&r" (temp), "=m" (*m)
171 : "ir" (1UL << (nr & SZLONG_MASK)), "m" (*m));
173 volatile unsigned long *a = addr;
177 a += nr >> SZLONG_LOG;
178 mask = 1UL << (nr & SZLONG_MASK);
179 local_irq_save(flags);
181 local_irq_restore(flags);
186 * test_and_set_bit - Set a bit and return its old value
188 * @addr: Address to count from
190 * This operation is atomic and cannot be reordered.
191 * It also implies a memory barrier.
193 static inline int test_and_set_bit(unsigned long nr,
194 volatile unsigned long *addr)
196 if (cpu_has_llsc && R10000_LLSC_WAR) {
197 unsigned long *m = ((unsigned long *) addr) + (nr >> SZLONG_LOG);
198 unsigned long temp, res;
200 __asm__ __volatile__(
202 "1: " __LL "%0, %1 # test_and_set_bit \n"
211 : "=&r" (temp), "=m" (*m), "=&r" (res)
212 : "r" (1UL << (nr & SZLONG_MASK)), "m" (*m)
216 } else if (cpu_has_llsc) {
217 unsigned long *m = ((unsigned long *) addr) + (nr >> SZLONG_LOG);
218 unsigned long temp, res;
220 __asm__ __volatile__(
224 "1: " __LL "%0, %1 # test_and_set_bit \n"
233 : "=&r" (temp), "=m" (*m), "=&r" (res)
234 : "r" (1UL << (nr & SZLONG_MASK)), "m" (*m)
239 volatile unsigned long *a = addr;
244 a += nr >> SZLONG_LOG;
245 mask = 1UL << (nr & SZLONG_MASK);
246 local_irq_save(flags);
247 retval = (mask & *a) != 0;
249 local_irq_restore(flags);
256 * test_and_clear_bit - Clear a bit and return its old value
258 * @addr: Address to count from
260 * This operation is atomic and cannot be reordered.
261 * It also implies a memory barrier.
263 static inline int test_and_clear_bit(unsigned long nr,
264 volatile unsigned long *addr)
266 if (cpu_has_llsc && R10000_LLSC_WAR) {
267 unsigned long *m = ((unsigned long *) addr) + (nr >> SZLONG_LOG);
268 unsigned long temp, res;
270 __asm__ __volatile__(
272 "1: " __LL "%0, %1 # test_and_clear_bit \n"
282 : "=&r" (temp), "=m" (*m), "=&r" (res)
283 : "r" (1UL << (nr & SZLONG_MASK)), "m" (*m)
287 } else if (cpu_has_llsc) {
288 unsigned long *m = ((unsigned long *) addr) + (nr >> SZLONG_LOG);
289 unsigned long temp, res;
291 __asm__ __volatile__(
295 "1: " __LL "%0, %1 # test_and_clear_bit \n"
305 : "=&r" (temp), "=m" (*m), "=&r" (res)
306 : "r" (1UL << (nr & SZLONG_MASK)), "m" (*m)
311 volatile unsigned long *a = addr;
316 a += nr >> SZLONG_LOG;
317 mask = 1UL << (nr & SZLONG_MASK);
318 local_irq_save(flags);
319 retval = (mask & *a) != 0;
321 local_irq_restore(flags);
328 * test_and_change_bit - Change a bit and return its old value
330 * @addr: Address to count from
332 * This operation is atomic and cannot be reordered.
333 * It also implies a memory barrier.
335 static inline int test_and_change_bit(unsigned long nr,
336 volatile unsigned long *addr)
338 if (cpu_has_llsc && R10000_LLSC_WAR) {
339 unsigned long *m = ((unsigned long *) addr) + (nr >> SZLONG_LOG);
340 unsigned long temp, res;
342 __asm__ __volatile__(
344 "1: " __LL "%0, %1 # test_and_change_bit \n"
353 : "=&r" (temp), "=m" (*m), "=&r" (res)
354 : "r" (1UL << (nr & SZLONG_MASK)), "m" (*m)
358 } else if (cpu_has_llsc) {
359 unsigned long *m = ((unsigned long *) addr) + (nr >> SZLONG_LOG);
360 unsigned long temp, res;
362 __asm__ __volatile__(
366 "1: " __LL "%0, %1 # test_and_change_bit \n"
368 " " __SC "\t%2, %1 \n"
375 : "=&r" (temp), "=m" (*m), "=&r" (res)
376 : "r" (1UL << (nr & SZLONG_MASK)), "m" (*m)
381 volatile unsigned long *a = addr;
382 unsigned long mask, retval;
385 a += nr >> SZLONG_LOG;
386 mask = 1UL << (nr & SZLONG_MASK);
387 local_irq_save(flags);
388 retval = (mask & *a) != 0;
390 local_irq_restore(flags);
396 #include <asm-generic/bitops/non-atomic.h>
399 * Return the bit position (0..63) of the most significant 1 bit in a word
400 * Returns -1 if no 1 bit exists
402 static inline int __ilog2(unsigned long x)
406 if (sizeof(x) == 4) {
418 BUG_ON(sizeof(x) != 8);
431 #if defined(CONFIG_CPU_MIPS32) || defined(CONFIG_CPU_MIPS64)
434 * __ffs - find first bit in word.
435 * @word: The word to search
437 * Returns 0..SZLONG-1
438 * Undefined if no bit exists, so code should check against 0 first.
440 static inline unsigned long __ffs(unsigned long word)
442 return __ilog2(word & -word);
446 * fls - find last bit set.
447 * @word: The word to search
449 * This is defined the same way as ffs.
450 * Note fls(0) = 0, fls(1) = 1, fls(0x80000000) = 32.
452 static inline int fls(int word)
454 __asm__ ("clz %0, %1" : "=r" (word) : "r" (word));
459 #if defined(CONFIG_64BIT) && defined(CONFIG_CPU_MIPS64)
460 static inline int fls64(__u64 word)
462 __asm__ ("dclz %0, %1" : "=r" (word) : "r" (word));
467 #include <asm-generic/bitops/fls64.h>
471 * ffs - find first bit set.
472 * @word: The word to search
474 * This is defined the same way as
475 * the libc and compiler builtin ffs routines, therefore
476 * differs in spirit from the above ffz (man ffs).
478 static inline int ffs(int word)
483 return fls(word & -word);
488 #include <asm-generic/bitops/__ffs.h>
489 #include <asm-generic/bitops/ffs.h>
490 #include <asm-generic/bitops/fls.h>
491 #include <asm-generic/bitops/fls64.h>
493 #endif /*defined(CONFIG_CPU_MIPS32) || defined(CONFIG_CPU_MIPS64) */
495 #include <asm-generic/bitops/ffz.h>
496 #include <asm-generic/bitops/find.h>
500 #include <asm-generic/bitops/sched.h>
501 #include <asm-generic/bitops/hweight.h>
502 #include <asm-generic/bitops/ext2-non-atomic.h>
503 #include <asm-generic/bitops/ext2-atomic.h>
504 #include <asm-generic/bitops/minix.h>
506 #endif /* __KERNEL__ */
508 #endif /* _ASM_BITOPS_H */