2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
6 * Copyright (c) 1994 - 1997, 1999, 2000 Ralf Baechle (ralf@gnu.org)
7 * Copyright (c) 1999, 2000 Silicon Graphics, Inc.
12 #include <linux/config.h>
13 #include <linux/compiler.h>
14 #include <linux/types.h>
15 #include <asm/byteorder.h> /* sigh ... */
16 #include <asm/cpu-features.h>
18 #if (_MIPS_SZLONG == 32)
20 #define SZLONG_MASK 31UL
23 #define cpu_to_lelongp(x) cpu_to_le32p((__u32 *) (x))
24 #elif (_MIPS_SZLONG == 64)
26 #define SZLONG_MASK 63UL
29 #define cpu_to_lelongp(x) cpu_to_le64p((__u64 *) (x))
34 #include <asm/interrupt.h>
35 #include <asm/sgidefs.h>
39 * clear_bit() doesn't provide any barrier for the compiler.
41 #define smp_mb__before_clear_bit() smp_mb()
42 #define smp_mb__after_clear_bit() smp_mb()
45 * Only disable interrupt for kernel mode stuff to keep usermode stuff
46 * that dares to use kernel include files alive.
49 #define __bi_flags unsigned long flags
50 #define __bi_local_irq_save(x) local_irq_save(x)
51 #define __bi_local_irq_restore(x) local_irq_restore(x)
54 #define __bi_local_irq_save(x)
55 #define __bi_local_irq_restore(x)
56 #endif /* __KERNEL__ */
59 * set_bit - Atomically set a bit in memory
61 * @addr: the address to start counting from
63 * This function is atomic and may not be reordered. See __set_bit()
64 * if you do not require the atomic guarantees.
65 * Note that @nr may be almost arbitrarily large; this function is not
66 * restricted to acting on a single-word quantity.
68 static inline void set_bit(unsigned long nr, volatile unsigned long *addr)
70 unsigned long *m = ((unsigned long *) addr) + (nr >> SZLONG_LOG);
73 if (cpu_has_llsc && R10000_LLSC_WAR) {
76 "1: " __LL "%0, %1 # set_bit \n"
81 : "=&r" (temp), "=m" (*m)
82 : "ir" (1UL << (nr & SZLONG_MASK)), "m" (*m));
83 } else if (cpu_has_llsc) {
86 "1: " __LL "%0, %1 # set_bit \n"
91 : "=&r" (temp), "=m" (*m)
92 : "ir" (1UL << (nr & SZLONG_MASK)), "m" (*m));
94 volatile unsigned long *a = addr;
98 a += nr >> SZLONG_LOG;
99 mask = 1UL << (nr & SZLONG_MASK);
100 __bi_local_irq_save(flags);
102 __bi_local_irq_restore(flags);
107 * __set_bit - Set a bit in memory
108 * @nr: the bit to set
109 * @addr: the address to start counting from
111 * Unlike set_bit(), this function is non-atomic and may be reordered.
112 * If it's called on the same region of memory simultaneously, the effect
113 * may be that only one operation succeeds.
115 static inline void __set_bit(unsigned long nr, volatile unsigned long * addr)
117 unsigned long * m = ((unsigned long *) addr) + (nr >> SZLONG_LOG);
119 *m |= 1UL << (nr & SZLONG_MASK);
123 * clear_bit - Clears a bit in memory
125 * @addr: Address to start counting from
127 * clear_bit() is atomic and may not be reordered. However, it does
128 * not contain a memory barrier, so if it is used for locking purposes,
129 * you should call smp_mb__before_clear_bit() and/or smp_mb__after_clear_bit()
130 * in order to ensure changes are visible on other processors.
132 static inline void clear_bit(unsigned long nr, volatile unsigned long *addr)
134 unsigned long *m = ((unsigned long *) addr) + (nr >> SZLONG_LOG);
137 if (cpu_has_llsc && R10000_LLSC_WAR) {
138 __asm__ __volatile__(
140 "1: " __LL "%0, %1 # clear_bit \n"
145 : "=&r" (temp), "=m" (*m)
146 : "ir" (~(1UL << (nr & SZLONG_MASK))), "m" (*m));
147 } else if (cpu_has_llsc) {
148 __asm__ __volatile__(
150 "1: " __LL "%0, %1 # clear_bit \n"
155 : "=&r" (temp), "=m" (*m)
156 : "ir" (~(1UL << (nr & SZLONG_MASK))), "m" (*m));
158 volatile unsigned long *a = addr;
162 a += nr >> SZLONG_LOG;
163 mask = 1UL << (nr & SZLONG_MASK);
164 __bi_local_irq_save(flags);
166 __bi_local_irq_restore(flags);
171 * __clear_bit - Clears a bit in memory
173 * @addr: Address to start counting from
175 * Unlike clear_bit(), this function is non-atomic and may be reordered.
176 * If it's called on the same region of memory simultaneously, the effect
177 * may be that only one operation succeeds.
179 static inline void __clear_bit(unsigned long nr, volatile unsigned long * addr)
181 unsigned long * m = ((unsigned long *) addr) + (nr >> SZLONG_LOG);
183 *m &= ~(1UL << (nr & SZLONG_MASK));
187 * change_bit - Toggle a bit in memory
189 * @addr: Address to start counting from
191 * change_bit() is atomic and may not be reordered.
192 * Note that @nr may be almost arbitrarily large; this function is not
193 * restricted to acting on a single-word quantity.
195 static inline void change_bit(unsigned long nr, volatile unsigned long *addr)
197 if (cpu_has_llsc && R10000_LLSC_WAR) {
198 unsigned long *m = ((unsigned long *) addr) + (nr >> SZLONG_LOG);
201 __asm__ __volatile__(
203 "1: " __LL "%0, %1 # change_bit \n"
208 : "=&r" (temp), "=m" (*m)
209 : "ir" (1UL << (nr & SZLONG_MASK)), "m" (*m));
210 } else if (cpu_has_llsc) {
211 unsigned long *m = ((unsigned long *) addr) + (nr >> SZLONG_LOG);
214 __asm__ __volatile__(
216 "1: " __LL "%0, %1 # change_bit \n"
221 : "=&r" (temp), "=m" (*m)
222 : "ir" (1UL << (nr & SZLONG_MASK)), "m" (*m));
224 volatile unsigned long *a = addr;
228 a += nr >> SZLONG_LOG;
229 mask = 1UL << (nr & SZLONG_MASK);
230 __bi_local_irq_save(flags);
232 __bi_local_irq_restore(flags);
237 * __change_bit - Toggle a bit in memory
238 * @nr: the bit to change
239 * @addr: the address to start counting from
241 * Unlike change_bit(), this function is non-atomic and may be reordered.
242 * If it's called on the same region of memory simultaneously, the effect
243 * may be that only one operation succeeds.
245 static inline void __change_bit(unsigned long nr, volatile unsigned long * addr)
247 unsigned long * m = ((unsigned long *) addr) + (nr >> SZLONG_LOG);
249 *m ^= 1UL << (nr & SZLONG_MASK);
253 * test_and_set_bit - Set a bit and return its old value
255 * @addr: Address to count from
257 * This operation is atomic and cannot be reordered.
258 * It also implies a memory barrier.
260 static inline int test_and_set_bit(unsigned long nr,
261 volatile unsigned long *addr)
263 if (cpu_has_llsc && R10000_LLSC_WAR) {
264 unsigned long *m = ((unsigned long *) addr) + (nr >> SZLONG_LOG);
265 unsigned long temp, res;
267 __asm__ __volatile__(
269 "1: " __LL "%0, %1 # test_and_set_bit \n"
278 : "=&r" (temp), "=m" (*m), "=&r" (res)
279 : "r" (1UL << (nr & SZLONG_MASK)), "m" (*m)
283 } else if (cpu_has_llsc) {
284 unsigned long *m = ((unsigned long *) addr) + (nr >> SZLONG_LOG);
285 unsigned long temp, res;
287 __asm__ __volatile__(
291 "1: " __LL "%0, %1 # test_and_set_bit \n"
300 : "=&r" (temp), "=m" (*m), "=&r" (res)
301 : "r" (1UL << (nr & SZLONG_MASK)), "m" (*m)
306 volatile unsigned long *a = addr;
311 a += nr >> SZLONG_LOG;
312 mask = 1UL << (nr & SZLONG_MASK);
313 __bi_local_irq_save(flags);
314 retval = (mask & *a) != 0;
316 __bi_local_irq_restore(flags);
323 * __test_and_set_bit - Set a bit and return its old value
325 * @addr: Address to count from
327 * This operation is non-atomic and can be reordered.
328 * If two examples of this operation race, one can appear to succeed
329 * but actually fail. You must protect multiple accesses with a lock.
331 static inline int __test_and_set_bit(unsigned long nr,
332 volatile unsigned long *addr)
334 volatile unsigned long *a = addr;
338 a += nr >> SZLONG_LOG;
339 mask = 1UL << (nr & SZLONG_MASK);
340 retval = (mask & *a) != 0;
347 * test_and_clear_bit - Clear a bit and return its old value
349 * @addr: Address to count from
351 * This operation is atomic and cannot be reordered.
352 * It also implies a memory barrier.
354 static inline int test_and_clear_bit(unsigned long nr,
355 volatile unsigned long *addr)
357 if (cpu_has_llsc && R10000_LLSC_WAR) {
358 unsigned long *m = ((unsigned long *) addr) + (nr >> SZLONG_LOG);
359 unsigned long temp, res;
361 __asm__ __volatile__(
363 "1: " __LL "%0, %1 # test_and_clear_bit \n"
373 : "=&r" (temp), "=m" (*m), "=&r" (res)
374 : "r" (1UL << (nr & SZLONG_MASK)), "m" (*m)
378 } else if (cpu_has_llsc) {
379 unsigned long *m = ((unsigned long *) addr) + (nr >> SZLONG_LOG);
380 unsigned long temp, res;
382 __asm__ __volatile__(
386 "1: " __LL "%0, %1 # test_and_clear_bit \n"
396 : "=&r" (temp), "=m" (*m), "=&r" (res)
397 : "r" (1UL << (nr & SZLONG_MASK)), "m" (*m)
402 volatile unsigned long *a = addr;
407 a += nr >> SZLONG_LOG;
408 mask = 1UL << (nr & SZLONG_MASK);
409 __bi_local_irq_save(flags);
410 retval = (mask & *a) != 0;
412 __bi_local_irq_restore(flags);
419 * __test_and_clear_bit - Clear a bit and return its old value
421 * @addr: Address to count from
423 * This operation is non-atomic and can be reordered.
424 * If two examples of this operation race, one can appear to succeed
425 * but actually fail. You must protect multiple accesses with a lock.
427 static inline int __test_and_clear_bit(unsigned long nr,
428 volatile unsigned long * addr)
430 volatile unsigned long *a = addr;
434 a += (nr >> SZLONG_LOG);
435 mask = 1UL << (nr & SZLONG_MASK);
436 retval = ((mask & *a) != 0);
443 * test_and_change_bit - Change a bit and return its old value
445 * @addr: Address to count from
447 * This operation is atomic and cannot be reordered.
448 * It also implies a memory barrier.
450 static inline int test_and_change_bit(unsigned long nr,
451 volatile unsigned long *addr)
453 if (cpu_has_llsc && R10000_LLSC_WAR) {
454 unsigned long *m = ((unsigned long *) addr) + (nr >> SZLONG_LOG);
455 unsigned long temp, res;
457 __asm__ __volatile__(
459 "1: " __LL "%0, %1 # test_and_change_bit \n"
468 : "=&r" (temp), "=m" (*m), "=&r" (res)
469 : "r" (1UL << (nr & SZLONG_MASK)), "m" (*m)
473 } else if (cpu_has_llsc) {
474 unsigned long *m = ((unsigned long *) addr) + (nr >> SZLONG_LOG);
475 unsigned long temp, res;
477 __asm__ __volatile__(
481 "1: " __LL "%0, %1 # test_and_change_bit \n"
483 " " __SC "\t%2, %1 \n"
490 : "=&r" (temp), "=m" (*m), "=&r" (res)
491 : "r" (1UL << (nr & SZLONG_MASK)), "m" (*m)
496 volatile unsigned long *a = addr;
497 unsigned long mask, retval;
500 a += nr >> SZLONG_LOG;
501 mask = 1UL << (nr & SZLONG_MASK);
502 __bi_local_irq_save(flags);
503 retval = (mask & *a) != 0;
505 __bi_local_irq_restore(flags);
512 * __test_and_change_bit - Change a bit and return its old value
514 * @addr: Address to count from
516 * This operation is non-atomic and can be reordered.
517 * If two examples of this operation race, one can appear to succeed
518 * but actually fail. You must protect multiple accesses with a lock.
520 static inline int __test_and_change_bit(unsigned long nr,
521 volatile unsigned long *addr)
523 volatile unsigned long *a = addr;
527 a += (nr >> SZLONG_LOG);
528 mask = 1UL << (nr & SZLONG_MASK);
529 retval = ((mask & *a) != 0);
536 #undef __bi_local_irq_save
537 #undef __bi_local_irq_restore
540 * test_bit - Determine whether a bit is set
541 * @nr: bit number to test
542 * @addr: Address to start counting from
544 static inline int test_bit(unsigned long nr, const volatile unsigned long *addr)
546 return 1UL & (addr[nr >> SZLONG_LOG] >> (nr & SZLONG_MASK));
549 #ifdef CONFIG_CPU_MIPS32_R1
551 * Return the bit position (0..31) of the most significant 1 bit in a word
552 * Returns -1 if no 1 bit exists
554 static __inline__ int __ilog2(unsigned long x)
568 #elif defined(CONFIG_CPU_MIPS64_R1)
570 * Return the bit position (0..63) of the most significant 1 bit in a word
571 * Returns -1 if no 1 bit exists
573 static __inline__ int __ilog2(unsigned long x)
590 * __ffs - find first bit in word.
591 * @word: The word to search
593 * Returns 0..SZLONG-1
594 * Undefined if no bit exists, so code should check against 0 first.
596 static inline unsigned long __ffs(unsigned long word)
598 #if defined(CONFIG_CPU_MIPS32_R1) || defined(CONFIG_CPU_MIPS64_R1)
599 return __ilog2(word & -word);
604 s = 16; if (word << 16 != 0) s = 0; b += s; word >>= s;
605 s = 8; if (word << 24 != 0) s = 0; b += s; word >>= s;
606 s = 4; if (word << 28 != 0) s = 0; b += s; word >>= s;
607 s = 2; if (word << 30 != 0) s = 0; b += s; word >>= s;
608 s = 1; if (word << 31 != 0) s = 0; b += s;
611 s = 32; if (word << 32 != 0) s = 0; b += s; word >>= s;
612 s = 16; if (word << 48 != 0) s = 0; b += s; word >>= s;
613 s = 8; if (word << 56 != 0) s = 0; b += s; word >>= s;
614 s = 4; if (word << 60 != 0) s = 0; b += s; word >>= s;
615 s = 2; if (word << 62 != 0) s = 0; b += s; word >>= s;
616 s = 1; if (word << 63 != 0) s = 0; b += s;
623 * ffs - find first bit set.
624 * @word: The word to search
627 * Returns 0 if no bit exists
630 static inline unsigned long ffs(unsigned long word)
635 return __ffs(word) + 1;
639 * ffz - find first zero in word.
640 * @word: The word to search
642 * Undefined if no zero exists, so code should check against ~0UL first.
644 static inline unsigned long ffz(unsigned long word)
646 return __ffs (~word);
650 * flz - find last zero in word.
651 * @word: The word to search
653 * Returns 0..SZLONG-1
654 * Undefined if no zero exists, so code should check against ~0UL first.
656 static inline unsigned long flz(unsigned long word)
658 #if defined(CONFIG_CPU_MIPS32_R1) || defined(CONFIG_CPU_MIPS64_R1)
659 return __ilog2(~word);
661 #if defined(CONFIG_32BIT)
664 s = 16; if ((word & 0xffff0000)) s = 0; r -= s; word <<= s;
665 s = 8; if ((word & 0xff000000)) s = 0; r -= s; word <<= s;
666 s = 4; if ((word & 0xf0000000)) s = 0; r -= s; word <<= s;
667 s = 2; if ((word & 0xc0000000)) s = 0; r -= s; word <<= s;
668 s = 1; if ((word & 0x80000000)) s = 0; r -= s;
670 #if defined(CONFIG_64BIT)
673 s = 32; if ((word & 0xffffffff00000000UL)) s = 0; r -= s; word <<= s;
674 s = 16; if ((word & 0xffff000000000000UL)) s = 0; r -= s; word <<= s;
675 s = 8; if ((word & 0xff00000000000000UL)) s = 0; r -= s; word <<= s;
676 s = 4; if ((word & 0xf000000000000000UL)) s = 0; r -= s; word <<= s;
677 s = 2; if ((word & 0xc000000000000000UL)) s = 0; r -= s; word <<= s;
678 s = 1; if ((word & 0x8000000000000000UL)) s = 0; r -= s;
685 * fls - find last bit set.
686 * @word: The word to search
689 * Returns 0 if no bit exists
691 static inline unsigned long fls(unsigned long word)
696 return flz(~word) + 1;
701 * find_next_zero_bit - find the first zero bit in a memory region
702 * @addr: The address to base the search on
703 * @offset: The bitnumber to start searching at
704 * @size: The maximum size to search
706 static inline unsigned long find_next_zero_bit(const unsigned long *addr,
707 unsigned long size, unsigned long offset)
709 const unsigned long *p = addr + (offset >> SZLONG_LOG);
710 unsigned long result = offset & ~SZLONG_MASK;
716 offset &= SZLONG_MASK;
719 tmp |= ~0UL >> (_MIPS_SZLONG-offset);
720 if (size < _MIPS_SZLONG)
724 size -= _MIPS_SZLONG;
725 result += _MIPS_SZLONG;
727 while (size & ~SZLONG_MASK) {
730 result += _MIPS_SZLONG;
731 size -= _MIPS_SZLONG;
739 if (tmp == ~0UL) /* Are any bits zero? */
740 return result + size; /* Nope. */
742 return result + ffz(tmp);
745 #define find_first_zero_bit(addr, size) \
746 find_next_zero_bit((addr), (size), 0)
749 * find_next_bit - find the next set bit in a memory region
750 * @addr: The address to base the search on
751 * @offset: The bitnumber to start searching at
752 * @size: The maximum size to search
754 static inline unsigned long find_next_bit(const unsigned long *addr,
755 unsigned long size, unsigned long offset)
757 const unsigned long *p = addr + (offset >> SZLONG_LOG);
758 unsigned long result = offset & ~SZLONG_MASK;
764 offset &= SZLONG_MASK;
767 tmp &= ~0UL << offset;
768 if (size < _MIPS_SZLONG)
772 size -= _MIPS_SZLONG;
773 result += _MIPS_SZLONG;
775 while (size & ~SZLONG_MASK) {
778 result += _MIPS_SZLONG;
779 size -= _MIPS_SZLONG;
786 tmp &= ~0UL >> (_MIPS_SZLONG - size);
787 if (tmp == 0UL) /* Are any bits set? */
788 return result + size; /* Nope. */
790 return result + __ffs(tmp);
794 * find_first_bit - find the first set bit in a memory region
795 * @addr: The address to start the search at
796 * @size: The maximum size to search
798 * Returns the bit-number of the first set bit, not the number of the byte
801 #define find_first_bit(addr, size) \
802 find_next_bit((addr), (size), 0)
807 * Every architecture must define this function. It's the fastest
808 * way of searching a 140-bit bitmap where the first 100 bits are
809 * unlikely to be set. It's guaranteed that at least one of the 140
812 static inline int sched_find_first_bit(const unsigned long *b)
818 return __ffs(b[1]) + 32;
820 return __ffs(b[2]) + 64;
822 return __ffs(b[3]) + 96;
823 return __ffs(b[4]) + 128;
829 return __ffs(b[1]) + 64;
830 return __ffs(b[2]) + 128;
835 * hweightN - returns the hamming weight of a N-bit word
836 * @x: the word to weigh
838 * The Hamming Weight of a number is the total number of bits set in it.
841 #define hweight64(x) generic_hweight64(x)
842 #define hweight32(x) generic_hweight32(x)
843 #define hweight16(x) generic_hweight16(x)
844 #define hweight8(x) generic_hweight8(x)
846 static inline int __test_and_set_le_bit(unsigned long nr, unsigned long *addr)
848 unsigned char *ADDR = (unsigned char *) addr;
852 mask = 1 << (nr & 0x07);
853 retval = (mask & *ADDR) != 0;
859 static inline int __test_and_clear_le_bit(unsigned long nr, unsigned long *addr)
861 unsigned char *ADDR = (unsigned char *) addr;
865 mask = 1 << (nr & 0x07);
866 retval = (mask & *ADDR) != 0;
872 static inline int test_le_bit(unsigned long nr, const unsigned long * addr)
874 const unsigned char *ADDR = (const unsigned char *) addr;
878 mask = 1 << (nr & 0x07);
880 return ((mask & *ADDR) != 0);
883 static inline unsigned long find_next_zero_le_bit(unsigned long *addr,
884 unsigned long size, unsigned long offset)
886 unsigned long *p = ((unsigned long *) addr) + (offset >> SZLONG_LOG);
887 unsigned long result = offset & ~SZLONG_MASK;
893 offset &= SZLONG_MASK;
895 tmp = cpu_to_lelongp(p++);
896 tmp |= ~0UL >> (_MIPS_SZLONG-offset); /* bug or feature ? */
897 if (size < _MIPS_SZLONG)
901 size -= _MIPS_SZLONG;
902 result += _MIPS_SZLONG;
904 while (size & ~SZLONG_MASK) {
905 if (~(tmp = cpu_to_lelongp(p++)))
907 result += _MIPS_SZLONG;
908 size -= _MIPS_SZLONG;
912 tmp = cpu_to_lelongp(p);
916 if (tmp == ~0UL) /* Are any bits zero? */
917 return result + size; /* Nope. */
920 return result + ffz(tmp);
923 #define find_first_zero_le_bit(addr, size) \
924 find_next_zero_le_bit((addr), (size), 0)
926 #define ext2_set_bit(nr,addr) \
927 __test_and_set_le_bit((nr),(unsigned long*)addr)
928 #define ext2_clear_bit(nr, addr) \
929 __test_and_clear_le_bit((nr),(unsigned long*)addr)
930 #define ext2_set_bit_atomic(lock, nr, addr) \
934 ret = ext2_set_bit((nr), (addr)); \
939 #define ext2_clear_bit_atomic(lock, nr, addr) \
943 ret = ext2_clear_bit((nr), (addr)); \
947 #define ext2_test_bit(nr, addr) test_le_bit((nr),(unsigned long*)addr)
948 #define ext2_find_first_zero_bit(addr, size) \
949 find_first_zero_le_bit((unsigned long*)addr, size)
950 #define ext2_find_next_zero_bit(addr, size, off) \
951 find_next_zero_le_bit((unsigned long*)addr, size, off)
954 * Bitmap functions for the minix filesystem.
956 * FIXME: These assume that Minix uses the native byte/bitorder.
957 * This limits the Minix filesystem's value for data exchange very much.
959 #define minix_test_and_set_bit(nr,addr) test_and_set_bit(nr,addr)
960 #define minix_set_bit(nr,addr) set_bit(nr,addr)
961 #define minix_test_and_clear_bit(nr,addr) test_and_clear_bit(nr,addr)
962 #define minix_test_bit(nr,addr) test_bit(nr,addr)
963 #define minix_find_first_zero_bit(addr,size) find_first_zero_bit(addr,size)
965 #endif /* __KERNEL__ */
967 #endif /* _ASM_BITOPS_H */