7 #include <linux/i2c-algo-bit.h>
11 /* GGI compatibility macros */
12 #define NUM_SEQ_REGS 0x05
13 #define NUM_CRT_REGS 0x41
14 #define NUM_GRC_REGS 0x09
15 #define NUM_ATC_REGS 0x15
18 #define DDC_SCL_READ_MASK (1 << 2)
19 #define DDC_SCL_WRITE_MASK (1 << 5)
20 #define DDC_SDA_READ_MASK (1 << 3)
21 #define DDC_SDA_WRITE_MASK (1 << 4)
23 /* holds the state of the VGA core and extended Riva hw state from riva_hw.c.
24 * From KGI originally. */
26 u8 attr[NUM_ATC_REGS];
27 u8 crtc[NUM_CRT_REGS];
36 struct riva_i2c_chan {
38 unsigned long ddc_base;
39 struct i2c_adapter adapter;
40 struct i2c_algo_bit_data algo;
44 RIVA_HW_INST riva; /* interface to riva_hw.c */
45 u32 pseudo_palette[16]; /* default palette */
46 u32 palette[16]; /* for Riva128 */
47 u8 __iomem *ctrl_base; /* virtual control register base addr */
48 unsigned dclk_max; /* max DCLK */
50 struct riva_regs initial_state; /* initial startup video mode */
51 struct riva_regs current_state;
53 struct vgastate state;
55 struct mutex open_lock;
56 unsigned int ref_count;
65 struct { int vram; int vram_valid; } mtrr;
67 struct riva_i2c_chan chan[3];
70 void riva_common_setup(struct riva_par *);
71 unsigned long riva_get_memlen(struct riva_par *);
72 unsigned long riva_get_maxdclk(struct riva_par *);
73 void riva_delete_i2c_busses(struct riva_par *par);
74 void riva_create_i2c_busses(struct riva_par *par);
75 int riva_probe_i2c_connector(struct riva_par *par, int conn, u8 **out_edid);
77 #endif /* __RIVAFB_H */