1 /* drivers/video/pvr2fb.c
3 * Frame buffer and fbcon support for the NEC PowerVR2 found within the Sega
6 * Copyright (c) 2001 M. R. Brown <mrbrown@0xd6.org>
7 * Copyright (c) 2001, 2002, 2003, 2004, 2005 Paul Mundt <lethal@linux-sh.org>
9 * This file is part of the LinuxDC project (linuxdc.sourceforge.net).
14 * This driver is mostly based on the excellent amifb and vfb sources. It uses
15 * an odd scheme for converting hardware values to/from framebuffer values,
16 * here are some hacked-up formulas:
18 * The Dreamcast has screen offsets from each side of its four borders and
19 * the start offsets of the display window. I used these values to calculate
20 * 'pseudo' values (think of them as placeholders) for the fb video mode, so
21 * that when it came time to convert these values back into their hardware
22 * values, I could just add mode- specific offsets to get the correct mode
25 * left_margin = diwstart_h - borderstart_h;
26 * right_margin = borderstop_h - (diwstart_h + xres);
27 * upper_margin = diwstart_v - borderstart_v;
28 * lower_margin = borderstop_v - (diwstart_h + yres);
30 * hsync_len = borderstart_h + (hsync_total - borderstop_h);
31 * vsync_len = borderstart_v + (vsync_total - borderstop_v);
33 * Then, when it's time to convert back to hardware settings, the only
34 * constants are the borderstart_* offsets, all other values are derived from
38 * borderstart_h = 116;
41 * borderstop_h = borderstart_h + hsync_total - hsync_len;
43 * diwstart_v = borderstart_v - upper_margin;
45 * However, in the current implementation, the borderstart values haven't had
46 * the benefit of being fully researched, so some modes may be broken.
51 #include <linux/module.h>
52 #include <linux/kernel.h>
53 #include <linux/errno.h>
54 #include <linux/string.h>
56 #include <linux/tty.h>
57 #include <linux/slab.h>
58 #include <linux/delay.h>
59 #include <linux/interrupt.h>
61 #include <linux/init.h>
62 #include <linux/pci.h>
64 #ifdef CONFIG_SH_DREAMCAST
65 #include <asm/machvec.h>
66 #include <asm/mach/sysasic.h>
70 #include <linux/pagemap.h>
71 #include <asm/mach/dma.h>
75 #ifdef CONFIG_SH_STORE_QUEUES
76 #include <asm/uaccess.h>
77 #include <asm/cpu/sq.h>
80 #ifndef PCI_DEVICE_ID_NEC_NEON250
81 # define PCI_DEVICE_ID_NEC_NEON250 0x0067
84 /* 2D video registers */
85 #define DISP_BASE par->mmio_base
86 #define DISP_BRDRCOLR (DISP_BASE + 0x40)
87 #define DISP_DIWMODE (DISP_BASE + 0x44)
88 #define DISP_DIWADDRL (DISP_BASE + 0x50)
89 #define DISP_DIWADDRS (DISP_BASE + 0x54)
90 #define DISP_DIWSIZE (DISP_BASE + 0x5c)
91 #define DISP_SYNCCONF (DISP_BASE + 0xd0)
92 #define DISP_BRDRHORZ (DISP_BASE + 0xd4)
93 #define DISP_SYNCSIZE (DISP_BASE + 0xd8)
94 #define DISP_BRDRVERT (DISP_BASE + 0xdc)
95 #define DISP_DIWCONF (DISP_BASE + 0xe8)
96 #define DISP_DIWHSTRT (DISP_BASE + 0xec)
97 #define DISP_DIWVSTRT (DISP_BASE + 0xf0)
99 /* Pixel clocks, one for TV output, doubled for VGA output */
101 #define VGA_CLK 37119
103 /* This is for 60Hz - the VTOTAL is doubled for interlaced modes */
104 #define PAL_HTOTAL 863
105 #define PAL_VTOTAL 312
106 #define NTSC_HTOTAL 857
107 #define NTSC_VTOTAL 262
109 /* Supported cable types */
110 enum { CT_VGA, CT_NONE, CT_RGB, CT_COMPOSITE };
112 /* Supported video output types */
113 enum { VO_PAL, VO_NTSC, VO_VGA };
115 /* Supported palette types */
116 enum { PAL_ARGB1555, PAL_RGB565, PAL_ARGB4444, PAL_ARGB8888 };
118 struct pvr2_params { unsigned int val; char *name; };
119 static struct pvr2_params cables[] __initdata = {
120 { CT_VGA, "VGA" }, { CT_RGB, "RGB" }, { CT_COMPOSITE, "COMPOSITE" },
123 static struct pvr2_params outputs[] __initdata = {
124 { VO_PAL, "PAL" }, { VO_NTSC, "NTSC" }, { VO_VGA, "VGA" },
128 * This describes the current video mode
131 static struct pvr2fb_par {
132 unsigned int hsync_total; /* Clocks/line */
133 unsigned int vsync_total; /* Lines/field */
134 unsigned int borderstart_h;
135 unsigned int borderstop_h;
136 unsigned int borderstart_v;
137 unsigned int borderstop_v;
138 unsigned int diwstart_h; /* Horizontal offset of the display field */
139 unsigned int diwstart_v; /* Vertical offset of the display field, for
140 interlaced modes, this is the long field */
141 unsigned long disp_start; /* Address of image within VRAM */
142 unsigned char is_interlaced; /* Is the display interlaced? */
143 unsigned char is_doublescan; /* Are scanlines output twice? (doublescan) */
144 unsigned char is_lowres; /* Is horizontal pixel-doubling enabled? */
146 unsigned long mmio_base; /* MMIO base */
149 static struct fb_info *fb_info;
151 static struct fb_fix_screeninfo pvr2_fix __initdata = {
152 .id = "NEC PowerVR2",
153 .type = FB_TYPE_PACKED_PIXELS,
154 .visual = FB_VISUAL_TRUECOLOR,
157 .accel = FB_ACCEL_NONE,
160 static struct fb_var_screeninfo pvr2_var __initdata = {
167 .green = { 5, 6, 0 },
169 .activate = FB_ACTIVATE_NOW,
172 .vmode = FB_VMODE_NONINTERLACED,
175 static int cable_type = CT_VGA;
176 static int video_output = VO_VGA;
178 static int nopan = 0;
179 static int nowrap = 1;
182 * We do all updating, blanking, etc. during the vertical retrace period
184 static unsigned int do_vmode_full = 0; /* Change the video mode */
185 static unsigned int do_vmode_pan = 0; /* Update the video mode */
186 static short do_blank = 0; /* (Un)Blank the screen */
188 static unsigned int is_blanked = 0; /* Is the screen blanked? */
190 #ifdef CONFIG_SH_STORE_QUEUES
191 static struct sq_mapping *pvr2fb_map;
195 static unsigned int shdma = PVR2_CASCADE_CHAN;
196 static unsigned int pvr2dma = ONCHIP_NR_DMA_CHANNELS;
199 /* Interface used by the world */
201 int pvr2fb_setup(char*);
203 static int pvr2fb_setcolreg(unsigned int regno, unsigned int red, unsigned int green, unsigned int blue,
204 unsigned int transp, struct fb_info *info);
205 static int pvr2fb_blank(int blank, struct fb_info *info);
206 static unsigned long get_line_length(int xres_virtual, int bpp);
207 static void set_color_bitfields(struct fb_var_screeninfo *var);
208 static int pvr2fb_check_var(struct fb_var_screeninfo *var, struct fb_info *info);
209 static int pvr2fb_set_par(struct fb_info *info);
210 static void pvr2_update_display(struct fb_info *info);
211 static void pvr2_init_display(struct fb_info *info);
212 static void pvr2_do_blank(void);
213 static irqreturn_t pvr2fb_interrupt(int irq, void *dev_id, struct pt_regs *fp);
214 static int pvr2_init_cable(void);
215 static int pvr2_get_param(const struct pvr2_params *p, const char *s,
217 static ssize_t pvr2fb_write(struct file *file, const char *buf,
218 size_t count, loff_t *ppos);
220 static struct fb_ops pvr2fb_ops = {
221 .owner = THIS_MODULE,
222 .fb_setcolreg = pvr2fb_setcolreg,
223 .fb_blank = pvr2fb_blank,
224 .fb_check_var = pvr2fb_check_var,
225 .fb_set_par = pvr2fb_set_par,
227 .fb_write = pvr2fb_write,
229 .fb_fillrect = cfb_fillrect,
230 .fb_copyarea = cfb_copyarea,
231 .fb_imageblit = cfb_imageblit,
234 static struct fb_videomode pvr2_modedb[] __initdata = {
236 * Broadcast video modes (PAL and NTSC). I'm unfamiliar with
237 * PAL-M and PAL-N, but from what I've read both modes parallel PAL and
238 * NTSC, so it shouldn't be a problem (I hope).
242 /* 640x480 @ 60Hz interlaced (NTSC) */
243 "ntsc_640x480i", 60, 640, 480, TV_CLK, 38, 33, 0, 18, 146, 26,
244 FB_SYNC_BROADCAST, FB_VMODE_INTERLACED | FB_VMODE_YWRAP
246 /* 640x240 @ 60Hz (NTSC) */
247 /* XXX: Broken! Don't use... */
248 "ntsc_640x240", 60, 640, 240, TV_CLK, 38, 33, 0, 0, 146, 22,
249 FB_SYNC_BROADCAST, FB_VMODE_YWRAP
251 /* 640x480 @ 60hz (VGA) */
252 "vga_640x480", 60, 640, 480, VGA_CLK, 38, 33, 0, 18, 146, 26,
257 #define NUM_TOTAL_MODES ARRAY_SIZE(pvr2_modedb)
259 #define DEFMODE_NTSC 0
260 #define DEFMODE_PAL 0
261 #define DEFMODE_VGA 2
263 static int defmode = DEFMODE_NTSC;
264 static char *mode_option __initdata = NULL;
266 static inline void pvr2fb_set_pal_type(unsigned int type)
268 struct pvr2fb_par *par = (struct pvr2fb_par *)fb_info->par;
270 fb_writel(type, par->mmio_base + 0x108);
273 static inline void pvr2fb_set_pal_entry(struct pvr2fb_par *par,
277 fb_writel(val, par->mmio_base + 0x1000 + (4 * regno));
280 static int pvr2fb_blank(int blank, struct fb_info *info)
282 do_blank = blank ? blank : -1;
286 static inline unsigned long get_line_length(int xres_virtual, int bpp)
288 return (unsigned long)((((xres_virtual*bpp)+31)&~31) >> 3);
291 static void set_color_bitfields(struct fb_var_screeninfo *var)
293 switch (var->bits_per_pixel) {
294 case 16: /* RGB 565 */
295 pvr2fb_set_pal_type(PAL_RGB565);
296 var->red.offset = 11; var->red.length = 5;
297 var->green.offset = 5; var->green.length = 6;
298 var->blue.offset = 0; var->blue.length = 5;
299 var->transp.offset = 0; var->transp.length = 0;
301 case 24: /* RGB 888 */
302 var->red.offset = 16; var->red.length = 8;
303 var->green.offset = 8; var->green.length = 8;
304 var->blue.offset = 0; var->blue.length = 8;
305 var->transp.offset = 0; var->transp.length = 0;
307 case 32: /* ARGB 8888 */
308 pvr2fb_set_pal_type(PAL_ARGB8888);
309 var->red.offset = 16; var->red.length = 8;
310 var->green.offset = 8; var->green.length = 8;
311 var->blue.offset = 0; var->blue.length = 8;
312 var->transp.offset = 24; var->transp.length = 8;
317 static int pvr2fb_setcolreg(unsigned int regno, unsigned int red,
318 unsigned int green, unsigned int blue,
319 unsigned int transp, struct fb_info *info)
321 struct pvr2fb_par *par = (struct pvr2fb_par *)info->par;
324 if (regno > info->cmap.len)
328 * We only support the hardware palette for 16 and 32bpp. It's also
329 * expected that the palette format has been set by the time we get
330 * here, so we don't waste time setting it again.
332 switch (info->var.bits_per_pixel) {
333 case 16: /* RGB 565 */
334 tmp = (red & 0xf800) |
335 ((green & 0xfc00) >> 5) |
336 ((blue & 0xf800) >> 11);
338 pvr2fb_set_pal_entry(par, regno, tmp);
339 ((u16*)(info->pseudo_palette))[regno] = tmp;
341 case 24: /* RGB 888 */
342 red >>= 8; green >>= 8; blue >>= 8;
343 ((u32*)(info->pseudo_palette))[regno] = (red << 16) | (green << 8) | blue;
345 case 32: /* ARGB 8888 */
346 red >>= 8; green >>= 8; blue >>= 8;
347 tmp = (transp << 24) | (red << 16) | (green << 8) | blue;
349 pvr2fb_set_pal_entry(par, regno, tmp);
350 ((u32*)(info->pseudo_palette))[regno] = tmp;
353 pr_debug("Invalid bit depth %d?!?\n", info->var.bits_per_pixel);
360 static int pvr2fb_set_par(struct fb_info *info)
362 struct pvr2fb_par *par = (struct pvr2fb_par *)info->par;
363 struct fb_var_screeninfo *var = &info->var;
364 unsigned long line_length;
368 * XXX: It's possible that a user could use a VGA box, change the cable
369 * type in hardware (i.e. switch from VGA<->composite), then change
370 * modes (i.e. switching to another VT). If that happens we should
371 * automagically change the output format to cope, but currently I
372 * don't have a VGA box to make sure this works properly.
374 cable_type = pvr2_init_cable();
375 if (cable_type == CT_VGA && video_output != VO_VGA)
376 video_output = VO_VGA;
378 var->vmode &= FB_VMODE_MASK;
379 if (var->vmode & FB_VMODE_INTERLACED && video_output != VO_VGA)
380 par->is_interlaced = 1;
382 * XXX: Need to be more creative with this (i.e. allow doublecan for
385 if (var->vmode & FB_VMODE_DOUBLE && video_output == VO_VGA)
386 par->is_doublescan = 1;
388 par->hsync_total = var->left_margin + var->xres + var->right_margin +
390 par->vsync_total = var->upper_margin + var->yres + var->lower_margin +
393 if (var->sync & FB_SYNC_BROADCAST) {
394 vtotal = par->vsync_total;
395 if (par->is_interlaced)
397 if (vtotal > (PAL_VTOTAL + NTSC_VTOTAL)/2) {
398 /* XXX: Check for start values here... */
399 /* XXX: Check hardware for PAL-compatibility */
400 par->borderstart_h = 116;
401 par->borderstart_v = 44;
403 /* NTSC video output */
404 par->borderstart_h = 126;
405 par->borderstart_v = 18;
409 /* XXX: What else needs to be checked? */
411 * XXX: We have a little freedom in VGA modes, what ranges
412 * should be here (i.e. hsync/vsync totals, etc.)?
414 par->borderstart_h = 126;
415 par->borderstart_v = 40;
418 /* Calculate the remainding offsets */
419 par->diwstart_h = par->borderstart_h + var->left_margin;
420 par->diwstart_v = par->borderstart_v + var->upper_margin;
421 par->borderstop_h = par->diwstart_h + var->xres +
423 par->borderstop_v = par->diwstart_v + var->yres +
426 if (!par->is_interlaced)
427 par->borderstop_v /= 2;
428 if (info->var.xres < 640)
431 line_length = get_line_length(var->xres_virtual, var->bits_per_pixel);
432 par->disp_start = info->fix.smem_start + (line_length * var->yoffset) * line_length;
433 info->fix.line_length = line_length;
437 static int pvr2fb_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
439 struct pvr2fb_par *par = (struct pvr2fb_par *)info->par;
440 unsigned int vtotal, hsync_total;
441 unsigned long line_length;
443 if (var->pixclock != TV_CLK && var->pixclock != VGA_CLK) {
444 pr_debug("Invalid pixclock value %d\n", var->pixclock);
452 if (var->xres_virtual < var->xres)
453 var->xres_virtual = var->xres;
454 if (var->yres_virtual < var->yres)
455 var->yres_virtual = var->yres;
457 if (var->bits_per_pixel <= 16)
458 var->bits_per_pixel = 16;
459 else if (var->bits_per_pixel <= 24)
460 var->bits_per_pixel = 24;
461 else if (var->bits_per_pixel <= 32)
462 var->bits_per_pixel = 32;
464 set_color_bitfields(var);
466 if (var->vmode & FB_VMODE_YWRAP) {
467 if (var->xoffset || var->yoffset < 0 ||
468 var->yoffset >= var->yres_virtual) {
469 var->xoffset = var->yoffset = 0;
471 if (var->xoffset > var->xres_virtual - var->xres ||
472 var->yoffset > var->yres_virtual - var->yres ||
473 var->xoffset < 0 || var->yoffset < 0)
474 var->xoffset = var->yoffset = 0;
477 var->xoffset = var->yoffset = 0;
481 * XXX: Need to be more creative with this (i.e. allow doublecan for
484 if (var->yres < 480 && video_output == VO_VGA)
485 var->vmode |= FB_VMODE_DOUBLE;
487 if (video_output != VO_VGA) {
488 var->sync |= FB_SYNC_BROADCAST;
489 var->vmode |= FB_VMODE_INTERLACED;
491 var->sync &= ~FB_SYNC_BROADCAST;
492 var->vmode &= ~FB_VMODE_INTERLACED;
493 var->vmode |= pvr2_var.vmode;
496 if ((var->activate & FB_ACTIVATE_MASK) != FB_ACTIVATE_TEST) {
497 var->right_margin = par->borderstop_h -
498 (par->diwstart_h + var->xres);
499 var->left_margin = par->diwstart_h - par->borderstart_h;
500 var->hsync_len = par->borderstart_h +
501 (par->hsync_total - par->borderstop_h);
503 var->upper_margin = par->diwstart_v - par->borderstart_v;
504 var->lower_margin = par->borderstop_v -
505 (par->diwstart_v + var->yres);
506 var->vsync_len = par->borderstop_v +
507 (par->vsync_total - par->borderstop_v);
510 hsync_total = var->left_margin + var->xres + var->right_margin +
512 vtotal = var->upper_margin + var->yres + var->lower_margin +
515 if (var->sync & FB_SYNC_BROADCAST) {
516 if (var->vmode & FB_VMODE_INTERLACED)
518 if (vtotal > (PAL_VTOTAL + NTSC_VTOTAL)/2) {
519 /* PAL video output */
520 /* XXX: Should be using a range here ... ? */
521 if (hsync_total != PAL_HTOTAL) {
522 pr_debug("invalid hsync total for PAL\n");
526 /* NTSC video output */
527 if (hsync_total != NTSC_HTOTAL) {
528 pr_debug("invalid hsync total for NTSC\n");
534 /* Check memory sizes */
535 line_length = get_line_length(var->xres_virtual, var->bits_per_pixel);
536 if (line_length * var->yres_virtual > info->fix.smem_len)
542 static void pvr2_update_display(struct fb_info *info)
544 struct pvr2fb_par *par = (struct pvr2fb_par *) info->par;
545 struct fb_var_screeninfo *var = &info->var;
547 /* Update the start address of the display image */
548 fb_writel(par->disp_start, DISP_DIWADDRL);
549 fb_writel(par->disp_start +
550 get_line_length(var->xoffset+var->xres, var->bits_per_pixel),
555 * Initialize the video mode. Currently, the 16bpp and 24bpp modes aren't
556 * very stable. It's probably due to the fact that a lot of the 2D video
557 * registers are still undocumented.
560 static void pvr2_init_display(struct fb_info *info)
562 struct pvr2fb_par *par = (struct pvr2fb_par *) info->par;
563 struct fb_var_screeninfo *var = &info->var;
564 unsigned int diw_height, diw_width, diw_modulo = 1;
565 unsigned int bytesperpixel = var->bits_per_pixel >> 3;
567 /* hsync and vsync totals */
568 fb_writel((par->vsync_total << 16) | par->hsync_total, DISP_SYNCSIZE);
570 /* column height, modulo, row width */
571 /* since we're "panning" within vram, we need to offset things based
572 * on the offset from the virtual x start to our real gfx. */
573 if (video_output != VO_VGA && par->is_interlaced)
574 diw_modulo += info->fix.line_length / 4;
575 diw_height = (par->is_interlaced ? var->yres / 2 : var->yres);
576 diw_width = get_line_length(var->xres, var->bits_per_pixel) / 4;
577 fb_writel((diw_modulo << 20) | (--diw_height << 10) | --diw_width,
580 /* display address, long and short fields */
581 fb_writel(par->disp_start, DISP_DIWADDRL);
582 fb_writel(par->disp_start +
583 get_line_length(var->xoffset+var->xres, var->bits_per_pixel),
586 /* border horizontal, border vertical, border color */
587 fb_writel((par->borderstart_h << 16) | par->borderstop_h, DISP_BRDRHORZ);
588 fb_writel((par->borderstart_v << 16) | par->borderstop_v, DISP_BRDRVERT);
589 fb_writel(0, DISP_BRDRCOLR);
591 /* display window start position */
592 fb_writel(par->diwstart_h, DISP_DIWHSTRT);
593 fb_writel((par->diwstart_v << 16) | par->diwstart_v, DISP_DIWVSTRT);
596 fb_writel((0x16 << 16) | par->is_lowres, DISP_DIWCONF);
598 /* clock doubler (for VGA), scan doubler, display enable */
599 fb_writel(((video_output == VO_VGA) << 23) |
600 (par->is_doublescan << 1) | 1, DISP_DIWMODE);
603 fb_writel(fb_readl(DISP_DIWMODE) | (--bytesperpixel << 2), DISP_DIWMODE);
605 /* video enable, color sync, interlace,
606 * hsync and vsync polarity (currently unused) */
607 fb_writel(0x100 | ((par->is_interlaced /*|4*/) << 4), DISP_SYNCCONF);
610 /* Simulate blanking by making the border cover the entire screen */
612 #define BLANK_BIT (1<<3)
614 static void pvr2_do_blank(void)
616 struct pvr2fb_par *par = currentpar;
617 unsigned long diwconf;
619 diwconf = fb_readl(DISP_DIWCONF);
621 fb_writel(diwconf | BLANK_BIT, DISP_DIWCONF);
623 fb_writel(diwconf & ~BLANK_BIT, DISP_DIWCONF);
625 is_blanked = do_blank > 0 ? do_blank : 0;
628 static irqreturn_t pvr2fb_interrupt(int irq, void *dev_id, struct pt_regs *fp)
630 struct fb_info *info = dev_id;
632 if (do_vmode_pan || do_vmode_full)
633 pvr2_update_display(info);
635 pvr2_init_display(info);
648 * Determine the cable type and initialize the cable output format. Don't do
649 * anything if the cable type has been overidden (via "cable:XX").
652 #define PCTRA 0xff80002c
653 #define PDTRA 0xff800030
654 #define VOUTC 0xa0702c00
656 static int pvr2_init_cable(void)
658 if (cable_type < 0) {
659 fb_writel((fb_readl(PCTRA) & 0xfff0ffff) | 0x000a0000,
661 cable_type = (fb_readw(PDTRA) >> 8) & 3;
664 /* Now select the output format (either composite or other) */
665 /* XXX: Save the previous val first, as this reg is also AICA
667 if (cable_type == CT_COMPOSITE)
668 fb_writel(3 << 8, VOUTC);
676 static ssize_t pvr2fb_write(struct file *file, const char *buf,
677 size_t count, loff_t *ppos)
679 unsigned long dst, start, end, len;
680 unsigned int nr_pages;
684 nr_pages = (count + PAGE_SIZE - 1) >> PAGE_SHIFT;
686 pages = kmalloc(nr_pages * sizeof(struct page *), GFP_KERNEL);
690 down_read(¤t->mm->mmap_sem);
691 ret = get_user_pages(current, current->mm, (unsigned long)buf,
692 nr_pages, WRITE, 0, pages, NULL);
693 up_read(¤t->mm->mmap_sem);
695 if (ret < nr_pages) {
701 dma_configure_channel(shdma, 0x12c1);
703 dst = (unsigned long)fb_info->screen_base + *ppos;
704 start = (unsigned long)page_address(pages[0]);
705 end = (unsigned long)page_address(pages[nr_pages]);
706 len = nr_pages << PAGE_SHIFT;
708 /* Half-assed contig check */
709 if (start + len == end) {
710 /* As we do this in one shot, it's either all or nothing.. */
711 if ((*ppos + len) > fb_info->fix.smem_len) {
716 dma_write(shdma, start, 0, len);
717 dma_write(pvr2dma, 0, dst, len);
718 dma_wait_for_completion(pvr2dma);
723 /* Not contiguous, writeout per-page instead.. */
724 for (i = 0; i < nr_pages; i++, dst += PAGE_SIZE) {
725 if ((*ppos + (i << PAGE_SHIFT)) > fb_info->fix.smem_len) {
730 dma_write_page(shdma, (unsigned long)page_address(pages[i]), 0);
731 dma_write_page(pvr2dma, 0, dst);
732 dma_wait_for_completion(pvr2dma);
740 for (i = 0; i < nr_pages; i++)
741 page_cache_release(pages[i]);
747 #endif /* CONFIG_SH_DMA */
752 * Common init code for the PVR2 chips.
754 * This mostly takes care of the common aspects of the fb setup and
755 * registration. It's expected that the board-specific init code has
756 * already setup pvr2_fix with something meaningful at this point.
758 * Device info reporting is also done here, as well as picking a sane
759 * default from the modedb. For board-specific modelines, simply define
760 * a per-board modedb.
762 * Also worth noting is that the cable and video output types are likely
763 * always going to be VGA for the PCI-based PVR2 boards, but we leave this
764 * in for flexibility anyways. Who knows, maybe someone has tv-out on a
765 * PCI-based version of these things ;-)
767 static int __init pvr2fb_common_init(void)
769 struct pvr2fb_par *par = currentpar;
770 unsigned long modememused, rev;
772 fb_info->screen_base = ioremap_nocache(pvr2_fix.smem_start,
775 if (!fb_info->screen_base) {
776 printk(KERN_ERR "pvr2fb: Failed to remap smem space\n");
780 par->mmio_base = (unsigned long)ioremap_nocache(pvr2_fix.mmio_start,
782 if (!par->mmio_base) {
783 printk(KERN_ERR "pvr2fb: Failed to remap mmio space\n");
787 fb_memset((unsigned long)fb_info->screen_base, 0, pvr2_fix.smem_len);
789 pvr2_fix.ypanstep = nopan ? 0 : 1;
790 pvr2_fix.ywrapstep = nowrap ? 0 : 1;
792 fb_info->fbops = &pvr2fb_ops;
793 fb_info->fix = pvr2_fix;
794 fb_info->par = currentpar;
795 fb_info->pseudo_palette = (void *)(fb_info->par + 1);
796 fb_info->flags = FBINFO_DEFAULT | FBINFO_HWACCEL_YPAN;
798 if (video_output == VO_VGA)
799 defmode = DEFMODE_VGA;
802 mode_option = "640x480@60";
804 if (!fb_find_mode(&fb_info->var, fb_info, mode_option, pvr2_modedb,
805 NUM_TOTAL_MODES, &pvr2_modedb[defmode], 16))
806 fb_info->var = pvr2_var;
808 fb_alloc_cmap(&fb_info->cmap, 256, 0);
810 if (register_framebuffer(fb_info) < 0)
813 modememused = get_line_length(fb_info->var.xres_virtual,
814 fb_info->var.bits_per_pixel);
815 modememused *= fb_info->var.yres_virtual;
817 rev = fb_readl(par->mmio_base + 0x04);
819 printk("fb%d: %s (rev %ld.%ld) frame buffer device, using %ldk/%ldk of video memory\n",
820 fb_info->node, fb_info->fix.id, (rev >> 4) & 0x0f, rev & 0x0f,
821 modememused >> 10, (unsigned long)(fb_info->fix.smem_len >> 10));
822 printk("fb%d: Mode %dx%d-%d pitch = %ld cable: %s video output: %s\n",
823 fb_info->node, fb_info->var.xres, fb_info->var.yres,
824 fb_info->var.bits_per_pixel,
825 get_line_length(fb_info->var.xres, fb_info->var.bits_per_pixel),
826 (char *)pvr2_get_param(cables, NULL, cable_type, 3),
827 (char *)pvr2_get_param(outputs, NULL, video_output, 3));
829 #ifdef CONFIG_SH_STORE_QUEUES
830 printk(KERN_NOTICE "fb%d: registering with SQ API\n", fb_info->node);
832 pvr2fb_map = sq_remap(fb_info->fix.smem_start, fb_info->fix.smem_len,
835 printk(KERN_NOTICE "fb%d: Mapped video memory to SQ addr 0x%lx\n",
836 fb_info->node, pvr2fb_map->sq_addr);
842 if (fb_info->screen_base)
843 iounmap(fb_info->screen_base);
845 iounmap((void *)par->mmio_base);
850 #ifdef CONFIG_SH_DREAMCAST
851 static int __init pvr2fb_dc_init(void)
853 if (!mach_is_dreamcast())
856 /* Make a guess at the monitor based on the attached cable */
857 if (pvr2_init_cable() == CT_VGA) {
858 fb_info->monspecs.hfmin = 30000;
859 fb_info->monspecs.hfmax = 70000;
860 fb_info->monspecs.vfmin = 60;
861 fb_info->monspecs.vfmax = 60;
863 /* Not VGA, using a TV (taken from acornfb) */
864 fb_info->monspecs.hfmin = 15469;
865 fb_info->monspecs.hfmax = 15781;
866 fb_info->monspecs.vfmin = 49;
867 fb_info->monspecs.vfmax = 51;
871 * XXX: This needs to pull default video output via BIOS or other means
873 if (video_output < 0) {
874 if (cable_type == CT_VGA) {
875 video_output = VO_VGA;
877 video_output = VO_NTSC;
882 * Nothing exciting about the DC PVR2 .. only a measly 8MiB.
884 pvr2_fix.smem_start = 0xa5000000; /* RAM starts here */
885 pvr2_fix.smem_len = 8 << 20;
887 pvr2_fix.mmio_start = 0xa05f8000; /* registers start here */
888 pvr2_fix.mmio_len = 0x2000;
890 if (request_irq(HW_EVENT_VSYNC, pvr2fb_interrupt, 0,
891 "pvr2 VBL handler", fb_info)) {
896 if (request_dma(pvr2dma, "pvr2") != 0) {
897 free_irq(HW_EVENT_VSYNC, 0);
902 return pvr2fb_common_init();
905 static void pvr2fb_dc_exit(void)
907 free_irq(HW_EVENT_VSYNC, 0);
912 #endif /* CONFIG_SH_DREAMCAST */
915 static int __devinit pvr2fb_pci_probe(struct pci_dev *pdev,
916 const struct pci_device_id *ent)
920 ret = pci_enable_device(pdev);
922 printk(KERN_ERR "pvr2fb: PCI enable failed\n");
926 ret = pci_request_regions(pdev, "pvr2fb");
928 printk(KERN_ERR "pvr2fb: PCI request regions failed\n");
933 * Slightly more exciting than the DC PVR2 .. 16MiB!
935 pvr2_fix.smem_start = pci_resource_start(pdev, 0);
936 pvr2_fix.smem_len = pci_resource_len(pdev, 0);
938 pvr2_fix.mmio_start = pci_resource_start(pdev, 1);
939 pvr2_fix.mmio_len = pci_resource_len(pdev, 1);
941 fb_info->device = &pdev->dev;
943 return pvr2fb_common_init();
946 static void __devexit pvr2fb_pci_remove(struct pci_dev *pdev)
948 pci_release_regions(pdev);
951 static struct pci_device_id pvr2fb_pci_tbl[] __devinitdata = {
952 { PCI_VENDOR_ID_NEC, PCI_DEVICE_ID_NEC_NEON250,
953 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
957 MODULE_DEVICE_TABLE(pci, pvr2fb_pci_tbl);
959 static struct pci_driver pvr2fb_pci_driver = {
961 .id_table = pvr2fb_pci_tbl,
962 .probe = pvr2fb_pci_probe,
963 .remove = __devexit_p(pvr2fb_pci_remove),
966 static int __init pvr2fb_pci_init(void)
968 return pci_register_driver(&pvr2fb_pci_driver);
971 static void pvr2fb_pci_exit(void)
973 pci_unregister_driver(&pvr2fb_pci_driver);
975 #endif /* CONFIG_PCI */
977 static int __init pvr2_get_param(const struct pvr2_params *p, const char *s,
982 for (i = 0 ; i < size ; i++ ) {
984 if (!strnicmp(p[i].name, s, strlen(s)))
988 return (int)p[i].name;
995 * Parse command arguments. Supported arguments are:
996 * inverse Use inverse color maps
997 * cable:composite|rgb|vga Override the video cable type
998 * output:NTSC|PAL|VGA Override the video output format
1000 * <xres>x<yres>[-<bpp>][@<refresh>] or,
1001 * <name>[-<bpp>][@<refresh>] Startup using this video mode
1005 int __init pvr2fb_setup(char *options)
1009 char output_arg[80];
1011 if (!options || !*options)
1014 while ((this_opt = strsep(&options, ","))) {
1017 if (!strcmp(this_opt, "inverse")) {
1019 } else if (!strncmp(this_opt, "cable:", 6)) {
1020 strcpy(cable_arg, this_opt + 6);
1021 } else if (!strncmp(this_opt, "output:", 7)) {
1022 strcpy(output_arg, this_opt + 7);
1023 } else if (!strncmp(this_opt, "nopan", 5)) {
1025 } else if (!strncmp(this_opt, "nowrap", 6)) {
1028 mode_option = this_opt;
1033 cable_type = pvr2_get_param(cables, cable_arg, 0, 3);
1035 video_output = pvr2_get_param(outputs, output_arg, 0, 3);
1041 static struct pvr2_board {
1046 #ifdef CONFIG_SH_DREAMCAST
1047 { pvr2fb_dc_init, pvr2fb_dc_exit, "Sega DC PVR2" },
1050 { pvr2fb_pci_init, pvr2fb_pci_exit, "PCI PVR2" },
1055 int __init pvr2fb_init(void)
1057 int i, ret = -ENODEV;
1061 char *option = NULL;
1063 if (fb_get_options("pvr2fb", &option))
1065 pvr2fb_setup(option);
1067 size = sizeof(struct fb_info) + sizeof(struct pvr2fb_par) + 16 * sizeof(u32);
1069 fb_info = kmalloc(size, GFP_KERNEL);
1071 printk(KERN_ERR "Failed to allocate memory for fb_info\n");
1075 memset(fb_info, 0, size);
1077 currentpar = (struct pvr2fb_par *)(fb_info + 1);
1079 for (i = 0; i < ARRAY_SIZE(board_list); i++) {
1080 struct pvr2_board *pvr_board = board_list + i;
1082 if (!pvr_board->init)
1085 ret = pvr_board->init();
1088 printk(KERN_ERR "pvr2fb: Failed init of %s device\n",
1098 static void __exit pvr2fb_exit(void)
1102 for (i = 0; i < ARRAY_SIZE(board_list); i++) {
1103 struct pvr2_board *pvr_board = board_list + i;
1105 if (pvr_board->exit)
1109 #ifdef CONFIG_SH_STORE_QUEUES
1110 sq_unmap(pvr2fb_map);
1113 unregister_framebuffer(fb_info);
1117 module_init(pvr2fb_init);
1118 module_exit(pvr2fb_exit);
1120 MODULE_AUTHOR("Paul Mundt <lethal@linux-sh.org>, M. R. Brown <mrbrown@0xd6.org>");
1121 MODULE_DESCRIPTION("Framebuffer driver for NEC PowerVR 2 based graphics boards");
1122 MODULE_LICENSE("GPL");