3 * Hardware accelerated Matrox Millennium I, II, Mystique, G100, G200 and G400
5 * (c) 1998-2002 Petr Vandrovec <vandrove@vc.cvut.cz>
7 * Portions Copyright (c) 2001 Matrox Graphics Inc.
9 * Version: 1.65 2002/08/14
11 * MTRR stuff: 1998 Tom Rini <trini@kernel.crashing.org>
13 * Contributors: "menion?" <menion@mindless.com>
14 * Betatesting, fixes, ideas
16 * "Kurt Garloff" <garloff@suse.de>
17 * Betatesting, fixes, ideas, videomodes, videomodes timmings
19 * "Tom Rini" <trini@kernel.crashing.org>
20 * MTRR stuff, PPC cleanups, betatesting, fixes, ideas
22 * "Bibek Sahu" <scorpio@dodds.net>
23 * Access device through readb|w|l and write b|w|l
24 * Extensive debugging stuff
26 * "Daniel Haun" <haund@usa.net>
27 * Testing, hardware cursor fixes
29 * "Scott Wood" <sawst46+@pitt.edu>
32 * "Gerd Knorr" <kraxel@goldbach.isdn.cs.tu-berlin.de>
35 * "Kelly French" <targon@hazmat.com>
36 * "Fernando Herrera" <fherrera@eurielec.etsit.upm.es>
37 * Betatesting, bug reporting
39 * "Pablo Bianucci" <pbian@pccp.com.ar>
40 * Fixes, ideas, betatesting
42 * "Inaky Perez Gonzalez" <inaky@peloncho.fis.ucm.es>
43 * Fixes, enhandcements, ideas, betatesting
45 * "Ryuichi Oikawa" <roikawa@rr.iiij4u.or.jp>
46 * PPC betatesting, PPC support, backward compatibility
48 * "Paul Womar" <Paul@pwomar.demon.co.uk>
49 * "Owen Waller" <O.Waller@ee.qub.ac.uk>
52 * "Thomas Pornin" <pornin@bolet.ens.fr>
55 * "Pieter van Leuven" <pvl@iae.nl>
56 * "Ulf Jaenicke-Roessler" <ujr@physik.phy.tu-dresden.de>
59 * "H. Peter Arvin" <hpa@transmeta.com>
62 * "Cort Dougan" <cort@cs.nmt.edu>
63 * CHRP fixes and PReP cleanup
65 * "Mark Vojkovich" <mvojkovi@ucsd.edu>
68 * "Samuel Hocevar" <sam@via.ecp.fr>
71 * "Anton Altaparmakov" <AntonA@bigfoot.com>
72 * G400 MAX/non-MAX distinction
74 * "Ken Aaker" <kdaaker@rchland.vnet.ibm.com>
75 * memtype extension (needed for GXT130P RS/6000 adapter)
77 * "Uns Lider" <unslider@miranda.org>
80 * "Denis Zaitsev" <zzz@cd-club.ru>
83 * "Mike Pieper" <mike@pieper-family.de>
84 * TVOut enhandcements, V4L2 control interface.
86 * "Diego Biurrun" <diego@biurrun.de>
89 * (following author is not in any relation with this code, but his code
90 * is included in this driver)
92 * Based on framebuffer driver for VBE 2.0 compliant graphic boards
93 * (c) 1998 Gerd Knorr <kraxel@cs.tu-berlin.de>
95 * (following author is not in any relation with this code, but his ideas
96 * were used when writting this driver)
98 * FreeVBE/AF (Matrox), "Shawn Hargreaves" <shawn@talula.demon.co.uk>
102 /* make checkconfig does not check included files... */
103 #include <linux/config.h>
104 #include <linux/version.h>
106 #include "matroxfb_base.h"
107 #include "matroxfb_misc.h"
108 #include "matroxfb_accel.h"
109 #include "matroxfb_DAC1064.h"
110 #include "matroxfb_Ti3026.h"
111 #include "matroxfb_maven.h"
112 #include "matroxfb_crtc2.h"
113 #include "matroxfb_g450.h"
114 #include <linux/matroxfb.h>
115 #include <linux/interrupt.h>
116 #include <asm/uaccess.h>
118 #ifdef CONFIG_PPC_PMAC
119 unsigned char nvram_read_byte(int);
120 static int default_vmode = VMODE_NVRAM;
121 static int default_cmode = CMODE_NVRAM;
124 static void matroxfb_unregister_device(struct matrox_fb_info* minfo);
126 /* --------------------------------------------------------------------- */
132 /* --------------------------------------------------------------------- */
134 static struct fb_var_screeninfo vesafb_defined = {
135 640,480,640,480,/* W,H, W, H (virtual) load xres,xres_virtual*/
136 0,0, /* virtual -> visible no offset */
137 8, /* depth -> load bits_per_pixel */
142 {0,0,0}, /* transparency */
143 0, /* standard pixel format */
146 FB_ACCELF_TEXT, /* accel flags */
147 39721L,48L,16L,33L,10L,
148 96L,2L,~0, /* No sync info */
149 FB_VMODE_NONINTERLACED,
155 /* --------------------------------------------------------------------- */
156 static void update_crtc2(WPMINFO unsigned int pos) {
157 struct matroxfb_dh_fb_info* info = ACCESS_FBINFO(crtc2.info);
159 /* Make sure that displays are compatible */
160 if (info && (info->fbcon.var.bits_per_pixel == ACCESS_FBINFO(fbcon).var.bits_per_pixel)
161 && (info->fbcon.var.xres_virtual == ACCESS_FBINFO(fbcon).var.xres_virtual)
162 && (info->fbcon.var.green.length == ACCESS_FBINFO(fbcon).var.green.length)
164 switch (ACCESS_FBINFO(fbcon).var.bits_per_pixel) {
168 if (info->interlaced) {
169 mga_outl(0x3C2C, pos);
170 mga_outl(0x3C28, pos + ACCESS_FBINFO(fbcon).var.xres_virtual * ACCESS_FBINFO(fbcon).var.bits_per_pixel / 8);
172 mga_outl(0x3C28, pos);
179 static void matroxfb_crtc1_panpos(WPMINFO2) {
180 if (ACCESS_FBINFO(crtc1.panpos) >= 0) {
184 matroxfb_DAC_lock_irqsave(flags);
185 panpos = ACCESS_FBINFO(crtc1.panpos);
187 unsigned int extvga_reg;
189 ACCESS_FBINFO(crtc1.panpos) = -1; /* No update pending anymore */
190 extvga_reg = mga_inb(M_EXTVGA_INDEX);
191 mga_setr(M_EXTVGA_INDEX, 0x00, panpos);
192 if (extvga_reg != 0x00) {
193 mga_outb(M_EXTVGA_INDEX, extvga_reg);
196 matroxfb_DAC_unlock_irqrestore(flags);
200 static irqreturn_t matrox_irq(int irq, void *dev_id, struct pt_regs *fp)
207 status = mga_inl(M_STATUS);
210 mga_outl(M_ICLEAR, 0x20);
211 ACCESS_FBINFO(crtc1.vsync.cnt)++;
212 matroxfb_crtc1_panpos(PMINFO2);
213 wake_up_interruptible(&ACCESS_FBINFO(crtc1.vsync.wait));
216 if (status & 0x200) {
217 mga_outl(M_ICLEAR, 0x200);
218 ACCESS_FBINFO(crtc2.vsync.cnt)++;
219 wake_up_interruptible(&ACCESS_FBINFO(crtc2.vsync.wait));
222 return IRQ_RETVAL(handled);
225 int matroxfb_enable_irq(WPMINFO int reenable) {
228 if (ACCESS_FBINFO(devflags.accelerator) == FB_ACCEL_MATROX_MGAG400)
233 if (!test_and_set_bit(0, &ACCESS_FBINFO(irq_flags))) {
234 if (request_irq(ACCESS_FBINFO(pcidev)->irq, matrox_irq,
235 SA_SHIRQ, "matroxfb", MINFO)) {
236 clear_bit(0, &ACCESS_FBINFO(irq_flags));
239 /* Clear any pending field interrupts */
240 mga_outl(M_ICLEAR, bm);
241 mga_outl(M_IEN, mga_inl(M_IEN) | bm);
242 } else if (reenable) {
245 ien = mga_inl(M_IEN);
246 if ((ien & bm) != bm) {
247 printk(KERN_DEBUG "matroxfb: someone disabled IRQ [%08X]\n", ien);
248 mga_outl(M_IEN, ien | bm);
254 static void matroxfb_disable_irq(WPMINFO2) {
255 if (test_and_clear_bit(0, &ACCESS_FBINFO(irq_flags))) {
256 /* Flush pending pan-at-vbl request... */
257 matroxfb_crtc1_panpos(PMINFO2);
258 if (ACCESS_FBINFO(devflags.accelerator) == FB_ACCEL_MATROX_MGAG400)
259 mga_outl(M_IEN, mga_inl(M_IEN) & ~0x220);
261 mga_outl(M_IEN, mga_inl(M_IEN) & ~0x20);
262 free_irq(ACCESS_FBINFO(pcidev)->irq, MINFO);
266 int matroxfb_wait_for_sync(WPMINFO u_int32_t crtc) {
268 struct matrox_vsync *vs;
274 vs = &ACCESS_FBINFO(crtc1.vsync);
277 if (ACCESS_FBINFO(devflags.accelerator) != FB_ACCEL_MATROX_MGAG400) {
280 vs = &ACCESS_FBINFO(crtc2.vsync);
285 ret = matroxfb_enable_irq(PMINFO 0);
289 init_waitqueue_entry(&__wait, current);
292 ret = wait_event_interruptible_timeout(vs->wait, cnt != vs->cnt, HZ/10);
297 matroxfb_enable_irq(PMINFO 1);
303 /* --------------------------------------------------------------------- */
305 static void matrox_pan_var(WPMINFO struct fb_var_screeninfo *var) {
307 unsigned short p0, p1, p2;
308 #ifdef CONFIG_FB_MATROX_32MB
318 if (ACCESS_FBINFO(dead))
321 ACCESS_FBINFO(fbcon).var.xoffset = var->xoffset;
322 ACCESS_FBINFO(fbcon).var.yoffset = var->yoffset;
323 pos = (ACCESS_FBINFO(fbcon).var.yoffset * ACCESS_FBINFO(fbcon).var.xres_virtual + ACCESS_FBINFO(fbcon).var.xoffset) * ACCESS_FBINFO(curr.final_bppShift) / 32;
324 pos += ACCESS_FBINFO(curr.ydstorg.chunks);
325 p0 = ACCESS_FBINFO(hw).CRTC[0x0D] = pos & 0xFF;
326 p1 = ACCESS_FBINFO(hw).CRTC[0x0C] = (pos & 0xFF00) >> 8;
327 p2 = ACCESS_FBINFO(hw).CRTCEXT[0] = (ACCESS_FBINFO(hw).CRTCEXT[0] & 0xB0) | ((pos >> 16) & 0x0F) | ((pos >> 14) & 0x40);
328 #ifdef CONFIG_FB_MATROX_32MB
329 p3 = ACCESS_FBINFO(hw).CRTCEXT[8] = pos >> 21;
332 /* FB_ACTIVATE_VBL and we can acquire interrupts? Honor FB_ACTIVATE_VBL then... */
333 vbl = (var->activate & FB_ACTIVATE_VBL) && (matroxfb_enable_irq(PMINFO 0) == 0);
337 matroxfb_DAC_lock_irqsave(flags);
338 mga_setr(M_CRTC_INDEX, 0x0D, p0);
339 mga_setr(M_CRTC_INDEX, 0x0C, p1);
340 #ifdef CONFIG_FB_MATROX_32MB
341 if (ACCESS_FBINFO(devflags.support32MB))
342 mga_setr(M_EXTVGA_INDEX, 0x08, p3);
345 ACCESS_FBINFO(crtc1.panpos) = p2;
347 /* Abort any pending change */
348 ACCESS_FBINFO(crtc1.panpos) = -1;
349 mga_setr(M_EXTVGA_INDEX, 0x00, p2);
351 matroxfb_DAC_unlock_irqrestore(flags);
353 update_crtc2(PMINFO pos);
358 static void matroxfb_remove(WPMINFO int dummy) {
359 /* Currently we are holding big kernel lock on all dead & usecount updates.
360 * Destroy everything after all users release it. Especially do not unregister
361 * framebuffer and iounmap memory, neither fbmem nor fbcon-cfb* does not check
362 * for device unplugged when in use.
363 * In future we should point mmio.vbase & video.vbase somewhere where we can
364 * write data without causing too much damage...
367 ACCESS_FBINFO(dead) = 1;
368 if (ACCESS_FBINFO(usecount)) {
369 /* destroy it later */
372 matroxfb_unregister_device(MINFO);
373 unregister_framebuffer(&ACCESS_FBINFO(fbcon));
374 matroxfb_g450_shutdown(PMINFO2);
376 if (ACCESS_FBINFO(mtrr.vram_valid))
377 mtrr_del(ACCESS_FBINFO(mtrr.vram), ACCESS_FBINFO(video.base), ACCESS_FBINFO(video.len));
379 mga_iounmap(ACCESS_FBINFO(mmio.vbase));
380 mga_iounmap(ACCESS_FBINFO(video.vbase));
381 release_mem_region(ACCESS_FBINFO(video.base), ACCESS_FBINFO(video.len_maximum));
382 release_mem_region(ACCESS_FBINFO(mmio.base), 16384);
383 #ifdef CONFIG_FB_MATROX_MULTIHEAD
389 * Open/Release the frame buffer device
392 static int matroxfb_open(struct fb_info *info, int user)
394 MINFO_FROM_INFO(info);
396 DBG_LOOP(__FUNCTION__)
398 if (ACCESS_FBINFO(dead)) {
401 ACCESS_FBINFO(usecount)++;
403 ACCESS_FBINFO(userusecount)++;
408 static int matroxfb_release(struct fb_info *info, int user)
410 MINFO_FROM_INFO(info);
412 DBG_LOOP(__FUNCTION__)
415 if (0 == --ACCESS_FBINFO(userusecount)) {
416 matroxfb_disable_irq(PMINFO2);
419 if (!(--ACCESS_FBINFO(usecount)) && ACCESS_FBINFO(dead)) {
420 matroxfb_remove(PMINFO 0);
425 static int matroxfb_pan_display(struct fb_var_screeninfo *var,
426 struct fb_info* info) {
427 MINFO_FROM_INFO(info);
431 matrox_pan_var(PMINFO var);
435 static int matroxfb_get_final_bppShift(CPMINFO int bpp) {
444 if (isInterleave(MINFO))
446 if (ACCESS_FBINFO(devflags.video64bits))
451 static int matroxfb_test_and_set_rounding(CPMINFO int xres, int bpp) {
459 case 4: rounding = 128;
461 case 8: rounding = 64; /* doc says 64; 32 is OK for G400 */
463 case 16: rounding = 32;
465 case 24: rounding = 64; /* doc says 64; 32 is OK for G400 */
467 default: rounding = 16;
468 /* on G400, 16 really does not work */
469 if (ACCESS_FBINFO(devflags.accelerator) == FB_ACCEL_MATROX_MGAG400)
473 if (isInterleave(MINFO)) {
476 over = xres % rounding;
478 xres += rounding-over;
482 static int matroxfb_pitch_adjust(CPMINFO int xres, int bpp) {
488 if (!bpp) return xres;
490 width = ACCESS_FBINFO(capable.vxres);
492 if (ACCESS_FBINFO(devflags.precise_width)) {
494 if ((*width >= xres) && (matroxfb_test_and_set_rounding(PMINFO *width, bpp) == *width)) {
501 xres_new = matroxfb_test_and_set_rounding(PMINFO xres, bpp);
503 if (!xres_new) return 0;
504 if (xres != xres_new) {
505 printk(KERN_INFO "matroxfb: cannot set xres to %d, rounded up to %d\n", xres, xres_new);
510 static int matroxfb_get_cmap_len(struct fb_var_screeninfo *var) {
514 switch (var->bits_per_pixel) {
516 return 16; /* pseudocolor... 16 entries HW palette */
518 return 256; /* pseudocolor... 256 entries HW palette */
520 return 16; /* directcolor... 16 entries SW palette */
521 /* Mystique: truecolor, 16 entries SW palette, HW palette hardwired into 1:1 mapping */
523 return 16; /* directcolor... 16 entries SW palette */
524 /* Mystique: truecolor, 16 entries SW palette, HW palette hardwired into 1:1 mapping */
526 return 16; /* directcolor... 16 entries SW palette */
527 /* Mystique: truecolor, 16 entries SW palette, HW palette hardwired into 1:1 mapping */
529 return 16; /* return something reasonable... or panic()? */
532 static int matroxfb_decode_var(CPMINFO struct fb_var_screeninfo *var, int *visual, int *video_cmap_len, unsigned int* ydstorg) {
536 unsigned char offset,
544 static const struct RGBT table[]= {
545 { 8,{ 0,8},{0,8},{0,8},{ 0,0},MX_VISUAL_PSEUDOCOLOR},
546 {15,{10,5},{5,5},{0,5},{15,1},MX_VISUAL_DIRECTCOLOR},
547 {16,{11,5},{5,6},{0,5},{ 0,0},MX_VISUAL_DIRECTCOLOR},
548 {24,{16,8},{8,8},{0,8},{ 0,0},MX_VISUAL_DIRECTCOLOR},
549 {32,{16,8},{8,8},{0,8},{24,8},MX_VISUAL_DIRECTCOLOR}
551 struct RGBT const *rgbt;
552 unsigned int bpp = var->bits_per_pixel;
553 unsigned int vramlen;
559 case 4: if (!ACCESS_FBINFO(capable.cfb4)) return -EINVAL;
565 default: return -EINVAL;
568 vramlen = ACCESS_FBINFO(video.len_usable);
569 if (var->yres_virtual < var->yres)
570 var->yres_virtual = var->yres;
571 if (var->xres_virtual < var->xres)
572 var->xres_virtual = var->xres;
574 var->xres_virtual = matroxfb_pitch_adjust(PMINFO var->xres_virtual, bpp);
575 memlen = var->xres_virtual * bpp * var->yres_virtual / 8;
576 if (memlen > vramlen) {
577 var->yres_virtual = vramlen * 8 / (var->xres_virtual * bpp);
578 memlen = var->xres_virtual * bpp * var->yres_virtual / 8;
580 /* There is hardware bug that no line can cross 4MB boundary */
581 /* give up for CFB24, it is impossible to easy workaround it */
582 /* for other try to do something */
583 if (!ACCESS_FBINFO(capable.cross4MB) && (memlen > 0x400000)) {
587 unsigned int linelen;
588 unsigned int m1 = linelen = var->xres_virtual * bpp / 8;
589 unsigned int m2 = PAGE_SIZE; /* or 128 if you do not need PAGE ALIGNED address */
590 unsigned int max_yres;
595 while (m2 >= m1) m2 -= m1;
600 m2 = linelen * PAGE_SIZE / m2;
601 *ydstorg = m2 = 0x400000 % m2;
602 max_yres = (vramlen - m2) / linelen;
603 if (var->yres_virtual > max_yres)
604 var->yres_virtual = max_yres;
607 /* YDSTLEN contains only signed 16bit value */
608 if (var->yres_virtual > 32767)
609 var->yres_virtual = 32767;
610 /* we must round yres/xres down, we already rounded y/xres_virtual up
611 if it was possible. We should return -EINVAL, but I disagree */
612 if (var->yres_virtual < var->yres)
613 var->yres = var->yres_virtual;
614 if (var->xres_virtual < var->xres)
615 var->xres = var->xres_virtual;
616 if (var->xoffset + var->xres > var->xres_virtual)
617 var->xoffset = var->xres_virtual - var->xres;
618 if (var->yoffset + var->yres > var->yres_virtual)
619 var->yoffset = var->yres_virtual - var->yres;
621 if (bpp == 16 && var->green.length == 5) {
622 bpp--; /* an artifical value - 15 */
625 for (rgbt = table; rgbt->bpp < bpp; rgbt++);
627 var->clr.offset = rgbt->clr.offset;\
628 var->clr.length = rgbt->clr.length
634 *visual = rgbt->visual;
637 dprintk("matroxfb: truecolor: "
638 "size=%d:%d:%d:%d, shift=%d:%d:%d:%d\n",
639 var->transp.length, var->red.length, var->green.length, var->blue.length,
640 var->transp.offset, var->red.offset, var->green.offset, var->blue.offset);
642 *video_cmap_len = matroxfb_get_cmap_len(var);
643 dprintk(KERN_INFO "requested %d*%d/%dbpp (%d*%d)\n", var->xres, var->yres, var->bits_per_pixel,
644 var->xres_virtual, var->yres_virtual);
648 static int matroxfb_setcolreg(unsigned regno, unsigned red, unsigned green,
649 unsigned blue, unsigned transp,
650 struct fb_info *fb_info)
652 #ifdef CONFIG_FB_MATROX_MULTIHEAD
653 struct matrox_fb_info* minfo = container_of(fb_info, struct matrox_fb_info, fbcon);
659 * Set a single color register. The values supplied are
660 * already rounded down to the hardware's capabilities
661 * (according to the entries in the `var' structure). Return
662 * != 0 for invalid regno.
665 if (regno >= ACCESS_FBINFO(curr.cmap_len))
668 if (ACCESS_FBINFO(fbcon).var.grayscale) {
669 /* gray = 0.30*R + 0.59*G + 0.11*B */
670 red = green = blue = (red * 77 + green * 151 + blue * 28) >> 8;
673 red = CNVT_TOHW(red, ACCESS_FBINFO(fbcon).var.red.length);
674 green = CNVT_TOHW(green, ACCESS_FBINFO(fbcon).var.green.length);
675 blue = CNVT_TOHW(blue, ACCESS_FBINFO(fbcon).var.blue.length);
676 transp = CNVT_TOHW(transp, ACCESS_FBINFO(fbcon).var.transp.length);
678 switch (ACCESS_FBINFO(fbcon).var.bits_per_pixel) {
681 mga_outb(M_DAC_REG, regno);
682 mga_outb(M_DAC_VAL, red);
683 mga_outb(M_DAC_VAL, green);
684 mga_outb(M_DAC_VAL, blue);
689 (red << ACCESS_FBINFO(fbcon).var.red.offset) |
690 (green << ACCESS_FBINFO(fbcon).var.green.offset) |
691 (blue << ACCESS_FBINFO(fbcon).var.blue.offset) |
692 (transp << ACCESS_FBINFO(fbcon).var.transp.offset); /* for 1:5:5:5 */
693 ACCESS_FBINFO(cmap[regno]) = col | (col << 16);
698 ACCESS_FBINFO(cmap[regno]) =
699 (red << ACCESS_FBINFO(fbcon).var.red.offset) |
700 (green << ACCESS_FBINFO(fbcon).var.green.offset) |
701 (blue << ACCESS_FBINFO(fbcon).var.blue.offset) |
702 (transp << ACCESS_FBINFO(fbcon).var.transp.offset); /* 8:8:8:8 */
708 static void matroxfb_init_fix(WPMINFO2)
710 struct fb_fix_screeninfo *fix = &ACCESS_FBINFO(fbcon).fix;
713 strcpy(fix->id,"MATROX");
715 fix->xpanstep = 8; /* 8 for 8bpp, 4 for 16bpp, 2 for 32bpp */
718 fix->mmio_start = ACCESS_FBINFO(mmio.base);
719 fix->mmio_len = ACCESS_FBINFO(mmio.len);
720 fix->accel = ACCESS_FBINFO(devflags.accelerator);
723 static void matroxfb_update_fix(WPMINFO2)
725 struct fb_fix_screeninfo *fix = &ACCESS_FBINFO(fbcon).fix;
728 fix->smem_start = ACCESS_FBINFO(video.base) + ACCESS_FBINFO(curr.ydstorg.bytes);
729 fix->smem_len = ACCESS_FBINFO(video.len_usable) - ACCESS_FBINFO(curr.ydstorg.bytes);
732 static int matroxfb_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
737 unsigned int ydstorg;
738 MINFO_FROM_INFO(info);
740 if (ACCESS_FBINFO(dead)) {
743 if ((err = matroxfb_decode_var(PMINFO var, &visual, &cmap_len, &ydstorg)) != 0)
748 static int matroxfb_set_par(struct fb_info *info)
753 unsigned int ydstorg;
754 struct fb_var_screeninfo *var;
755 MINFO_FROM_INFO(info);
759 if (ACCESS_FBINFO(dead)) {
764 if ((err = matroxfb_decode_var(PMINFO var, &visual, &cmap_len, &ydstorg)) != 0)
766 ACCESS_FBINFO(fbcon.screen_base) = vaddr_va(ACCESS_FBINFO(video.vbase)) + ydstorg;
767 matroxfb_update_fix(PMINFO2);
768 ACCESS_FBINFO(fbcon).fix.visual = visual;
769 ACCESS_FBINFO(fbcon).fix.type = FB_TYPE_PACKED_PIXELS;
770 ACCESS_FBINFO(fbcon).fix.type_aux = 0;
771 ACCESS_FBINFO(fbcon).fix.line_length = (var->xres_virtual * var->bits_per_pixel) >> 3;
775 ACCESS_FBINFO(curr.cmap_len) = cmap_len;
776 ydstorg += ACCESS_FBINFO(devflags.ydstorg);
777 ACCESS_FBINFO(curr.ydstorg.bytes) = ydstorg;
778 ACCESS_FBINFO(curr.ydstorg.chunks) = ydstorg >> (isInterleave(MINFO)?3:2);
779 if (var->bits_per_pixel == 4)
780 ACCESS_FBINFO(curr.ydstorg.pixels) = ydstorg;
782 ACCESS_FBINFO(curr.ydstorg.pixels) = (ydstorg * 8) / var->bits_per_pixel;
783 ACCESS_FBINFO(curr.final_bppShift) = matroxfb_get_final_bppShift(PMINFO var->bits_per_pixel);
784 { struct my_timming mt;
785 struct matrox_hw_state* hw;
788 matroxfb_var2my(var, &mt);
789 mt.crtc = MATROXFB_SRC_CRTC1;
791 switch (var->bits_per_pixel) {
792 case 0: mt.delay = 31 + 0; break;
793 case 16: mt.delay = 21 + 8; break;
794 case 24: mt.delay = 17 + 8; break;
795 case 32: mt.delay = 16 + 8; break;
796 default: mt.delay = 31 + 8; break;
799 hw = &ACCESS_FBINFO(hw);
801 down_read(&ACCESS_FBINFO(altout).lock);
802 for (out = 0; out < MATROXFB_MAX_OUTPUTS; out++) {
803 if (ACCESS_FBINFO(outputs[out]).src == MATROXFB_SRC_CRTC1 &&
804 ACCESS_FBINFO(outputs[out]).output->compute) {
805 ACCESS_FBINFO(outputs[out]).output->compute(ACCESS_FBINFO(outputs[out]).data, &mt);
808 up_read(&ACCESS_FBINFO(altout).lock);
809 ACCESS_FBINFO(crtc1).pixclock = mt.pixclock;
810 ACCESS_FBINFO(crtc1).mnp = mt.mnp;
811 ACCESS_FBINFO(hw_switch->init(PMINFO &mt));
812 pos = (var->yoffset * var->xres_virtual + var->xoffset) * ACCESS_FBINFO(curr.final_bppShift) / 32;
813 pos += ACCESS_FBINFO(curr.ydstorg.chunks);
815 hw->CRTC[0x0D] = pos & 0xFF;
816 hw->CRTC[0x0C] = (pos & 0xFF00) >> 8;
817 hw->CRTCEXT[0] = (hw->CRTCEXT[0] & 0xF0) | ((pos >> 16) & 0x0F) | ((pos >> 14) & 0x40);
818 hw->CRTCEXT[8] = pos >> 21;
819 ACCESS_FBINFO(hw_switch->restore(PMINFO2));
820 update_crtc2(PMINFO pos);
821 down_read(&ACCESS_FBINFO(altout).lock);
822 for (out = 0; out < MATROXFB_MAX_OUTPUTS; out++) {
823 if (ACCESS_FBINFO(outputs[out]).src == MATROXFB_SRC_CRTC1 &&
824 ACCESS_FBINFO(outputs[out]).output->program) {
825 ACCESS_FBINFO(outputs[out]).output->program(ACCESS_FBINFO(outputs[out]).data);
828 for (out = 0; out < MATROXFB_MAX_OUTPUTS; out++) {
829 if (ACCESS_FBINFO(outputs[out]).src == MATROXFB_SRC_CRTC1 &&
830 ACCESS_FBINFO(outputs[out]).output->start) {
831 ACCESS_FBINFO(outputs[out]).output->start(ACCESS_FBINFO(outputs[out]).data);
834 up_read(&ACCESS_FBINFO(altout).lock);
835 matrox_cfbX_init(PMINFO2);
838 ACCESS_FBINFO(initialized) = 1;
842 static int matroxfb_get_vblank(WPMINFO struct fb_vblank *vblank)
846 matroxfb_enable_irq(PMINFO 0);
847 memset(vblank, 0, sizeof(*vblank));
848 vblank->flags = FB_VBLANK_HAVE_VCOUNT | FB_VBLANK_HAVE_VSYNC |
849 FB_VBLANK_HAVE_VBLANK | FB_VBLANK_HAVE_HBLANK;
850 sts1 = mga_inb(M_INSTS1);
851 vblank->vcount = mga_inl(M_VCOUNT);
852 /* BTW, on my PIII/450 with G400, reading M_INSTS1
853 byte makes this call about 12% slower (1.70 vs. 2.05 us
856 vblank->flags |= FB_VBLANK_HBLANKING;
858 vblank->flags |= FB_VBLANK_VSYNCING;
859 if (vblank->vcount >= ACCESS_FBINFO(fbcon).var.yres)
860 vblank->flags |= FB_VBLANK_VBLANKING;
861 if (test_bit(0, &ACCESS_FBINFO(irq_flags))) {
862 vblank->flags |= FB_VBLANK_HAVE_COUNT;
863 /* Only one writer, aligned int value...
864 it should work without lock and without atomic_t */
865 vblank->count = ACCESS_FBINFO(crtc1).vsync.cnt;
870 static struct matrox_altout panellink_output = {
871 .name = "Panellink output",
874 static int matroxfb_ioctl(struct inode *inode, struct file *file,
875 unsigned int cmd, unsigned long arg,
876 struct fb_info *info)
878 void __user *argp = (void __user *)arg;
879 MINFO_FROM_INFO(info);
883 if (ACCESS_FBINFO(dead)) {
890 struct fb_vblank vblank;
893 err = matroxfb_get_vblank(PMINFO &vblank);
896 if (copy_to_user(argp, &vblank, sizeof(vblank)))
900 case FBIO_WAITFORVSYNC:
904 if (get_user(crt, (u_int32_t __user *)arg))
907 return matroxfb_wait_for_sync(PMINFO crt);
909 case MATROXFB_SET_OUTPUT_MODE:
911 struct matroxioc_output_mode mom;
912 struct matrox_altout *oproc;
915 if (copy_from_user(&mom, argp, sizeof(mom)))
917 if (mom.output >= MATROXFB_MAX_OUTPUTS)
919 down_read(&ACCESS_FBINFO(altout.lock));
920 oproc = ACCESS_FBINFO(outputs[mom.output]).output;
923 } else if (!oproc->verifymode) {
924 if (mom.mode == MATROXFB_OUTPUT_MODE_MONITOR) {
930 val = oproc->verifymode(ACCESS_FBINFO(outputs[mom.output]).data, mom.mode);
933 if (ACCESS_FBINFO(outputs[mom.output]).mode != mom.mode) {
934 ACCESS_FBINFO(outputs[mom.output]).mode = mom.mode;
938 up_read(&ACCESS_FBINFO(altout.lock));
941 switch (ACCESS_FBINFO(outputs[mom.output]).src) {
942 case MATROXFB_SRC_CRTC1:
943 matroxfb_set_par(info);
945 case MATROXFB_SRC_CRTC2:
947 struct matroxfb_dh_fb_info* crtc2;
949 down_read(&ACCESS_FBINFO(crtc2.lock));
950 crtc2 = ACCESS_FBINFO(crtc2.info);
952 crtc2->fbcon.fbops->fb_set_par(&crtc2->fbcon);
953 up_read(&ACCESS_FBINFO(crtc2.lock));
959 case MATROXFB_GET_OUTPUT_MODE:
961 struct matroxioc_output_mode mom;
962 struct matrox_altout *oproc;
965 if (copy_from_user(&mom, argp, sizeof(mom)))
967 if (mom.output >= MATROXFB_MAX_OUTPUTS)
969 down_read(&ACCESS_FBINFO(altout.lock));
970 oproc = ACCESS_FBINFO(outputs[mom.output]).output;
974 mom.mode = ACCESS_FBINFO(outputs[mom.output]).mode;
977 up_read(&ACCESS_FBINFO(altout.lock));
980 if (copy_to_user(argp, &mom, sizeof(mom)))
984 case MATROXFB_SET_OUTPUT_CONNECTION:
990 if (copy_from_user(&tmp, argp, sizeof(tmp)))
992 for (i = 0; i < 32; i++) {
993 if (tmp & (1 << i)) {
994 if (i >= MATROXFB_MAX_OUTPUTS)
996 if (!ACCESS_FBINFO(outputs[i]).output)
998 switch (ACCESS_FBINFO(outputs[i]).src) {
999 case MATROXFB_SRC_NONE:
1000 case MATROXFB_SRC_CRTC1:
1007 if (ACCESS_FBINFO(devflags.panellink)) {
1008 if (tmp & MATROXFB_OUTPUT_CONN_DFP) {
1009 if (tmp & MATROXFB_OUTPUT_CONN_SECONDARY)
1011 for (i = 0; i < MATROXFB_MAX_OUTPUTS; i++) {
1012 if (ACCESS_FBINFO(outputs[i]).src == MATROXFB_SRC_CRTC2) {
1019 for (i = 0; i < MATROXFB_MAX_OUTPUTS; i++) {
1020 if (tmp & (1 << i)) {
1021 if (ACCESS_FBINFO(outputs[i]).src != MATROXFB_SRC_CRTC1) {
1023 ACCESS_FBINFO(outputs[i]).src = MATROXFB_SRC_CRTC1;
1025 } else if (ACCESS_FBINFO(outputs[i]).src == MATROXFB_SRC_CRTC1) {
1027 ACCESS_FBINFO(outputs[i]).src = MATROXFB_SRC_NONE;
1032 matroxfb_set_par(info);
1035 case MATROXFB_GET_OUTPUT_CONNECTION:
1040 for (i = 0; i < MATROXFB_MAX_OUTPUTS; i++) {
1041 if (ACCESS_FBINFO(outputs[i]).src == MATROXFB_SRC_CRTC1) {
1045 if (put_user(conn, (u_int32_t __user *)arg))
1049 case MATROXFB_GET_AVAILABLE_OUTPUTS:
1054 for (i = 0; i < MATROXFB_MAX_OUTPUTS; i++) {
1055 if (ACCESS_FBINFO(outputs[i]).output) {
1056 switch (ACCESS_FBINFO(outputs[i]).src) {
1057 case MATROXFB_SRC_NONE:
1058 case MATROXFB_SRC_CRTC1:
1064 if (ACCESS_FBINFO(devflags.panellink)) {
1065 if (conn & MATROXFB_OUTPUT_CONN_DFP)
1066 conn &= ~MATROXFB_OUTPUT_CONN_SECONDARY;
1067 if (conn & MATROXFB_OUTPUT_CONN_SECONDARY)
1068 conn &= ~MATROXFB_OUTPUT_CONN_DFP;
1070 if (put_user(conn, (u_int32_t __user *)arg))
1074 case MATROXFB_GET_ALL_OUTPUTS:
1079 for (i = 0; i < MATROXFB_MAX_OUTPUTS; i++) {
1080 if (ACCESS_FBINFO(outputs[i]).output) {
1084 if (put_user(conn, (u_int32_t __user *)arg))
1088 case VIDIOC_QUERYCAP:
1090 struct v4l2_capability r;
1092 memset(&r, 0, sizeof(r));
1093 strcpy(r.driver, "matroxfb");
1094 strcpy(r.card, "Matrox");
1095 sprintf(r.bus_info, "PCI:%s", pci_name(ACCESS_FBINFO(pcidev)));
1096 r.version = KERNEL_VERSION(1,0,0);
1097 r.capabilities = V4L2_CAP_VIDEO_OUTPUT;
1098 if (copy_to_user(argp, &r, sizeof(r)))
1103 case VIDIOC_QUERYCTRL:
1105 struct v4l2_queryctrl qctrl;
1108 if (copy_from_user(&qctrl, argp, sizeof(qctrl)))
1111 down_read(&ACCESS_FBINFO(altout).lock);
1112 if (!ACCESS_FBINFO(outputs[1]).output) {
1114 } else if (ACCESS_FBINFO(outputs[1]).output->getqueryctrl) {
1115 err = ACCESS_FBINFO(outputs[1]).output->getqueryctrl(ACCESS_FBINFO(outputs[1]).data, &qctrl);
1119 up_read(&ACCESS_FBINFO(altout).lock);
1121 copy_to_user(argp, &qctrl, sizeof(qctrl)))
1127 struct v4l2_control ctrl;
1130 if (copy_from_user(&ctrl, argp, sizeof(ctrl)))
1133 down_read(&ACCESS_FBINFO(altout).lock);
1134 if (!ACCESS_FBINFO(outputs[1]).output) {
1136 } else if (ACCESS_FBINFO(outputs[1]).output->getctrl) {
1137 err = ACCESS_FBINFO(outputs[1]).output->getctrl(ACCESS_FBINFO(outputs[1]).data, &ctrl);
1141 up_read(&ACCESS_FBINFO(altout).lock);
1143 copy_to_user(argp, &ctrl, sizeof(ctrl)))
1147 case VIDIOC_S_CTRL_OLD:
1150 struct v4l2_control ctrl;
1153 if (copy_from_user(&ctrl, argp, sizeof(ctrl)))
1156 down_read(&ACCESS_FBINFO(altout).lock);
1157 if (!ACCESS_FBINFO(outputs[1]).output) {
1159 } else if (ACCESS_FBINFO(outputs[1]).output->setctrl) {
1160 err = ACCESS_FBINFO(outputs[1]).output->setctrl(ACCESS_FBINFO(outputs[1]).data, &ctrl);
1164 up_read(&ACCESS_FBINFO(altout).lock);
1171 /* 0 unblank, 1 blank, 2 no vsync, 3 no hsync, 4 off */
1173 static int matroxfb_blank(int blank, struct fb_info *info)
1178 MINFO_FROM_INFO(info);
1182 if (ACCESS_FBINFO(dead))
1186 case FB_BLANK_NORMAL: seq = 0x20; crtc = 0x00; break; /* works ??? */
1187 case FB_BLANK_VSYNC_SUSPEND: seq = 0x20; crtc = 0x10; break;
1188 case FB_BLANK_HSYNC_SUSPEND: seq = 0x20; crtc = 0x20; break;
1189 case FB_BLANK_POWERDOWN: seq = 0x20; crtc = 0x30; break;
1190 default: seq = 0x00; crtc = 0x00; break;
1195 mga_outb(M_SEQ_INDEX, 1);
1196 mga_outb(M_SEQ_DATA, (mga_inb(M_SEQ_DATA) & ~0x20) | seq);
1197 mga_outb(M_EXTVGA_INDEX, 1);
1198 mga_outb(M_EXTVGA_DATA, (mga_inb(M_EXTVGA_DATA) & ~0x30) | crtc);
1204 static struct fb_ops matroxfb_ops = {
1205 .owner = THIS_MODULE,
1206 .fb_open = matroxfb_open,
1207 .fb_release = matroxfb_release,
1208 .fb_check_var = matroxfb_check_var,
1209 .fb_set_par = matroxfb_set_par,
1210 .fb_setcolreg = matroxfb_setcolreg,
1211 .fb_pan_display =matroxfb_pan_display,
1212 .fb_blank = matroxfb_blank,
1213 .fb_ioctl = matroxfb_ioctl,
1214 /* .fb_fillrect = <set by matrox_cfbX_init>, */
1215 /* .fb_copyarea = <set by matrox_cfbX_init>, */
1216 /* .fb_imageblit = <set by matrox_cfbX_init>, */
1217 /* .fb_cursor = <set by matrox_cfbX_init>, */
1220 #define RSDepth(X) (((X) >> 8) & 0x0F)
1230 static struct { struct fb_bitfield red, green, blue, transp; int bits_per_pixel; } colors[] = {
1231 { { 0, 8, 0}, { 0, 8, 0}, { 0, 8, 0}, { 0, 0, 0}, 8 },
1232 { { 10, 5, 0}, { 5, 5, 0}, { 0, 5, 0}, { 15, 1, 0}, 16 },
1233 { { 11, 5, 0}, { 5, 6, 0}, { 0, 5, 0}, { 0, 0, 0}, 16 },
1234 { { 16, 8, 0}, { 8, 8, 0}, { 0, 8, 0}, { 24, 8, 0}, 32 },
1235 { { 0, 8, 0}, { 0, 8, 0}, { 0, 8, 0}, { 0, 0, 0}, 4 },
1236 { { 16, 8, 0}, { 8, 8, 0}, { 0, 8, 0}, { 0, 0, 0}, 24 },
1237 { { 0, 6, 0}, { 0, 6, 0}, { 0, 6, 0}, { 0, 0, 0}, 0 }, /* textmode with (default) VGA8x16 */
1238 { { 0, 6, 0}, { 0, 6, 0}, { 0, 6, 0}, { 0, 0, 0}, 0 }, /* textmode hardwired to VGA8x8 */
1241 /* initialized by setup, see explanation at end of file (search for MODULE_PARM_DESC) */
1242 static unsigned int mem; /* "matrox:mem:xxxxxM" */
1243 static int option_precise_width = 1; /* cannot be changed, option_precise_width==0 must imply noaccel */
1244 static int inv24; /* "matrox:inv24" */
1245 static int cross4MB = -1; /* "matrox:cross4MB" */
1246 static int disabled; /* "matrox:disabled" */
1247 static int noaccel; /* "matrox:noaccel" */
1248 static int nopan; /* "matrox:nopan" */
1249 static int no_pci_retry; /* "matrox:nopciretry" */
1250 static int novga; /* "matrox:novga" */
1251 static int nobios; /* "matrox:nobios" */
1252 static int noinit = 1; /* "matrox:init" */
1253 static int inverse; /* "matrox:inverse" */
1254 static int sgram; /* "matrox:sgram" */
1256 static int mtrr = 1; /* "matrox:nomtrr" */
1258 static int grayscale; /* "matrox:grayscale" */
1259 static int dev = -1; /* "matrox:dev:xxxxx" */
1260 static unsigned int vesa = ~0; /* "matrox:vesa:xxxxx" */
1261 static int depth = -1; /* "matrox:depth:xxxxx" */
1262 static unsigned int xres; /* "matrox:xres:xxxxx" */
1263 static unsigned int yres; /* "matrox:yres:xxxxx" */
1264 static unsigned int upper = ~0; /* "matrox:upper:xxxxx" */
1265 static unsigned int lower = ~0; /* "matrox:lower:xxxxx" */
1266 static unsigned int vslen; /* "matrox:vslen:xxxxx" */
1267 static unsigned int left = ~0; /* "matrox:left:xxxxx" */
1268 static unsigned int right = ~0; /* "matrox:right:xxxxx" */
1269 static unsigned int hslen; /* "matrox:hslen:xxxxx" */
1270 static unsigned int pixclock; /* "matrox:pixclock:xxxxx" */
1271 static int sync = -1; /* "matrox:sync:xxxxx" */
1272 static unsigned int fv; /* "matrox:fv:xxxxx" */
1273 static unsigned int fh; /* "matrox:fh:xxxxxk" */
1274 static unsigned int maxclk; /* "matrox:maxclk:xxxxM" */
1275 static int dfp; /* "matrox:dfp */
1276 static int dfp_type = -1; /* "matrox:dfp:xxx */
1277 static int memtype = -1; /* "matrox:memtype:xxx" */
1278 static char outputs[8]; /* "matrox:outputs:xxx" */
1281 static char videomode[64]; /* "matrox:mode:xxxxx" or "matrox:xxxxx" */
1284 static int matroxfb_getmemory(WPMINFO unsigned int maxSize, unsigned int *realSize){
1288 unsigned char store, orig;
1289 unsigned char bytes[32];
1294 vm = ACCESS_FBINFO(video.vbase);
1295 maxSize &= ~0x1FFFFF; /* must be X*2MB (really it must be 2 or X*4MB) */
1297 if (maxSize < 0x0200000) return 0;
1298 if (maxSize > 0x2000000) maxSize = 0x2000000;
1300 mga_outb(M_EXTVGA_INDEX, 0x03);
1301 orig = mga_inb(M_EXTVGA_DATA);
1302 mga_outb(M_EXTVGA_DATA, orig | 0x80);
1304 store = mga_readb(vm, 0x1234);
1306 for (offs = 0x100000; offs < maxSize; offs += 0x200000)
1307 *tmp++ = mga_readb(vm, offs);
1308 for (offs = 0x100000; offs < maxSize; offs += 0x200000)
1309 mga_writeb(vm, offs, 0x02);
1310 if (ACCESS_FBINFO(features.accel.has_cacheflush))
1311 mga_outb(M_CACHEFLUSH, 0x00);
1313 mga_writeb(vm, 0x1234, 0x99);
1314 for (offs = 0x100000; offs < maxSize; offs += 0x200000) {
1315 if (mga_readb(vm, offs) != 0x02)
1317 mga_writeb(vm, offs, mga_readb(vm, offs) - 0x02);
1318 if (mga_readb(vm, offs))
1322 for (offs2 = 0x100000; offs2 < maxSize; offs2 += 0x200000)
1323 mga_writeb(vm, offs2, *tmp++);
1324 mga_writeb(vm, 0x1234, store);
1326 mga_outb(M_EXTVGA_INDEX, 0x03);
1327 mga_outb(M_EXTVGA_DATA, orig);
1329 *realSize = offs - 0x100000;
1330 #ifdef CONFIG_FB_MATROX_MILLENIUM
1331 ACCESS_FBINFO(interleave) = !(!isMillenium(MINFO) || ((offs - 0x100000) & 0x3FFFFF));
1336 struct video_board {
1340 struct matrox_switch* lowlevel;
1342 #ifdef CONFIG_FB_MATROX_MILLENIUM
1343 static struct video_board vbMillennium = {0x0800000, 0x0800000, FB_ACCEL_MATROX_MGA2064W, &matrox_millennium};
1344 static struct video_board vbMillennium2 = {0x1000000, 0x0800000, FB_ACCEL_MATROX_MGA2164W, &matrox_millennium};
1345 static struct video_board vbMillennium2A = {0x1000000, 0x0800000, FB_ACCEL_MATROX_MGA2164W_AGP, &matrox_millennium};
1346 #endif /* CONFIG_FB_MATROX_MILLENIUM */
1347 #ifdef CONFIG_FB_MATROX_MYSTIQUE
1348 static struct video_board vbMystique = {0x0800000, 0x0800000, FB_ACCEL_MATROX_MGA1064SG, &matrox_mystique};
1349 #endif /* CONFIG_FB_MATROX_MYSTIQUE */
1350 #ifdef CONFIG_FB_MATROX_G
1351 static struct video_board vbG100 = {0x0800000, 0x0800000, FB_ACCEL_MATROX_MGAG100, &matrox_G100};
1352 static struct video_board vbG200 = {0x1000000, 0x1000000, FB_ACCEL_MATROX_MGAG200, &matrox_G100};
1353 #ifdef CONFIG_FB_MATROX_32MB
1354 /* from doc it looks like that accelerator can draw only to low 16MB :-( Direct accesses & displaying are OK for
1356 static struct video_board vbG400 = {0x2000000, 0x1000000, FB_ACCEL_MATROX_MGAG400, &matrox_G100};
1358 static struct video_board vbG400 = {0x2000000, 0x1000000, FB_ACCEL_MATROX_MGAG400, &matrox_G100};
1362 #define DEVF_VIDEO64BIT 0x0001
1363 #define DEVF_SWAPS 0x0002
1364 #define DEVF_SRCORG 0x0004
1365 #define DEVF_DUALHEAD 0x0008
1366 #define DEVF_CROSS4MB 0x0010
1367 #define DEVF_TEXT4B 0x0020
1368 /* #define DEVF_recycled 0x0040 */
1369 /* #define DEVF_recycled 0x0080 */
1370 #define DEVF_SUPPORT32MB 0x0100
1371 #define DEVF_ANY_VXRES 0x0200
1372 #define DEVF_TEXT16B 0x0400
1373 #define DEVF_CRTC2 0x0800
1374 #define DEVF_MAVEN_CAPABLE 0x1000
1375 #define DEVF_PANELLINK_CAPABLE 0x2000
1376 #define DEVF_G450DAC 0x4000
1378 #define DEVF_GCORE (DEVF_VIDEO64BIT | DEVF_SWAPS | DEVF_CROSS4MB)
1379 #define DEVF_G2CORE (DEVF_GCORE | DEVF_ANY_VXRES | DEVF_MAVEN_CAPABLE | DEVF_PANELLINK_CAPABLE | DEVF_SRCORG | DEVF_DUALHEAD)
1380 #define DEVF_G100 (DEVF_GCORE) /* no doc, no vxres... */
1381 #define DEVF_G200 (DEVF_G2CORE)
1382 #define DEVF_G400 (DEVF_G2CORE | DEVF_SUPPORT32MB | DEVF_TEXT16B | DEVF_CRTC2)
1383 /* if you'll find how to drive DFP... */
1384 #define DEVF_G450 (DEVF_GCORE | DEVF_ANY_VXRES | DEVF_SUPPORT32MB | DEVF_TEXT16B | DEVF_CRTC2 | DEVF_G450DAC | DEVF_SRCORG | DEVF_DUALHEAD)
1385 #define DEVF_G550 (DEVF_G450)
1387 static struct board {
1388 unsigned short vendor, device, rev, svid, sid;
1390 unsigned int maxclk;
1392 struct video_board* base;
1395 #ifdef CONFIG_FB_MATROX_MILLENIUM
1396 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MIL, 0xFF,
1402 "Millennium (PCI)"},
1403 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MIL_2, 0xFF,
1409 "Millennium II (PCI)"},
1410 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MIL_2_AGP, 0xFF,
1416 "Millennium II (AGP)"},
1418 #ifdef CONFIG_FB_MATROX_MYSTIQUE
1419 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MYS, 0x02,
1421 DEVF_VIDEO64BIT | DEVF_CROSS4MB,
1426 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MYS, 0xFF,
1428 DEVF_VIDEO64BIT | DEVF_SWAPS | DEVF_CROSS4MB,
1432 "Mystique 220 (PCI)"},
1434 #ifdef CONFIG_FB_MATROX_G
1435 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G100_MM, 0xFF,
1442 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G100_AGP, 0xFF,
1449 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_PCI, 0xFF,
1456 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_AGP, 0xFF,
1457 PCI_SS_VENDOR_ID_MATROX, PCI_SS_ID_MATROX_GENERIC,
1463 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_AGP, 0xFF,
1464 PCI_SS_VENDOR_ID_MATROX, PCI_SS_ID_MATROX_MYSTIQUE_G200_AGP,
1469 "Mystique G200 (AGP)"},
1470 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_AGP, 0xFF,
1471 PCI_SS_VENDOR_ID_MATROX, PCI_SS_ID_MATROX_MILLENIUM_G200_AGP,
1476 "Millennium G200 (AGP)"},
1477 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_AGP, 0xFF,
1478 PCI_SS_VENDOR_ID_MATROX, PCI_SS_ID_MATROX_MARVEL_G200_AGP,
1483 "Marvel G200 (AGP)"},
1484 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_AGP, 0xFF,
1485 PCI_SS_VENDOR_ID_SIEMENS_NIXDORF, PCI_SS_ID_SIEMENS_MGA_G200_AGP,
1491 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_AGP, 0xFF,
1498 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G400, 0x80,
1499 PCI_SS_VENDOR_ID_MATROX, PCI_SS_ID_MATROX_MILLENNIUM_G400_MAX_AGP,
1504 "Millennium G400 MAX (AGP)"},
1505 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G400, 0x80,
1512 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G400, 0xFF,
1519 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G550, 0xFF,
1536 static struct fb_videomode defaultmode = {
1537 /* 640x480 @ 60Hz, 31.5 kHz */
1538 NULL, 60, 640, 480, 39721, 40, 24, 32, 11, 96, 2,
1539 0, FB_VMODE_NONINTERLACED
1541 #endif /* !MODULE */
1543 static int hotplug = 0;
1545 static void setDefaultOutputs(WPMINFO2) {
1549 ACCESS_FBINFO(outputs[0]).default_src = MATROXFB_SRC_CRTC1;
1550 if (ACCESS_FBINFO(devflags.g450dac)) {
1551 ACCESS_FBINFO(outputs[1]).default_src = MATROXFB_SRC_CRTC1;
1552 ACCESS_FBINFO(outputs[2]).default_src = MATROXFB_SRC_CRTC1;
1554 ACCESS_FBINFO(outputs[2]).default_src = MATROXFB_SRC_CRTC1;
1557 for (i = 0; i < MATROXFB_MAX_OUTPUTS; i++) {
1564 ACCESS_FBINFO(outputs[i]).default_src = MATROXFB_SRC_NONE;
1565 } else if (c == '1') {
1566 ACCESS_FBINFO(outputs[i]).default_src = MATROXFB_SRC_CRTC1;
1567 } else if (c == '2' && ACCESS_FBINFO(devflags.crtc2)) {
1568 ACCESS_FBINFO(outputs[i]).default_src = MATROXFB_SRC_CRTC2;
1570 printk(KERN_ERR "matroxfb: Unknown outputs setting\n");
1574 /* Nullify this option for subsequent adapters */
1578 static int initMatrox2(WPMINFO struct board* b){
1579 unsigned long ctrlptr_phys = 0;
1580 unsigned long video_base_phys = 0;
1581 unsigned int memsize;
1584 static struct pci_device_id intel_82437[] = {
1585 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82437) },
1591 /* set default values... */
1592 vesafb_defined.accel_flags = FB_ACCELF_TEXT;
1594 ACCESS_FBINFO(hw_switch) = b->base->lowlevel;
1595 ACCESS_FBINFO(devflags.accelerator) = b->base->accelID;
1596 ACCESS_FBINFO(max_pixel_clock) = b->maxclk;
1598 printk(KERN_INFO "matroxfb: Matrox %s detected\n", b->name);
1599 ACCESS_FBINFO(capable.plnwt) = 1;
1600 ACCESS_FBINFO(chip) = b->chip;
1601 ACCESS_FBINFO(capable.srcorg) = b->flags & DEVF_SRCORG;
1602 ACCESS_FBINFO(devflags.video64bits) = b->flags & DEVF_VIDEO64BIT;
1603 if (b->flags & DEVF_TEXT4B) {
1604 ACCESS_FBINFO(devflags.vgastep) = 4;
1605 ACCESS_FBINFO(devflags.textmode) = 4;
1606 ACCESS_FBINFO(devflags.text_type_aux) = FB_AUX_TEXT_MGA_STEP16;
1607 } else if (b->flags & DEVF_TEXT16B) {
1608 ACCESS_FBINFO(devflags.vgastep) = 16;
1609 ACCESS_FBINFO(devflags.textmode) = 1;
1610 ACCESS_FBINFO(devflags.text_type_aux) = FB_AUX_TEXT_MGA_STEP16;
1612 ACCESS_FBINFO(devflags.vgastep) = 8;
1613 ACCESS_FBINFO(devflags.textmode) = 1;
1614 ACCESS_FBINFO(devflags.text_type_aux) = FB_AUX_TEXT_MGA_STEP8;
1616 #ifdef CONFIG_FB_MATROX_32MB
1617 ACCESS_FBINFO(devflags.support32MB) = (b->flags & DEVF_SUPPORT32MB) != 0;
1619 ACCESS_FBINFO(devflags.precise_width) = !(b->flags & DEVF_ANY_VXRES);
1620 ACCESS_FBINFO(devflags.crtc2) = (b->flags & DEVF_CRTC2) != 0;
1621 ACCESS_FBINFO(devflags.maven_capable) = (b->flags & DEVF_MAVEN_CAPABLE) != 0;
1622 ACCESS_FBINFO(devflags.dualhead) = (b->flags & DEVF_DUALHEAD) != 0;
1623 ACCESS_FBINFO(devflags.dfp_type) = dfp_type;
1624 ACCESS_FBINFO(devflags.g450dac) = (b->flags & DEVF_G450DAC) != 0;
1625 ACCESS_FBINFO(devflags.textstep) = ACCESS_FBINFO(devflags.vgastep) * ACCESS_FBINFO(devflags.textmode);
1626 ACCESS_FBINFO(devflags.textvram) = 65536 / ACCESS_FBINFO(devflags.textmode);
1627 setDefaultOutputs(PMINFO2);
1628 if (b->flags & DEVF_PANELLINK_CAPABLE) {
1629 ACCESS_FBINFO(outputs[2]).data = MINFO;
1630 ACCESS_FBINFO(outputs[2]).output = &panellink_output;
1631 ACCESS_FBINFO(outputs[2]).src = ACCESS_FBINFO(outputs[2]).default_src;
1632 ACCESS_FBINFO(outputs[2]).mode = MATROXFB_OUTPUT_MODE_MONITOR;
1633 ACCESS_FBINFO(devflags.panellink) = 1;
1636 if (ACCESS_FBINFO(capable.cross4MB) < 0)
1637 ACCESS_FBINFO(capable.cross4MB) = b->flags & DEVF_CROSS4MB;
1638 if (b->flags & DEVF_SWAPS) {
1639 ctrlptr_phys = pci_resource_start(ACCESS_FBINFO(pcidev), 1);
1640 video_base_phys = pci_resource_start(ACCESS_FBINFO(pcidev), 0);
1641 ACCESS_FBINFO(devflags.fbResource) = PCI_BASE_ADDRESS_0;
1643 ctrlptr_phys = pci_resource_start(ACCESS_FBINFO(pcidev), 0);
1644 video_base_phys = pci_resource_start(ACCESS_FBINFO(pcidev), 1);
1645 ACCESS_FBINFO(devflags.fbResource) = PCI_BASE_ADDRESS_1;
1648 if (!ctrlptr_phys) {
1649 printk(KERN_ERR "matroxfb: control registers are not available, matroxfb disabled\n");
1652 if (!video_base_phys) {
1653 printk(KERN_ERR "matroxfb: video RAM is not available in PCI address space, matroxfb disabled\n");
1656 memsize = b->base->maxvram;
1657 if (!request_mem_region(ctrlptr_phys, 16384, "matroxfb MMIO")) {
1660 if (!request_mem_region(video_base_phys, memsize, "matroxfb FB")) {
1663 ACCESS_FBINFO(video.len_maximum) = memsize;
1664 /* convert mem (autodetect k, M) */
1665 if (mem < 1024) mem *= 1024;
1666 if (mem < 0x00100000) mem *= 1024;
1668 if (mem && (mem < memsize))
1671 if (mga_ioremap(ctrlptr_phys, 16384, MGA_IOREMAP_MMIO, &ACCESS_FBINFO(mmio.vbase))) {
1672 printk(KERN_ERR "matroxfb: cannot ioremap(%lX, 16384), matroxfb disabled\n", ctrlptr_phys);
1675 ACCESS_FBINFO(mmio.base) = ctrlptr_phys;
1676 ACCESS_FBINFO(mmio.len) = 16384;
1677 ACCESS_FBINFO(video.base) = video_base_phys;
1678 if (mga_ioremap(video_base_phys, memsize, MGA_IOREMAP_FB, &ACCESS_FBINFO(video.vbase))) {
1679 printk(KERN_ERR "matroxfb: cannot ioremap(%lX, %d), matroxfb disabled\n",
1680 video_base_phys, memsize);
1685 u_int32_t mga_option;
1687 pci_read_config_dword(ACCESS_FBINFO(pcidev), PCI_OPTION_REG, &mga_option);
1688 pci_read_config_dword(ACCESS_FBINFO(pcidev), PCI_COMMAND, &cmd);
1689 mga_option &= 0x7FFFFFFF; /* clear BIG_ENDIAN */
1690 mga_option |= MX_OPTION_BSWAP;
1691 /* disable palette snooping */
1692 cmd &= ~PCI_COMMAND_VGA_PALETTE;
1693 if (pci_dev_present(intel_82437)) {
1694 if (!(mga_option & 0x20000000) && !ACCESS_FBINFO(devflags.nopciretry)) {
1695 printk(KERN_WARNING "matroxfb: Disabling PCI retries due to i82437 present\n");
1697 mga_option |= 0x20000000;
1698 ACCESS_FBINFO(devflags.nopciretry) = 1;
1700 pci_write_config_dword(ACCESS_FBINFO(pcidev), PCI_COMMAND, cmd);
1701 pci_write_config_dword(ACCESS_FBINFO(pcidev), PCI_OPTION_REG, mga_option);
1702 ACCESS_FBINFO(hw).MXoptionReg = mga_option;
1704 /* select non-DMA memory for PCI_MGA_DATA, otherwise dump of PCI cfg space can lock PCI bus */
1705 /* maybe preinit() candidate, but it is same... for all devices... at this time... */
1706 pci_write_config_dword(ACCESS_FBINFO(pcidev), PCI_MGA_INDEX, 0x00003C00);
1710 matroxfb_read_pins(PMINFO2);
1711 if (ACCESS_FBINFO(hw_switch)->preinit(PMINFO2)) {
1716 if (!matroxfb_getmemory(PMINFO memsize, &ACCESS_FBINFO(video.len)) || !ACCESS_FBINFO(video.len)) {
1717 printk(KERN_ERR "matroxfb: cannot determine memory size\n");
1720 ACCESS_FBINFO(devflags.ydstorg) = 0;
1722 ACCESS_FBINFO(video.base) = video_base_phys;
1723 ACCESS_FBINFO(video.len_usable) = ACCESS_FBINFO(video.len);
1724 if (ACCESS_FBINFO(video.len_usable) > b->base->maxdisplayable)
1725 ACCESS_FBINFO(video.len_usable) = b->base->maxdisplayable;
1728 ACCESS_FBINFO(mtrr.vram) = mtrr_add(video_base_phys, ACCESS_FBINFO(video.len), MTRR_TYPE_WRCOMB, 1);
1729 ACCESS_FBINFO(mtrr.vram_valid) = 1;
1730 printk(KERN_INFO "matroxfb: MTRR's turned on\n");
1732 #endif /* CONFIG_MTRR */
1734 if (!ACCESS_FBINFO(devflags.novga))
1735 request_region(0x3C0, 32, "matrox");
1736 matroxfb_g450_connect(PMINFO2);
1737 ACCESS_FBINFO(hw_switch->reset(PMINFO2));
1739 ACCESS_FBINFO(fbcon.monspecs.hfmin) = 0;
1740 ACCESS_FBINFO(fbcon.monspecs.hfmax) = fh;
1741 ACCESS_FBINFO(fbcon.monspecs.vfmin) = 0;
1742 ACCESS_FBINFO(fbcon.monspecs.vfmax) = fv;
1743 ACCESS_FBINFO(fbcon.monspecs.dpms) = 0; /* TBD */
1745 /* static settings */
1746 vesafb_defined.red = colors[depth-1].red;
1747 vesafb_defined.green = colors[depth-1].green;
1748 vesafb_defined.blue = colors[depth-1].blue;
1749 vesafb_defined.bits_per_pixel = colors[depth-1].bits_per_pixel;
1750 vesafb_defined.grayscale = grayscale;
1751 vesafb_defined.vmode = 0;
1753 vesafb_defined.accel_flags &= ~FB_ACCELF_TEXT;
1755 ACCESS_FBINFO(fbops) = matroxfb_ops;
1756 ACCESS_FBINFO(fbcon.fbops) = &ACCESS_FBINFO(fbops);
1757 ACCESS_FBINFO(fbcon.pseudo_palette) = ACCESS_FBINFO(cmap);
1758 /* after __init time we are like module... no logo */
1759 ACCESS_FBINFO(fbcon.flags) = hotplug ? FBINFO_FLAG_MODULE : FBINFO_FLAG_DEFAULT;
1760 ACCESS_FBINFO(fbcon.flags) |= FBINFO_PARTIAL_PAN_OK | /* Prefer panning for scroll under MC viewer/edit */
1761 FBINFO_HWACCEL_COPYAREA | /* We have hw-assisted bmove */
1762 FBINFO_HWACCEL_FILLRECT | /* And fillrect */
1763 FBINFO_HWACCEL_IMAGEBLIT | /* And imageblit */
1764 FBINFO_HWACCEL_XPAN | /* And we support both horizontal */
1765 FBINFO_HWACCEL_YPAN; /* And vertical panning */
1766 ACCESS_FBINFO(video.len_usable) &= PAGE_MASK;
1767 fb_alloc_cmap(&ACCESS_FBINFO(fbcon.cmap), 256, 1);
1770 /* mode database is marked __init!!! */
1772 fb_find_mode(&vesafb_defined, &ACCESS_FBINFO(fbcon), videomode[0]?videomode:NULL,
1773 NULL, 0, &defaultmode, vesafb_defined.bits_per_pixel);
1775 #endif /* !MODULE */
1777 /* mode modifiers */
1779 vesafb_defined.hsync_len = hslen;
1781 vesafb_defined.vsync_len = vslen;
1783 vesafb_defined.left_margin = left;
1785 vesafb_defined.right_margin = right;
1787 vesafb_defined.upper_margin = upper;
1789 vesafb_defined.lower_margin = lower;
1791 vesafb_defined.xres = xres;
1793 vesafb_defined.yres = yres;
1795 vesafb_defined.sync = sync;
1796 else if (vesafb_defined.sync == ~0) {
1797 vesafb_defined.sync = 0;
1799 vesafb_defined.sync |= FB_SYNC_HOR_HIGH_ACT;
1800 else if (yres < 480)
1801 vesafb_defined.sync |= FB_SYNC_VERT_HIGH_ACT;
1804 /* fv, fh, maxclk limits was specified */
1809 tmp = fv * (vesafb_defined.upper_margin + vesafb_defined.yres
1810 + vesafb_defined.lower_margin + vesafb_defined.vsync_len);
1811 if ((tmp < fh) || (fh == 0)) fh = tmp;
1814 tmp = fh * (vesafb_defined.left_margin + vesafb_defined.xres
1815 + vesafb_defined.right_margin + vesafb_defined.hsync_len);
1816 if ((tmp < maxclk) || (maxclk == 0)) maxclk = tmp;
1818 tmp = (maxclk + 499) / 500;
1820 tmp = (2000000000 + tmp) / tmp;
1821 if (tmp > pixclock) pixclock = tmp;
1825 if (pixclock < 2000) /* > 500MHz */
1826 pixclock = 4000; /* 250MHz */
1827 if (pixclock > 1000000)
1828 pixclock = 1000000; /* 1MHz */
1829 vesafb_defined.pixclock = pixclock;
1832 /* FIXME: Where to move this?! */
1833 #if defined(CONFIG_PPC_PMAC)
1835 if (_machine == _MACH_Pmac) {
1836 struct fb_var_screeninfo var;
1837 if (default_vmode <= 0 || default_vmode > VMODE_MAX)
1838 default_vmode = VMODE_640_480_60;
1840 if (default_cmode == CMODE_NVRAM)
1841 default_cmode = nvram_read_byte(NV_CMODE);
1843 if (default_cmode < CMODE_8 || default_cmode > CMODE_32)
1844 default_cmode = CMODE_8;
1845 if (!mac_vmode_to_var(default_vmode, default_cmode, &var)) {
1846 var.accel_flags = vesafb_defined.accel_flags;
1847 var.xoffset = var.yoffset = 0;
1848 /* Note: mac_vmode_to_var() does not set all parameters */
1849 vesafb_defined = var;
1852 #endif /* !MODULE */
1853 #endif /* CONFIG_PPC_PMAC */
1854 vesafb_defined.xres_virtual = vesafb_defined.xres;
1856 vesafb_defined.yres_virtual = vesafb_defined.yres;
1858 vesafb_defined.yres_virtual = 65536; /* large enough to be INF, but small enough
1859 to yres_virtual * xres_virtual < 2^32 */
1861 matroxfb_init_fix(PMINFO2);
1862 ACCESS_FBINFO(fbcon.screen_base) = vaddr_va(ACCESS_FBINFO(video.vbase));
1863 matroxfb_update_fix(PMINFO2);
1864 /* Normalize values (namely yres_virtual) */
1865 matroxfb_check_var(&vesafb_defined, &ACCESS_FBINFO(fbcon));
1866 /* And put it into "current" var. Do NOT program hardware yet, or we'll not take over
1867 * vgacon correctly. fbcon_startup will call fb_set_par for us, WITHOUT check_var,
1868 * and unfortunately it will do it BEFORE vgacon contents is saved, so it won't work
1869 * anyway. But we at least tried... */
1870 ACCESS_FBINFO(fbcon.var) = vesafb_defined;
1873 printk(KERN_INFO "matroxfb: %dx%dx%dbpp (virtual: %dx%d)\n",
1874 vesafb_defined.xres, vesafb_defined.yres, vesafb_defined.bits_per_pixel,
1875 vesafb_defined.xres_virtual, vesafb_defined.yres_virtual);
1876 printk(KERN_INFO "matroxfb: framebuffer at 0x%lX, mapped to 0x%p, size %d\n",
1877 ACCESS_FBINFO(video.base), vaddr_va(ACCESS_FBINFO(video.vbase)), ACCESS_FBINFO(video.len));
1879 /* We do not have to set currcon to 0... register_framebuffer do it for us on first console
1880 * and we do not want currcon == 0 for subsequent framebuffers */
1882 ACCESS_FBINFO(fbcon).device = &ACCESS_FBINFO(pcidev)->dev;
1883 if (register_framebuffer(&ACCESS_FBINFO(fbcon)) < 0) {
1886 printk("fb%d: %s frame buffer device\n",
1887 ACCESS_FBINFO(fbcon.node), ACCESS_FBINFO(fbcon.fix.id));
1889 /* there is no console on this fb... but we have to initialize hardware
1890 * until someone tells me what is proper thing to do */
1891 if (!ACCESS_FBINFO(initialized)) {
1892 printk(KERN_INFO "fb%d: initializing hardware\n",
1893 ACCESS_FBINFO(fbcon.node));
1894 /* We have to use FB_ACTIVATE_FORCE, as we had to put vesafb_defined to the fbcon.var
1895 * already before, so register_framebuffer works correctly. */
1896 vesafb_defined.activate |= FB_ACTIVATE_FORCE;
1897 fb_set_var(&ACCESS_FBINFO(fbcon), &vesafb_defined);
1902 matroxfb_g450_shutdown(PMINFO2);
1903 mga_iounmap(ACCESS_FBINFO(video.vbase));
1905 mga_iounmap(ACCESS_FBINFO(mmio.vbase));
1907 release_mem_region(video_base_phys, ACCESS_FBINFO(video.len_maximum));
1909 release_mem_region(ctrlptr_phys, 16384);
1914 static LIST_HEAD(matroxfb_list);
1915 static LIST_HEAD(matroxfb_driver_list);
1917 #define matroxfb_l(x) list_entry(x, struct matrox_fb_info, next_fb)
1918 #define matroxfb_driver_l(x) list_entry(x, struct matroxfb_driver, node)
1919 int matroxfb_register_driver(struct matroxfb_driver* drv) {
1920 struct matrox_fb_info* minfo;
1922 list_add(&drv->node, &matroxfb_driver_list);
1923 for (minfo = matroxfb_l(matroxfb_list.next);
1924 minfo != matroxfb_l(&matroxfb_list);
1925 minfo = matroxfb_l(minfo->next_fb.next)) {
1928 if (minfo->drivers_count == MATROXFB_MAX_FB_DRIVERS)
1930 p = drv->probe(minfo);
1932 minfo->drivers_data[minfo->drivers_count] = p;
1933 minfo->drivers[minfo->drivers_count++] = drv;
1939 void matroxfb_unregister_driver(struct matroxfb_driver* drv) {
1940 struct matrox_fb_info* minfo;
1942 list_del(&drv->node);
1943 for (minfo = matroxfb_l(matroxfb_list.next);
1944 minfo != matroxfb_l(&matroxfb_list);
1945 minfo = matroxfb_l(minfo->next_fb.next)) {
1948 for (i = 0; i < minfo->drivers_count; ) {
1949 if (minfo->drivers[i] == drv) {
1950 if (drv && drv->remove)
1951 drv->remove(minfo, minfo->drivers_data[i]);
1952 minfo->drivers[i] = minfo->drivers[--minfo->drivers_count];
1953 minfo->drivers_data[i] = minfo->drivers_data[minfo->drivers_count];
1960 static void matroxfb_register_device(struct matrox_fb_info* minfo) {
1961 struct matroxfb_driver* drv;
1963 list_add(&ACCESS_FBINFO(next_fb), &matroxfb_list);
1964 for (drv = matroxfb_driver_l(matroxfb_driver_list.next);
1965 drv != matroxfb_driver_l(&matroxfb_driver_list);
1966 drv = matroxfb_driver_l(drv->node.next)) {
1967 if (drv && drv->probe) {
1968 void *p = drv->probe(minfo);
1970 minfo->drivers_data[i] = p;
1971 minfo->drivers[i++] = drv;
1972 if (i == MATROXFB_MAX_FB_DRIVERS)
1977 minfo->drivers_count = i;
1980 static void matroxfb_unregister_device(struct matrox_fb_info* minfo) {
1983 list_del(&ACCESS_FBINFO(next_fb));
1984 for (i = 0; i < minfo->drivers_count; i++) {
1985 struct matroxfb_driver* drv = minfo->drivers[i];
1987 if (drv && drv->remove)
1988 drv->remove(minfo, minfo->drivers_data[i]);
1992 static int matroxfb_probe(struct pci_dev* pdev, const struct pci_device_id* dummy) {
1997 struct matrox_fb_info* minfo;
2000 #ifndef CONFIG_FB_MATROX_MULTIHEAD
2001 static int registered = 0;
2005 pci_read_config_byte(pdev, PCI_REVISION_ID, &rev);
2006 svid = pdev->subsystem_vendor;
2007 sid = pdev->subsystem_device;
2008 for (b = dev_list; b->vendor; b++) {
2009 if ((b->vendor != pdev->vendor) || (b->device != pdev->device) || (b->rev < rev)) continue;
2011 if ((b->svid != svid) || (b->sid != sid)) continue;
2018 /* not requested one... */
2022 pci_read_config_dword(pdev, PCI_COMMAND, &cmd);
2023 if (pci_enable_device(pdev)) {
2027 #ifdef CONFIG_FB_MATROX_MULTIHEAD
2028 minfo = (struct matrox_fb_info*)kmalloc(sizeof(*minfo), GFP_KERNEL);
2032 if (registered) /* singlehead driver... */
2034 minfo = &matroxfb_global_mxinfo;
2036 memset(MINFO, 0, sizeof(*MINFO));
2038 ACCESS_FBINFO(pcidev) = pdev;
2039 ACCESS_FBINFO(dead) = 0;
2040 ACCESS_FBINFO(usecount) = 0;
2041 ACCESS_FBINFO(userusecount) = 0;
2043 pci_set_drvdata(pdev, MINFO);
2045 ACCESS_FBINFO(devflags.memtype) = memtype;
2048 if (cmd & PCI_COMMAND_MEMORY) {
2049 ACCESS_FBINFO(devflags.novga) = novga;
2050 ACCESS_FBINFO(devflags.nobios) = nobios;
2051 ACCESS_FBINFO(devflags.noinit) = noinit;
2052 /* subsequent heads always needs initialization and must not enable BIOS */
2057 ACCESS_FBINFO(devflags.novga) = 1;
2058 ACCESS_FBINFO(devflags.nobios) = 1;
2059 ACCESS_FBINFO(devflags.noinit) = 0;
2062 ACCESS_FBINFO(devflags.nopciretry) = no_pci_retry;
2063 ACCESS_FBINFO(devflags.mga_24bpp_fix) = inv24;
2064 ACCESS_FBINFO(devflags.precise_width) = option_precise_width;
2065 ACCESS_FBINFO(devflags.sgram) = sgram;
2066 ACCESS_FBINFO(capable.cross4MB) = cross4MB;
2068 spin_lock_init(&ACCESS_FBINFO(lock.DAC));
2069 spin_lock_init(&ACCESS_FBINFO(lock.accel));
2070 init_rwsem(&ACCESS_FBINFO(crtc2.lock));
2071 init_rwsem(&ACCESS_FBINFO(altout.lock));
2072 ACCESS_FBINFO(irq_flags) = 0;
2073 init_waitqueue_head(&ACCESS_FBINFO(crtc1.vsync.wait));
2074 init_waitqueue_head(&ACCESS_FBINFO(crtc2.vsync.wait));
2075 ACCESS_FBINFO(crtc1.panpos) = -1;
2077 err = initMatrox2(PMINFO b);
2079 #ifndef CONFIG_FB_MATROX_MULTIHEAD
2082 matroxfb_register_device(MINFO);
2085 #ifdef CONFIG_FB_MATROX_MULTIHEAD
2091 static void pci_remove_matrox(struct pci_dev* pdev) {
2092 struct matrox_fb_info* minfo;
2094 minfo = pci_get_drvdata(pdev);
2095 matroxfb_remove(PMINFO 1);
2098 static struct pci_device_id matroxfb_devices[] = {
2099 #ifdef CONFIG_FB_MATROX_MILLENIUM
2100 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MIL,
2101 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
2102 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MIL_2,
2103 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
2104 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MIL_2_AGP,
2105 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
2107 #ifdef CONFIG_FB_MATROX_MYSTIQUE
2108 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MYS,
2109 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
2111 #ifdef CONFIG_FB_MATROX_G
2112 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G100_MM,
2113 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
2114 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G100_AGP,
2115 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
2116 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_PCI,
2117 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
2118 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_AGP,
2119 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
2120 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G400,
2121 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
2122 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G550,
2123 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
2129 MODULE_DEVICE_TABLE(pci, matroxfb_devices);
2132 static struct pci_driver matroxfb_driver = {
2134 .id_table = matroxfb_devices,
2135 .probe = matroxfb_probe,
2136 .remove = pci_remove_matrox,
2139 /* **************************** init-time only **************************** */
2141 #define RSResolution(X) ((X) & 0x0F)
2145 #define RS1024x768 4
2146 #define RS1280x1024 5
2147 #define RS1600x1200 6
2150 #define RS1152x864 9
2151 #define RS1408x1056 10
2152 #define RS640x350 11
2153 #define RS1056x344 12 /* 132 x 43 text */
2154 #define RS1056x400 13 /* 132 x 50 text */
2155 #define RS1056x480 14 /* 132 x 60 text */
2158 static struct { int xres, yres, left, right, upper, lower, hslen, vslen, vfreq; } timmings[] __initdata = {
2159 { 640, 400, 48, 16, 39, 8, 96, 2, 70 },
2160 { 640, 480, 48, 16, 33, 10, 96, 2, 60 },
2161 { 800, 600, 144, 24, 28, 8, 112, 6, 60 },
2162 { 1024, 768, 160, 32, 30, 4, 128, 4, 60 },
2163 { 1280, 1024, 224, 32, 32, 4, 136, 4, 60 },
2164 { 1600, 1200, 272, 48, 32, 5, 152, 5, 60 },
2165 { 768, 576, 144, 16, 28, 6, 112, 4, 60 },
2166 { 960, 720, 144, 24, 28, 8, 112, 4, 60 },
2167 { 1152, 864, 192, 32, 30, 4, 128, 4, 60 },
2168 { 1408, 1056, 256, 40, 32, 5, 144, 5, 60 },
2169 { 640, 350, 48, 16, 39, 8, 96, 2, 70 },
2170 { 1056, 344, 96, 24, 59, 44, 160, 2, 70 },
2171 { 1056, 400, 96, 24, 39, 8, 160, 2, 70 },
2172 { 1056, 480, 96, 24, 36, 12, 160, 3, 60 },
2173 { 0, 0, ~0, ~0, ~0, ~0, 0, 0, 0 }
2176 #define RSCreate(X,Y) ((X) | ((Y) << 8))
2177 static struct { unsigned int vesa; unsigned int info; } *RSptr, vesamap[] __initdata = {
2178 /* default must be first */
2179 { ~0, RSCreate(RSNoxNo, RS8bpp ) },
2180 { 0x101, RSCreate(RS640x480, RS8bpp ) },
2181 { 0x100, RSCreate(RS640x400, RS8bpp ) },
2182 { 0x180, RSCreate(RS768x576, RS8bpp ) },
2183 { 0x103, RSCreate(RS800x600, RS8bpp ) },
2184 { 0x188, RSCreate(RS960x720, RS8bpp ) },
2185 { 0x105, RSCreate(RS1024x768, RS8bpp ) },
2186 { 0x190, RSCreate(RS1152x864, RS8bpp ) },
2187 { 0x107, RSCreate(RS1280x1024, RS8bpp ) },
2188 { 0x198, RSCreate(RS1408x1056, RS8bpp ) },
2189 { 0x11C, RSCreate(RS1600x1200, RS8bpp ) },
2190 { 0x110, RSCreate(RS640x480, RS15bpp) },
2191 { 0x181, RSCreate(RS768x576, RS15bpp) },
2192 { 0x113, RSCreate(RS800x600, RS15bpp) },
2193 { 0x189, RSCreate(RS960x720, RS15bpp) },
2194 { 0x116, RSCreate(RS1024x768, RS15bpp) },
2195 { 0x191, RSCreate(RS1152x864, RS15bpp) },
2196 { 0x119, RSCreate(RS1280x1024, RS15bpp) },
2197 { 0x199, RSCreate(RS1408x1056, RS15bpp) },
2198 { 0x11D, RSCreate(RS1600x1200, RS15bpp) },
2199 { 0x111, RSCreate(RS640x480, RS16bpp) },
2200 { 0x182, RSCreate(RS768x576, RS16bpp) },
2201 { 0x114, RSCreate(RS800x600, RS16bpp) },
2202 { 0x18A, RSCreate(RS960x720, RS16bpp) },
2203 { 0x117, RSCreate(RS1024x768, RS16bpp) },
2204 { 0x192, RSCreate(RS1152x864, RS16bpp) },
2205 { 0x11A, RSCreate(RS1280x1024, RS16bpp) },
2206 { 0x19A, RSCreate(RS1408x1056, RS16bpp) },
2207 { 0x11E, RSCreate(RS1600x1200, RS16bpp) },
2208 { 0x1B2, RSCreate(RS640x480, RS24bpp) },
2209 { 0x184, RSCreate(RS768x576, RS24bpp) },
2210 { 0x1B5, RSCreate(RS800x600, RS24bpp) },
2211 { 0x18C, RSCreate(RS960x720, RS24bpp) },
2212 { 0x1B8, RSCreate(RS1024x768, RS24bpp) },
2213 { 0x194, RSCreate(RS1152x864, RS24bpp) },
2214 { 0x1BB, RSCreate(RS1280x1024, RS24bpp) },
2215 { 0x19C, RSCreate(RS1408x1056, RS24bpp) },
2216 { 0x1BF, RSCreate(RS1600x1200, RS24bpp) },
2217 { 0x112, RSCreate(RS640x480, RS32bpp) },
2218 { 0x183, RSCreate(RS768x576, RS32bpp) },
2219 { 0x115, RSCreate(RS800x600, RS32bpp) },
2220 { 0x18B, RSCreate(RS960x720, RS32bpp) },
2221 { 0x118, RSCreate(RS1024x768, RS32bpp) },
2222 { 0x193, RSCreate(RS1152x864, RS32bpp) },
2223 { 0x11B, RSCreate(RS1280x1024, RS32bpp) },
2224 { 0x19B, RSCreate(RS1408x1056, RS32bpp) },
2225 { 0x11F, RSCreate(RS1600x1200, RS32bpp) },
2226 { 0x010, RSCreate(RS640x350, RS4bpp ) },
2227 { 0x012, RSCreate(RS640x480, RS4bpp ) },
2228 { 0x102, RSCreate(RS800x600, RS4bpp ) },
2229 { 0x104, RSCreate(RS1024x768, RS4bpp ) },
2230 { 0x106, RSCreate(RS1280x1024, RS4bpp ) },
2233 static void __init matroxfb_init_params(void) {
2234 /* fh from kHz to Hz */
2236 fh *= 1000; /* 1kHz minimum */
2238 if (maxclk < 1000) maxclk *= 1000; /* kHz -> Hz, MHz -> kHz */
2239 if (maxclk < 1000000) maxclk *= 1000; /* kHz -> Hz, 1MHz minimum */
2240 /* fix VESA number */
2242 vesa &= 0x1DFF; /* mask out clearscreen, acceleration and so on */
2244 /* static settings */
2245 for (RSptr = vesamap; RSptr->vesa; RSptr++) {
2246 if (RSptr->vesa == vesa) break;
2249 printk(KERN_ERR "Invalid vesa mode 0x%04X\n", vesa);
2253 int res = RSResolution(RSptr->info)-1;
2255 left = timmings[res].left;
2257 xres = timmings[res].xres;
2259 right = timmings[res].right;
2261 hslen = timmings[res].hslen;
2263 upper = timmings[res].upper;
2265 yres = timmings[res].yres;
2267 lower = timmings[res].lower;
2269 vslen = timmings[res].vslen;
2270 if (!(fv||fh||maxclk||pixclock))
2271 fv = timmings[res].vfreq;
2273 depth = RSDepth(RSptr->info);
2277 static void __init matrox_init(void) {
2278 matroxfb_init_params();
2279 pci_register_driver(&matroxfb_driver);
2280 dev = -1; /* accept all new devices... */
2283 /* **************************** exit-time only **************************** */
2285 static void __exit matrox_done(void) {
2286 pci_unregister_driver(&matroxfb_driver);
2291 /* ************************* init in-kernel code ************************** */
2293 static int __init matroxfb_setup(char *options) {
2298 if (!options || !*options)
2301 while ((this_opt = strsep(&options, ",")) != NULL) {
2302 if (!*this_opt) continue;
2304 dprintk("matroxfb_setup: option %s\n", this_opt);
2306 if (!strncmp(this_opt, "dev:", 4))
2307 dev = simple_strtoul(this_opt+4, NULL, 0);
2308 else if (!strncmp(this_opt, "depth:", 6)) {
2309 switch (simple_strtoul(this_opt+6, NULL, 0)) {
2310 case 0: depth = RSText; break;
2311 case 4: depth = RS4bpp; break;
2312 case 8: depth = RS8bpp; break;
2313 case 15:depth = RS15bpp; break;
2314 case 16:depth = RS16bpp; break;
2315 case 24:depth = RS24bpp; break;
2316 case 32:depth = RS32bpp; break;
2318 printk(KERN_ERR "matroxfb: unsupported color depth\n");
2320 } else if (!strncmp(this_opt, "xres:", 5))
2321 xres = simple_strtoul(this_opt+5, NULL, 0);
2322 else if (!strncmp(this_opt, "yres:", 5))
2323 yres = simple_strtoul(this_opt+5, NULL, 0);
2324 else if (!strncmp(this_opt, "vslen:", 6))
2325 vslen = simple_strtoul(this_opt+6, NULL, 0);
2326 else if (!strncmp(this_opt, "hslen:", 6))
2327 hslen = simple_strtoul(this_opt+6, NULL, 0);
2328 else if (!strncmp(this_opt, "left:", 5))
2329 left = simple_strtoul(this_opt+5, NULL, 0);
2330 else if (!strncmp(this_opt, "right:", 6))
2331 right = simple_strtoul(this_opt+6, NULL, 0);
2332 else if (!strncmp(this_opt, "upper:", 6))
2333 upper = simple_strtoul(this_opt+6, NULL, 0);
2334 else if (!strncmp(this_opt, "lower:", 6))
2335 lower = simple_strtoul(this_opt+6, NULL, 0);
2336 else if (!strncmp(this_opt, "pixclock:", 9))
2337 pixclock = simple_strtoul(this_opt+9, NULL, 0);
2338 else if (!strncmp(this_opt, "sync:", 5))
2339 sync = simple_strtoul(this_opt+5, NULL, 0);
2340 else if (!strncmp(this_opt, "vesa:", 5))
2341 vesa = simple_strtoul(this_opt+5, NULL, 0);
2342 else if (!strncmp(this_opt, "maxclk:", 7))
2343 maxclk = simple_strtoul(this_opt+7, NULL, 0);
2344 else if (!strncmp(this_opt, "fh:", 3))
2345 fh = simple_strtoul(this_opt+3, NULL, 0);
2346 else if (!strncmp(this_opt, "fv:", 3))
2347 fv = simple_strtoul(this_opt+3, NULL, 0);
2348 else if (!strncmp(this_opt, "mem:", 4))
2349 mem = simple_strtoul(this_opt+4, NULL, 0);
2350 else if (!strncmp(this_opt, "mode:", 5))
2351 strlcpy(videomode, this_opt+5, sizeof(videomode));
2352 else if (!strncmp(this_opt, "outputs:", 8))
2353 strlcpy(outputs, this_opt+8, sizeof(outputs));
2354 else if (!strncmp(this_opt, "dfp:", 4)) {
2355 dfp_type = simple_strtoul(this_opt+4, NULL, 0);
2358 #ifdef CONFIG_PPC_PMAC
2359 else if (!strncmp(this_opt, "vmode:", 6)) {
2360 unsigned int vmode = simple_strtoul(this_opt+6, NULL, 0);
2361 if (vmode > 0 && vmode <= VMODE_MAX)
2362 default_vmode = vmode;
2363 } else if (!strncmp(this_opt, "cmode:", 6)) {
2364 unsigned int cmode = simple_strtoul(this_opt+6, NULL, 0);
2368 default_cmode = CMODE_8;
2372 default_cmode = CMODE_16;
2376 default_cmode = CMODE_32;
2381 else if (!strcmp(this_opt, "disabled")) /* nodisabled does not exist */
2383 else if (!strcmp(this_opt, "enabled")) /* noenabled does not exist */
2385 else if (!strcmp(this_opt, "sgram")) /* nosgram == sdram */
2387 else if (!strcmp(this_opt, "sdram"))
2389 else if (!strncmp(this_opt, "memtype:", 8))
2390 memtype = simple_strtoul(this_opt+8, NULL, 0);
2394 if (!strncmp(this_opt, "no", 2)) {
2398 if (! strcmp(this_opt, "inverse"))
2400 else if (!strcmp(this_opt, "accel"))
2402 else if (!strcmp(this_opt, "pan"))
2404 else if (!strcmp(this_opt, "pciretry"))
2405 no_pci_retry = !value;
2406 else if (!strcmp(this_opt, "vga"))
2408 else if (!strcmp(this_opt, "bios"))
2410 else if (!strcmp(this_opt, "init"))
2413 else if (!strcmp(this_opt, "mtrr"))
2416 else if (!strcmp(this_opt, "inv24"))
2418 else if (!strcmp(this_opt, "cross4MB"))
2420 else if (!strcmp(this_opt, "grayscale"))
2422 else if (!strcmp(this_opt, "dfp"))
2425 strlcpy(videomode, this_opt, sizeof(videomode));
2432 static int __initdata initialized = 0;
2434 static int __init matroxfb_init(void)
2436 char *option = NULL;
2440 if (fb_get_options("matroxfb", &option))
2442 matroxfb_setup(option);
2451 /* never return failure, user can hotplug matrox later... */
2455 module_init(matroxfb_init);
2459 /* *************************** init module code **************************** */
2461 MODULE_AUTHOR("(c) 1998-2002 Petr Vandrovec <vandrove@vc.cvut.cz>");
2462 MODULE_DESCRIPTION("Accelerated FBDev driver for Matrox Millennium/Mystique/G100/G200/G400/G450/G550");
2463 MODULE_LICENSE("GPL");
2465 module_param(mem, int, 0);
2466 MODULE_PARM_DESC(mem, "Size of available memory in MB, KB or B (2,4,8,12,16MB, default=autodetect)");
2467 module_param(disabled, int, 0);
2468 MODULE_PARM_DESC(disabled, "Disabled (0 or 1=disabled) (default=0)");
2469 module_param(noaccel, int, 0);
2470 MODULE_PARM_DESC(noaccel, "Do not use accelerating engine (0 or 1=disabled) (default=0)");
2471 module_param(nopan, int, 0);
2472 MODULE_PARM_DESC(nopan, "Disable pan on startup (0 or 1=disabled) (default=0)");
2473 module_param(no_pci_retry, int, 0);
2474 MODULE_PARM_DESC(no_pci_retry, "PCI retries enabled (0 or 1=disabled) (default=0)");
2475 module_param(novga, int, 0);
2476 MODULE_PARM_DESC(novga, "VGA I/O (0x3C0-0x3DF) disabled (0 or 1=disabled) (default=0)");
2477 module_param(nobios, int, 0);
2478 MODULE_PARM_DESC(nobios, "Disables ROM BIOS (0 or 1=disabled) (default=do not change BIOS state)");
2479 module_param(noinit, int, 0);
2480 MODULE_PARM_DESC(noinit, "Disables W/SG/SD-RAM and bus interface initialization (0 or 1=do not initialize) (default=0)");
2481 module_param(memtype, int, 0);
2482 MODULE_PARM_DESC(memtype, "Memory type for G200/G400 (see Documentation/fb/matroxfb.txt for explanation) (default=3 for G200, 0 for G400)");
2484 module_param(mtrr, int, 0);
2485 MODULE_PARM_DESC(mtrr, "This speeds up video memory accesses (0=disabled or 1) (default=1)");
2487 module_param(sgram, int, 0);
2488 MODULE_PARM_DESC(sgram, "Indicates that G100/G200/G400 has SGRAM memory (0=SDRAM, 1=SGRAM) (default=0)");
2489 module_param(inv24, int, 0);
2490 MODULE_PARM_DESC(inv24, "Inverts clock polarity for 24bpp and loop frequency > 100MHz (default=do not invert polarity)");
2491 module_param(inverse, int, 0);
2492 MODULE_PARM_DESC(inverse, "Inverse (0 or 1) (default=0)");
2493 #ifdef CONFIG_FB_MATROX_MULTIHEAD
2494 module_param(dev, int, 0);
2495 MODULE_PARM_DESC(dev, "Multihead support, attach to device ID (0..N) (default=all working)");
2497 module_param(dev, int, 0);
2498 MODULE_PARM_DESC(dev, "Multihead support, attach to device ID (0..N) (default=first working)");
2500 module_param(vesa, int, 0);
2501 MODULE_PARM_DESC(vesa, "Startup videomode (0x000-0x1FF) (default=0x101)");
2502 module_param(xres, int, 0);
2503 MODULE_PARM_DESC(xres, "Horizontal resolution (px), overrides xres from vesa (default=vesa)");
2504 module_param(yres, int, 0);
2505 MODULE_PARM_DESC(yres, "Vertical resolution (scans), overrides yres from vesa (default=vesa)");
2506 module_param(upper, int, 0);
2507 MODULE_PARM_DESC(upper, "Upper blank space (scans), overrides upper from vesa (default=vesa)");
2508 module_param(lower, int, 0);
2509 MODULE_PARM_DESC(lower, "Lower blank space (scans), overrides lower from vesa (default=vesa)");
2510 module_param(vslen, int, 0);
2511 MODULE_PARM_DESC(vslen, "Vertical sync length (scans), overrides lower from vesa (default=vesa)");
2512 module_param(left, int, 0);
2513 MODULE_PARM_DESC(left, "Left blank space (px), overrides left from vesa (default=vesa)");
2514 module_param(right, int, 0);
2515 MODULE_PARM_DESC(right, "Right blank space (px), overrides right from vesa (default=vesa)");
2516 module_param(hslen, int, 0);
2517 MODULE_PARM_DESC(hslen, "Horizontal sync length (px), overrides hslen from vesa (default=vesa)");
2518 module_param(pixclock, int, 0);
2519 MODULE_PARM_DESC(pixclock, "Pixelclock (ns), overrides pixclock from vesa (default=vesa)");
2520 module_param(sync, int, 0);
2521 MODULE_PARM_DESC(sync, "Sync polarity, overrides sync from vesa (default=vesa)");
2522 module_param(depth, int, 0);
2523 MODULE_PARM_DESC(depth, "Color depth (0=text,8,15,16,24,32) (default=vesa)");
2524 module_param(maxclk, int, 0);
2525 MODULE_PARM_DESC(maxclk, "Startup maximal clock, 0-999MHz, 1000-999999kHz, 1000000-INF Hz");
2526 module_param(fh, int, 0);
2527 MODULE_PARM_DESC(fh, "Startup horizontal frequency, 0-999kHz, 1000-INF Hz");
2528 module_param(fv, int, 0);
2529 MODULE_PARM_DESC(fv, "Startup vertical frequency, 0-INF Hz\n"
2530 "You should specify \"fv:max_monitor_vsync,fh:max_monitor_hsync,maxclk:max_monitor_dotclock\"\n");
2531 module_param(grayscale, int, 0);
2532 MODULE_PARM_DESC(grayscale, "Sets display into grayscale. Works perfectly with paletized videomode (4, 8bpp), some limitations apply to 16, 24 and 32bpp videomodes (default=nograyscale)");
2533 module_param(cross4MB, int, 0);
2534 MODULE_PARM_DESC(cross4MB, "Specifies that 4MB boundary can be in middle of line. (default=autodetected)");
2535 module_param(dfp, int, 0);
2536 MODULE_PARM_DESC(dfp, "Specifies whether to use digital flat panel interface of G200/G400 (0 or 1) (default=0)");
2537 module_param(dfp_type, int, 0);
2538 MODULE_PARM_DESC(dfp_type, "Specifies DFP interface type (0 to 255) (default=read from hardware)");
2539 module_param_string(outputs, outputs, sizeof(outputs), 0);
2540 MODULE_PARM_DESC(outputs, "Specifies which CRTC is mapped to which output (string of up to three letters, consisting of 0 (disabled), 1 (CRTC1), 2 (CRTC2)) (default=111 for Gx50, 101 for G200/G400 with DFP, and 100 for all other devices)");
2541 #ifdef CONFIG_PPC_PMAC
2542 module_param_named(vmode, default_vmode, int, 0);
2543 MODULE_PARM_DESC(vmode, "Specify the vmode mode number that should be used (640x480 default)");
2544 module_param_named(cmode, default_cmode, int, 0);
2545 MODULE_PARM_DESC(cmode, "Specify the video depth that should be used (8bit default)");
2548 int __init init_module(void){
2557 else if (depth == 4)
2559 else if (depth == 8)
2561 else if (depth == 15)
2563 else if (depth == 16)
2565 else if (depth == 24)
2567 else if (depth == 32)
2569 else if (depth != -1) {
2570 printk(KERN_ERR "matroxfb: depth %d is not supported, using default\n", depth);
2574 /* never return failure; user can hotplug matrox later... */
2579 module_exit(matrox_done);
2580 EXPORT_SYMBOL(matroxfb_register_driver);
2581 EXPORT_SYMBOL(matroxfb_unregister_driver);
2582 EXPORT_SYMBOL(matroxfb_wait_for_sync);
2583 EXPORT_SYMBOL(matroxfb_enable_irq);
2586 * Overrides for Emacs so that we follow Linus's tabbing style.
2587 * ---------------------------------------------------------------------------