2 * ATI Frame Buffer Device Driver Core Definitions
5 #include <linux/config.h>
6 #include <linux/spinlock.h>
7 #include <linux/wait.h>
9 * Elements of the hardware specific atyfb_par structure
25 u32 dp_pix_width; /* acceleration */
26 u32 dp_chain_mask; /* acceleration */
27 #ifdef CONFIG_FB_ATY_GENERIC_LCD
31 u32 shadow_h_tot_disp;
32 u32 shadow_h_sync_strt_wid;
33 u32 shadow_v_tot_disp;
34 u32 shadow_v_sync_strt_wid;
41 struct aty_interrupt {
42 wait_queue_head_t wait;
50 int sclk, mclk, mclk_pm, xclk;
68 } __attribute__ ((packed)) PLL_BLOCK_MACH64;
86 u8 mclk_fb_mult; /* 2 ro 4 */
94 u32 dsp_config; /* Mach64 GTB DSP */
95 u32 dsp_on_off; /* Mach64 GTB DSP */
98 u32 xclkpagefaultdelay;
102 u8 mclk_post_div_real;
103 u8 xclk_post_div_real;
104 u8 vclk_post_div_real;
106 #ifdef CONFIG_FB_ATY_GENERIC_LCD
107 u32 xres; /* use for LCD stretching/scaling */
114 #define DONT_USE_SPLL 0x1
115 #define DONT_USE_XDLL 0x2
116 #define USE_CPUCLK 0x4
117 #define POWERDOWN_PLL 0x8
121 struct pll_514 ibm514;
122 struct pll_18818 ics2595;
126 * The hardware parameters for each card
130 struct aty_cmap_regs __iomem *aty_cmap_regs;
131 struct { u8 red, green, blue; } palette[256];
132 const struct aty_dac_ops *dac_ops;
133 const struct aty_pll_ops *pll_ops;
134 void __iomem *ati_regbase;
135 unsigned long clk_wr_offset; /* meaning overloaded, clock id by CT */
138 struct pll_info pll_limits;
149 int blitter_may_be_busy;
152 unsigned long res_start;
153 unsigned long res_size;
154 struct pci_dev *pdev;
156 struct pci_mmap_map *mmap_map;
160 #ifdef CONFIG_FB_ATY_GENERIC_LCD
161 unsigned long bios_base_phys;
162 unsigned long bios_base;
163 unsigned long lcd_table;
175 u16 lcd_right_margin;
176 u16 lcd_lower_margin;
180 unsigned long aux_start; /* auxiliary aperture */
181 unsigned long aux_size;
182 struct aty_interrupt vblank;
183 unsigned long irq_flags;
193 * ATI Mach64 features
196 #define M64_HAS(feature) ((par)->features & (M64F_##feature))
198 #define M64F_RESET_3D 0x00000001
199 #define M64F_MAGIC_FIFO 0x00000002
200 #define M64F_GTB_DSP 0x00000004
201 #define M64F_FIFO_32 0x00000008
202 #define M64F_SDRAM_MAGIC_PLL 0x00000010
203 #define M64F_MAGIC_POSTDIV 0x00000020
204 #define M64F_INTEGRATED 0x00000040
205 #define M64F_CT_BUS 0x00000080
206 #define M64F_VT_BUS 0x00000100
207 #define M64F_MOBIL_BUS 0x00000200
208 #define M64F_GX 0x00000400
209 #define M64F_CT 0x00000800
210 #define M64F_VT 0x00001000
211 #define M64F_GT 0x00002000
212 #define M64F_MAGIC_VRAM_SIZE 0x00004000
213 #define M64F_G3_PB_1_1 0x00008000
214 #define M64F_G3_PB_1024x768 0x00010000
215 #define M64F_EXTRA_BRIGHT 0x00020000
216 #define M64F_LT_LCD_REGS 0x00040000
217 #define M64F_XL_DLL 0x00080000
218 #define M64F_MFB_FORCE_4 0x00100000
219 #define M64F_HW_TRIPLE 0x00200000
224 static inline u32 aty_ld_le32(int regindex, const struct atyfb_par *par)
226 /* Hack for bloc 1, should be cleanly optimized by compiler */
227 if (regindex >= 0x400)
231 return in_le32((volatile u32 *)(par->ati_regbase + regindex));
233 return readl(par->ati_regbase + regindex);
237 static inline void aty_st_le32(int regindex, u32 val, const struct atyfb_par *par)
239 /* Hack for bloc 1, should be cleanly optimized by compiler */
240 if (regindex >= 0x400)
244 out_le32((volatile u32 *)(par->ati_regbase + regindex), val);
246 writel(val, par->ati_regbase + regindex);
250 static inline void aty_st_le16(int regindex, u16 val,
251 const struct atyfb_par *par)
253 /* Hack for bloc 1, should be cleanly optimized by compiler */
254 if (regindex >= 0x400)
257 out_le16((volatile u16 *)(par->ati_regbase + regindex), val);
259 writel(val, par->ati_regbase + regindex);
263 static inline u8 aty_ld_8(int regindex, const struct atyfb_par *par)
265 /* Hack for bloc 1, should be cleanly optimized by compiler */
266 if (regindex >= 0x400)
269 return in_8(par->ati_regbase + regindex);
271 return readb(par->ati_regbase + regindex);
275 static inline void aty_st_8(int regindex, u8 val, const struct atyfb_par *par)
277 /* Hack for bloc 1, should be cleanly optimized by compiler */
278 if (regindex >= 0x400)
282 out_8(par->ati_regbase + regindex, val);
284 writeb(val, par->ati_regbase + regindex);
288 #if defined(CONFIG_PM) || defined(CONFIG_PMAC_BACKLIGHT) || defined (CONFIG_FB_ATY_GENERIC_LCD)
289 extern void aty_st_lcd(int index, u32 val, const struct atyfb_par *par);
290 extern u32 aty_ld_lcd(int index, const struct atyfb_par *par);
298 int (*set_dac) (const struct fb_info * info,
299 const union aty_pll * pll, u32 bpp, u32 accel);
302 extern const struct aty_dac_ops aty_dac_ibm514; /* IBM RGB514 */
303 extern const struct aty_dac_ops aty_dac_ati68860b; /* ATI 68860-B */
304 extern const struct aty_dac_ops aty_dac_att21c498; /* AT&T 21C498 */
305 extern const struct aty_dac_ops aty_dac_unsupported; /* unsupported */
306 extern const struct aty_dac_ops aty_dac_ct; /* Integrated */
314 int (*var_to_pll) (const struct fb_info * info, u32 vclk_per, u32 bpp, union aty_pll * pll);
315 u32 (*pll_to_var) (const struct fb_info * info, const union aty_pll * pll);
316 void (*set_pll) (const struct fb_info * info, const union aty_pll * pll);
317 void (*get_pll) (const struct fb_info *info, union aty_pll * pll);
318 int (*init_pll) (const struct fb_info * info, union aty_pll * pll);
321 extern const struct aty_pll_ops aty_pll_ati18818_1; /* ATI 18818 */
322 extern const struct aty_pll_ops aty_pll_stg1703; /* STG 1703 */
323 extern const struct aty_pll_ops aty_pll_ch8398; /* Chrontel 8398 */
324 extern const struct aty_pll_ops aty_pll_att20c408; /* AT&T 20C408 */
325 extern const struct aty_pll_ops aty_pll_ibm514; /* IBM RGB514 */
326 extern const struct aty_pll_ops aty_pll_unsupported; /* unsupported */
327 extern const struct aty_pll_ops aty_pll_ct; /* Integrated */
330 extern void aty_set_pll_ct(const struct fb_info *info, const union aty_pll *pll);
331 extern u8 aty_ld_pll_ct(int offset, const struct atyfb_par *par);
335 * Hardware cursor support
338 extern int aty_init_cursor(struct fb_info *info);
341 * Hardware acceleration
344 static inline void wait_for_fifo(u16 entries, const struct atyfb_par *par)
346 while ((aty_ld_le32(FIFO_STAT, par) & 0xffff) >
347 ((u32) (0x8000 >> entries)));
350 static inline void wait_for_idle(struct atyfb_par *par)
352 wait_for_fifo(16, par);
353 while ((aty_ld_le32(GUI_STAT, par) & 1) != 0);
354 par->blitter_may_be_busy = 0;
357 extern void aty_reset_engine(const struct atyfb_par *par);
358 extern void aty_init_engine(struct atyfb_par *par, struct fb_info *info);
359 extern void aty_st_pll_ct(int offset, u8 val, const struct atyfb_par *par);
360 extern u8 aty_ld_pll_ct(int offset, const struct atyfb_par *par);