2 * Universal Host Controller Interface driver for USB.
4 * Maintainer: Alan Stern <stern@rowland.harvard.edu>
6 * (C) Copyright 1999 Linus Torvalds
7 * (C) Copyright 1999-2002 Johannes Erdfelt, johannes@erdfelt.com
8 * (C) Copyright 1999 Randy Dunlap
9 * (C) Copyright 1999 Georg Acher, acher@in.tum.de
10 * (C) Copyright 1999 Deti Fliegl, deti@fliegl.de
11 * (C) Copyright 1999 Thomas Sailer, sailer@ife.ee.ethz.ch
12 * (C) Copyright 1999 Roman Weissgaerber, weissg@vienna.at
13 * (C) Copyright 2000 Yggdrasil Computing, Inc. (port of new PCI interface
14 * support from usb-ohci.c by Adam Richter, adam@yggdrasil.com).
15 * (C) Copyright 1999 Gregory P. Smith (from usb-ohci.c)
16 * (C) Copyright 2004-2007 Alan Stern, stern@rowland.harvard.edu
18 * Intel documents this fairly well, and as far as I know there
19 * are no royalties or anything like that, but even so there are
20 * people who decided that they want to do the same thing in a
21 * completely different way.
25 #include <linux/module.h>
26 #include <linux/pci.h>
27 #include <linux/kernel.h>
28 #include <linux/init.h>
29 #include <linux/delay.h>
30 #include <linux/ioport.h>
31 #include <linux/slab.h>
32 #include <linux/errno.h>
33 #include <linux/unistd.h>
34 #include <linux/interrupt.h>
35 #include <linux/spinlock.h>
36 #include <linux/debugfs.h>
38 #include <linux/dmapool.h>
39 #include <linux/dma-mapping.h>
40 #include <linux/usb.h>
41 #include <linux/bitops.h>
42 #include <linux/dmi.h>
44 #include <asm/uaccess.h>
47 #include <asm/system.h>
49 #include "../core/hcd.h"
51 #include "pci-quirks.h"
56 #define DRIVER_VERSION "v3.0"
57 #define DRIVER_AUTHOR "Linus 'Frodo Rabbit' Torvalds, Johannes Erdfelt, \
58 Randy Dunlap, Georg Acher, Deti Fliegl, Thomas Sailer, Roman Weissgaerber, \
60 #define DRIVER_DESC "USB Universal Host Controller Interface driver"
62 /* for flakey hardware, ignore overcurrent indicators */
64 module_param(ignore_oc, bool, S_IRUGO);
65 MODULE_PARM_DESC(ignore_oc, "ignore hardware overcurrent indications");
68 * debug = 0, no debugging messages
69 * debug = 1, dump failed URBs except for stalls
70 * debug = 2, dump all failed URBs (including stalls)
71 * show all queues in /debug/uhci/[pci_addr]
72 * debug = 3, show all TDs in URBs when dumping
75 #define DEBUG_CONFIGURED 1
77 module_param(debug, int, S_IRUGO | S_IWUSR);
78 MODULE_PARM_DESC(debug, "Debug level");
81 #define DEBUG_CONFIGURED 0
86 #define ERRBUF_LEN (32 * 1024)
88 static struct kmem_cache *uhci_up_cachep; /* urb_priv */
90 static void suspend_rh(struct uhci_hcd *uhci, enum uhci_rh_state new_state);
91 static void wakeup_rh(struct uhci_hcd *uhci);
92 static void uhci_get_current_frame_number(struct uhci_hcd *uhci);
95 * Calculate the link pointer DMA value for the first Skeleton QH in a frame.
97 static __le32 uhci_frame_skel_link(struct uhci_hcd *uhci, int frame)
102 * The interrupt queues will be interleaved as evenly as possible.
103 * There's not much to be done about period-1 interrupts; they have
104 * to occur in every frame. But we can schedule period-2 interrupts
105 * in odd-numbered frames, period-4 interrupts in frames congruent
106 * to 2 (mod 4), and so on. This way each frame only has two
107 * interrupt QHs, which will help spread out bandwidth utilization.
109 * ffs (Find First bit Set) does exactly what we need:
110 * 1,3,5,... => ffs = 0 => use period-2 QH = skelqh[8],
111 * 2,6,10,... => ffs = 1 => use period-4 QH = skelqh[7], etc.
112 * ffs >= 7 => not on any high-period queue, so use
113 * period-1 QH = skelqh[9].
114 * Add in UHCI_NUMFRAMES to insure at least one bit is set.
116 skelnum = 8 - (int) __ffs(frame | UHCI_NUMFRAMES);
119 return LINK_TO_QH(uhci->skelqh[skelnum]);
122 #include "uhci-debug.c"
124 #include "uhci-hub.c"
127 * Finish up a host controller reset and update the recorded state.
129 static void finish_reset(struct uhci_hcd *uhci)
133 /* HCRESET doesn't affect the Suspend, Reset, and Resume Detect
134 * bits in the port status and control registers.
135 * We have to clear them by hand.
137 for (port = 0; port < uhci->rh_numports; ++port)
138 outw(0, uhci->io_addr + USBPORTSC1 + (port * 2));
140 uhci->port_c_suspend = uhci->resuming_ports = 0;
141 uhci->rh_state = UHCI_RH_RESET;
142 uhci->is_stopped = UHCI_IS_STOPPED;
143 uhci_to_hcd(uhci)->state = HC_STATE_HALT;
144 uhci_to_hcd(uhci)->poll_rh = 0;
146 uhci->dead = 0; /* Full reset resurrects the controller */
150 * Last rites for a defunct/nonfunctional controller
151 * or one we don't want to use any more.
153 static void uhci_hc_died(struct uhci_hcd *uhci)
155 uhci_get_current_frame_number(uhci);
156 uhci_reset_hc(to_pci_dev(uhci_dev(uhci)), uhci->io_addr);
160 /* The current frame may already be partway finished */
161 ++uhci->frame_number;
165 * Initialize a controller that was newly discovered or has lost power
166 * or otherwise been reset while it was suspended. In none of these cases
167 * can we be sure of its previous state.
169 static void check_and_reset_hc(struct uhci_hcd *uhci)
171 if (uhci_check_and_reset_hc(to_pci_dev(uhci_dev(uhci)), uhci->io_addr))
176 * Store the basic register settings needed by the controller.
178 static void configure_hc(struct uhci_hcd *uhci)
180 /* Set the frame length to the default: 1 ms exactly */
181 outb(USBSOF_DEFAULT, uhci->io_addr + USBSOF);
183 /* Store the frame list base address */
184 outl(uhci->frame_dma_handle, uhci->io_addr + USBFLBASEADD);
186 /* Set the current frame number */
187 outw(uhci->frame_number & UHCI_MAX_SOF_NUMBER,
188 uhci->io_addr + USBFRNUM);
190 /* Mark controller as not halted before we enable interrupts */
191 uhci_to_hcd(uhci)->state = HC_STATE_SUSPENDED;
195 pci_write_config_word(to_pci_dev(uhci_dev(uhci)), USBLEGSUP,
200 static int resume_detect_interrupts_are_broken(struct uhci_hcd *uhci)
204 /* If we have to ignore overcurrent events then almost by definition
205 * we can't depend on resume-detect interrupts. */
209 switch (to_pci_dev(uhci_dev(uhci))->vendor) {
213 case PCI_VENDOR_ID_GENESYS:
214 /* Genesys Logic's GL880S controllers don't generate
215 * resume-detect interrupts.
219 case PCI_VENDOR_ID_INTEL:
220 /* Some of Intel's USB controllers have a bug that causes
221 * resume-detect interrupts if any port has an over-current
222 * condition. To make matters worse, some motherboards
223 * hardwire unused USB ports' over-current inputs active!
224 * To prevent problems, we will not enable resume-detect
225 * interrupts if any ports are OC.
227 for (port = 0; port < uhci->rh_numports; ++port) {
228 if (inw(uhci->io_addr + USBPORTSC1 + port * 2) &
237 static int remote_wakeup_is_broken(struct uhci_hcd *uhci)
240 const char *sys_info;
241 static char bad_Asus_board[] = "A7V8X";
243 /* One of Asus's motherboards has a bug which causes it to
244 * wake up immediately from suspend-to-RAM if any of the ports
245 * are connected. In such cases we will not set EGSM.
247 sys_info = dmi_get_system_info(DMI_BOARD_NAME);
248 if (sys_info && !strcmp(sys_info, bad_Asus_board)) {
249 for (port = 0; port < uhci->rh_numports; ++port) {
250 if (inw(uhci->io_addr + USBPORTSC1 + port * 2) &
259 static void suspend_rh(struct uhci_hcd *uhci, enum uhci_rh_state new_state)
260 __releases(uhci->lock)
261 __acquires(uhci->lock)
264 int int_enable, egsm_enable;
265 struct usb_device *rhdev = uhci_to_hcd(uhci)->self.root_hub;
267 auto_stop = (new_state == UHCI_RH_AUTO_STOPPED);
268 dev_dbg(&rhdev->dev, "%s%s\n", __func__,
269 (auto_stop ? " (auto-stop)" : ""));
271 /* Enable resume-detect interrupts if they work.
272 * Then enter Global Suspend mode if _it_ works, still configured.
274 egsm_enable = USBCMD_EGSM;
275 uhci->working_RD = 1;
276 int_enable = USBINTR_RESUME;
277 if (remote_wakeup_is_broken(uhci))
279 if (resume_detect_interrupts_are_broken(uhci) || !egsm_enable ||
281 (!auto_stop && !rhdev->do_remote_wakeup) ||
283 (auto_stop && !device_may_wakeup(&rhdev->dev)))
284 uhci->working_RD = int_enable = 0;
286 outw(int_enable, uhci->io_addr + USBINTR);
287 outw(egsm_enable | USBCMD_CF, uhci->io_addr + USBCMD);
291 /* If we're auto-stopping then no devices have been attached
292 * for a while, so there shouldn't be any active URBs and the
293 * controller should stop after a few microseconds. Otherwise
294 * we will give the controller one frame to stop.
296 if (!auto_stop && !(inw(uhci->io_addr + USBSTS) & USBSTS_HCH)) {
297 uhci->rh_state = UHCI_RH_SUSPENDING;
298 spin_unlock_irq(&uhci->lock);
300 spin_lock_irq(&uhci->lock);
304 if (!(inw(uhci->io_addr + USBSTS) & USBSTS_HCH))
305 dev_warn(uhci_dev(uhci), "Controller not stopped yet!\n");
307 uhci_get_current_frame_number(uhci);
309 uhci->rh_state = new_state;
310 uhci->is_stopped = UHCI_IS_STOPPED;
311 uhci_to_hcd(uhci)->poll_rh = !int_enable;
313 uhci_scan_schedule(uhci);
317 static void start_rh(struct uhci_hcd *uhci)
319 uhci_to_hcd(uhci)->state = HC_STATE_RUNNING;
320 uhci->is_stopped = 0;
322 /* Mark it configured and running with a 64-byte max packet.
323 * All interrupts are enabled, even though RESUME won't do anything.
325 outw(USBCMD_RS | USBCMD_CF | USBCMD_MAXP, uhci->io_addr + USBCMD);
326 outw(USBINTR_TIMEOUT | USBINTR_RESUME | USBINTR_IOC | USBINTR_SP,
327 uhci->io_addr + USBINTR);
329 uhci->rh_state = UHCI_RH_RUNNING;
330 uhci_to_hcd(uhci)->poll_rh = 1;
333 static void wakeup_rh(struct uhci_hcd *uhci)
334 __releases(uhci->lock)
335 __acquires(uhci->lock)
337 dev_dbg(&uhci_to_hcd(uhci)->self.root_hub->dev,
339 uhci->rh_state == UHCI_RH_AUTO_STOPPED ?
340 " (auto-start)" : "");
342 /* If we are auto-stopped then no devices are attached so there's
343 * no need for wakeup signals. Otherwise we send Global Resume
346 if (uhci->rh_state == UHCI_RH_SUSPENDED) {
347 uhci->rh_state = UHCI_RH_RESUMING;
348 outw(USBCMD_FGR | USBCMD_EGSM | USBCMD_CF,
349 uhci->io_addr + USBCMD);
350 spin_unlock_irq(&uhci->lock);
352 spin_lock_irq(&uhci->lock);
356 /* End Global Resume and wait for EOP to be sent */
357 outw(USBCMD_CF, uhci->io_addr + USBCMD);
360 if (inw(uhci->io_addr + USBCMD) & USBCMD_FGR)
361 dev_warn(uhci_dev(uhci), "FGR not stopped yet!\n");
366 /* Restart root hub polling */
367 mod_timer(&uhci_to_hcd(uhci)->rh_timer, jiffies);
370 static irqreturn_t uhci_irq(struct usb_hcd *hcd)
372 struct uhci_hcd *uhci = hcd_to_uhci(hcd);
373 unsigned short status;
376 * Read the interrupt status, and write it back to clear the
377 * interrupt cause. Contrary to the UHCI specification, the
378 * "HC Halted" status bit is persistent: it is RO, not R/WC.
380 status = inw(uhci->io_addr + USBSTS);
381 if (!(status & ~USBSTS_HCH)) /* shared interrupt, not mine */
383 outw(status, uhci->io_addr + USBSTS); /* Clear it */
385 if (status & ~(USBSTS_USBINT | USBSTS_ERROR | USBSTS_RD)) {
386 if (status & USBSTS_HSE)
387 dev_err(uhci_dev(uhci), "host system error, "
389 if (status & USBSTS_HCPE)
390 dev_err(uhci_dev(uhci), "host controller process "
391 "error, something bad happened!\n");
392 if (status & USBSTS_HCH) {
393 spin_lock(&uhci->lock);
394 if (uhci->rh_state >= UHCI_RH_RUNNING) {
395 dev_err(uhci_dev(uhci),
396 "host controller halted, "
398 if (debug > 1 && errbuf) {
399 /* Print the schedule for debugging */
400 uhci_sprint_schedule(uhci,
406 /* Force a callback in case there are
408 mod_timer(&hcd->rh_timer, jiffies);
410 spin_unlock(&uhci->lock);
414 if (status & USBSTS_RD)
415 usb_hcd_poll_rh_status(hcd);
417 spin_lock(&uhci->lock);
418 uhci_scan_schedule(uhci);
419 spin_unlock(&uhci->lock);
426 * Store the current frame number in uhci->frame_number if the controller
427 * is runnning. Expand from 11 bits (of which we use only 10) to a
428 * full-sized integer.
430 * Like many other parts of the driver, this code relies on being polled
431 * more than once per second as long as the controller is running.
433 static void uhci_get_current_frame_number(struct uhci_hcd *uhci)
435 if (!uhci->is_stopped) {
438 delta = (inw(uhci->io_addr + USBFRNUM) - uhci->frame_number) &
439 (UHCI_NUMFRAMES - 1);
440 uhci->frame_number += delta;
445 * De-allocate all resources
447 static void release_uhci(struct uhci_hcd *uhci)
451 if (DEBUG_CONFIGURED) {
452 spin_lock_irq(&uhci->lock);
453 uhci->is_initialized = 0;
454 spin_unlock_irq(&uhci->lock);
456 debugfs_remove(uhci->dentry);
459 for (i = 0; i < UHCI_NUM_SKELQH; i++)
460 uhci_free_qh(uhci, uhci->skelqh[i]);
462 uhci_free_td(uhci, uhci->term_td);
464 dma_pool_destroy(uhci->qh_pool);
466 dma_pool_destroy(uhci->td_pool);
468 kfree(uhci->frame_cpu);
470 dma_free_coherent(uhci_dev(uhci),
471 UHCI_NUMFRAMES * sizeof(*uhci->frame),
472 uhci->frame, uhci->frame_dma_handle);
475 static int uhci_init(struct usb_hcd *hcd)
477 struct uhci_hcd *uhci = hcd_to_uhci(hcd);
478 unsigned io_size = (unsigned) hcd->rsrc_len;
481 uhci->io_addr = (unsigned long) hcd->rsrc_start;
483 /* The UHCI spec says devices must have 2 ports, and goes on to say
484 * they may have more but gives no way to determine how many there
485 * are. However according to the UHCI spec, Bit 7 of the port
486 * status and control register is always set to 1. So we try to
487 * use this to our advantage. Another common failure mode when
488 * a nonexistent register is addressed is to return all ones, so
489 * we test for that also.
491 for (port = 0; port < (io_size - USBPORTSC1) / 2; port++) {
492 unsigned int portstatus;
494 portstatus = inw(uhci->io_addr + USBPORTSC1 + (port * 2));
495 if (!(portstatus & 0x0080) || portstatus == 0xffff)
499 dev_info(uhci_dev(uhci), "detected %d ports\n", port);
501 /* Anything greater than 7 is weird so we'll ignore it. */
502 if (port > UHCI_RH_MAXCHILD) {
503 dev_info(uhci_dev(uhci), "port count misdetected? "
504 "forcing to 2 ports\n");
507 uhci->rh_numports = port;
509 /* Kick BIOS off this hardware and reset if the controller
510 * isn't already safely quiescent.
512 check_and_reset_hc(uhci);
516 /* Make sure the controller is quiescent and that we're not using it
517 * any more. This is mainly for the benefit of programs which, like kexec,
518 * expect the hardware to be idle: not doing DMA or generating IRQs.
520 * This routine may be called in a damaged or failing kernel. Hence we
521 * do not acquire the spinlock before shutting down the controller.
523 static void uhci_shutdown(struct pci_dev *pdev)
525 struct usb_hcd *hcd = (struct usb_hcd *) pci_get_drvdata(pdev);
527 uhci_hc_died(hcd_to_uhci(hcd));
531 * Allocate a frame list, and then setup the skeleton
533 * The hardware doesn't really know any difference
534 * in the queues, but the order does matter for the
535 * protocols higher up. The order in which the queues
536 * are encountered by the hardware is:
538 * - All isochronous events are handled before any
539 * of the queues. We don't do that here, because
540 * we'll create the actual TD entries on demand.
541 * - The first queue is the high-period interrupt queue.
542 * - The second queue is the period-1 interrupt and async
543 * (low-speed control, full-speed control, then bulk) queue.
544 * - The third queue is the terminating bandwidth reclamation queue,
545 * which contains no members, loops back to itself, and is present
546 * only when FSBR is on and there are no full-speed control or bulk QHs.
548 static int uhci_start(struct usb_hcd *hcd)
550 struct uhci_hcd *uhci = hcd_to_uhci(hcd);
553 struct dentry *dentry;
555 hcd->uses_new_polling = 1;
557 spin_lock_init(&uhci->lock);
558 setup_timer(&uhci->fsbr_timer, uhci_fsbr_timeout,
559 (unsigned long) uhci);
560 INIT_LIST_HEAD(&uhci->idle_qh_list);
561 init_waitqueue_head(&uhci->waitqh);
563 if (DEBUG_CONFIGURED) {
564 dentry = debugfs_create_file(hcd->self.bus_name,
565 S_IFREG|S_IRUGO|S_IWUSR, uhci_debugfs_root,
566 uhci, &uhci_debug_operations);
568 dev_err(uhci_dev(uhci), "couldn't create uhci "
571 goto err_create_debug_entry;
573 uhci->dentry = dentry;
576 uhci->frame = dma_alloc_coherent(uhci_dev(uhci),
577 UHCI_NUMFRAMES * sizeof(*uhci->frame),
578 &uhci->frame_dma_handle, 0);
580 dev_err(uhci_dev(uhci), "unable to allocate "
581 "consistent memory for frame list\n");
582 goto err_alloc_frame;
584 memset(uhci->frame, 0, UHCI_NUMFRAMES * sizeof(*uhci->frame));
586 uhci->frame_cpu = kcalloc(UHCI_NUMFRAMES, sizeof(*uhci->frame_cpu),
588 if (!uhci->frame_cpu) {
589 dev_err(uhci_dev(uhci), "unable to allocate "
590 "memory for frame pointers\n");
591 goto err_alloc_frame_cpu;
594 uhci->td_pool = dma_pool_create("uhci_td", uhci_dev(uhci),
595 sizeof(struct uhci_td), 16, 0);
596 if (!uhci->td_pool) {
597 dev_err(uhci_dev(uhci), "unable to create td dma_pool\n");
598 goto err_create_td_pool;
601 uhci->qh_pool = dma_pool_create("uhci_qh", uhci_dev(uhci),
602 sizeof(struct uhci_qh), 16, 0);
603 if (!uhci->qh_pool) {
604 dev_err(uhci_dev(uhci), "unable to create qh dma_pool\n");
605 goto err_create_qh_pool;
608 uhci->term_td = uhci_alloc_td(uhci);
609 if (!uhci->term_td) {
610 dev_err(uhci_dev(uhci), "unable to allocate terminating TD\n");
611 goto err_alloc_term_td;
614 for (i = 0; i < UHCI_NUM_SKELQH; i++) {
615 uhci->skelqh[i] = uhci_alloc_qh(uhci, NULL, NULL);
616 if (!uhci->skelqh[i]) {
617 dev_err(uhci_dev(uhci), "unable to allocate QH\n");
618 goto err_alloc_skelqh;
623 * 8 Interrupt queues; link all higher int queues to int1 = async
625 for (i = SKEL_ISO + 1; i < SKEL_ASYNC; ++i)
626 uhci->skelqh[i]->link = LINK_TO_QH(uhci->skel_async_qh);
627 uhci->skel_async_qh->link = UHCI_PTR_TERM;
628 uhci->skel_term_qh->link = LINK_TO_QH(uhci->skel_term_qh);
630 /* This dummy TD is to work around a bug in Intel PIIX controllers */
631 uhci_fill_td(uhci->term_td, 0, uhci_explen(0) |
632 (0x7f << TD_TOKEN_DEVADDR_SHIFT) | USB_PID_IN, 0);
633 uhci->term_td->link = UHCI_PTR_TERM;
634 uhci->skel_async_qh->element = uhci->skel_term_qh->element =
635 LINK_TO_TD(uhci->term_td);
638 * Fill the frame list: make all entries point to the proper
641 for (i = 0; i < UHCI_NUMFRAMES; i++) {
643 /* Only place we don't use the frame list routines */
644 uhci->frame[i] = uhci_frame_skel_link(uhci, i);
648 * Some architectures require a full mb() to enforce completion of
649 * the memory writes above before the I/O transfers in configure_hc().
654 uhci->is_initialized = 1;
662 for (i = 0; i < UHCI_NUM_SKELQH; i++) {
664 uhci_free_qh(uhci, uhci->skelqh[i]);
667 uhci_free_td(uhci, uhci->term_td);
670 dma_pool_destroy(uhci->qh_pool);
673 dma_pool_destroy(uhci->td_pool);
676 kfree(uhci->frame_cpu);
679 dma_free_coherent(uhci_dev(uhci),
680 UHCI_NUMFRAMES * sizeof(*uhci->frame),
681 uhci->frame, uhci->frame_dma_handle);
684 debugfs_remove(uhci->dentry);
686 err_create_debug_entry:
690 static void uhci_stop(struct usb_hcd *hcd)
692 struct uhci_hcd *uhci = hcd_to_uhci(hcd);
694 spin_lock_irq(&uhci->lock);
695 if (test_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags) && !uhci->dead)
697 uhci_scan_schedule(uhci);
698 spin_unlock_irq(&uhci->lock);
700 del_timer_sync(&uhci->fsbr_timer);
705 static int uhci_rh_suspend(struct usb_hcd *hcd)
707 struct uhci_hcd *uhci = hcd_to_uhci(hcd);
710 spin_lock_irq(&uhci->lock);
711 if (!test_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags))
713 else if (!uhci->dead)
714 suspend_rh(uhci, UHCI_RH_SUSPENDED);
715 spin_unlock_irq(&uhci->lock);
719 static int uhci_rh_resume(struct usb_hcd *hcd)
721 struct uhci_hcd *uhci = hcd_to_uhci(hcd);
724 spin_lock_irq(&uhci->lock);
725 if (!test_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags))
727 else if (!uhci->dead)
729 spin_unlock_irq(&uhci->lock);
733 static int uhci_pci_suspend(struct usb_hcd *hcd, pm_message_t message)
735 struct uhci_hcd *uhci = hcd_to_uhci(hcd);
738 dev_dbg(uhci_dev(uhci), "%s\n", __func__);
740 spin_lock_irq(&uhci->lock);
741 if (!test_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags) || uhci->dead)
742 goto done_okay; /* Already suspended or dead */
744 if (uhci->rh_state > UHCI_RH_SUSPENDED) {
745 dev_warn(uhci_dev(uhci), "Root hub isn't suspended!\n");
750 /* All PCI host controllers are required to disable IRQ generation
751 * at the source, so we must turn off PIRQ.
753 pci_write_config_word(to_pci_dev(uhci_dev(uhci)), USBLEGSUP, 0);
757 /* FIXME: Enable non-PME# remote wakeup? */
759 /* make sure snapshot being resumed re-enumerates everything */
760 if (message.event == PM_EVENT_PRETHAW)
764 clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
766 spin_unlock_irq(&uhci->lock);
770 static int uhci_pci_resume(struct usb_hcd *hcd)
772 struct uhci_hcd *uhci = hcd_to_uhci(hcd);
774 dev_dbg(uhci_dev(uhci), "%s\n", __func__);
776 /* Since we aren't in D3 any more, it's safe to set this flag
777 * even if the controller was dead.
779 set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
782 spin_lock_irq(&uhci->lock);
784 /* FIXME: Disable non-PME# remote wakeup? */
786 /* The firmware or a boot kernel may have changed the controller
787 * settings during a system wakeup. Check it and reconfigure
790 check_and_reset_hc(uhci);
792 /* If the controller was dead before, it's back alive now */
795 if (uhci->rh_state == UHCI_RH_RESET) {
797 /* The controller had to be reset */
798 usb_root_hub_lost_power(hcd->self.root_hub);
799 suspend_rh(uhci, UHCI_RH_SUSPENDED);
802 spin_unlock_irq(&uhci->lock);
804 if (!uhci->working_RD) {
805 /* Suspended root hub needs to be polled */
807 usb_hcd_poll_rh_status(hcd);
813 /* Wait until a particular device/endpoint's QH is idle, and free it */
814 static void uhci_hcd_endpoint_disable(struct usb_hcd *hcd,
815 struct usb_host_endpoint *hep)
817 struct uhci_hcd *uhci = hcd_to_uhci(hcd);
820 spin_lock_irq(&uhci->lock);
821 qh = (struct uhci_qh *) hep->hcpriv;
825 while (qh->state != QH_STATE_IDLE) {
827 spin_unlock_irq(&uhci->lock);
828 wait_event_interruptible(uhci->waitqh,
829 qh->state == QH_STATE_IDLE);
830 spin_lock_irq(&uhci->lock);
834 uhci_free_qh(uhci, qh);
836 spin_unlock_irq(&uhci->lock);
839 static int uhci_hcd_get_frame_number(struct usb_hcd *hcd)
841 struct uhci_hcd *uhci = hcd_to_uhci(hcd);
842 unsigned frame_number;
845 /* Minimize latency by avoiding the spinlock */
846 frame_number = uhci->frame_number;
848 delta = (inw(uhci->io_addr + USBFRNUM) - frame_number) &
849 (UHCI_NUMFRAMES - 1);
850 return frame_number + delta;
853 static const char hcd_name[] = "uhci_hcd";
855 static const struct hc_driver uhci_driver = {
856 .description = hcd_name,
857 .product_desc = "UHCI Host Controller",
858 .hcd_priv_size = sizeof(struct uhci_hcd),
860 /* Generic hardware linkage */
864 /* Basic lifecycle operations */
868 .pci_suspend = uhci_pci_suspend,
869 .pci_resume = uhci_pci_resume,
870 .bus_suspend = uhci_rh_suspend,
871 .bus_resume = uhci_rh_resume,
875 .urb_enqueue = uhci_urb_enqueue,
876 .urb_dequeue = uhci_urb_dequeue,
878 .endpoint_disable = uhci_hcd_endpoint_disable,
879 .get_frame_number = uhci_hcd_get_frame_number,
881 .hub_status_data = uhci_hub_status_data,
882 .hub_control = uhci_hub_control,
885 static const struct pci_device_id uhci_pci_ids[] = { {
886 /* handle any USB UHCI controller */
887 PCI_DEVICE_CLASS(PCI_CLASS_SERIAL_USB_UHCI, ~0),
888 .driver_data = (unsigned long) &uhci_driver,
889 }, { /* end: all zeroes */ }
892 MODULE_DEVICE_TABLE(pci, uhci_pci_ids);
894 static struct pci_driver uhci_pci_driver = {
895 .name = (char *)hcd_name,
896 .id_table = uhci_pci_ids,
898 .probe = usb_hcd_pci_probe,
899 .remove = usb_hcd_pci_remove,
900 .shutdown = uhci_shutdown,
903 .suspend = usb_hcd_pci_suspend,
904 .resume = usb_hcd_pci_resume,
908 static int __init uhci_hcd_init(void)
910 int retval = -ENOMEM;
912 printk(KERN_INFO DRIVER_DESC " " DRIVER_VERSION "%s\n",
913 ignore_oc ? ", overcurrent ignored" : "");
918 if (DEBUG_CONFIGURED) {
919 errbuf = kmalloc(ERRBUF_LEN, GFP_KERNEL);
922 uhci_debugfs_root = debugfs_create_dir("uhci", NULL);
923 if (!uhci_debugfs_root)
927 uhci_up_cachep = kmem_cache_create("uhci_urb_priv",
928 sizeof(struct urb_priv), 0, 0, NULL);
932 retval = pci_register_driver(&uhci_pci_driver);
939 kmem_cache_destroy(uhci_up_cachep);
942 debugfs_remove(uhci_debugfs_root);
952 static void __exit uhci_hcd_cleanup(void)
954 pci_unregister_driver(&uhci_pci_driver);
955 kmem_cache_destroy(uhci_up_cachep);
956 debugfs_remove(uhci_debugfs_root);
960 module_init(uhci_hcd_init);
961 module_exit(uhci_hcd_cleanup);
963 MODULE_AUTHOR(DRIVER_AUTHOR);
964 MODULE_DESCRIPTION(DRIVER_DESC);
965 MODULE_LICENSE("GPL");