2 * Universal Host Controller Interface driver for USB.
4 * Maintainer: Alan Stern <stern@rowland.harvard.edu>
6 * (C) Copyright 1999 Linus Torvalds
7 * (C) Copyright 1999-2002 Johannes Erdfelt, johannes@erdfelt.com
8 * (C) Copyright 1999 Randy Dunlap
9 * (C) Copyright 1999 Georg Acher, acher@in.tum.de
10 * (C) Copyright 1999 Deti Fliegl, deti@fliegl.de
11 * (C) Copyright 1999 Thomas Sailer, sailer@ife.ee.ethz.ch
12 * (C) Copyright 1999 Roman Weissgaerber, weissg@vienna.at
13 * (C) Copyright 2000 Yggdrasil Computing, Inc. (port of new PCI interface
14 * support from usb-ohci.c by Adam Richter, adam@yggdrasil.com).
15 * (C) Copyright 1999 Gregory P. Smith (from usb-ohci.c)
16 * (C) Copyright 2004-2007 Alan Stern, stern@rowland.harvard.edu
18 * Intel documents this fairly well, and as far as I know there
19 * are no royalties or anything like that, but even so there are
20 * people who decided that they want to do the same thing in a
21 * completely different way.
25 #include <linux/module.h>
26 #include <linux/pci.h>
27 #include <linux/kernel.h>
28 #include <linux/init.h>
29 #include <linux/delay.h>
30 #include <linux/ioport.h>
31 #include <linux/slab.h>
32 #include <linux/errno.h>
33 #include <linux/unistd.h>
34 #include <linux/interrupt.h>
35 #include <linux/spinlock.h>
36 #include <linux/debugfs.h>
38 #include <linux/dmapool.h>
39 #include <linux/dma-mapping.h>
40 #include <linux/usb.h>
41 #include <linux/bitops.h>
42 #include <linux/dmi.h>
44 #include <asm/uaccess.h>
47 #include <asm/system.h>
49 #include "../core/hcd.h"
51 #include "pci-quirks.h"
56 #define DRIVER_VERSION "v3.0"
57 #define DRIVER_AUTHOR "Linus 'Frodo Rabbit' Torvalds, Johannes Erdfelt, \
58 Randy Dunlap, Georg Acher, Deti Fliegl, Thomas Sailer, Roman Weissgaerber, \
60 #define DRIVER_DESC "USB Universal Host Controller Interface driver"
62 /* for flakey hardware, ignore overcurrent indicators */
64 module_param(ignore_oc, bool, S_IRUGO);
65 MODULE_PARM_DESC(ignore_oc, "ignore hardware overcurrent indications");
68 * debug = 0, no debugging messages
69 * debug = 1, dump failed URBs except for stalls
70 * debug = 2, dump all failed URBs (including stalls)
71 * show all queues in /debug/uhci/[pci_addr]
72 * debug = 3, show all TDs in URBs when dumping
75 #define DEBUG_CONFIGURED 1
77 module_param(debug, int, S_IRUGO | S_IWUSR);
78 MODULE_PARM_DESC(debug, "Debug level");
81 #define DEBUG_CONFIGURED 0
86 #define ERRBUF_LEN (32 * 1024)
88 static struct kmem_cache *uhci_up_cachep; /* urb_priv */
90 static void suspend_rh(struct uhci_hcd *uhci, enum uhci_rh_state new_state);
91 static void wakeup_rh(struct uhci_hcd *uhci);
92 static void uhci_get_current_frame_number(struct uhci_hcd *uhci);
95 * Calculate the link pointer DMA value for the first Skeleton QH in a frame.
97 static __le32 uhci_frame_skel_link(struct uhci_hcd *uhci, int frame)
102 * The interrupt queues will be interleaved as evenly as possible.
103 * There's not much to be done about period-1 interrupts; they have
104 * to occur in every frame. But we can schedule period-2 interrupts
105 * in odd-numbered frames, period-4 interrupts in frames congruent
106 * to 2 (mod 4), and so on. This way each frame only has two
107 * interrupt QHs, which will help spread out bandwidth utilization.
109 * ffs (Find First bit Set) does exactly what we need:
110 * 1,3,5,... => ffs = 0 => use period-2 QH = skelqh[8],
111 * 2,6,10,... => ffs = 1 => use period-4 QH = skelqh[7], etc.
112 * ffs >= 7 => not on any high-period queue, so use
113 * period-1 QH = skelqh[9].
114 * Add in UHCI_NUMFRAMES to insure at least one bit is set.
116 skelnum = 8 - (int) __ffs(frame | UHCI_NUMFRAMES);
119 return LINK_TO_QH(uhci->skelqh[skelnum]);
122 #include "uhci-debug.c"
124 #include "uhci-hub.c"
127 * Finish up a host controller reset and update the recorded state.
129 static void finish_reset(struct uhci_hcd *uhci)
133 /* HCRESET doesn't affect the Suspend, Reset, and Resume Detect
134 * bits in the port status and control registers.
135 * We have to clear them by hand.
137 for (port = 0; port < uhci->rh_numports; ++port)
138 outw(0, uhci->io_addr + USBPORTSC1 + (port * 2));
140 uhci->port_c_suspend = uhci->resuming_ports = 0;
141 uhci->rh_state = UHCI_RH_RESET;
142 uhci->is_stopped = UHCI_IS_STOPPED;
143 uhci_to_hcd(uhci)->state = HC_STATE_HALT;
144 uhci_to_hcd(uhci)->poll_rh = 0;
146 uhci->dead = 0; /* Full reset resurrects the controller */
150 * Last rites for a defunct/nonfunctional controller
151 * or one we don't want to use any more.
153 static void uhci_hc_died(struct uhci_hcd *uhci)
155 uhci_get_current_frame_number(uhci);
156 uhci_reset_hc(to_pci_dev(uhci_dev(uhci)), uhci->io_addr);
160 /* The current frame may already be partway finished */
161 ++uhci->frame_number;
165 * Initialize a controller that was newly discovered or has lost power
166 * or otherwise been reset while it was suspended. In none of these cases
167 * can we be sure of its previous state.
169 static void check_and_reset_hc(struct uhci_hcd *uhci)
171 if (uhci_check_and_reset_hc(to_pci_dev(uhci_dev(uhci)), uhci->io_addr))
176 * Store the basic register settings needed by the controller.
178 static void configure_hc(struct uhci_hcd *uhci)
180 /* Set the frame length to the default: 1 ms exactly */
181 outb(USBSOF_DEFAULT, uhci->io_addr + USBSOF);
183 /* Store the frame list base address */
184 outl(uhci->frame_dma_handle, uhci->io_addr + USBFLBASEADD);
186 /* Set the current frame number */
187 outw(uhci->frame_number & UHCI_MAX_SOF_NUMBER,
188 uhci->io_addr + USBFRNUM);
190 /* Mark controller as not halted before we enable interrupts */
191 uhci_to_hcd(uhci)->state = HC_STATE_SUSPENDED;
195 pci_write_config_word(to_pci_dev(uhci_dev(uhci)), USBLEGSUP,
200 static int resume_detect_interrupts_are_broken(struct uhci_hcd *uhci)
204 /* If we have to ignore overcurrent events then almost by definition
205 * we can't depend on resume-detect interrupts. */
209 switch (to_pci_dev(uhci_dev(uhci))->vendor) {
213 case PCI_VENDOR_ID_GENESYS:
214 /* Genesys Logic's GL880S controllers don't generate
215 * resume-detect interrupts.
219 case PCI_VENDOR_ID_INTEL:
220 /* Some of Intel's USB controllers have a bug that causes
221 * resume-detect interrupts if any port has an over-current
222 * condition. To make matters worse, some motherboards
223 * hardwire unused USB ports' over-current inputs active!
224 * To prevent problems, we will not enable resume-detect
225 * interrupts if any ports are OC.
227 for (port = 0; port < uhci->rh_numports; ++port) {
228 if (inw(uhci->io_addr + USBPORTSC1 + port * 2) &
237 static int remote_wakeup_is_broken(struct uhci_hcd *uhci)
240 const char *sys_info;
241 static char bad_Asus_board[] = "A7V8X";
243 /* One of Asus's motherboards has a bug which causes it to
244 * wake up immediately from suspend-to-RAM if any of the ports
245 * are connected. In such cases we will not set EGSM.
247 sys_info = dmi_get_system_info(DMI_BOARD_NAME);
248 if (sys_info && !strcmp(sys_info, bad_Asus_board)) {
249 for (port = 0; port < uhci->rh_numports; ++port) {
250 if (inw(uhci->io_addr + USBPORTSC1 + port * 2) &
259 static void suspend_rh(struct uhci_hcd *uhci, enum uhci_rh_state new_state)
260 __releases(uhci->lock)
261 __acquires(uhci->lock)
264 int int_enable, egsm_enable;
266 auto_stop = (new_state == UHCI_RH_AUTO_STOPPED);
267 dev_dbg(&uhci_to_hcd(uhci)->self.root_hub->dev,
268 "%s%s\n", __FUNCTION__,
269 (auto_stop ? " (auto-stop)" : ""));
271 /* If we get a suspend request when we're already auto-stopped
272 * then there's nothing to do.
274 if (uhci->rh_state == UHCI_RH_AUTO_STOPPED) {
275 uhci->rh_state = new_state;
279 /* Enable resume-detect interrupts if they work.
280 * Then enter Global Suspend mode if _it_ works, still configured.
282 egsm_enable = USBCMD_EGSM;
283 uhci->working_RD = 1;
284 int_enable = USBINTR_RESUME;
285 if (remote_wakeup_is_broken(uhci))
287 if (resume_detect_interrupts_are_broken(uhci) || !egsm_enable ||
289 &uhci_to_hcd(uhci)->self.root_hub->dev))
290 uhci->working_RD = int_enable = 0;
292 outw(int_enable, uhci->io_addr + USBINTR);
293 outw(egsm_enable | USBCMD_CF, uhci->io_addr + USBCMD);
297 /* If we're auto-stopping then no devices have been attached
298 * for a while, so there shouldn't be any active URBs and the
299 * controller should stop after a few microseconds. Otherwise
300 * we will give the controller one frame to stop.
302 if (!auto_stop && !(inw(uhci->io_addr + USBSTS) & USBSTS_HCH)) {
303 uhci->rh_state = UHCI_RH_SUSPENDING;
304 spin_unlock_irq(&uhci->lock);
306 spin_lock_irq(&uhci->lock);
310 if (!(inw(uhci->io_addr + USBSTS) & USBSTS_HCH))
311 dev_warn(&uhci_to_hcd(uhci)->self.root_hub->dev,
312 "Controller not stopped yet!\n");
314 uhci_get_current_frame_number(uhci);
316 uhci->rh_state = new_state;
317 uhci->is_stopped = UHCI_IS_STOPPED;
318 uhci_to_hcd(uhci)->poll_rh = !int_enable;
320 uhci_scan_schedule(uhci);
324 static void start_rh(struct uhci_hcd *uhci)
326 uhci_to_hcd(uhci)->state = HC_STATE_RUNNING;
327 uhci->is_stopped = 0;
329 /* Mark it configured and running with a 64-byte max packet.
330 * All interrupts are enabled, even though RESUME won't do anything.
332 outw(USBCMD_RS | USBCMD_CF | USBCMD_MAXP, uhci->io_addr + USBCMD);
333 outw(USBINTR_TIMEOUT | USBINTR_RESUME | USBINTR_IOC | USBINTR_SP,
334 uhci->io_addr + USBINTR);
336 uhci->rh_state = UHCI_RH_RUNNING;
337 uhci_to_hcd(uhci)->poll_rh = 1;
340 static void wakeup_rh(struct uhci_hcd *uhci)
341 __releases(uhci->lock)
342 __acquires(uhci->lock)
344 dev_dbg(&uhci_to_hcd(uhci)->self.root_hub->dev,
345 "%s%s\n", __FUNCTION__,
346 uhci->rh_state == UHCI_RH_AUTO_STOPPED ?
347 " (auto-start)" : "");
349 /* If we are auto-stopped then no devices are attached so there's
350 * no need for wakeup signals. Otherwise we send Global Resume
353 if (uhci->rh_state == UHCI_RH_SUSPENDED) {
354 uhci->rh_state = UHCI_RH_RESUMING;
355 outw(USBCMD_FGR | USBCMD_EGSM | USBCMD_CF,
356 uhci->io_addr + USBCMD);
357 spin_unlock_irq(&uhci->lock);
359 spin_lock_irq(&uhci->lock);
363 /* End Global Resume and wait for EOP to be sent */
364 outw(USBCMD_CF, uhci->io_addr + USBCMD);
367 if (inw(uhci->io_addr + USBCMD) & USBCMD_FGR)
368 dev_warn(uhci_dev(uhci), "FGR not stopped yet!\n");
373 /* Restart root hub polling */
374 mod_timer(&uhci_to_hcd(uhci)->rh_timer, jiffies);
377 static irqreturn_t uhci_irq(struct usb_hcd *hcd)
379 struct uhci_hcd *uhci = hcd_to_uhci(hcd);
380 unsigned short status;
384 * Read the interrupt status, and write it back to clear the
385 * interrupt cause. Contrary to the UHCI specification, the
386 * "HC Halted" status bit is persistent: it is RO, not R/WC.
388 status = inw(uhci->io_addr + USBSTS);
389 if (!(status & ~USBSTS_HCH)) /* shared interrupt, not mine */
391 outw(status, uhci->io_addr + USBSTS); /* Clear it */
393 if (status & ~(USBSTS_USBINT | USBSTS_ERROR | USBSTS_RD)) {
394 if (status & USBSTS_HSE)
395 dev_err(uhci_dev(uhci), "host system error, "
397 if (status & USBSTS_HCPE)
398 dev_err(uhci_dev(uhci), "host controller process "
399 "error, something bad happened!\n");
400 if (status & USBSTS_HCH) {
401 spin_lock_irqsave(&uhci->lock, flags);
402 if (uhci->rh_state >= UHCI_RH_RUNNING) {
403 dev_err(uhci_dev(uhci),
404 "host controller halted, "
406 if (debug > 1 && errbuf) {
407 /* Print the schedule for debugging */
408 uhci_sprint_schedule(uhci,
414 /* Force a callback in case there are
416 mod_timer(&hcd->rh_timer, jiffies);
418 spin_unlock_irqrestore(&uhci->lock, flags);
422 if (status & USBSTS_RD)
423 usb_hcd_poll_rh_status(hcd);
425 spin_lock_irqsave(&uhci->lock, flags);
426 uhci_scan_schedule(uhci);
427 spin_unlock_irqrestore(&uhci->lock, flags);
434 * Store the current frame number in uhci->frame_number if the controller
435 * is runnning. Expand from 11 bits (of which we use only 10) to a
436 * full-sized integer.
438 * Like many other parts of the driver, this code relies on being polled
439 * more than once per second as long as the controller is running.
441 static void uhci_get_current_frame_number(struct uhci_hcd *uhci)
443 if (!uhci->is_stopped) {
446 delta = (inw(uhci->io_addr + USBFRNUM) - uhci->frame_number) &
447 (UHCI_NUMFRAMES - 1);
448 uhci->frame_number += delta;
453 * De-allocate all resources
455 static void release_uhci(struct uhci_hcd *uhci)
459 if (DEBUG_CONFIGURED) {
460 spin_lock_irq(&uhci->lock);
461 uhci->is_initialized = 0;
462 spin_unlock_irq(&uhci->lock);
464 debugfs_remove(uhci->dentry);
467 for (i = 0; i < UHCI_NUM_SKELQH; i++)
468 uhci_free_qh(uhci, uhci->skelqh[i]);
470 uhci_free_td(uhci, uhci->term_td);
472 dma_pool_destroy(uhci->qh_pool);
474 dma_pool_destroy(uhci->td_pool);
476 kfree(uhci->frame_cpu);
478 dma_free_coherent(uhci_dev(uhci),
479 UHCI_NUMFRAMES * sizeof(*uhci->frame),
480 uhci->frame, uhci->frame_dma_handle);
483 static int uhci_init(struct usb_hcd *hcd)
485 struct uhci_hcd *uhci = hcd_to_uhci(hcd);
486 unsigned io_size = (unsigned) hcd->rsrc_len;
489 uhci->io_addr = (unsigned long) hcd->rsrc_start;
491 /* The UHCI spec says devices must have 2 ports, and goes on to say
492 * they may have more but gives no way to determine how many there
493 * are. However according to the UHCI spec, Bit 7 of the port
494 * status and control register is always set to 1. So we try to
495 * use this to our advantage. Another common failure mode when
496 * a nonexistent register is addressed is to return all ones, so
497 * we test for that also.
499 for (port = 0; port < (io_size - USBPORTSC1) / 2; port++) {
500 unsigned int portstatus;
502 portstatus = inw(uhci->io_addr + USBPORTSC1 + (port * 2));
503 if (!(portstatus & 0x0080) || portstatus == 0xffff)
507 dev_info(uhci_dev(uhci), "detected %d ports\n", port);
509 /* Anything greater than 7 is weird so we'll ignore it. */
510 if (port > UHCI_RH_MAXCHILD) {
511 dev_info(uhci_dev(uhci), "port count misdetected? "
512 "forcing to 2 ports\n");
515 uhci->rh_numports = port;
517 /* Kick BIOS off this hardware and reset if the controller
518 * isn't already safely quiescent.
520 check_and_reset_hc(uhci);
524 /* Make sure the controller is quiescent and that we're not using it
525 * any more. This is mainly for the benefit of programs which, like kexec,
526 * expect the hardware to be idle: not doing DMA or generating IRQs.
528 * This routine may be called in a damaged or failing kernel. Hence we
529 * do not acquire the spinlock before shutting down the controller.
531 static void uhci_shutdown(struct pci_dev *pdev)
533 struct usb_hcd *hcd = (struct usb_hcd *) pci_get_drvdata(pdev);
535 uhci_hc_died(hcd_to_uhci(hcd));
539 * Allocate a frame list, and then setup the skeleton
541 * The hardware doesn't really know any difference
542 * in the queues, but the order does matter for the
543 * protocols higher up. The order in which the queues
544 * are encountered by the hardware is:
546 * - All isochronous events are handled before any
547 * of the queues. We don't do that here, because
548 * we'll create the actual TD entries on demand.
549 * - The first queue is the high-period interrupt queue.
550 * - The second queue is the period-1 interrupt and async
551 * (low-speed control, full-speed control, then bulk) queue.
552 * - The third queue is the terminating bandwidth reclamation queue,
553 * which contains no members, loops back to itself, and is present
554 * only when FSBR is on and there are no full-speed control or bulk QHs.
556 static int uhci_start(struct usb_hcd *hcd)
558 struct uhci_hcd *uhci = hcd_to_uhci(hcd);
561 struct dentry *dentry;
563 hcd->uses_new_polling = 1;
565 spin_lock_init(&uhci->lock);
566 setup_timer(&uhci->fsbr_timer, uhci_fsbr_timeout,
567 (unsigned long) uhci);
568 INIT_LIST_HEAD(&uhci->idle_qh_list);
569 init_waitqueue_head(&uhci->waitqh);
571 if (DEBUG_CONFIGURED) {
572 dentry = debugfs_create_file(hcd->self.bus_name,
573 S_IFREG|S_IRUGO|S_IWUSR, uhci_debugfs_root,
574 uhci, &uhci_debug_operations);
576 dev_err(uhci_dev(uhci), "couldn't create uhci "
579 goto err_create_debug_entry;
581 uhci->dentry = dentry;
584 uhci->frame = dma_alloc_coherent(uhci_dev(uhci),
585 UHCI_NUMFRAMES * sizeof(*uhci->frame),
586 &uhci->frame_dma_handle, 0);
588 dev_err(uhci_dev(uhci), "unable to allocate "
589 "consistent memory for frame list\n");
590 goto err_alloc_frame;
592 memset(uhci->frame, 0, UHCI_NUMFRAMES * sizeof(*uhci->frame));
594 uhci->frame_cpu = kcalloc(UHCI_NUMFRAMES, sizeof(*uhci->frame_cpu),
596 if (!uhci->frame_cpu) {
597 dev_err(uhci_dev(uhci), "unable to allocate "
598 "memory for frame pointers\n");
599 goto err_alloc_frame_cpu;
602 uhci->td_pool = dma_pool_create("uhci_td", uhci_dev(uhci),
603 sizeof(struct uhci_td), 16, 0);
604 if (!uhci->td_pool) {
605 dev_err(uhci_dev(uhci), "unable to create td dma_pool\n");
606 goto err_create_td_pool;
609 uhci->qh_pool = dma_pool_create("uhci_qh", uhci_dev(uhci),
610 sizeof(struct uhci_qh), 16, 0);
611 if (!uhci->qh_pool) {
612 dev_err(uhci_dev(uhci), "unable to create qh dma_pool\n");
613 goto err_create_qh_pool;
616 uhci->term_td = uhci_alloc_td(uhci);
617 if (!uhci->term_td) {
618 dev_err(uhci_dev(uhci), "unable to allocate terminating TD\n");
619 goto err_alloc_term_td;
622 for (i = 0; i < UHCI_NUM_SKELQH; i++) {
623 uhci->skelqh[i] = uhci_alloc_qh(uhci, NULL, NULL);
624 if (!uhci->skelqh[i]) {
625 dev_err(uhci_dev(uhci), "unable to allocate QH\n");
626 goto err_alloc_skelqh;
631 * 8 Interrupt queues; link all higher int queues to int1 = async
633 for (i = SKEL_ISO + 1; i < SKEL_ASYNC; ++i)
634 uhci->skelqh[i]->link = LINK_TO_QH(uhci->skel_async_qh);
635 uhci->skel_async_qh->link = UHCI_PTR_TERM;
636 uhci->skel_term_qh->link = LINK_TO_QH(uhci->skel_term_qh);
638 /* This dummy TD is to work around a bug in Intel PIIX controllers */
639 uhci_fill_td(uhci->term_td, 0, uhci_explen(0) |
640 (0x7f << TD_TOKEN_DEVADDR_SHIFT) | USB_PID_IN, 0);
641 uhci->term_td->link = UHCI_PTR_TERM;
642 uhci->skel_async_qh->element = uhci->skel_term_qh->element =
643 LINK_TO_TD(uhci->term_td);
646 * Fill the frame list: make all entries point to the proper
649 for (i = 0; i < UHCI_NUMFRAMES; i++) {
651 /* Only place we don't use the frame list routines */
652 uhci->frame[i] = uhci_frame_skel_link(uhci, i);
656 * Some architectures require a full mb() to enforce completion of
657 * the memory writes above before the I/O transfers in configure_hc().
662 uhci->is_initialized = 1;
670 for (i = 0; i < UHCI_NUM_SKELQH; i++) {
672 uhci_free_qh(uhci, uhci->skelqh[i]);
675 uhci_free_td(uhci, uhci->term_td);
678 dma_pool_destroy(uhci->qh_pool);
681 dma_pool_destroy(uhci->td_pool);
684 kfree(uhci->frame_cpu);
687 dma_free_coherent(uhci_dev(uhci),
688 UHCI_NUMFRAMES * sizeof(*uhci->frame),
689 uhci->frame, uhci->frame_dma_handle);
692 debugfs_remove(uhci->dentry);
694 err_create_debug_entry:
698 static void uhci_stop(struct usb_hcd *hcd)
700 struct uhci_hcd *uhci = hcd_to_uhci(hcd);
702 spin_lock_irq(&uhci->lock);
703 if (test_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags) && !uhci->dead)
705 uhci_scan_schedule(uhci);
706 spin_unlock_irq(&uhci->lock);
708 del_timer_sync(&uhci->fsbr_timer);
713 static int uhci_rh_suspend(struct usb_hcd *hcd)
715 struct uhci_hcd *uhci = hcd_to_uhci(hcd);
718 spin_lock_irq(&uhci->lock);
719 if (!test_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags))
721 else if (!uhci->dead)
722 suspend_rh(uhci, UHCI_RH_SUSPENDED);
723 spin_unlock_irq(&uhci->lock);
727 static int uhci_rh_resume(struct usb_hcd *hcd)
729 struct uhci_hcd *uhci = hcd_to_uhci(hcd);
732 spin_lock_irq(&uhci->lock);
733 if (!test_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags))
735 else if (!uhci->dead)
737 spin_unlock_irq(&uhci->lock);
741 static int uhci_suspend(struct usb_hcd *hcd, pm_message_t message)
743 struct uhci_hcd *uhci = hcd_to_uhci(hcd);
746 dev_dbg(uhci_dev(uhci), "%s\n", __FUNCTION__);
748 spin_lock_irq(&uhci->lock);
749 if (!test_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags) || uhci->dead)
750 goto done_okay; /* Already suspended or dead */
752 if (uhci->rh_state > UHCI_RH_SUSPENDED) {
753 dev_warn(uhci_dev(uhci), "Root hub isn't suspended!\n");
758 /* All PCI host controllers are required to disable IRQ generation
759 * at the source, so we must turn off PIRQ.
761 pci_write_config_word(to_pci_dev(uhci_dev(uhci)), USBLEGSUP, 0);
765 /* FIXME: Enable non-PME# remote wakeup? */
767 /* make sure snapshot being resumed re-enumerates everything */
768 if (message.event == PM_EVENT_PRETHAW)
772 clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
774 spin_unlock_irq(&uhci->lock);
778 static int uhci_resume(struct usb_hcd *hcd)
780 struct uhci_hcd *uhci = hcd_to_uhci(hcd);
782 dev_dbg(uhci_dev(uhci), "%s\n", __FUNCTION__);
784 /* Since we aren't in D3 any more, it's safe to set this flag
785 * even if the controller was dead.
787 set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
790 spin_lock_irq(&uhci->lock);
792 /* FIXME: Disable non-PME# remote wakeup? */
794 /* The firmware or a boot kernel may have changed the controller
795 * settings during a system wakeup. Check it and reconfigure
798 check_and_reset_hc(uhci);
800 /* If the controller was dead before, it's back alive now */
803 if (uhci->rh_state == UHCI_RH_RESET) {
805 /* The controller had to be reset */
806 usb_root_hub_lost_power(hcd->self.root_hub);
807 suspend_rh(uhci, UHCI_RH_SUSPENDED);
810 spin_unlock_irq(&uhci->lock);
812 if (!uhci->working_RD) {
813 /* Suspended root hub needs to be polled */
815 usb_hcd_poll_rh_status(hcd);
821 /* Wait until a particular device/endpoint's QH is idle, and free it */
822 static void uhci_hcd_endpoint_disable(struct usb_hcd *hcd,
823 struct usb_host_endpoint *hep)
825 struct uhci_hcd *uhci = hcd_to_uhci(hcd);
828 spin_lock_irq(&uhci->lock);
829 qh = (struct uhci_qh *) hep->hcpriv;
833 while (qh->state != QH_STATE_IDLE) {
835 spin_unlock_irq(&uhci->lock);
836 wait_event_interruptible(uhci->waitqh,
837 qh->state == QH_STATE_IDLE);
838 spin_lock_irq(&uhci->lock);
842 uhci_free_qh(uhci, qh);
844 spin_unlock_irq(&uhci->lock);
847 static int uhci_hcd_get_frame_number(struct usb_hcd *hcd)
849 struct uhci_hcd *uhci = hcd_to_uhci(hcd);
850 unsigned frame_number;
853 /* Minimize latency by avoiding the spinlock */
854 frame_number = uhci->frame_number;
856 delta = (inw(uhci->io_addr + USBFRNUM) - frame_number) &
857 (UHCI_NUMFRAMES - 1);
858 return frame_number + delta;
861 static const char hcd_name[] = "uhci_hcd";
863 static const struct hc_driver uhci_driver = {
864 .description = hcd_name,
865 .product_desc = "UHCI Host Controller",
866 .hcd_priv_size = sizeof(struct uhci_hcd),
868 /* Generic hardware linkage */
872 /* Basic lifecycle operations */
876 .suspend = uhci_suspend,
877 .resume = uhci_resume,
878 .bus_suspend = uhci_rh_suspend,
879 .bus_resume = uhci_rh_resume,
883 .urb_enqueue = uhci_urb_enqueue,
884 .urb_dequeue = uhci_urb_dequeue,
886 .endpoint_disable = uhci_hcd_endpoint_disable,
887 .get_frame_number = uhci_hcd_get_frame_number,
889 .hub_status_data = uhci_hub_status_data,
890 .hub_control = uhci_hub_control,
893 static const struct pci_device_id uhci_pci_ids[] = { {
894 /* handle any USB UHCI controller */
895 PCI_DEVICE_CLASS(PCI_CLASS_SERIAL_USB_UHCI, ~0),
896 .driver_data = (unsigned long) &uhci_driver,
897 }, { /* end: all zeroes */ }
900 MODULE_DEVICE_TABLE(pci, uhci_pci_ids);
902 static struct pci_driver uhci_pci_driver = {
903 .name = (char *)hcd_name,
904 .id_table = uhci_pci_ids,
906 .probe = usb_hcd_pci_probe,
907 .remove = usb_hcd_pci_remove,
908 .shutdown = uhci_shutdown,
911 .suspend = usb_hcd_pci_suspend,
912 .resume = usb_hcd_pci_resume,
916 static int __init uhci_hcd_init(void)
918 int retval = -ENOMEM;
920 printk(KERN_INFO DRIVER_DESC " " DRIVER_VERSION "%s\n",
921 ignore_oc ? ", overcurrent ignored" : "");
926 if (DEBUG_CONFIGURED) {
927 errbuf = kmalloc(ERRBUF_LEN, GFP_KERNEL);
930 uhci_debugfs_root = debugfs_create_dir("uhci", NULL);
931 if (!uhci_debugfs_root)
935 uhci_up_cachep = kmem_cache_create("uhci_urb_priv",
936 sizeof(struct urb_priv), 0, 0, NULL);
940 retval = pci_register_driver(&uhci_pci_driver);
947 kmem_cache_destroy(uhci_up_cachep);
950 debugfs_remove(uhci_debugfs_root);
960 static void __exit uhci_hcd_cleanup(void)
962 pci_unregister_driver(&uhci_pci_driver);
963 kmem_cache_destroy(uhci_up_cachep);
964 debugfs_remove(uhci_debugfs_root);
968 module_init(uhci_hcd_init);
969 module_exit(uhci_hcd_cleanup);
971 MODULE_AUTHOR(DRIVER_AUTHOR);
972 MODULE_DESCRIPTION(DRIVER_DESC);
973 MODULE_LICENSE("GPL");