2 * Universal Host Controller Interface driver for USB.
4 * Maintainer: Alan Stern <stern@rowland.harvard.edu>
6 * (C) Copyright 1999 Linus Torvalds
7 * (C) Copyright 1999-2002 Johannes Erdfelt, johannes@erdfelt.com
8 * (C) Copyright 1999 Randy Dunlap
9 * (C) Copyright 1999 Georg Acher, acher@in.tum.de
10 * (C) Copyright 1999 Deti Fliegl, deti@fliegl.de
11 * (C) Copyright 1999 Thomas Sailer, sailer@ife.ee.ethz.ch
12 * (C) Copyright 1999 Roman Weissgaerber, weissg@vienna.at
13 * (C) Copyright 2000 Yggdrasil Computing, Inc. (port of new PCI interface
14 * support from usb-ohci.c by Adam Richter, adam@yggdrasil.com).
15 * (C) Copyright 1999 Gregory P. Smith (from usb-ohci.c)
16 * (C) Copyright 2004-2005 Alan Stern, stern@rowland.harvard.edu
18 * Intel documents this fairly well, and as far as I know there
19 * are no royalties or anything like that, but even so there are
20 * people who decided that they want to do the same thing in a
21 * completely different way.
25 #include <linux/config.h>
26 #ifdef CONFIG_USB_DEBUG
31 #include <linux/module.h>
32 #include <linux/pci.h>
33 #include <linux/kernel.h>
34 #include <linux/init.h>
35 #include <linux/delay.h>
36 #include <linux/ioport.h>
37 #include <linux/sched.h>
38 #include <linux/slab.h>
39 #include <linux/smp_lock.h>
40 #include <linux/errno.h>
41 #include <linux/unistd.h>
42 #include <linux/interrupt.h>
43 #include <linux/spinlock.h>
44 #include <linux/debugfs.h>
46 #include <linux/dmapool.h>
47 #include <linux/dma-mapping.h>
48 #include <linux/usb.h>
49 #include <linux/bitops.h>
51 #include <asm/uaccess.h>
54 #include <asm/system.h>
56 #include "../core/hcd.h"
62 #define DRIVER_VERSION "v2.3"
63 #define DRIVER_AUTHOR "Linus 'Frodo Rabbit' Torvalds, Johannes Erdfelt, \
64 Randy Dunlap, Georg Acher, Deti Fliegl, Thomas Sailer, Roman Weissgaerber, \
66 #define DRIVER_DESC "USB Universal Host Controller Interface driver"
69 * debug = 0, no debugging messages
70 * debug = 1, dump failed URB's except for stalls
71 * debug = 2, dump all failed URB's (including stalls)
72 * show all queues in /debug/uhci/[pci_addr]
73 * debug = 3, show all TD's in URB's when dumping
80 module_param(debug, int, S_IRUGO | S_IWUSR);
81 MODULE_PARM_DESC(debug, "Debug level");
83 #define ERRBUF_LEN (32 * 1024)
85 static kmem_cache_t *uhci_up_cachep; /* urb_priv */
87 static void suspend_rh(struct uhci_hcd *uhci, enum uhci_rh_state new_state);
88 static void wakeup_rh(struct uhci_hcd *uhci);
89 static void uhci_get_current_frame_number(struct uhci_hcd *uhci);
91 /* If a transfer is still active after this much time, turn off FSBR */
92 #define IDLE_TIMEOUT msecs_to_jiffies(50)
93 #define FSBR_DELAY msecs_to_jiffies(50)
95 /* When we timeout an idle transfer for FSBR, we'll switch it over to */
96 /* depth first traversal. We'll do it in groups of this number of TD's */
97 /* to make sure it doesn't hog all of the bandwidth */
98 #define DEPTH_INTERVAL 5
100 #include "uhci-debug.c"
102 #include "uhci-hub.c"
104 extern void uhci_reset_hc(struct pci_dev *pdev, unsigned long base);
105 extern int uhci_check_and_reset_hc(struct pci_dev *pdev, unsigned long base);
108 * Finish up a host controller reset and update the recorded state.
110 static void finish_reset(struct uhci_hcd *uhci)
114 /* HCRESET doesn't affect the Suspend, Reset, and Resume Detect
115 * bits in the port status and control registers.
116 * We have to clear them by hand.
118 for (port = 0; port < uhci->rh_numports; ++port)
119 outw(0, uhci->io_addr + USBPORTSC1 + (port * 2));
121 uhci->port_c_suspend = uhci->suspended_ports =
122 uhci->resuming_ports = 0;
123 uhci->rh_state = UHCI_RH_RESET;
124 uhci->is_stopped = UHCI_IS_STOPPED;
125 uhci_to_hcd(uhci)->state = HC_STATE_HALT;
126 uhci_to_hcd(uhci)->poll_rh = 0;
130 * Last rites for a defunct/nonfunctional controller
131 * or one we don't want to use any more.
133 static void hc_died(struct uhci_hcd *uhci)
135 uhci_reset_hc(to_pci_dev(uhci_dev(uhci)), uhci->io_addr);
137 uhci->hc_inaccessible = 1;
141 * Initialize a controller that was newly discovered or has just been
142 * resumed. In either case we can't be sure of its previous state.
144 static void check_and_reset_hc(struct uhci_hcd *uhci)
146 if (uhci_check_and_reset_hc(to_pci_dev(uhci_dev(uhci)), uhci->io_addr))
151 * Store the basic register settings needed by the controller.
153 static void configure_hc(struct uhci_hcd *uhci)
155 /* Set the frame length to the default: 1 ms exactly */
156 outb(USBSOF_DEFAULT, uhci->io_addr + USBSOF);
158 /* Store the frame list base address */
159 outl(uhci->frame_dma_handle, uhci->io_addr + USBFLBASEADD);
161 /* Set the current frame number */
162 outw(uhci->frame_number, uhci->io_addr + USBFRNUM);
164 /* Mark controller as running before we enable interrupts */
165 uhci_to_hcd(uhci)->state = HC_STATE_RUNNING;
169 pci_write_config_word(to_pci_dev(uhci_dev(uhci)), USBLEGSUP,
174 static int resume_detect_interrupts_are_broken(struct uhci_hcd *uhci)
178 switch (to_pci_dev(uhci_dev(uhci))->vendor) {
182 case PCI_VENDOR_ID_GENESYS:
183 /* Genesys Logic's GL880S controllers don't generate
184 * resume-detect interrupts.
188 case PCI_VENDOR_ID_INTEL:
189 /* Some of Intel's USB controllers have a bug that causes
190 * resume-detect interrupts if any port has an over-current
191 * condition. To make matters worse, some motherboards
192 * hardwire unused USB ports' over-current inputs active!
193 * To prevent problems, we will not enable resume-detect
194 * interrupts if any ports are OC.
196 for (port = 0; port < uhci->rh_numports; ++port) {
197 if (inw(uhci->io_addr + USBPORTSC1 + port * 2) &
206 static void suspend_rh(struct uhci_hcd *uhci, enum uhci_rh_state new_state)
207 __releases(uhci->lock)
208 __acquires(uhci->lock)
213 auto_stop = (new_state == UHCI_RH_AUTO_STOPPED);
214 dev_dbg(uhci_dev(uhci), "%s%s\n", __FUNCTION__,
215 (auto_stop ? " (auto-stop)" : ""));
217 /* If we get a suspend request when we're already auto-stopped
218 * then there's nothing to do.
220 if (uhci->rh_state == UHCI_RH_AUTO_STOPPED) {
221 uhci->rh_state = new_state;
225 /* Enable resume-detect interrupts if they work.
226 * Then enter Global Suspend mode, still configured.
228 uhci->working_RD = 1;
229 int_enable = USBINTR_RESUME;
230 if (resume_detect_interrupts_are_broken(uhci)) {
231 uhci->working_RD = int_enable = 0;
233 outw(int_enable, uhci->io_addr + USBINTR);
234 outw(USBCMD_EGSM | USBCMD_CF, uhci->io_addr + USBCMD);
238 /* If we're auto-stopping then no devices have been attached
239 * for a while, so there shouldn't be any active URBs and the
240 * controller should stop after a few microseconds. Otherwise
241 * we will give the controller one frame to stop.
243 if (!auto_stop && !(inw(uhci->io_addr + USBSTS) & USBSTS_HCH)) {
244 uhci->rh_state = UHCI_RH_SUSPENDING;
245 spin_unlock_irq(&uhci->lock);
247 spin_lock_irq(&uhci->lock);
248 if (uhci->hc_inaccessible) /* Died */
251 if (!(inw(uhci->io_addr + USBSTS) & USBSTS_HCH))
252 dev_warn(uhci_dev(uhci), "Controller not stopped yet!\n");
254 uhci_get_current_frame_number(uhci);
257 uhci->rh_state = new_state;
258 uhci->is_stopped = UHCI_IS_STOPPED;
259 uhci_to_hcd(uhci)->poll_rh = !int_enable;
261 uhci_scan_schedule(uhci, NULL);
264 static void start_rh(struct uhci_hcd *uhci)
266 uhci->is_stopped = 0;
269 /* Mark it configured and running with a 64-byte max packet.
270 * All interrupts are enabled, even though RESUME won't do anything.
272 outw(USBCMD_RS | USBCMD_CF | USBCMD_MAXP, uhci->io_addr + USBCMD);
273 outw(USBINTR_TIMEOUT | USBINTR_RESUME | USBINTR_IOC | USBINTR_SP,
274 uhci->io_addr + USBINTR);
276 uhci->rh_state = UHCI_RH_RUNNING;
277 uhci_to_hcd(uhci)->poll_rh = 1;
280 static void wakeup_rh(struct uhci_hcd *uhci)
281 __releases(uhci->lock)
282 __acquires(uhci->lock)
284 dev_dbg(uhci_dev(uhci), "%s%s\n", __FUNCTION__,
285 uhci->rh_state == UHCI_RH_AUTO_STOPPED ?
286 " (auto-start)" : "");
288 /* If we are auto-stopped then no devices are attached so there's
289 * no need for wakeup signals. Otherwise we send Global Resume
292 if (uhci->rh_state == UHCI_RH_SUSPENDED) {
293 uhci->rh_state = UHCI_RH_RESUMING;
294 outw(USBCMD_FGR | USBCMD_EGSM | USBCMD_CF,
295 uhci->io_addr + USBCMD);
296 spin_unlock_irq(&uhci->lock);
298 spin_lock_irq(&uhci->lock);
299 if (uhci->hc_inaccessible) /* Died */
302 /* End Global Resume and wait for EOP to be sent */
303 outw(USBCMD_CF, uhci->io_addr + USBCMD);
306 if (inw(uhci->io_addr + USBCMD) & USBCMD_FGR)
307 dev_warn(uhci_dev(uhci), "FGR not stopped yet!\n");
312 /* Restart root hub polling */
313 mod_timer(&uhci_to_hcd(uhci)->rh_timer, jiffies);
316 static irqreturn_t uhci_irq(struct usb_hcd *hcd, struct pt_regs *regs)
318 struct uhci_hcd *uhci = hcd_to_uhci(hcd);
319 unsigned short status;
323 * Read the interrupt status, and write it back to clear the
324 * interrupt cause. Contrary to the UHCI specification, the
325 * "HC Halted" status bit is persistent: it is RO, not R/WC.
327 status = inw(uhci->io_addr + USBSTS);
328 if (!(status & ~USBSTS_HCH)) /* shared interrupt, not mine */
330 outw(status, uhci->io_addr + USBSTS); /* Clear it */
332 if (status & ~(USBSTS_USBINT | USBSTS_ERROR | USBSTS_RD)) {
333 if (status & USBSTS_HSE)
334 dev_err(uhci_dev(uhci), "host system error, "
336 if (status & USBSTS_HCPE)
337 dev_err(uhci_dev(uhci), "host controller process "
338 "error, something bad happened!\n");
339 if (status & USBSTS_HCH) {
340 spin_lock_irqsave(&uhci->lock, flags);
341 if (uhci->rh_state >= UHCI_RH_RUNNING) {
342 dev_err(uhci_dev(uhci),
343 "host controller halted, "
347 /* Force a callback in case there are
349 mod_timer(&hcd->rh_timer, jiffies);
351 spin_unlock_irqrestore(&uhci->lock, flags);
355 if (status & USBSTS_RD)
356 usb_hcd_poll_rh_status(hcd);
358 spin_lock_irqsave(&uhci->lock, flags);
359 uhci_scan_schedule(uhci, regs);
360 spin_unlock_irqrestore(&uhci->lock, flags);
367 * Store the current frame number in uhci->frame_number if the controller
370 static void uhci_get_current_frame_number(struct uhci_hcd *uhci)
372 if (!uhci->is_stopped)
373 uhci->frame_number = inw(uhci->io_addr + USBFRNUM);
377 * De-allocate all resources
379 static void release_uhci(struct uhci_hcd *uhci)
383 for (i = 0; i < UHCI_NUM_SKELQH; i++)
384 uhci_free_qh(uhci, uhci->skelqh[i]);
386 uhci_free_td(uhci, uhci->term_td);
388 dma_pool_destroy(uhci->qh_pool);
390 dma_pool_destroy(uhci->td_pool);
392 kfree(uhci->frame_cpu);
394 dma_free_coherent(uhci_dev(uhci),
395 UHCI_NUMFRAMES * sizeof(*uhci->frame),
396 uhci->frame, uhci->frame_dma_handle);
398 debugfs_remove(uhci->dentry);
401 static int uhci_reset(struct usb_hcd *hcd)
403 struct uhci_hcd *uhci = hcd_to_uhci(hcd);
404 unsigned io_size = (unsigned) hcd->rsrc_len;
407 uhci->io_addr = (unsigned long) hcd->rsrc_start;
409 /* The UHCI spec says devices must have 2 ports, and goes on to say
410 * they may have more but gives no way to determine how many there
411 * are. However according to the UHCI spec, Bit 7 of the port
412 * status and control register is always set to 1. So we try to
413 * use this to our advantage. Another common failure mode when
414 * a nonexistent register is addressed is to return all ones, so
415 * we test for that also.
417 for (port = 0; port < (io_size - USBPORTSC1) / 2; port++) {
418 unsigned int portstatus;
420 portstatus = inw(uhci->io_addr + USBPORTSC1 + (port * 2));
421 if (!(portstatus & 0x0080) || portstatus == 0xffff)
425 dev_info(uhci_dev(uhci), "detected %d ports\n", port);
427 /* Anything greater than 7 is weird so we'll ignore it. */
428 if (port > UHCI_RH_MAXCHILD) {
429 dev_info(uhci_dev(uhci), "port count misdetected? "
430 "forcing to 2 ports\n");
433 uhci->rh_numports = port;
435 /* Kick BIOS off this hardware and reset if the controller
436 * isn't already safely quiescent.
438 check_and_reset_hc(uhci);
442 /* Make sure the controller is quiescent and that we're not using it
443 * any more. This is mainly for the benefit of programs which, like kexec,
444 * expect the hardware to be idle: not doing DMA or generating IRQs.
446 * This routine may be called in a damaged or failing kernel. Hence we
447 * do not acquire the spinlock before shutting down the controller.
449 static void uhci_shutdown(struct pci_dev *pdev)
451 struct usb_hcd *hcd = (struct usb_hcd *) pci_get_drvdata(pdev);
453 hc_died(hcd_to_uhci(hcd));
457 * Allocate a frame list, and then setup the skeleton
459 * The hardware doesn't really know any difference
460 * in the queues, but the order does matter for the
461 * protocols higher up. The order is:
463 * - any isochronous events handled before any
464 * of the queues. We don't do that here, because
465 * we'll create the actual TD entries on demand.
466 * - The first queue is the interrupt queue.
467 * - The second queue is the control queue, split into low- and full-speed
468 * - The third queue is bulk queue.
469 * - The fourth queue is the bandwidth reclamation queue, which loops back
470 * to the full-speed control queue.
472 static int uhci_start(struct usb_hcd *hcd)
474 struct uhci_hcd *uhci = hcd_to_uhci(hcd);
477 struct dentry *dentry;
479 hcd->uses_new_polling = 1;
480 if (pci_find_capability(to_pci_dev(uhci_dev(uhci)), PCI_CAP_ID_PM))
481 hcd->can_wakeup = 1; /* Assume it supports PME# */
483 dentry = debugfs_create_file(hcd->self.bus_name,
484 S_IFREG|S_IRUGO|S_IWUSR, uhci_debugfs_root, uhci,
485 &uhci_debug_operations);
487 dev_err(uhci_dev(uhci),
488 "couldn't create uhci debugfs entry\n");
490 goto err_create_debug_entry;
492 uhci->dentry = dentry;
495 uhci->fsbrtimeout = 0;
497 spin_lock_init(&uhci->lock);
498 INIT_LIST_HEAD(&uhci->qh_remove_list);
500 INIT_LIST_HEAD(&uhci->td_remove_list);
502 INIT_LIST_HEAD(&uhci->urb_remove_list);
504 INIT_LIST_HEAD(&uhci->urb_list);
506 INIT_LIST_HEAD(&uhci->complete_list);
508 init_waitqueue_head(&uhci->waitqh);
510 uhci->frame = dma_alloc_coherent(uhci_dev(uhci),
511 UHCI_NUMFRAMES * sizeof(*uhci->frame),
512 &uhci->frame_dma_handle, 0);
514 dev_err(uhci_dev(uhci), "unable to allocate "
515 "consistent memory for frame list\n");
516 goto err_alloc_frame;
518 memset(uhci->frame, 0, UHCI_NUMFRAMES * sizeof(*uhci->frame));
520 uhci->frame_cpu = kcalloc(UHCI_NUMFRAMES, sizeof(*uhci->frame_cpu),
522 if (!uhci->frame_cpu) {
523 dev_err(uhci_dev(uhci), "unable to allocate "
524 "memory for frame pointers\n");
525 goto err_alloc_frame_cpu;
528 uhci->td_pool = dma_pool_create("uhci_td", uhci_dev(uhci),
529 sizeof(struct uhci_td), 16, 0);
530 if (!uhci->td_pool) {
531 dev_err(uhci_dev(uhci), "unable to create td dma_pool\n");
532 goto err_create_td_pool;
535 uhci->qh_pool = dma_pool_create("uhci_qh", uhci_dev(uhci),
536 sizeof(struct uhci_qh), 16, 0);
537 if (!uhci->qh_pool) {
538 dev_err(uhci_dev(uhci), "unable to create qh dma_pool\n");
539 goto err_create_qh_pool;
542 uhci->term_td = uhci_alloc_td(uhci);
543 if (!uhci->term_td) {
544 dev_err(uhci_dev(uhci), "unable to allocate terminating TD\n");
545 goto err_alloc_term_td;
548 for (i = 0; i < UHCI_NUM_SKELQH; i++) {
549 uhci->skelqh[i] = uhci_alloc_qh(uhci);
550 if (!uhci->skelqh[i]) {
551 dev_err(uhci_dev(uhci), "unable to allocate QH\n");
552 goto err_alloc_skelqh;
557 * 8 Interrupt queues; link all higher int queues to int1,
558 * then link int1 to control and control to bulk
560 uhci->skel_int128_qh->link =
561 uhci->skel_int64_qh->link =
562 uhci->skel_int32_qh->link =
563 uhci->skel_int16_qh->link =
564 uhci->skel_int8_qh->link =
565 uhci->skel_int4_qh->link =
566 uhci->skel_int2_qh->link =
567 cpu_to_le32(uhci->skel_int1_qh->dma_handle) | UHCI_PTR_QH;
568 uhci->skel_int1_qh->link = cpu_to_le32(uhci->skel_ls_control_qh->dma_handle) | UHCI_PTR_QH;
570 uhci->skel_ls_control_qh->link = cpu_to_le32(uhci->skel_fs_control_qh->dma_handle) | UHCI_PTR_QH;
571 uhci->skel_fs_control_qh->link = cpu_to_le32(uhci->skel_bulk_qh->dma_handle) | UHCI_PTR_QH;
572 uhci->skel_bulk_qh->link = cpu_to_le32(uhci->skel_term_qh->dma_handle) | UHCI_PTR_QH;
574 /* This dummy TD is to work around a bug in Intel PIIX controllers */
575 uhci_fill_td(uhci->term_td, 0, (UHCI_NULL_DATA_SIZE << 21) |
576 (0x7f << TD_TOKEN_DEVADDR_SHIFT) | USB_PID_IN, 0);
577 uhci->term_td->link = cpu_to_le32(uhci->term_td->dma_handle);
579 uhci->skel_term_qh->link = UHCI_PTR_TERM;
580 uhci->skel_term_qh->element = cpu_to_le32(uhci->term_td->dma_handle);
583 * Fill the frame list: make all entries point to the proper
586 * The interrupt queues will be interleaved as evenly as possible.
587 * There's not much to be done about period-1 interrupts; they have
588 * to occur in every frame. But we can schedule period-2 interrupts
589 * in odd-numbered frames, period-4 interrupts in frames congruent
590 * to 2 (mod 4), and so on. This way each frame only has two
591 * interrupt QHs, which will help spread out bandwidth utilization.
593 for (i = 0; i < UHCI_NUMFRAMES; i++) {
597 * ffs (Find First bit Set) does exactly what we need:
598 * 1,3,5,... => ffs = 0 => use skel_int2_qh = skelqh[6],
599 * 2,6,10,... => ffs = 1 => use skel_int4_qh = skelqh[5], etc.
600 * ffs > 6 => not on any high-period queue, so use
601 * skel_int1_qh = skelqh[7].
602 * Add UHCI_NUMFRAMES to insure at least one bit is set.
604 irq = 6 - (int) __ffs(i + UHCI_NUMFRAMES);
608 /* Only place we don't use the frame list routines */
609 uhci->frame[i] = UHCI_PTR_QH |
610 cpu_to_le32(uhci->skelqh[irq]->dma_handle);
614 * Some architectures require a full mb() to enforce completion of
615 * the memory writes above before the I/O transfers in configure_hc().
627 for (i = 0; i < UHCI_NUM_SKELQH; i++) {
629 uhci_free_qh(uhci, uhci->skelqh[i]);
632 uhci_free_td(uhci, uhci->term_td);
635 dma_pool_destroy(uhci->qh_pool);
638 dma_pool_destroy(uhci->td_pool);
641 kfree(uhci->frame_cpu);
644 dma_free_coherent(uhci_dev(uhci),
645 UHCI_NUMFRAMES * sizeof(*uhci->frame),
646 uhci->frame, uhci->frame_dma_handle);
649 debugfs_remove(uhci->dentry);
651 err_create_debug_entry:
655 static void uhci_stop(struct usb_hcd *hcd)
657 struct uhci_hcd *uhci = hcd_to_uhci(hcd);
659 spin_lock_irq(&uhci->lock);
660 if (!uhci->hc_inaccessible)
662 uhci_scan_schedule(uhci, NULL);
663 spin_unlock_irq(&uhci->lock);
669 static int uhci_rh_suspend(struct usb_hcd *hcd)
671 struct uhci_hcd *uhci = hcd_to_uhci(hcd);
673 spin_lock_irq(&uhci->lock);
674 if (!uhci->hc_inaccessible) /* Not dead */
675 suspend_rh(uhci, UHCI_RH_SUSPENDED);
676 spin_unlock_irq(&uhci->lock);
680 static int uhci_rh_resume(struct usb_hcd *hcd)
682 struct uhci_hcd *uhci = hcd_to_uhci(hcd);
685 spin_lock_irq(&uhci->lock);
686 if (uhci->hc_inaccessible) {
687 if (uhci->rh_state == UHCI_RH_SUSPENDED) {
688 dev_warn(uhci_dev(uhci), "HC isn't running!\n");
691 /* Otherwise the HC is dead */
694 spin_unlock_irq(&uhci->lock);
698 static int uhci_suspend(struct usb_hcd *hcd, pm_message_t message)
700 struct uhci_hcd *uhci = hcd_to_uhci(hcd);
703 dev_dbg(uhci_dev(uhci), "%s\n", __FUNCTION__);
705 spin_lock_irq(&uhci->lock);
706 if (uhci->hc_inaccessible) /* Dead or already suspended */
709 if (uhci->rh_state > UHCI_RH_SUSPENDED) {
710 dev_warn(uhci_dev(uhci), "Root hub isn't suspended!\n");
711 hcd->state = HC_STATE_RUNNING;
716 /* All PCI host controllers are required to disable IRQ generation
717 * at the source, so we must turn off PIRQ.
719 pci_write_config_word(to_pci_dev(uhci_dev(uhci)), USBLEGSUP, 0);
720 uhci->hc_inaccessible = 1;
723 /* FIXME: Enable non-PME# remote wakeup? */
726 spin_unlock_irq(&uhci->lock);
730 static int uhci_resume(struct usb_hcd *hcd)
732 struct uhci_hcd *uhci = hcd_to_uhci(hcd);
734 dev_dbg(uhci_dev(uhci), "%s\n", __FUNCTION__);
736 if (uhci->rh_state == UHCI_RH_RESET) /* Dead */
738 spin_lock_irq(&uhci->lock);
740 /* FIXME: Disable non-PME# remote wakeup? */
742 uhci->hc_inaccessible = 0;
744 /* The BIOS may have changed the controller settings during a
745 * system wakeup. Check it and reconfigure to avoid problems.
747 check_and_reset_hc(uhci);
750 if (uhci->rh_state == UHCI_RH_RESET)
751 suspend_rh(uhci, UHCI_RH_SUSPENDED);
753 spin_unlock_irq(&uhci->lock);
755 if (!uhci->working_RD) {
756 /* Suspended root hub needs to be polled */
758 usb_hcd_poll_rh_status(hcd);
764 /* Wait until all the URBs for a particular device/endpoint are gone */
765 static void uhci_hcd_endpoint_disable(struct usb_hcd *hcd,
766 struct usb_host_endpoint *ep)
768 struct uhci_hcd *uhci = hcd_to_uhci(hcd);
770 wait_event_interruptible(uhci->waitqh, list_empty(&ep->urb_list));
773 static int uhci_hcd_get_frame_number(struct usb_hcd *hcd)
775 struct uhci_hcd *uhci = hcd_to_uhci(hcd);
780 /* Minimize latency by avoiding the spinlock */
781 local_irq_save(flags);
782 is_stopped = uhci->is_stopped;
784 frame_number = (is_stopped ? uhci->frame_number :
785 inw(uhci->io_addr + USBFRNUM));
786 local_irq_restore(flags);
790 static const char hcd_name[] = "uhci_hcd";
792 static const struct hc_driver uhci_driver = {
793 .description = hcd_name,
794 .product_desc = "UHCI Host Controller",
795 .hcd_priv_size = sizeof(struct uhci_hcd),
797 /* Generic hardware linkage */
801 /* Basic lifecycle operations */
805 .suspend = uhci_suspend,
806 .resume = uhci_resume,
807 .hub_suspend = uhci_rh_suspend,
808 .hub_resume = uhci_rh_resume,
812 .urb_enqueue = uhci_urb_enqueue,
813 .urb_dequeue = uhci_urb_dequeue,
815 .endpoint_disable = uhci_hcd_endpoint_disable,
816 .get_frame_number = uhci_hcd_get_frame_number,
818 .hub_status_data = uhci_hub_status_data,
819 .hub_control = uhci_hub_control,
822 static const struct pci_device_id uhci_pci_ids[] = { {
823 /* handle any USB UHCI controller */
824 PCI_DEVICE_CLASS(((PCI_CLASS_SERIAL_USB << 8) | 0x00), ~0),
825 .driver_data = (unsigned long) &uhci_driver,
826 }, { /* end: all zeroes */ }
829 MODULE_DEVICE_TABLE(pci, uhci_pci_ids);
831 static struct pci_driver uhci_pci_driver = {
832 .name = (char *)hcd_name,
833 .id_table = uhci_pci_ids,
835 .probe = usb_hcd_pci_probe,
836 .remove = usb_hcd_pci_remove,
837 .shutdown = uhci_shutdown,
840 .suspend = usb_hcd_pci_suspend,
841 .resume = usb_hcd_pci_resume,
845 static int __init uhci_hcd_init(void)
847 int retval = -ENOMEM;
849 printk(KERN_INFO DRIVER_DESC " " DRIVER_VERSION "\n");
855 errbuf = kmalloc(ERRBUF_LEN, GFP_KERNEL);
860 uhci_debugfs_root = debugfs_create_dir("uhci", NULL);
861 if (!uhci_debugfs_root)
864 uhci_up_cachep = kmem_cache_create("uhci_urb_priv",
865 sizeof(struct urb_priv), 0, 0, NULL, NULL);
869 retval = pci_register_driver(&uhci_pci_driver);
876 if (kmem_cache_destroy(uhci_up_cachep))
877 warn("not all urb_priv's were freed!");
880 debugfs_remove(uhci_debugfs_root);
890 static void __exit uhci_hcd_cleanup(void)
892 pci_unregister_driver(&uhci_pci_driver);
894 if (kmem_cache_destroy(uhci_up_cachep))
895 warn("not all urb_priv's were freed!");
897 debugfs_remove(uhci_debugfs_root);
901 module_init(uhci_hcd_init);
902 module_exit(uhci_hcd_cleanup);
904 MODULE_AUTHOR(DRIVER_AUTHOR);
905 MODULE_DESCRIPTION(DRIVER_DESC);
906 MODULE_LICENSE("GPL");