2 * Copyright (c) 2001 by David Brownell
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms of the GNU General Public License as published by the
6 * Free Software Foundation; either version 2 of the License, or (at your
7 * option) any later version.
9 * This program is distributed in the hope that it will be useful, but
10 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
11 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software Foundation,
16 * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19 /* this file is part of ehci-hcd.c */
21 /*-------------------------------------------------------------------------*/
24 * There's basically three types of memory:
25 * - data used only by the HCD ... kmalloc is fine
26 * - async and periodic schedules, shared by HC and HCD ... these
27 * need to use dma_pool or dma_alloc_coherent
28 * - driver buffers, read/written by HC ... single shot DMA mapped
30 * There's also PCI "register" data, which is memory mapped.
31 * No memory seen by this driver is pageable.
34 /*-------------------------------------------------------------------------*/
36 /* Allocate the key transfer structures from the previously allocated pool */
38 static inline void ehci_qtd_init (struct ehci_qtd *qtd, dma_addr_t dma)
40 memset (qtd, 0, sizeof *qtd);
42 qtd->hw_token = cpu_to_le32 (QTD_STS_HALT);
43 qtd->hw_next = EHCI_LIST_END;
44 qtd->hw_alt_next = EHCI_LIST_END;
45 INIT_LIST_HEAD (&qtd->qtd_list);
48 static struct ehci_qtd *ehci_qtd_alloc (struct ehci_hcd *ehci, gfp_t flags)
53 qtd = dma_pool_alloc (ehci->qtd_pool, flags, &dma);
55 ehci_qtd_init (qtd, dma);
60 static inline void ehci_qtd_free (struct ehci_hcd *ehci, struct ehci_qtd *qtd)
62 dma_pool_free (ehci->qtd_pool, qtd, qtd->qtd_dma);
66 static void qh_destroy (struct kref *kref)
68 struct ehci_qh *qh = container_of(kref, struct ehci_qh, kref);
69 struct ehci_hcd *ehci = qh->ehci;
71 /* clean qtds first, and know this is not linked */
72 if (!list_empty (&qh->qtd_list) || qh->qh_next.ptr) {
73 ehci_dbg (ehci, "unused qh not empty!\n");
77 ehci_qtd_free (ehci, qh->dummy);
78 dma_pool_free (ehci->qh_pool, qh, qh->qh_dma);
81 static struct ehci_qh *ehci_qh_alloc (struct ehci_hcd *ehci, gfp_t flags)
86 qh = (struct ehci_qh *)
87 dma_pool_alloc (ehci->qh_pool, flags, &dma);
91 memset (qh, 0, sizeof *qh);
95 // INIT_LIST_HEAD (&qh->qh_list);
96 INIT_LIST_HEAD (&qh->qtd_list);
97 #ifdef CONFIG_CPU_FREQ
98 INIT_LIST_HEAD (&qh->split_intr_qhs);
101 /* dummy td enables safe urb queuing */
102 qh->dummy = ehci_qtd_alloc (ehci, flags);
103 if (qh->dummy == NULL) {
104 ehci_dbg (ehci, "no dummy td\n");
105 dma_pool_free (ehci->qh_pool, qh, qh->qh_dma);
111 /* to share a qh (cpu threads, or hc) */
112 static inline struct ehci_qh *qh_get (struct ehci_qh *qh)
118 static inline void qh_put (struct ehci_qh *qh)
120 kref_put(&qh->kref, qh_destroy);
123 /*-------------------------------------------------------------------------*/
125 /* The queue heads and transfer descriptors are managed from pools tied
126 * to each of the "per device" structures.
127 * This is the initialisation and cleanup code.
130 static void ehci_mem_cleanup (struct ehci_hcd *ehci)
133 qh_put (ehci->async);
136 /* DMA consistent memory and pools */
138 dma_pool_destroy (ehci->qtd_pool);
139 ehci->qtd_pool = NULL;
142 dma_pool_destroy (ehci->qh_pool);
143 ehci->qh_pool = NULL;
147 dma_pool_destroy (ehci->itd_pool);
148 ehci->itd_pool = NULL;
151 dma_pool_destroy (ehci->sitd_pool);
152 ehci->sitd_pool = NULL;
155 dma_free_coherent (ehci_to_hcd(ehci)->self.controller,
156 ehci->periodic_size * sizeof (u32),
157 ehci->periodic, ehci->periodic_dma);
158 ehci->periodic = NULL;
160 /* shadow periodic table */
161 kfree(ehci->pshadow);
162 ehci->pshadow = NULL;
165 /* remember to add cleanup code (above) if you add anything here */
166 static int ehci_mem_init (struct ehci_hcd *ehci, gfp_t flags)
170 /* QTDs for control/bulk/intr transfers */
171 ehci->qtd_pool = dma_pool_create ("ehci_qtd",
172 ehci_to_hcd(ehci)->self.controller,
173 sizeof (struct ehci_qtd),
174 32 /* byte alignment (for hw parts) */,
175 4096 /* can't cross 4K */);
176 if (!ehci->qtd_pool) {
180 /* QHs for control/bulk/intr transfers */
181 ehci->qh_pool = dma_pool_create ("ehci_qh",
182 ehci_to_hcd(ehci)->self.controller,
183 sizeof (struct ehci_qh),
184 32 /* byte alignment (for hw parts) */,
185 4096 /* can't cross 4K */);
186 if (!ehci->qh_pool) {
189 ehci->async = ehci_qh_alloc (ehci, flags);
194 /* ITD for high speed ISO transfers */
195 ehci->itd_pool = dma_pool_create ("ehci_itd",
196 ehci_to_hcd(ehci)->self.controller,
197 sizeof (struct ehci_itd),
198 32 /* byte alignment (for hw parts) */,
199 4096 /* can't cross 4K */);
200 if (!ehci->itd_pool) {
204 /* SITD for full/low speed split ISO transfers */
205 ehci->sitd_pool = dma_pool_create ("ehci_sitd",
206 ehci_to_hcd(ehci)->self.controller,
207 sizeof (struct ehci_sitd),
208 32 /* byte alignment (for hw parts) */,
209 4096 /* can't cross 4K */);
210 if (!ehci->sitd_pool) {
214 /* Hardware periodic table */
215 ehci->periodic = (__le32 *)
216 dma_alloc_coherent (ehci_to_hcd(ehci)->self.controller,
217 ehci->periodic_size * sizeof(__le32),
218 &ehci->periodic_dma, 0);
219 if (ehci->periodic == NULL) {
222 for (i = 0; i < ehci->periodic_size; i++)
223 ehci->periodic [i] = EHCI_LIST_END;
225 /* software shadow of hardware table */
226 ehci->pshadow = kcalloc(ehci->periodic_size, sizeof(void *), flags);
227 if (ehci->pshadow != NULL)
231 ehci_dbg (ehci, "couldn't init memory\n");
232 ehci_mem_cleanup (ehci);