2 * Copyright (c) 2000-2004 by David Brownell
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms of the GNU General Public License as published by the
6 * Free Software Foundation; either version 2 of the License, or (at your
7 * option) any later version.
9 * This program is distributed in the hope that it will be useful, but
10 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
11 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software Foundation,
16 * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19 #include <linux/module.h>
20 #include <linux/pci.h>
21 #include <linux/dmapool.h>
22 #include <linux/kernel.h>
23 #include <linux/delay.h>
24 #include <linux/ioport.h>
25 #include <linux/sched.h>
26 #include <linux/slab.h>
27 #include <linux/errno.h>
28 #include <linux/init.h>
29 #include <linux/timer.h>
30 #include <linux/list.h>
31 #include <linux/interrupt.h>
32 #include <linux/reboot.h>
33 #include <linux/usb.h>
34 #include <linux/moduleparam.h>
35 #include <linux/dma-mapping.h>
36 #include <linux/debugfs.h>
38 #include "../core/hcd.h"
40 #include <asm/byteorder.h>
43 #include <asm/system.h>
44 #include <asm/unaligned.h>
46 /*-------------------------------------------------------------------------*/
49 * EHCI hc_driver implementation ... experimental, incomplete.
50 * Based on the final 1.0 register interface specification.
52 * USB 2.0 shows up in upcoming www.pcmcia.org technology.
53 * First was PCMCIA, like ISA; then CardBus, which is PCI.
54 * Next comes "CardBay", using USB 2.0 signals.
56 * Contains additional contributions by Brad Hards, Rory Bolt, and others.
57 * Special thanks to Intel and VIA for providing host controllers to
58 * test this driver on, and Cypress (including In-System Design) for
59 * providing early devices for those host controllers to talk to!
62 #define DRIVER_VERSION "10 Dec 2004"
63 #define DRIVER_AUTHOR "David Brownell"
64 #define DRIVER_DESC "USB 2.0 'Enhanced' Host Controller (EHCI) Driver"
66 static const char hcd_name [] = "ehci_hcd";
76 /* magic numbers that can affect system performance */
77 #define EHCI_TUNE_CERR 3 /* 0-3 qtd retries; 0 == don't stop */
78 #define EHCI_TUNE_RL_HS 4 /* nak throttle; see 4.9 */
79 #define EHCI_TUNE_RL_TT 0
80 #define EHCI_TUNE_MULT_HS 1 /* 1-3 transactions/uframe; 4.10.3 */
81 #define EHCI_TUNE_MULT_TT 1
82 #define EHCI_TUNE_FLS 2 /* (small) 256 frame schedule */
84 #define EHCI_IAA_MSECS 10 /* arbitrary */
85 #define EHCI_IO_JIFFIES (HZ/10) /* io watchdog > irq_thresh */
86 #define EHCI_ASYNC_JIFFIES (HZ/20) /* async idle timeout */
87 #define EHCI_SHRINK_JIFFIES (HZ/200) /* async qh unlink delay */
89 /* Initial IRQ latency: faster than hw default */
90 static int log2_irq_thresh = 0; // 0 to 6
91 module_param (log2_irq_thresh, int, S_IRUGO);
92 MODULE_PARM_DESC (log2_irq_thresh, "log2 IRQ latency, 1-64 microframes");
94 /* initial park setting: slower than hw default */
95 static unsigned park = 0;
96 module_param (park, uint, S_IRUGO);
97 MODULE_PARM_DESC (park, "park setting; 1-3 back-to-back async packets");
99 /* for flakey hardware, ignore overcurrent indicators */
100 static int ignore_oc = 0;
101 module_param (ignore_oc, bool, S_IRUGO);
102 MODULE_PARM_DESC (ignore_oc, "ignore bogus hardware overcurrent indications");
104 #define INTR_MASK (STS_IAA | STS_FATAL | STS_PCD | STS_ERR | STS_INT)
106 /*-------------------------------------------------------------------------*/
109 #include "ehci-dbg.c"
111 /*-------------------------------------------------------------------------*/
114 * handshake - spin reading hc until handshake completes or fails
115 * @ptr: address of hc register to be read
116 * @mask: bits to look at in result of read
117 * @done: value of those bits when handshake succeeds
118 * @usec: timeout in microseconds
120 * Returns negative errno, or zero on success
122 * Success happens when the "mask" bits have the specified value (hardware
123 * handshake done). There are two failure modes: "usec" have passed (major
124 * hardware flakeout), or the register reads as all-ones (hardware removed).
126 * That last failure should_only happen in cases like physical cardbus eject
127 * before driver shutdown. But it also seems to be caused by bugs in cardbus
128 * bridge shutdown: shutting down the bridge before the devices using it.
130 static int handshake (struct ehci_hcd *ehci, void __iomem *ptr,
131 u32 mask, u32 done, int usec)
136 result = ehci_readl(ehci, ptr);
137 if (result == ~(u32)0) /* card removed */
148 /* force HC to halt state from unknown (EHCI spec section 2.3) */
149 static int ehci_halt (struct ehci_hcd *ehci)
151 u32 temp = ehci_readl(ehci, &ehci->regs->status);
153 /* disable any irqs left enabled by previous code */
154 ehci_writel(ehci, 0, &ehci->regs->intr_enable);
156 if ((temp & STS_HALT) != 0)
159 temp = ehci_readl(ehci, &ehci->regs->command);
161 ehci_writel(ehci, temp, &ehci->regs->command);
162 return handshake (ehci, &ehci->regs->status,
163 STS_HALT, STS_HALT, 16 * 125);
166 /* put TDI/ARC silicon into EHCI mode */
167 static void tdi_reset (struct ehci_hcd *ehci)
169 u32 __iomem *reg_ptr;
172 reg_ptr = (u32 __iomem *)(((u8 __iomem *)ehci->regs) + USBMODE);
173 tmp = ehci_readl(ehci, reg_ptr);
174 tmp |= USBMODE_CM_HC;
175 /* The default byte access to MMR space is LE after
176 * controller reset. Set the required endian mode
177 * for transfer buffers to match the host microprocessor
179 if (ehci_big_endian_mmio(ehci))
181 ehci_writel(ehci, tmp, reg_ptr);
184 /* reset a non-running (STS_HALT == 1) controller */
185 static int ehci_reset (struct ehci_hcd *ehci)
188 u32 command = ehci_readl(ehci, &ehci->regs->command);
190 command |= CMD_RESET;
191 dbg_cmd (ehci, "reset", command);
192 ehci_writel(ehci, command, &ehci->regs->command);
193 ehci_to_hcd(ehci)->state = HC_STATE_HALT;
194 ehci->next_statechange = jiffies;
195 retval = handshake (ehci, &ehci->regs->command,
196 CMD_RESET, 0, 250 * 1000);
201 if (ehci_is_TDI(ehci))
207 /* idle the controller (from running) */
208 static void ehci_quiesce (struct ehci_hcd *ehci)
213 if (!HC_IS_RUNNING (ehci_to_hcd(ehci)->state))
217 /* wait for any schedule enables/disables to take effect */
218 temp = ehci_readl(ehci, &ehci->regs->command) << 10;
219 temp &= STS_ASS | STS_PSS;
220 if (handshake (ehci, &ehci->regs->status, STS_ASS | STS_PSS,
221 temp, 16 * 125) != 0) {
222 ehci_to_hcd(ehci)->state = HC_STATE_HALT;
226 /* then disable anything that's still active */
227 temp = ehci_readl(ehci, &ehci->regs->command);
228 temp &= ~(CMD_ASE | CMD_IAAD | CMD_PSE);
229 ehci_writel(ehci, temp, &ehci->regs->command);
231 /* hardware can take 16 microframes to turn off ... */
232 if (handshake (ehci, &ehci->regs->status, STS_ASS | STS_PSS,
234 ehci_to_hcd(ehci)->state = HC_STATE_HALT;
239 /*-------------------------------------------------------------------------*/
241 static void end_unlink_async(struct ehci_hcd *ehci);
242 static void ehci_work(struct ehci_hcd *ehci);
244 #include "ehci-hub.c"
245 #include "ehci-mem.c"
247 #include "ehci-sched.c"
249 /*-------------------------------------------------------------------------*/
251 static void ehci_iaa_watchdog(unsigned long param)
253 struct ehci_hcd *ehci = (struct ehci_hcd *) param;
256 spin_lock_irqsave (&ehci->lock, flags);
258 /* Lost IAA irqs wedge things badly; seen first with a vt8235.
259 * So we need this watchdog, but must protect it against both
260 * (a) SMP races against real IAA firing and retriggering, and
261 * (b) clean HC shutdown, when IAA watchdog was pending.
264 && !timer_pending(&ehci->iaa_watchdog)
265 && HC_IS_RUNNING(ehci_to_hcd(ehci)->state)) {
268 /* If we get here, IAA is *REALLY* late. It's barely
269 * conceivable that the system is so busy that CMD_IAAD
270 * is still legitimately set, so let's be sure it's
271 * clear before we read STS_IAA. (The HC should clear
272 * CMD_IAAD when it sets STS_IAA.)
274 cmd = ehci_readl(ehci, &ehci->regs->command);
276 ehci_writel(ehci, cmd & ~CMD_IAAD,
277 &ehci->regs->command);
279 /* If IAA is set here it either legitimately triggered
280 * before we cleared IAAD above (but _way_ late, so we'll
281 * still count it as lost) ... or a silicon erratum:
282 * - VIA seems to set IAA without triggering the IRQ;
283 * - IAAD potentially cleared without setting IAA.
285 status = ehci_readl(ehci, &ehci->regs->status);
286 if ((status & STS_IAA) || !(cmd & CMD_IAAD)) {
287 COUNT (ehci->stats.lost_iaa);
288 ehci_writel(ehci, STS_IAA, &ehci->regs->status);
291 ehci_vdbg(ehci, "IAA watchdog: status %x cmd %x\n",
293 end_unlink_async(ehci);
296 spin_unlock_irqrestore(&ehci->lock, flags);
299 static void ehci_watchdog(unsigned long param)
301 struct ehci_hcd *ehci = (struct ehci_hcd *) param;
304 spin_lock_irqsave(&ehci->lock, flags);
306 /* stop async processing after it's idled a bit */
307 if (test_bit (TIMER_ASYNC_OFF, &ehci->actions))
308 start_unlink_async (ehci, ehci->async);
310 /* ehci could run by timer, without IRQs ... */
313 spin_unlock_irqrestore (&ehci->lock, flags);
316 /* On some systems, leaving remote wakeup enabled prevents system shutdown.
317 * The firmware seems to think that powering off is a wakeup event!
318 * This routine turns off remote wakeup and everything else, on all ports.
320 static void ehci_turn_off_all_ports(struct ehci_hcd *ehci)
322 int port = HCS_N_PORTS(ehci->hcs_params);
325 ehci_writel(ehci, PORT_RWC_BITS,
326 &ehci->regs->port_status[port]);
329 /* ehci_shutdown kick in for silicon on any bus (not just pci, etc).
330 * This forcibly disables dma and IRQs, helping kexec and other cases
331 * where the next system software may expect clean state.
334 ehci_shutdown (struct usb_hcd *hcd)
336 struct ehci_hcd *ehci;
338 ehci = hcd_to_ehci (hcd);
339 (void) ehci_halt (ehci);
340 ehci_turn_off_all_ports(ehci);
342 /* make BIOS/etc use companion controller during reboot */
343 ehci_writel(ehci, 0, &ehci->regs->configured_flag);
345 /* unblock posted writes */
346 ehci_readl(ehci, &ehci->regs->configured_flag);
349 static void ehci_port_power (struct ehci_hcd *ehci, int is_on)
353 if (!HCS_PPC (ehci->hcs_params))
356 ehci_dbg (ehci, "...power%s ports...\n", is_on ? "up" : "down");
357 for (port = HCS_N_PORTS (ehci->hcs_params); port > 0; )
358 (void) ehci_hub_control(ehci_to_hcd(ehci),
359 is_on ? SetPortFeature : ClearPortFeature,
362 /* Flush those writes */
363 ehci_readl(ehci, &ehci->regs->command);
367 /*-------------------------------------------------------------------------*/
370 * ehci_work is called from some interrupts, timers, and so on.
371 * it calls driver completion functions, after dropping ehci->lock.
373 static void ehci_work (struct ehci_hcd *ehci)
375 timer_action_done (ehci, TIMER_IO_WATCHDOG);
377 /* another CPU may drop ehci->lock during a schedule scan while
378 * it reports urb completions. this flag guards against bogus
379 * attempts at re-entrant schedule scanning.
385 if (ehci->next_uframe != -1)
386 scan_periodic (ehci);
389 /* the IO watchdog guards against hardware or driver bugs that
390 * misplace IRQs, and should let us run completely without IRQs.
391 * such lossage has been observed on both VT6202 and VT8235.
393 if (HC_IS_RUNNING (ehci_to_hcd(ehci)->state) &&
394 (ehci->async->qh_next.ptr != NULL ||
395 ehci->periodic_sched != 0))
396 timer_action (ehci, TIMER_IO_WATCHDOG);
399 static void ehci_stop (struct usb_hcd *hcd)
401 struct ehci_hcd *ehci = hcd_to_ehci (hcd);
403 ehci_dbg (ehci, "stop\n");
405 /* Turn off port power on all root hub ports. */
406 ehci_port_power (ehci, 0);
408 /* no more interrupts ... */
409 del_timer_sync (&ehci->watchdog);
410 del_timer_sync(&ehci->iaa_watchdog);
412 spin_lock_irq(&ehci->lock);
413 if (HC_IS_RUNNING (hcd->state))
417 ehci_writel(ehci, 0, &ehci->regs->intr_enable);
418 spin_unlock_irq(&ehci->lock);
420 /* let companion controllers work when we aren't */
421 ehci_writel(ehci, 0, &ehci->regs->configured_flag);
423 remove_companion_file(ehci);
424 remove_debug_files (ehci);
426 /* root hub is shut down separately (first, when possible) */
427 spin_lock_irq (&ehci->lock);
430 spin_unlock_irq (&ehci->lock);
431 ehci_mem_cleanup (ehci);
434 ehci_dbg (ehci, "irq normal %ld err %ld reclaim %ld (lost %ld)\n",
435 ehci->stats.normal, ehci->stats.error, ehci->stats.reclaim,
436 ehci->stats.lost_iaa);
437 ehci_dbg (ehci, "complete %ld unlink %ld\n",
438 ehci->stats.complete, ehci->stats.unlink);
441 dbg_status (ehci, "ehci_stop completed",
442 ehci_readl(ehci, &ehci->regs->status));
445 /* one-time init, only for memory state */
446 static int ehci_init(struct usb_hcd *hcd)
448 struct ehci_hcd *ehci = hcd_to_ehci(hcd);
453 spin_lock_init(&ehci->lock);
455 init_timer(&ehci->watchdog);
456 ehci->watchdog.function = ehci_watchdog;
457 ehci->watchdog.data = (unsigned long) ehci;
459 init_timer(&ehci->iaa_watchdog);
460 ehci->iaa_watchdog.function = ehci_iaa_watchdog;
461 ehci->iaa_watchdog.data = (unsigned long) ehci;
464 * hw default: 1K periodic list heads, one per frame.
465 * periodic_size can shrink by USBCMD update if hcc_params allows.
467 ehci->periodic_size = DEFAULT_I_TDPS;
468 if ((retval = ehci_mem_init(ehci, GFP_KERNEL)) < 0)
471 /* controllers may cache some of the periodic schedule ... */
472 hcc_params = ehci_readl(ehci, &ehci->caps->hcc_params);
473 if (HCC_ISOC_CACHE(hcc_params)) // full frame cache
475 else // N microframes cached
476 ehci->i_thresh = 2 + HCC_ISOC_THRES(hcc_params);
478 ehci->reclaim = NULL;
479 ehci->next_uframe = -1;
482 * dedicate a qh for the async ring head, since we couldn't unlink
483 * a 'real' qh without stopping the async schedule [4.8]. use it
484 * as the 'reclamation list head' too.
485 * its dummy is used in hw_alt_next of many tds, to prevent the qh
486 * from automatically advancing to the next td after short reads.
488 ehci->async->qh_next.qh = NULL;
489 ehci->async->hw_next = QH_NEXT(ehci, ehci->async->qh_dma);
490 ehci->async->hw_info1 = cpu_to_hc32(ehci, QH_HEAD);
491 ehci->async->hw_token = cpu_to_hc32(ehci, QTD_STS_HALT);
492 ehci->async->hw_qtd_next = EHCI_LIST_END(ehci);
493 ehci->async->qh_state = QH_STATE_LINKED;
494 ehci->async->hw_alt_next = QTD_NEXT(ehci, ehci->async->dummy->qtd_dma);
496 /* clear interrupt enables, set irq latency */
497 if (log2_irq_thresh < 0 || log2_irq_thresh > 6)
499 temp = 1 << (16 + log2_irq_thresh);
500 if (HCC_CANPARK(hcc_params)) {
501 /* HW default park == 3, on hardware that supports it (like
502 * NVidia and ALI silicon), maximizes throughput on the async
503 * schedule by avoiding QH fetches between transfers.
505 * With fast usb storage devices and NForce2, "park" seems to
506 * make problems: throughput reduction (!), data errors...
509 park = min(park, (unsigned) 3);
513 ehci_dbg(ehci, "park %d\n", park);
515 if (HCC_PGM_FRAMELISTLEN(hcc_params)) {
516 /* periodic schedule size can be smaller than default */
518 temp |= (EHCI_TUNE_FLS << 2);
519 switch (EHCI_TUNE_FLS) {
520 case 0: ehci->periodic_size = 1024; break;
521 case 1: ehci->periodic_size = 512; break;
522 case 2: ehci->periodic_size = 256; break;
526 ehci->command = temp;
531 /* start HC running; it's halted, ehci_init() has been run (once) */
532 static int ehci_run (struct usb_hcd *hcd)
534 struct ehci_hcd *ehci = hcd_to_ehci (hcd);
539 hcd->uses_new_polling = 1;
542 /* EHCI spec section 4.1 */
543 if ((retval = ehci_reset(ehci)) != 0) {
544 ehci_mem_cleanup(ehci);
547 ehci_writel(ehci, ehci->periodic_dma, &ehci->regs->frame_list);
548 ehci_writel(ehci, (u32)ehci->async->qh_dma, &ehci->regs->async_next);
551 * hcc_params controls whether ehci->regs->segment must (!!!)
552 * be used; it constrains QH/ITD/SITD and QTD locations.
553 * pci_pool consistent memory always uses segment zero.
554 * streaming mappings for I/O buffers, like pci_map_single(),
555 * can return segments above 4GB, if the device allows.
557 * NOTE: the dma mask is visible through dma_supported(), so
558 * drivers can pass this info along ... like NETIF_F_HIGHDMA,
559 * Scsi_Host.highmem_io, and so forth. It's readonly to all
560 * host side drivers though.
562 hcc_params = ehci_readl(ehci, &ehci->caps->hcc_params);
563 if (HCC_64BIT_ADDR(hcc_params)) {
564 ehci_writel(ehci, 0, &ehci->regs->segment);
566 // this is deeply broken on almost all architectures
567 if (!dma_set_mask(hcd->self.controller, DMA_64BIT_MASK))
568 ehci_info(ehci, "enabled 64bit DMA\n");
573 // Philips, Intel, and maybe others need CMD_RUN before the
574 // root hub will detect new devices (why?); NEC doesn't
575 ehci->command &= ~(CMD_LRESET|CMD_IAAD|CMD_PSE|CMD_ASE|CMD_RESET);
576 ehci->command |= CMD_RUN;
577 ehci_writel(ehci, ehci->command, &ehci->regs->command);
578 dbg_cmd (ehci, "init", ehci->command);
581 * Start, enabling full USB 2.0 functionality ... usb 1.1 devices
582 * are explicitly handed to companion controller(s), so no TT is
583 * involved with the root hub. (Except where one is integrated,
584 * and there's no companion controller unless maybe for USB OTG.)
586 * Turning on the CF flag will transfer ownership of all ports
587 * from the companions to the EHCI controller. If any of the
588 * companions are in the middle of a port reset at the time, it
589 * could cause trouble. Write-locking ehci_cf_port_reset_rwsem
590 * guarantees that no resets are in progress. After we set CF,
591 * a short delay lets the hardware catch up; new resets shouldn't
592 * be started before the port switching actions could complete.
594 down_write(&ehci_cf_port_reset_rwsem);
595 hcd->state = HC_STATE_RUNNING;
596 ehci_writel(ehci, FLAG_CF, &ehci->regs->configured_flag);
597 ehci_readl(ehci, &ehci->regs->command); /* unblock posted writes */
599 up_write(&ehci_cf_port_reset_rwsem);
601 temp = HC_VERSION(ehci_readl(ehci, &ehci->caps->hc_capbase));
603 "USB %x.%x started, EHCI %x.%02x, driver %s%s\n",
604 ((ehci->sbrn & 0xf0)>>4), (ehci->sbrn & 0x0f),
605 temp >> 8, temp & 0xff, DRIVER_VERSION,
606 ignore_oc ? ", overcurrent ignored" : "");
608 ehci_writel(ehci, INTR_MASK,
609 &ehci->regs->intr_enable); /* Turn On Interrupts */
611 /* GRR this is run-once init(), being done every time the HC starts.
612 * So long as they're part of class devices, we can't do it init()
613 * since the class device isn't created that early.
615 create_debug_files(ehci);
616 create_companion_file(ehci);
621 /*-------------------------------------------------------------------------*/
623 static irqreturn_t ehci_irq (struct usb_hcd *hcd)
625 struct ehci_hcd *ehci = hcd_to_ehci (hcd);
626 u32 status, pcd_status = 0, cmd;
629 spin_lock (&ehci->lock);
631 status = ehci_readl(ehci, &ehci->regs->status);
633 /* e.g. cardbus physical eject */
634 if (status == ~(u32) 0) {
635 ehci_dbg (ehci, "device removed\n");
640 if (!status) { /* irq sharing? */
641 spin_unlock(&ehci->lock);
645 /* clear (just) interrupts */
646 ehci_writel(ehci, status, &ehci->regs->status);
647 cmd = ehci_readl(ehci, &ehci->regs->command);
651 /* unrequested/ignored: Frame List Rollover */
652 dbg_status (ehci, "irq", status);
655 /* INT, ERR, and IAA interrupt rates can be throttled */
657 /* normal [4.15.1.2] or error [4.15.1.1] completion */
658 if (likely ((status & (STS_INT|STS_ERR)) != 0)) {
659 if (likely ((status & STS_ERR) == 0))
660 COUNT (ehci->stats.normal);
662 COUNT (ehci->stats.error);
666 /* complete the unlinking of some qh [4.15.2.3] */
667 if (status & STS_IAA) {
668 /* guard against (alleged) silicon errata */
669 if (cmd & CMD_IAAD) {
670 ehci_writel(ehci, cmd & ~CMD_IAAD,
671 &ehci->regs->command);
672 ehci_dbg(ehci, "IAA with IAAD still set?\n");
675 COUNT(ehci->stats.reclaim);
676 end_unlink_async(ehci);
678 ehci_dbg(ehci, "IAA with nothing to reclaim?\n");
681 /* remote wakeup [4.3.1] */
682 if (status & STS_PCD) {
683 unsigned i = HCS_N_PORTS (ehci->hcs_params);
686 /* resume root hub? */
687 if (!(ehci_readl(ehci, &ehci->regs->command) & CMD_RUN))
688 usb_hcd_resume_root_hub(hcd);
691 int pstatus = ehci_readl(ehci,
692 &ehci->regs->port_status [i]);
694 if (pstatus & PORT_OWNER)
696 if (!(pstatus & PORT_RESUME)
697 || ehci->reset_done [i] != 0)
700 /* start 20 msec resume signaling from this port,
701 * and make khubd collect PORT_STAT_C_SUSPEND to
702 * stop that signaling.
704 ehci->reset_done [i] = jiffies + msecs_to_jiffies (20);
705 ehci_dbg (ehci, "port %d remote wakeup\n", i + 1);
706 mod_timer(&hcd->rh_timer, ehci->reset_done[i]);
710 /* PCI errors [4.15.2.4] */
711 if (unlikely ((status & STS_FATAL) != 0)) {
712 /* bogus "fatal" IRQs appear on some chips... why? */
713 status = ehci_readl(ehci, &ehci->regs->status);
714 dbg_cmd (ehci, "fatal", ehci_readl(ehci,
715 &ehci->regs->command));
716 dbg_status (ehci, "fatal", status);
717 if (status & STS_HALT) {
718 ehci_err (ehci, "fatal error\n");
721 ehci_writel(ehci, 0, &ehci->regs->configured_flag);
722 /* generic layer kills/unlinks all urbs, then
723 * uses ehci_stop to clean up the rest
731 spin_unlock (&ehci->lock);
732 if (pcd_status & STS_PCD)
733 usb_hcd_poll_rh_status(hcd);
737 /*-------------------------------------------------------------------------*/
740 * non-error returns are a promise to giveback() the urb later
741 * we drop ownership so next owner (or urb unlink) can get it
743 * urb + dev is in hcd.self.controller.urb_list
744 * we're queueing TDs onto software and hardware lists
746 * hcd-specific init for hcpriv hasn't been done yet
748 * NOTE: control, bulk, and interrupt share the same code to append TDs
749 * to a (possibly active) QH, and the same QH scanning code.
751 static int ehci_urb_enqueue (
756 struct ehci_hcd *ehci = hcd_to_ehci (hcd);
757 struct list_head qtd_list;
759 INIT_LIST_HEAD (&qtd_list);
761 switch (usb_pipetype (urb->pipe)) {
762 // case PIPE_CONTROL:
765 if (!qh_urb_transaction (ehci, urb, &qtd_list, mem_flags))
767 return submit_async(ehci, urb, &qtd_list, mem_flags);
770 if (!qh_urb_transaction (ehci, urb, &qtd_list, mem_flags))
772 return intr_submit(ehci, urb, &qtd_list, mem_flags);
774 case PIPE_ISOCHRONOUS:
775 if (urb->dev->speed == USB_SPEED_HIGH)
776 return itd_submit (ehci, urb, mem_flags);
778 return sitd_submit (ehci, urb, mem_flags);
782 static void unlink_async (struct ehci_hcd *ehci, struct ehci_qh *qh)
785 if (!HC_IS_RUNNING(ehci_to_hcd(ehci)->state) && ehci->reclaim)
786 end_unlink_async(ehci);
788 /* if it's not linked then there's nothing to do */
789 if (qh->qh_state != QH_STATE_LINKED)
792 /* defer till later if busy */
793 else if (ehci->reclaim) {
794 struct ehci_qh *last;
796 for (last = ehci->reclaim;
798 last = last->reclaim)
800 qh->qh_state = QH_STATE_UNLINK_WAIT;
803 /* start IAA cycle */
805 start_unlink_async (ehci, qh);
808 /* remove from hardware lists
809 * completions normally happen asynchronously
812 static int ehci_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status)
814 struct ehci_hcd *ehci = hcd_to_ehci (hcd);
819 spin_lock_irqsave (&ehci->lock, flags);
820 rc = usb_hcd_check_unlink_urb(hcd, urb, status);
824 switch (usb_pipetype (urb->pipe)) {
825 // case PIPE_CONTROL:
828 qh = (struct ehci_qh *) urb->hcpriv;
831 switch (qh->qh_state) {
832 case QH_STATE_LINKED:
833 case QH_STATE_COMPLETING:
834 unlink_async(ehci, qh);
836 case QH_STATE_UNLINK:
837 case QH_STATE_UNLINK_WAIT:
838 /* already started */
847 qh = (struct ehci_qh *) urb->hcpriv;
850 switch (qh->qh_state) {
851 case QH_STATE_LINKED:
852 intr_deschedule (ehci, qh);
855 qh_completions (ehci, qh);
858 ehci_dbg (ehci, "bogus qh %p state %d\n",
863 /* reschedule QH iff another request is queued */
864 if (!list_empty (&qh->qtd_list)
865 && HC_IS_RUNNING (hcd->state)) {
866 rc = qh_schedule(ehci, qh);
868 /* An error here likely indicates handshake failure
869 * or no space left in the schedule. Neither fault
870 * should happen often ...
872 * FIXME kill the now-dysfunctional queued urbs
876 "can't reschedule qh %p, err %d",
881 case PIPE_ISOCHRONOUS:
884 // wait till next completion, do it then.
885 // completion irqs can wait up to 1024 msec,
889 spin_unlock_irqrestore (&ehci->lock, flags);
893 /*-------------------------------------------------------------------------*/
895 // bulk qh holds the data toggle
898 ehci_endpoint_disable (struct usb_hcd *hcd, struct usb_host_endpoint *ep)
900 struct ehci_hcd *ehci = hcd_to_ehci (hcd);
902 struct ehci_qh *qh, *tmp;
904 /* ASSERT: any requests/urbs are being unlinked */
905 /* ASSERT: nobody can be submitting urbs for this any more */
908 spin_lock_irqsave (&ehci->lock, flags);
913 /* endpoints can be iso streams. for now, we don't
914 * accelerate iso completions ... so spin a while.
916 if (qh->hw_info1 == 0) {
917 ehci_vdbg (ehci, "iso delay\n");
921 if (!HC_IS_RUNNING (hcd->state))
922 qh->qh_state = QH_STATE_IDLE;
923 switch (qh->qh_state) {
924 case QH_STATE_LINKED:
925 for (tmp = ehci->async->qh_next.qh;
927 tmp = tmp->qh_next.qh)
929 /* periodic qh self-unlinks on empty */
932 unlink_async (ehci, qh);
934 case QH_STATE_UNLINK: /* wait for hw to finish? */
935 case QH_STATE_UNLINK_WAIT:
937 spin_unlock_irqrestore (&ehci->lock, flags);
938 schedule_timeout_uninterruptible(1);
940 case QH_STATE_IDLE: /* fully unlinked */
941 if (list_empty (&qh->qtd_list)) {
945 /* else FALL THROUGH */
948 /* caller was supposed to have unlinked any requests;
949 * that's not our job. just leak this memory.
951 ehci_err (ehci, "qh %p (#%02x) state %d%s\n",
952 qh, ep->desc.bEndpointAddress, qh->qh_state,
953 list_empty (&qh->qtd_list) ? "" : "(has tds)");
958 spin_unlock_irqrestore (&ehci->lock, flags);
962 static int ehci_get_frame (struct usb_hcd *hcd)
964 struct ehci_hcd *ehci = hcd_to_ehci (hcd);
965 return (ehci_readl(ehci, &ehci->regs->frame_index) >> 3) %
969 /*-------------------------------------------------------------------------*/
971 #define DRIVER_INFO DRIVER_VERSION " " DRIVER_DESC
973 MODULE_DESCRIPTION (DRIVER_INFO);
974 MODULE_AUTHOR (DRIVER_AUTHOR);
975 MODULE_LICENSE ("GPL");
978 #include "ehci-pci.c"
979 #define PCI_DRIVER ehci_pci_driver
982 #ifdef CONFIG_USB_EHCI_FSL
983 #include "ehci-fsl.c"
984 #define PLATFORM_DRIVER ehci_fsl_driver
987 #ifdef CONFIG_SOC_AU1200
988 #include "ehci-au1xxx.c"
989 #define PLATFORM_DRIVER ehci_hcd_au1xxx_driver
992 #ifdef CONFIG_PPC_PS3
993 #include "ehci-ps3.c"
994 #define PS3_SYSTEM_BUS_DRIVER ps3_ehci_driver
997 #if defined(CONFIG_440EPX) && !defined(CONFIG_PPC_MERGE)
998 #include "ehci-ppc-soc.c"
999 #define PLATFORM_DRIVER ehci_ppc_soc_driver
1002 #ifdef CONFIG_USB_EHCI_HCD_PPC_OF
1003 #include "ehci-ppc-of.c"
1004 #define OF_PLATFORM_DRIVER ehci_hcd_ppc_of_driver
1007 #ifdef CONFIG_PLAT_ORION
1008 #include "ehci-orion.c"
1009 #define PLATFORM_DRIVER ehci_orion_driver
1012 #ifdef CONFIG_ARCH_IXP4XX
1013 #include "ehci-ixp4xx.c"
1014 #define PLATFORM_DRIVER ixp4xx_ehci_driver
1017 #if !defined(PCI_DRIVER) && !defined(PLATFORM_DRIVER) && \
1018 !defined(PS3_SYSTEM_BUS_DRIVER) && !defined(OF_PLATFORM_DRIVER)
1019 #error "missing bus glue for ehci-hcd"
1022 static int __init ehci_hcd_init(void)
1026 pr_debug("%s: block sizes: qh %Zd qtd %Zd itd %Zd sitd %Zd\n",
1028 sizeof(struct ehci_qh), sizeof(struct ehci_qtd),
1029 sizeof(struct ehci_itd), sizeof(struct ehci_sitd));
1032 ehci_debug_root = debugfs_create_dir("ehci", NULL);
1033 if (!ehci_debug_root)
1037 #ifdef PLATFORM_DRIVER
1038 retval = platform_driver_register(&PLATFORM_DRIVER);
1044 retval = pci_register_driver(&PCI_DRIVER);
1049 #ifdef PS3_SYSTEM_BUS_DRIVER
1050 retval = ps3_ehci_driver_register(&PS3_SYSTEM_BUS_DRIVER);
1055 #ifdef OF_PLATFORM_DRIVER
1056 retval = of_register_platform_driver(&OF_PLATFORM_DRIVER);
1062 #ifdef OF_PLATFORM_DRIVER
1063 /* of_unregister_platform_driver(&OF_PLATFORM_DRIVER); */
1066 #ifdef PS3_SYSTEM_BUS_DRIVER
1067 ps3_ehci_driver_unregister(&PS3_SYSTEM_BUS_DRIVER);
1071 pci_unregister_driver(&PCI_DRIVER);
1074 #ifdef PLATFORM_DRIVER
1075 platform_driver_unregister(&PLATFORM_DRIVER);
1079 debugfs_remove(ehci_debug_root);
1080 ehci_debug_root = NULL;
1084 module_init(ehci_hcd_init);
1086 static void __exit ehci_hcd_cleanup(void)
1088 #ifdef OF_PLATFORM_DRIVER
1089 of_unregister_platform_driver(&OF_PLATFORM_DRIVER);
1091 #ifdef PLATFORM_DRIVER
1092 platform_driver_unregister(&PLATFORM_DRIVER);
1095 pci_unregister_driver(&PCI_DRIVER);
1097 #ifdef PS3_SYSTEM_BUS_DRIVER
1098 ps3_ehci_driver_unregister(&PS3_SYSTEM_BUS_DRIVER);
1101 debugfs_remove(ehci_debug_root);
1104 module_exit(ehci_hcd_cleanup);