err.no Git - linux-2.6/blob - drivers/usb/gadget/omap_udc.c

   1 /*
   2  * omap_udc.c -- for OMAP full speed udc; most chips support OTG.
   3  *
   4  * Copyright (C) 2004 Texas Instruments, Inc.
   5  * Copyright (C) 2004-2005 David Brownell
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License as published by
   9  * the Free Software Foundation; either version 2 of the License, or
  10  * (at your option) any later version.
  11  *
  12  * This program is distributed in the hope that it will be useful,
  13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15  * GNU General Public License for more details.
  16  *
  17  * You should have received a copy of the GNU General Public License
  18  * along with this program; if not, write to the Free Software
  19  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  20  */
  21
  22 #undef  DEBUG
  23 #undef  VERBOSE
  24
  25 #include <linux/config.h>
  26 #include <linux/module.h>
  27 #include <linux/kernel.h>
  28 #include <linux/ioport.h>
  29 #include <linux/types.h>
  30 #include <linux/errno.h>
  31 #include <linux/delay.h>
  32 #include <linux/sched.h>
  33 #include <linux/slab.h>
  34 #include <linux/init.h>
  35 #include <linux/timer.h>
  36 #include <linux/list.h>
  37 #include <linux/interrupt.h>
  38 #include <linux/proc_fs.h>
  39 #include <linux/mm.h>
  40 #include <linux/moduleparam.h>
  41 #include <linux/device.h>
  42 #include <linux/usb_ch9.h>
  43 #include <linux/usb_gadget.h>
  44 #include <linux/usb_otg.h>
  45 #include <linux/dma-mapping.h>
  46
  47 #include <asm/byteorder.h>
  48 #include <asm/io.h>
  49 #include <asm/irq.h>
  50 #include <asm/system.h>
  51 #include <asm/unaligned.h>
  52 #include <asm/mach-types.h>
  53
  54 #include <asm/arch/dma.h>
  55 #include <asm/arch/usb.h>
  56
  57 #include "omap_udc.h"
  58
  59 #undef  USB_TRACE
  60
  61 /* bulk DMA seems to be behaving for both IN and OUT */
  62 #define USE_DMA
  63
  64 /* ISO too */
  65 #define USE_ISO
  66
  67 #define DRIVER_DESC     "OMAP UDC driver"
  68 #define DRIVER_VERSION  "4 October 2004"
  69
  70 #define DMA_ADDR_INVALID        (~(dma_addr_t)0)
  71
  72
  73 /*
  74  * The OMAP UDC needs _very_ early endpoint setup:  before enabling the
  75  * D+ pullup to allow enumeration.  That's too early for the gadget
  76  * framework to use from usb_endpoint_enable(), which happens after
  77  * enumeration as part of activating an interface.  (But if we add an
  78  * optional new "UDC not yet running" state to the gadget driver model,
  79  * even just during driver binding, the endpoint autoconfig logic is the
  80  * natural spot to manufacture new endpoints.)
  81  *
  82  * So instead of using endpoint enable calls to control the hardware setup,
  83  * this driver defines a "fifo mode" parameter.  It's used during driver
  84  * initialization to choose among a set of pre-defined endpoint configs.
  85  * See omap_udc_setup() for available modes, or to add others.  That code
  86  * lives in an init section, so use this driver as a module if you need
  87  * to change the fifo mode after the kernel boots.
  88  *
  89  * Gadget drivers normally ignore endpoints they don't care about, and
  90  * won't include them in configuration descriptors.  That means only
  91  * misbehaving hosts would even notice they exist.
  92  */
  93 #ifdef  USE_ISO
  94 static unsigned fifo_mode = 3;
  95 #else
  96 static unsigned fifo_mode = 0;
  97 #endif
  98
  99 /* "modprobe omap_udc fifo_mode=42", or else as a kernel
 100  * boot parameter "omap_udc:fifo_mode=42"
 101  */
 102 module_param (fifo_mode, uint, 0);
 103 MODULE_PARM_DESC (fifo_mode, "endpoint setup (0 == default)");
 104
 105 #ifdef  USE_DMA
 106 static unsigned use_dma = 1;
 107
 108 /* "modprobe omap_udc use_dma=y", or else as a kernel
 109  * boot parameter "omap_udc:use_dma=y"
 110  */
 111 module_param (use_dma, bool, 0);
 112 MODULE_PARM_DESC (use_dma, "enable/disable DMA");
 113 #else   /* !USE_DMA */
 114
 115 /* save a bit of code */
 116 #define use_dma         0
 117 #endif  /* !USE_DMA */
 118
 119
 120 static const char driver_name [] = "omap_udc";
 121 static const char driver_desc [] = DRIVER_DESC;
 122
 123 /*-------------------------------------------------------------------------*/
 124
 125 /* there's a notion of "current endpoint" for modifying endpoint
 126  * state, and PIO access to its FIFO.
 127  */
 128
 129 static void use_ep(struct omap_ep *ep, u16 select)
 130 {
 131         u16     num = ep->bEndpointAddress & 0x0f;
 132
 133         if (ep->bEndpointAddress & USB_DIR_IN)
 134                 num |= UDC_EP_DIR;
 135         UDC_EP_NUM_REG = num | select;
 136         /* when select, MUST deselect later !! */
 137 }
 138
 139 static inline void deselect_ep(void)
 140 {
 141         UDC_EP_NUM_REG &= ~UDC_EP_SEL;
 142         /* 6 wait states before TX will happen */
 143 }
 144
 145 static void dma_channel_claim(struct omap_ep *ep, unsigned preferred);
 146
 147 /*-------------------------------------------------------------------------*/
 148
 149 static int omap_ep_enable(struct usb_ep *_ep,
 150                 const struct usb_endpoint_descriptor *desc)
 151 {
 152         struct omap_ep  *ep = container_of(_ep, struct omap_ep, ep);
 153         struct omap_udc *udc;
 154         unsigned long   flags;
 155         u16             maxp;
 156
 157         /* catch various bogus parameters */
 158         if (!_ep || !desc || ep->desc
 159                         || desc->bDescriptorType != USB_DT_ENDPOINT
 160                         || ep->bEndpointAddress != desc->bEndpointAddress
 161                         || ep->maxpacket < le16_to_cpu
 162                                                 (desc->wMaxPacketSize)) {
 163                 DBG("%s, bad ep or descriptor\n", __FUNCTION__);
 164                 return -EINVAL;
 165         }
 166         maxp = le16_to_cpu (desc->wMaxPacketSize);
 167         if ((desc->bmAttributes == USB_ENDPOINT_XFER_BULK
 168                                 && maxp != ep->maxpacket)
 169                         || desc->wMaxPacketSize > ep->maxpacket
 170                         || !desc->wMaxPacketSize) {
 171                 DBG("%s, bad %s maxpacket\n", __FUNCTION__, _ep->name);
 172                 return -ERANGE;
 173         }
 174
 175 #ifdef  USE_ISO
 176         if ((desc->bmAttributes == USB_ENDPOINT_XFER_ISOC
 177                                 && desc->bInterval != 1)) {
 178                 /* hardware wants period = 1; USB allows 2^(Interval-1) */
 179                 DBG("%s, unsupported ISO period %dms\n", _ep->name,
 180                                 1 << (desc->bInterval - 1));
 181                 return -EDOM;
 182         }
 183 #else
 184         if (desc->bmAttributes == USB_ENDPOINT_XFER_ISOC) {
 185                 DBG("%s, ISO nyet\n", _ep->name);
 186                 return -EDOM;
 187         }
 188 #endif
 189
 190         /* xfer types must match, except that interrupt ~= bulk */
 191         if (ep->bmAttributes != desc->bmAttributes
 192                         && ep->bmAttributes != USB_ENDPOINT_XFER_BULK
 193                         && desc->bmAttributes != USB_ENDPOINT_XFER_INT) {
 194                 DBG("%s, %s type mismatch\n", __FUNCTION__, _ep->name);
 195                 return -EINVAL;
 196         }
 197
 198         udc = ep->udc;
 199         if (!udc->driver || udc->gadget.speed == USB_SPEED_UNKNOWN) {
 200                 DBG("%s, bogus device state\n", __FUNCTION__);
 201                 return -ESHUTDOWN;
 202         }
 203
 204         spin_lock_irqsave(&udc->lock, flags);
 205
 206         ep->desc = desc;
 207         ep->irqs = 0;
 208         ep->stopped = 0;
 209         ep->ep.maxpacket = maxp;
 210
 211         /* set endpoint to initial state */
 212         ep->dma_channel = 0;
 213         ep->has_dma = 0;
 214         ep->lch = -1;
 215         use_ep(ep, UDC_EP_SEL);
 216         UDC_CTRL_REG = UDC_RESET_EP;
 217         ep->ackwait = 0;
 218         deselect_ep();
 219
 220         if (ep->bmAttributes == USB_ENDPOINT_XFER_ISOC)
 221                 list_add(&ep->iso, &udc->iso);
 222
 223         /* maybe assign a DMA channel to this endpoint */
 224         if (use_dma && desc->bmAttributes == USB_ENDPOINT_XFER_BULK)
 225                 /* FIXME ISO can dma, but prefers first channel */
 226                 dma_channel_claim(ep, 0);
 227
 228         /* PIO OUT may RX packets */
 229         if (desc->bmAttributes != USB_ENDPOINT_XFER_ISOC
 230                         && !ep->has_dma
 231                         && !(ep->bEndpointAddress & USB_DIR_IN)) {
 232                 UDC_CTRL_REG = UDC_SET_FIFO_EN;
 233                 ep->ackwait = 1 + ep->double_buf;
 234         }
 235
 236         spin_unlock_irqrestore(&udc->lock, flags);
 237         VDBG("%s enabled\n", _ep->name);
 238         return 0;
 239 }
 240
 241 static void nuke(struct omap_ep *, int status);
 242
 243 static int omap_ep_disable(struct usb_ep *_ep)
 244 {
 245         struct omap_ep  *ep = container_of(_ep, struct omap_ep, ep);
 246         unsigned long   flags;
 247
 248         if (!_ep || !ep->desc) {
 249                 DBG("%s, %s not enabled\n", __FUNCTION__,
 250                         _ep ? ep->ep.name : NULL);
 251                 return -EINVAL;
 252         }
 253
 254         spin_lock_irqsave(&ep->udc->lock, flags);
 255         ep->desc = NULL;
 256         nuke (ep, -ESHUTDOWN);
 257         ep->ep.maxpacket = ep->maxpacket;
 258         ep->has_dma = 0;
 259         UDC_CTRL_REG = UDC_SET_HALT;
 260         list_del_init(&ep->iso);
 261         del_timer(&ep->timer);
 262
 263         spin_unlock_irqrestore(&ep->udc->lock, flags);
 264
 265         VDBG("%s disabled\n", _ep->name);
 266         return 0;
 267 }
 268
 269 /*-------------------------------------------------------------------------*/
 270
 271 static struct usb_request *
 272 omap_alloc_request(struct usb_ep *ep, int gfp_flags)
 273 {
 274         struct omap_req *req;
 275
 276         req = kmalloc(sizeof *req, gfp_flags);
 277         if (req) {
 278                 memset (req, 0, sizeof *req);
 279                 req->req.dma = DMA_ADDR_INVALID;
 280                 INIT_LIST_HEAD (&req->queue);
 281         }
 282         return &req->req;
 283 }
 284
 285 static void
 286 omap_free_request(struct usb_ep *ep, struct usb_request *_req)
 287 {
 288         struct omap_req *req = container_of(_req, struct omap_req, req);
 289
 290         if (_req)
 291                 kfree (req);
 292 }
 293
 294 /*-------------------------------------------------------------------------*/
 295
 296 static void *
 297 omap_alloc_buffer(
 298         struct usb_ep   *_ep,
 299         unsigned        bytes,
 300         dma_addr_t      *dma,
 301         int             gfp_flags
 302 )
 303 {
 304         void            *retval;
 305         struct omap_ep  *ep;
 306
 307         ep = container_of(_ep, struct omap_ep, ep);
 308         if (use_dma && ep->has_dma) {
 309                 static int      warned;
 310                 if (!warned && bytes < PAGE_SIZE) {
 311                         dev_warn(ep->udc->gadget.dev.parent,
 312                                 "using dma_alloc_coherent for "
 313                                 "small allocations wastes memory\n");
 314                         warned++;
 315                 }
 316                 return dma_alloc_coherent(ep->udc->gadget.dev.parent,
 317                                 bytes, dma, gfp_flags);
 318         }
 319
 320         retval = kmalloc(bytes, gfp_flags);
 321         if (retval)
 322                 *dma = virt_to_phys(retval);
 323         return retval;
 324 }
 325
 326 static void omap_free_buffer(
 327         struct usb_ep   *_ep,
 328         void            *buf,
 329         dma_addr_t      dma,
 330         unsigned        bytes
 331 )
 332 {
 333         struct omap_ep  *ep;
 334
 335         ep = container_of(_ep, struct omap_ep, ep);
 336         if (use_dma && _ep && ep->has_dma)
 337                 dma_free_coherent(ep->udc->gadget.dev.parent, bytes, buf, dma);
 338         else
 339                 kfree (buf);
 340 }
 341
 342 /*-------------------------------------------------------------------------*/
 343
 344 static void
 345 done(struct omap_ep *ep, struct omap_req *req, int status)
 346 {
 347         unsigned                stopped = ep->stopped;
 348
 349         list_del_init(&req->queue);
 350
 351         if (req->req.status == -EINPROGRESS)
 352                 req->req.status = status;
 353         else
 354                 status = req->req.status;
 355
 356         if (use_dma && ep->has_dma) {
 357                 if (req->mapped) {
 358                         dma_unmap_single(ep->udc->gadget.dev.parent,
 359                                 req->req.dma, req->req.length,
 360                                 (ep->bEndpointAddress & USB_DIR_IN)
 361                                         ? DMA_TO_DEVICE
 362                                         : DMA_FROM_DEVICE);
 363                         req->req.dma = DMA_ADDR_INVALID;
 364                         req->mapped = 0;
 365                 } else
 366                         dma_sync_single_for_cpu(ep->udc->gadget.dev.parent,
 367                                 req->req.dma, req->req.length,
 368                                 (ep->bEndpointAddress & USB_DIR_IN)
 369                                         ? DMA_TO_DEVICE
 370                                         : DMA_FROM_DEVICE);
 371         }
 372
 373 #ifndef USB_TRACE
 374         if (status && status != -ESHUTDOWN)
 375 #endif
 376                 VDBG("complete %s req %p stat %d len %u/%u\n",
 377                         ep->ep.name, &req->req, status,
 378                         req->req.actual, req->req.length);
 379
 380         /* don't modify queue heads during completion callback */
 381         ep->stopped = 1;
 382         spin_unlock(&ep->udc->lock);
 383         req->req.complete(&ep->ep, &req->req);
 384         spin_lock(&ep->udc->lock);
 385         ep->stopped = stopped;
 386 }
 387
 388 /*-------------------------------------------------------------------------*/
 389
 390 #define UDC_FIFO_FULL           (UDC_NON_ISO_FIFO_FULL | UDC_ISO_FIFO_FULL)
 391 #define UDC_FIFO_UNWRITABLE     (UDC_EP_HALTED | UDC_FIFO_FULL)
 392
 393 #define FIFO_EMPTY      (UDC_NON_ISO_FIFO_EMPTY | UDC_ISO_FIFO_EMPTY)
 394 #define FIFO_UNREADABLE (UDC_EP_HALTED | FIFO_EMPTY)
 395
 396 static inline int
 397 write_packet(u8 *buf, struct omap_req *req, unsigned max)
 398 {
 399         unsigned        len;
 400         u16             *wp;
 401
 402         len = min(req->req.length - req->req.actual, max);
 403         req->req.actual += len;
 404
 405         max = len;
 406         if (likely((((int)buf) & 1) == 0)) {
 407                 wp = (u16 *)buf;
 408                 while (max >= 2) {
 409                         UDC_DATA_REG = *wp++;
 410                         max -= 2;
 411                 }
 412                 buf = (u8 *)wp;
 413         }
 414         while (max--)
 415                 *(volatile u8 *)&UDC_DATA_REG = *buf++;
 416         return len;
 417 }
 418
 419 // FIXME change r/w fifo calling convention
 420
 421
 422 // return:  0 = still running, 1 = completed, negative = errno
 423 static int write_fifo(struct omap_ep *ep, struct omap_req *req)
 424 {
 425         u8              *buf;
 426         unsigned        count;
 427         int             is_last;
 428         u16             ep_stat;
 429
 430         buf = req->req.buf + req->req.actual;
 431         prefetch(buf);
 432
 433         /* PIO-IN isn't double buffered except for iso */
 434         ep_stat = UDC_STAT_FLG_REG;
 435         if (ep_stat & UDC_FIFO_UNWRITABLE)
 436                 return 0;
 437
 438         count = ep->ep.maxpacket;
 439         count = write_packet(buf, req, count);
 440         UDC_CTRL_REG = UDC_SET_FIFO_EN;
 441         ep->ackwait = 1;
 442
 443         /* last packet is often short (sometimes a zlp) */
 444         if (count != ep->ep.maxpacket)
 445                 is_last = 1;
 446         else if (req->req.length == req->req.actual
 447                         && !req->req.zero)
 448                 is_last = 1;
 449         else
 450                 is_last = 0;
 451
 452         /* NOTE:  requests complete when all IN data is in a
 453          * FIFO (or sometimes later, if a zlp was needed).
 454          * Use usb_ep_fifo_status() where needed.
 455          */
 456         if (is_last)
 457                 done(ep, req, 0);
 458         return is_last;
 459 }
 460
 461 static inline int
 462 read_packet(u8 *buf, struct omap_req *req, unsigned avail)
 463 {
 464         unsigned        len;
 465         u16             *wp;
 466
 467         len = min(req->req.length - req->req.actual, avail);
 468         req->req.actual += len;
 469         avail = len;
 470
 471         if (likely((((int)buf) & 1) == 0)) {
 472                 wp = (u16 *)buf;
 473                 while (avail >= 2) {
 474                         *wp++ = UDC_DATA_REG;
 475                         avail -= 2;
 476                 }
 477                 buf = (u8 *)wp;
 478         }
 479         while (avail--)
 480                 *buf++ = *(volatile u8 *)&UDC_DATA_REG;
 481         return len;
 482 }
 483
 484 // return:  0 = still running, 1 = queue empty, negative = errno
 485 static int read_fifo(struct omap_ep *ep, struct omap_req *req)
 486 {
 487         u8              *buf;
 488         unsigned        count, avail;
 489         int             is_last;
 490
 491         buf = req->req.buf + req->req.actual;
 492         prefetchw(buf);
 493
 494         for (;;) {
 495                 u16     ep_stat = UDC_STAT_FLG_REG;
 496
 497                 is_last = 0;
 498                 if (ep_stat & FIFO_EMPTY) {
 499                         if (!ep->double_buf)
 500                                 break;
 501                         ep->fnf = 1;
 502                 }
 503                 if (ep_stat & UDC_EP_HALTED)
 504                         break;
 505
 506                 if (ep_stat & UDC_FIFO_FULL)
 507                         avail = ep->ep.maxpacket;
 508                 else  {
 509                         avail = UDC_RXFSTAT_REG;
 510                         ep->fnf = ep->double_buf;
 511                 }
 512                 count = read_packet(buf, req, avail);
 513
 514                 /* partial packet reads may not be errors */
 515                 if (count < ep->ep.maxpacket) {
 516                         is_last = 1;
 517                         /* overflowed this request?  flush extra data */
 518                         if (count != avail) {
 519                                 req->req.status = -EOVERFLOW;
 520                                 avail -= count;
 521                                 while (avail--)
 522                                         (void) *(volatile u8 *)&UDC_DATA_REG;
 523                         }
 524                 } else if (req->req.length == req->req.actual)
 525                         is_last = 1;
 526                 else
 527                         is_last = 0;
 528
 529                 if (!ep->bEndpointAddress)
 530                         break;
 531                 if (is_last)
 532                         done(ep, req, 0);
 533                 break;
 534         }
 535         return is_last;
 536 }
 537
 538 /*-------------------------------------------------------------------------*/
 539
 540 static u16 dma_src_len(struct omap_ep *ep, dma_addr_t start)
 541 {
 542         dma_addr_t      end;
 543
 544         /* IN-DMA needs this on fault/cancel paths, so 15xx misreports
 545          * the last transfer's bytecount by more than a FIFO's worth.
 546          */
 547         if (cpu_is_omap15xx())
 548                 return 0;
 549
 550         end = omap_readw(OMAP_DMA_CSAC(ep->lch));
 551         if (end == ep->dma_counter)
 552                 return 0;
 553
 554         end |= start & (0xffff << 16);
 555         if (end < start)
 556                 end += 0x10000;
 557         return end - start;
 558 }
 559
 560 #define DMA_DEST_LAST(x) (cpu_is_omap15xx() \
 561                 ? OMAP_DMA_CSAC(x) /* really: CPC */ \
 562                 : OMAP_DMA_CDAC(x))
 563
 564 static u16 dma_dest_len(struct omap_ep *ep, dma_addr_t start)
 565 {
 566         dma_addr_t      end;
 567
 568         end = omap_readw(DMA_DEST_LAST(ep->lch));
 569         if (end == ep->dma_counter)
 570                 return 0;
 571
 572         end |= start & (0xffff << 16);
 573         if (cpu_is_omap15xx())
 574                 end++;
 575         if (end < start)
 576                 end += 0x10000;
 577         return end - start;
 578 }
 579
 580
 581 /* Each USB transfer request using DMA maps to one or more DMA transfers.
 582  * When DMA completion isn't request completion, the UDC continues with
 583  * the next DMA transfer for that USB transfer.
 584  */
 585
 586 static void next_in_dma(struct omap_ep *ep, struct omap_req *req)
 587 {
 588         u16             txdma_ctrl;
 589         unsigned        length = req->req.length - req->req.actual;
 590         const int       sync_mode = cpu_is_omap15xx()
 591                                 ? OMAP_DMA_SYNC_FRAME
 592                                 : OMAP_DMA_SYNC_ELEMENT;
 593
 594         /* measure length in either bytes or packets */
 595         if ((cpu_is_omap16xx() && length <= (UDC_TXN_TSC + 1))
 596                         || (cpu_is_omap15xx() && length < ep->maxpacket)) {
 597                 txdma_ctrl = UDC_TXN_EOT | length;
 598                 omap_set_dma_transfer_params(ep->lch, OMAP_DMA_DATA_TYPE_S8,
 599                                 length, 1, sync_mode);
 600         } else {
 601                 length = min(length / ep->maxpacket,
 602                                 (unsigned) UDC_TXN_TSC + 1);
 603                 txdma_ctrl = length;
 604                 omap_set_dma_transfer_params(ep->lch, OMAP_DMA_DATA_TYPE_S8,
 605                                 ep->ep.maxpacket, length, sync_mode);
 606                 length *= ep->maxpacket;
 607         }
 608         omap_set_dma_src_params(ep->lch, OMAP_DMA_PORT_EMIFF,
 609                 OMAP_DMA_AMODE_POST_INC, req->req.dma + req->req.actual);
 610
 611         omap_start_dma(ep->lch);
 612         ep->dma_counter = omap_readw(OMAP_DMA_CSAC(ep->lch));
 613         UDC_DMA_IRQ_EN_REG |= UDC_TX_DONE_IE(ep->dma_channel);
 614         UDC_TXDMA_REG(ep->dma_channel) = UDC_TXN_START | txdma_ctrl;
 615         req->dma_bytes = length;
 616 }
 617
 618 static void finish_in_dma(struct omap_ep *ep, struct omap_req *req, int status)
 619 {
 620         if (status == 0) {
 621                 req->req.actual += req->dma_bytes;
 622
 623                 /* return if this request needs to send data or zlp */
 624                 if (req->req.actual < req->req.length)
 625                         return;
 626                 if (req->req.zero
 627                                 && req->dma_bytes != 0
 628                                 && (req->req.actual % ep->maxpacket) == 0)
 629                         return;
 630         } else
 631                 req->req.actual += dma_src_len(ep, req->req.dma
 632                                                         + req->req.actual);
 633
 634         /* tx completion */
 635         omap_stop_dma(ep->lch);
 636         UDC_DMA_IRQ_EN_REG &= ~UDC_TX_DONE_IE(ep->dma_channel);
 637         done(ep, req, status);
 638 }
 639
 640 static void next_out_dma(struct omap_ep *ep, struct omap_req *req)
 641 {
 642         unsigned packets;
 643
 644         /* NOTE:  we filtered out "short reads" before, so we know
 645          * the buffer has only whole numbers of packets.
 646          */
 647
 648         /* set up this DMA transfer, enable the fifo, start */
 649         packets = (req->req.length - req->req.actual) / ep->ep.maxpacket;
 650         packets = min(packets, (unsigned)UDC_RXN_TC + 1);
 651         req->dma_bytes = packets * ep->ep.maxpacket;
 652         omap_set_dma_transfer_params(ep->lch, OMAP_DMA_DATA_TYPE_S8,
 653                         ep->ep.maxpacket, packets,
 654                         OMAP_DMA_SYNC_ELEMENT);
 655         omap_set_dma_dest_params(ep->lch, OMAP_DMA_PORT_EMIFF,
 656                 OMAP_DMA_AMODE_POST_INC, req->req.dma + req->req.actual);
 657         ep->dma_counter = omap_readw(DMA_DEST_LAST(ep->lch));
 658
 659         UDC_RXDMA_REG(ep->dma_channel) = UDC_RXN_STOP | (packets - 1);
 660         UDC_DMA_IRQ_EN_REG |= UDC_RX_EOT_IE(ep->dma_channel);
 661         UDC_EP_NUM_REG = (ep->bEndpointAddress & 0xf);
 662         UDC_CTRL_REG = UDC_SET_FIFO_EN;
 663
 664         omap_start_dma(ep->lch);
 665 }
 666
 667 static void
 668 finish_out_dma(struct omap_ep *ep, struct omap_req *req, int status)
 669 {
 670         u16     count;
 671
 672         if (status == 0)
 673                 ep->dma_counter = (u16) (req->req.dma + req->req.actual);
 674         count = dma_dest_len(ep, req->req.dma + req->req.actual);
 675         count += req->req.actual;
 676         if (count <= req->req.length)
 677                 req->req.actual = count;
 678
 679         if (count != req->dma_bytes || status)
 680                 omap_stop_dma(ep->lch);
 681
 682         /* if this wasn't short, request may need another transfer */
 683         else if (req->req.actual < req->req.length)
 684                 return;
 685
 686         /* rx completion */
 687         UDC_DMA_IRQ_EN_REG &= ~UDC_RX_EOT_IE(ep->dma_channel);
 688         done(ep, req, status);
 689 }
 690
 691 static void dma_irq(struct omap_udc *udc, u16 irq_src)
 692 {
 693         u16             dman_stat = UDC_DMAN_STAT_REG;
 694         struct omap_ep  *ep;
 695         struct omap_req *req;
 696
 697         /* IN dma: tx to host */
 698         if (irq_src & UDC_TXN_DONE) {
 699                 ep = &udc->ep[16 + UDC_DMA_TX_SRC(dman_stat)];
 700                 ep->irqs++;
 701                 /* can see TXN_DONE after dma abort */
 702                 if (!list_empty(&ep->queue)) {
 703                         req = container_of(ep->queue.next,
 704                                                 struct omap_req, queue);
 705                         finish_in_dma(ep, req, 0);
 706                 }
 707                 UDC_IRQ_SRC_REG = UDC_TXN_DONE;
 708
 709                 if (!list_empty (&ep->queue)) {
 710                         req = container_of(ep->queue.next,
 711                                         struct omap_req, queue);
 712                         next_in_dma(ep, req);
 713                 }
 714         }
 715
 716         /* OUT dma: rx from host */
 717         if (irq_src & UDC_RXN_EOT) {
 718                 ep = &udc->ep[UDC_DMA_RX_SRC(dman_stat)];
 719                 ep->irqs++;
 720                 /* can see RXN_EOT after dma abort */
 721                 if (!list_empty(&ep->queue)) {
 722                         req = container_of(ep->queue.next,
 723                                         struct omap_req, queue);
 724                         finish_out_dma(ep, req, 0);
 725                 }
 726                 UDC_IRQ_SRC_REG = UDC_RXN_EOT;
 727
 728                 if (!list_empty (&ep->queue)) {
 729                         req = container_of(ep->queue.next,
 730                                         struct omap_req, queue);
 731                         next_out_dma(ep, req);
 732                 }
 733         }
 734
 735         if (irq_src & UDC_RXN_CNT) {
 736                 ep = &udc->ep[UDC_DMA_RX_SRC(dman_stat)];
 737                 ep->irqs++;
 738                 /* omap15xx does this unasked... */
 739                 VDBG("%s, RX_CNT irq?\n", ep->ep.name);
 740                 UDC_IRQ_SRC_REG = UDC_RXN_CNT;
 741         }
 742 }
 743
 744 static void dma_error(int lch, u16 ch_status, void *data)
 745 {
 746         struct omap_ep  *ep = data;
 747
 748         /* if ch_status & OMAP_DMA_DROP_IRQ ... */
 749         /* if ch_status & OMAP_DMA_TOUT_IRQ ... */
 750         ERR("%s dma error, lch %d status %02x\n", ep->ep.name, lch, ch_status);
 751
 752         /* complete current transfer ... */
 753 }
 754
 755 static void dma_channel_claim(struct omap_ep *ep, unsigned channel)
 756 {
 757         u16     reg;
 758         int     status, restart, is_in;
 759
 760         is_in = ep->bEndpointAddress & USB_DIR_IN;
 761         if (is_in)
 762                 reg = UDC_TXDMA_CFG_REG;
 763         else
 764                 reg = UDC_RXDMA_CFG_REG;
 765         reg |= 1 << 12;         /* "pulse" activated */
 766
 767         ep->dma_channel = 0;
 768         ep->lch = -1;
 769         if (channel == 0 || channel > 3) {
 770                 if ((reg & 0x0f00) == 0)
 771                         channel = 3;
 772                 else if ((reg & 0x00f0) == 0)
 773                         channel = 2;
 774                 else if ((reg & 0x000f) == 0)   /* preferred for ISO */
 775                         channel = 1;
 776                 else {
 777                         status = -EMLINK;
 778                         goto just_restart;
 779                 }
 780         }
 781         reg |= (0x0f & ep->bEndpointAddress) << (4 * (channel - 1));
 782         ep->dma_channel = channel;
 783
 784         if (is_in) {
 785                 status = omap_request_dma(OMAP_DMA_USB_W2FC_TX0 - 1 + channel,
 786                         ep->ep.name, dma_error, ep, &ep->lch);
 787                 if (status == 0) {
 788                         UDC_TXDMA_CFG_REG = reg;
 789                         omap_set_dma_dest_params(ep->lch,
 790                                 OMAP_DMA_PORT_TIPB,
 791                                 OMAP_DMA_AMODE_CONSTANT,
 792                                 (unsigned long) io_v2p((u32)&UDC_DATA_DMA_REG));
 793                 }
 794         } else {
 795                 status = omap_request_dma(OMAP_DMA_USB_W2FC_RX0 - 1 + channel,
 796                         ep->ep.name, dma_error, ep, &ep->lch);
 797                 if (status == 0) {
 798                         UDC_RXDMA_CFG_REG = reg;
 799                         omap_set_dma_src_params(ep->lch,
 800                                 OMAP_DMA_PORT_TIPB,
 801                                 OMAP_DMA_AMODE_CONSTANT,
 802                                 (unsigned long) io_v2p((u32)&UDC_DATA_DMA_REG));
 803                 }
 804         }
 805         if (status)
 806                 ep->dma_channel = 0;
 807         else {
 808                 ep->has_dma = 1;
 809                 omap_disable_dma_irq(ep->lch, OMAP_DMA_BLOCK_IRQ);
 810
 811                 /* channel type P: hw synch (fifo) */
 812                 if (!cpu_is_omap15xx())
 813                         omap_writew(2, OMAP_DMA_LCH_CTRL(ep->lch));
 814         }
 815
 816 just_restart:
 817         /* restart any queue, even if the claim failed  */
 818         restart = !ep->stopped && !list_empty(&ep->queue);
 819
 820         if (status)
 821                 DBG("%s no dma channel: %d%s\n", ep->ep.name, status,
 822                         restart ? " (restart)" : "");
 823         else
 824                 DBG("%s claimed %cxdma%d lch %d%s\n", ep->ep.name,
 825                         is_in ? 't' : 'r',
 826                         ep->dma_channel - 1, ep->lch,
 827                         restart ? " (restart)" : "");
 828
 829         if (restart) {
 830                 struct omap_req *req;
 831                 req = container_of(ep->queue.next, struct omap_req, queue);
 832                 if (ep->has_dma)
 833                         (is_in ? next_in_dma : next_out_dma)(ep, req);
 834                 else {
 835                         use_ep(ep, UDC_EP_SEL);
 836                         (is_in ? write_fifo : read_fifo)(ep, req);
 837                         deselect_ep();
 838                         if (!is_in) {
 839                                 UDC_CTRL_REG = UDC_SET_FIFO_EN;
 840                                 ep->ackwait = 1 + ep->double_buf;
 841                         }
 842                         /* IN: 6 wait states before it'll tx */
 843                 }
 844         }
 845 }
 846
 847 static void dma_channel_release(struct omap_ep *ep)
 848 {
 849         int             shift = 4 * (ep->dma_channel - 1);
 850         u16             mask = 0x0f << shift;
 851         struct omap_req *req;
 852         int             active;
 853
 854         /* abort any active usb transfer request */
 855         if (!list_empty(&ep->queue))
 856                 req = container_of(ep->queue.next, struct omap_req, queue);
 857         else
 858                 req = NULL;
 859
 860         active = ((1 << 7) & omap_readl(OMAP_DMA_CCR(ep->lch))) != 0;
 861
 862         DBG("%s release %s %cxdma%d %p\n", ep->ep.name,
 863                         active ? "active" : "idle",
 864                         (ep->bEndpointAddress & USB_DIR_IN) ? 't' : 'r',
 865                         ep->dma_channel - 1, req);
 866
 867         /* wait till current packet DMA finishes, and fifo empties */
 868         if (ep->bEndpointAddress & USB_DIR_IN) {
 869                 UDC_TXDMA_CFG_REG &= ~mask;
 870
 871                 if (req) {
 872                         finish_in_dma(ep, req, -ECONNRESET);
 873
 874                         /* clear FIFO; hosts probably won't empty it */
 875                         use_ep(ep, UDC_EP_SEL);
 876                         UDC_CTRL_REG = UDC_CLR_EP;
 877                         deselect_ep();
 878                 }
 879                 while (UDC_TXDMA_CFG_REG & mask)
 880                         udelay(10);
 881         } else {
 882                 UDC_RXDMA_CFG_REG &= ~mask;
 883
 884                 /* dma empties the fifo */
 885                 while (UDC_RXDMA_CFG_REG & mask)
 886                         udelay(10);
 887                 if (req)
 888                         finish_out_dma(ep, req, -ECONNRESET);
 889         }
 890         omap_free_dma(ep->lch);
 891         ep->dma_channel = 0;
 892         ep->lch = -1;
 893         /* has_dma still set, till endpoint is fully quiesced */
 894 }
 895
 896
 897 /*-------------------------------------------------------------------------*/
 898
 899 static int
 900 omap_ep_queue(struct usb_ep *_ep, struct usb_request *_req, int gfp_flags)
 901 {
 902         struct omap_ep  *ep = container_of(_ep, struct omap_ep, ep);
 903         struct omap_req *req = container_of(_req, struct omap_req, req);
 904         struct omap_udc *udc;
 905         unsigned long   flags;
 906         int             is_iso = 0;
 907
 908         /* catch various bogus parameters */
 909         if (!_req || !req->req.complete || !req->req.buf
 910                         || !list_empty(&req->queue)) {
 911                 DBG("%s, bad params\n", __FUNCTION__);
 912                 return -EINVAL;
 913         }
 914         if (!_ep || (!ep->desc && ep->bEndpointAddress)) {
 915                 DBG("%s, bad ep\n", __FUNCTION__);
 916                 return -EINVAL;
 917         }
 918         if (ep->bmAttributes == USB_ENDPOINT_XFER_ISOC) {
 919                 if (req->req.length > ep->ep.maxpacket)
 920                         return -EMSGSIZE;
 921                 is_iso = 1;
 922         }
 923
 924         /* this isn't bogus, but OMAP DMA isn't the only hardware to
 925          * have a hard time with partial packet reads...  reject it.
 926          */
 927         if (use_dma
 928                         && ep->has_dma
 929                         && ep->bEndpointAddress != 0
 930                         && (ep->bEndpointAddress & USB_DIR_IN) == 0
 931                         && (req->req.length % ep->ep.maxpacket) != 0) {
 932                 DBG("%s, no partial packet OUT reads\n", __FUNCTION__);
 933                 return -EMSGSIZE;
 934         }
 935
 936         udc = ep->udc;
 937         if (!udc->driver || udc->gadget.speed == USB_SPEED_UNKNOWN)
 938                 return -ESHUTDOWN;
 939
 940         if (use_dma && ep->has_dma) {
 941                 if (req->req.dma == DMA_ADDR_INVALID) {
 942                         req->req.dma = dma_map_single(
 943                                 ep->udc->gadget.dev.parent,
 944                                 req->req.buf,
 945                                 req->req.length,
 946                                 (ep->bEndpointAddress & USB_DIR_IN)
 947                                         ? DMA_TO_DEVICE
 948                                         : DMA_FROM_DEVICE);
 949                         req->mapped = 1;
 950                 } else {
 951                         dma_sync_single_for_device(
 952                                 ep->udc->gadget.dev.parent,
 953                                 req->req.dma, req->req.length,
 954                                 (ep->bEndpointAddress & USB_DIR_IN)
 955                                         ? DMA_TO_DEVICE
 956                                         : DMA_FROM_DEVICE);
 957                         req->mapped = 0;
 958                 }
 959         }
 960
 961         VDBG("%s queue req %p, len %d buf %p\n",
 962                 ep->ep.name, _req, _req->length, _req->buf);
 963
 964         spin_lock_irqsave(&udc->lock, flags);
 965
 966         req->req.status = -EINPROGRESS;
 967         req->req.actual = 0;
 968
 969         /* maybe kickstart non-iso i/o queues */
 970         if (is_iso)
 971                 UDC_IRQ_EN_REG |= UDC_SOF_IE;
 972         else if (list_empty(&ep->queue) && !ep->stopped && !ep->ackwait) {
 973                 int     is_in;
 974
 975                 if (ep->bEndpointAddress == 0) {
 976                         if (!udc->ep0_pending || !list_empty (&ep->queue)) {
 977                                 spin_unlock_irqrestore(&udc->lock, flags);
 978                                 return -EL2HLT;
 979                         }
 980
 981                         /* empty DATA stage? */
 982                         is_in = udc->ep0_in;
 983                         if (!req->req.length) {
 984
 985                                 /* chip became CONFIGURED or ADDRESSED
 986                                  * earlier; drivers may already have queued
 987                                  * requests to non-control endpoints
 988                                  */
 989                                 if (udc->ep0_set_config) {
 990                                         u16     irq_en = UDC_IRQ_EN_REG;
 991
 992                                         irq_en |= UDC_DS_CHG_IE | UDC_EP0_IE;
 993                                         if (!udc->ep0_reset_config)
 994                                                 irq_en |= UDC_EPN_RX_IE
 995                                                         | UDC_EPN_TX_IE;
 996                                         UDC_IRQ_EN_REG = irq_en;
 997                                 }
 998
 999                                 /* STATUS for zero length DATA stages is
1000                                  * always an IN ... even for IN transfers,
1001                                  * a wierd case which seem to stall OMAP.
1002                                  */
1003                                 UDC_EP_NUM_REG = (UDC_EP_SEL|UDC_EP_DIR);
1004                                 UDC_CTRL_REG = UDC_CLR_EP;
1005                                 UDC_CTRL_REG = UDC_SET_FIFO_EN;
1006                                 UDC_EP_NUM_REG = UDC_EP_DIR;
1007
1008                                 /* cleanup */
1009                                 udc->ep0_pending = 0;
1010                                 done(ep, req, 0);
1011                                 req = NULL;
1012
1013                         /* non-empty DATA stage */
1014                         } else if (is_in) {
1015                                 UDC_EP_NUM_REG = UDC_EP_SEL|UDC_EP_DIR;
1016                         } else {
1017                                 if (udc->ep0_setup)
1018                                         goto irq_wait;
1019                                 UDC_EP_NUM_REG = UDC_EP_SEL;
1020                         }
1021                 } else {
1022                         is_in = ep->bEndpointAddress & USB_DIR_IN;
1023                         if (!ep->has_dma)
1024                                 use_ep(ep, UDC_EP_SEL);
1025                         /* if ISO: SOF IRQs must be enabled/disabled! */
1026                 }
1027
1028                 if (ep->has_dma)
1029                         (is_in ? next_in_dma : next_out_dma)(ep, req);
1030                 else if (req) {
1031                         if ((is_in ? write_fifo : read_fifo)(ep, req) == 1)
1032                                 req = NULL;
1033                         deselect_ep();
1034                         if (!is_in) {
1035                                 UDC_CTRL_REG = UDC_SET_FIFO_EN;
1036                                 ep->ackwait = 1 + ep->double_buf;
1037                         }
1038                         /* IN: 6 wait states before it'll tx */
1039                 }
1040         }
1041
1042 irq_wait:
1043         /* irq handler advances the queue */
1044         if (req != NULL)
1045                 list_add_tail(&req->queue, &ep->queue);
1046         spin_unlock_irqrestore(&udc->lock, flags);
1047
1048         return 0;
1049 }
1050
1051 static int omap_ep_dequeue(struct usb_ep *_ep, struct usb_request *_req)
1052 {
1053         struct omap_ep  *ep = container_of(_ep, struct omap_ep, ep);
1054         struct omap_req *req;
1055         unsigned long   flags;
1056
1057         if (!_ep || !_req)
1058                 return -EINVAL;
1059
1060         spin_lock_irqsave(&ep->udc->lock, flags);
1061
1062         /* make sure it's actually queued on this endpoint */
1063         list_for_each_entry (req, &ep->queue, queue) {
1064                 if (&req->req == _req)
1065                         break;
1066         }
1067         if (&req->req != _req) {
1068                 spin_unlock_irqrestore(&ep->udc->lock, flags);
1069                 return -EINVAL;
1070         }
1071
1072         if (use_dma && ep->dma_channel && ep->queue.next == &req->queue) {
1073                 int channel = ep->dma_channel;
1074
1075                 /* releasing the channel cancels the request,
1076                  * reclaiming the channel restarts the queue
1077                  */
1078                 dma_channel_release(ep);
1079                 dma_channel_claim(ep, channel);
1080         } else
1081                 done(ep, req, -ECONNRESET);
1082         spin_unlock_irqrestore(&ep->udc->lock, flags);
1083         return 0;
1084 }
1085
1086 /*-------------------------------------------------------------------------*/
1087
1088 static int omap_ep_set_halt(struct usb_ep *_ep, int value)
1089 {
1090         struct omap_ep  *ep = container_of(_ep, struct omap_ep, ep);
1091         unsigned long   flags;
1092         int             status = -EOPNOTSUPP;
1093
1094         spin_lock_irqsave(&ep->udc->lock, flags);
1095
1096         /* just use protocol stalls for ep0; real halts are annoying */
1097         if (ep->bEndpointAddress == 0) {
1098                 if (!ep->udc->ep0_pending)
1099                         status = -EINVAL;
1100                 else if (value) {
1101                         if (ep->udc->ep0_set_config) {
1102                                 WARN("error changing config?\n");
1103                                 UDC_SYSCON2_REG = UDC_CLR_CFG;
1104                         }
1105                         UDC_SYSCON2_REG = UDC_STALL_CMD;
1106                         ep->udc->ep0_pending = 0;
1107                         status = 0;
1108                 } else /* NOP */
1109                         status = 0;
1110
1111         /* otherwise, all active non-ISO endpoints can halt */
1112         } else if (ep->bmAttributes != USB_ENDPOINT_XFER_ISOC && ep->desc) {
1113
1114                 /* IN endpoints must already be idle */
1115                 if ((ep->bEndpointAddress & USB_DIR_IN)
1116                                 && !list_empty(&ep->queue)) {
1117                         status = -EAGAIN;
1118                         goto done;
1119                 }
1120
1121                 if (value) {
1122                         int     channel;
1123
1124                         if (use_dma && ep->dma_channel
1125                                         && !list_empty(&ep->queue)) {
1126                                 channel = ep->dma_channel;
1127                                 dma_channel_release(ep);
1128                         } else
1129                                 channel = 0;
1130
1131                         use_ep(ep, UDC_EP_SEL);
1132                         if (UDC_STAT_FLG_REG & UDC_NON_ISO_FIFO_EMPTY) {
1133                                 UDC_CTRL_REG = UDC_SET_HALT;
1134                                 status = 0;
1135                         } else
1136                                 status = -EAGAIN;
1137                         deselect_ep();
1138
1139                         if (channel)
1140                                 dma_channel_claim(ep, channel);
1141                 } else {
1142                         use_ep(ep, 0);
1143                         UDC_CTRL_REG = UDC_RESET_EP;
1144                         ep->ackwait = 0;
1145                         if (!(ep->bEndpointAddress & USB_DIR_IN)) {
1146                                 UDC_CTRL_REG = UDC_SET_FIFO_EN;
1147                                 ep->ackwait = 1 + ep->double_buf;
1148                         }
1149                 }
1150         }
1151 done:
1152         VDBG("%s %s halt stat %d\n", ep->ep.name,
1153                 value ? "set" : "clear", status);
1154
1155         spin_unlock_irqrestore(&ep->udc->lock, flags);
1156         return status;
1157 }
1158
1159 static struct usb_ep_ops omap_ep_ops = {
1160         .enable         = omap_ep_enable,
1161         .disable        = omap_ep_disable,
1162
1163         .alloc_request  = omap_alloc_request,
1164         .free_request   = omap_free_request,
1165
1166         .alloc_buffer   = omap_alloc_buffer,
1167         .free_buffer    = omap_free_buffer,
1168
1169         .queue          = omap_ep_queue,
1170         .dequeue        = omap_ep_dequeue,
1171
1172         .set_halt       = omap_ep_set_halt,
1173         // fifo_status ... report bytes in fifo
1174         // fifo_flush ... flush fifo
1175 };
1176
1177 /*-------------------------------------------------------------------------*/
1178
1179 static int omap_get_frame(struct usb_gadget *gadget)
1180 {
1181         u16     sof = UDC_SOF_REG;
1182         return (sof & UDC_TS_OK) ? (sof & UDC_TS) : -EL2NSYNC;
1183 }
1184
1185 static int omap_wakeup(struct usb_gadget *gadget)
1186 {
1187         struct omap_udc *udc;
1188         unsigned long   flags;
1189         int             retval = -EHOSTUNREACH;
1190
1191         udc = container_of(gadget, struct omap_udc, gadget);
1192
1193         spin_lock_irqsave(&udc->lock, flags);
1194         if (udc->devstat & UDC_SUS) {
1195                 /* NOTE:  OTG spec erratum says that OTG devices may
1196                  * issue wakeups without host enable.
1197                  */
1198                 if (udc->devstat & (UDC_B_HNP_ENABLE|UDC_R_WK_OK)) {
1199                         DBG("remote wakeup...\n");
1200                         UDC_SYSCON2_REG = UDC_RMT_WKP;
1201                         retval = 0;
1202                 }
1203
1204         /* NOTE:  non-OTG systems may use SRP TOO... */
1205         } else if (!(udc->devstat & UDC_ATT)) {
1206                 if (udc->transceiver)
1207                         retval = otg_start_srp(udc->transceiver);
1208         }
1209         spin_unlock_irqrestore(&udc->lock, flags);
1210
1211         return retval;
1212 }
1213
1214 static int
1215 omap_set_selfpowered(struct usb_gadget *gadget, int is_selfpowered)
1216 {
1217         struct omap_udc *udc;
1218         unsigned long   flags;
1219         u16             syscon1;
1220
1221         udc = container_of(gadget, struct omap_udc, gadget);
1222         spin_lock_irqsave(&udc->lock, flags);
1223         syscon1 = UDC_SYSCON1_REG;
1224         if (is_selfpowered)
1225                 syscon1 |= UDC_SELF_PWR;
1226         else
1227                 syscon1 &= ~UDC_SELF_PWR;
1228         UDC_SYSCON1_REG = syscon1;
1229         spin_unlock_irqrestore(&udc->lock, flags);
1230
1231         return 0;
1232 }
1233
1234 static int can_pullup(struct omap_udc *udc)
1235 {
1236         return udc->driver && udc->softconnect && udc->vbus_active;
1237 }
1238
1239 static void pullup_enable(struct omap_udc *udc)
1240 {
1241         udc->gadget.dev.parent->power.power_state = PMSG_ON;
1242         udc->gadget.dev.power.power_state = PMSG_ON;
1243         UDC_SYSCON1_REG |= UDC_PULLUP_EN;
1244 #ifndef CONFIG_USB_OTG
1245         if (!cpu_is_omap15xx())
1246                 OTG_CTRL_REG |= OTG_BSESSVLD;
1247 #endif
1248         UDC_IRQ_EN_REG = UDC_DS_CHG_IE;
1249 }
1250
1251 static void pullup_disable(struct omap_udc *udc)
1252 {
1253 #ifndef CONFIG_USB_OTG
1254         if (!cpu_is_omap15xx())
1255                 OTG_CTRL_REG &= ~OTG_BSESSVLD;
1256 #endif
1257         UDC_IRQ_EN_REG = UDC_DS_CHG_IE;
1258         UDC_SYSCON1_REG &= ~UDC_PULLUP_EN;
1259 }
1260
1261 /*
1262  * Called by whatever detects VBUS sessions:  external transceiver
1263  * driver, or maybe GPIO0 VBUS IRQ.  May request 48 MHz clock.
1264  */
1265 static int omap_vbus_session(struct usb_gadget *gadget, int is_active)
1266 {
1267         struct omap_udc *udc;
1268         unsigned long   flags;
1269
1270         udc = container_of(gadget, struct omap_udc, gadget);
1271         spin_lock_irqsave(&udc->lock, flags);
1272         VDBG("VBUS %s\n", is_active ? "on" : "off");
1273         udc->vbus_active = (is_active != 0);
1274         if (cpu_is_omap15xx()) {
1275                 /* "software" detect, ignored if !VBUS_MODE_1510 */
1276                 if (is_active)
1277                         FUNC_MUX_CTRL_0_REG |= VBUS_CTRL_1510;
1278                 else
1279                         FUNC_MUX_CTRL_0_REG &= ~VBUS_CTRL_1510;
1280         }
1281         if (can_pullup(udc))
1282                 pullup_enable(udc);
1283         else
1284                 pullup_disable(udc);
1285         spin_unlock_irqrestore(&udc->lock, flags);
1286         return 0;
1287 }
1288
1289 static int omap_vbus_draw(struct usb_gadget *gadget, unsigned mA)
1290 {
1291         struct omap_udc *udc;
1292
1293         udc = container_of(gadget, struct omap_udc, gadget);
1294         if (udc->transceiver)
1295                 return otg_set_power(udc->transceiver, mA);
1296         return -EOPNOTSUPP;
1297 }
1298
1299 static int omap_pullup(struct usb_gadget *gadget, int is_on)
1300 {
1301         struct omap_udc *udc;
1302         unsigned long   flags;
1303
1304         udc = container_of(gadget, struct omap_udc, gadget);
1305         spin_lock_irqsave(&udc->lock, flags);
1306         udc->softconnect = (is_on != 0);
1307         if (can_pullup(udc))
1308                 pullup_enable(udc);
1309         else
1310                 pullup_disable(udc);
1311         spin_unlock_irqrestore(&udc->lock, flags);
1312         return 0;
1313 }
1314
1315 static struct usb_gadget_ops omap_gadget_ops = {
1316         .get_frame              = omap_get_frame,
1317         .wakeup                 = omap_wakeup,
1318         .set_selfpowered        = omap_set_selfpowered,
1319         .vbus_session           = omap_vbus_session,
1320         .vbus_draw              = omap_vbus_draw,
1321         .pullup                 = omap_pullup,
1322 };
1323
1324 /*-------------------------------------------------------------------------*/
1325
1326 /* dequeue ALL requests; caller holds udc->lock */
1327 static void nuke(struct omap_ep *ep, int status)
1328 {
1329         struct omap_req *req;
1330
1331         ep->stopped = 1;
1332
1333         if (use_dma && ep->dma_channel)
1334                 dma_channel_release(ep);
1335
1336         use_ep(ep, 0);
1337         UDC_CTRL_REG = UDC_CLR_EP;
1338         if (ep->bEndpointAddress && ep->bmAttributes != USB_ENDPOINT_XFER_ISOC)
1339                 UDC_CTRL_REG = UDC_SET_HALT;
1340
1341         while (!list_empty(&ep->queue)) {
1342                 req = list_entry(ep->queue.next, struct omap_req, queue);
1343                 done(ep, req, status);
1344         }
1345 }
1346
1347 /* caller holds udc->lock */
1348 static void udc_quiesce(struct omap_udc *udc)
1349 {
1350         struct omap_ep  *ep;
1351
1352         udc->gadget.speed = USB_SPEED_UNKNOWN;
1353         nuke(&udc->ep[0], -ESHUTDOWN);
1354         list_for_each_entry (ep, &udc->gadget.ep_list, ep.ep_list)
1355                 nuke(ep, -ESHUTDOWN);
1356 }
1357
1358 /*-------------------------------------------------------------------------*/
1359
1360 static void update_otg(struct omap_udc *udc)
1361 {
1362         u16     devstat;
1363
1364         if (!udc->gadget.is_otg)
1365                 return;
1366
1367         if (OTG_CTRL_REG & OTG_ID)
1368                 devstat = UDC_DEVSTAT_REG;
1369         else
1370                 devstat = 0;
1371
1372         udc->gadget.b_hnp_enable = !!(devstat & UDC_B_HNP_ENABLE);
1373         udc->gadget.a_hnp_support = !!(devstat & UDC_A_HNP_SUPPORT);
1374         udc->gadget.a_alt_hnp_support = !!(devstat & UDC_A_ALT_HNP_SUPPORT);
1375
1376         /* Enable HNP early, avoiding races on suspend irq path.
1377          * ASSUMES OTG state machine B_BUS_REQ input is true.
1378          */
1379         if (udc->gadget.b_hnp_enable)
1380                 OTG_CTRL_REG = (OTG_CTRL_REG | OTG_B_HNPEN | OTG_B_BUSREQ)
1381                                 & ~OTG_PULLUP;
1382 }
1383
1384 static void ep0_irq(struct omap_udc *udc, u16 irq_src)
1385 {
1386         struct omap_ep  *ep0 = &udc->ep[0];
1387         struct omap_req *req = NULL;
1388
1389         ep0->irqs++;
1390
1391         /* Clear any pending requests and then scrub any rx/tx state
1392          * before starting to handle the SETUP request.
1393          */
1394         if (irq_src & UDC_SETUP) {
1395                 u16     ack = irq_src & (UDC_EP0_TX|UDC_EP0_RX);
1396
1397                 nuke(ep0, 0);
1398                 if (ack) {
1399                         UDC_IRQ_SRC_REG = ack;
1400                         irq_src = UDC_SETUP;
1401                 }
1402         }
1403
1404         /* IN/OUT packets mean we're in the DATA or STATUS stage.
1405          * This driver uses only uses protocol stalls (ep0 never halts),
1406          * and if we got this far the gadget driver already had a
1407          * chance to stall.  Tries to be forgiving of host oddities.
1408          *
1409          * NOTE:  the last chance gadget drivers have to stall control
1410          * requests is during their request completion callback.
1411          */
1412         if (!list_empty(&ep0->queue))
1413                 req = container_of(ep0->queue.next, struct omap_req, queue);
1414
1415         /* IN == TX to host */
1416         if (irq_src & UDC_EP0_TX) {
1417                 int     stat;
1418
1419                 UDC_IRQ_SRC_REG = UDC_EP0_TX;
1420                 UDC_EP_NUM_REG = UDC_EP_SEL|UDC_EP_DIR;
1421                 stat = UDC_STAT_FLG_REG;
1422                 if (stat & UDC_ACK) {
1423                         if (udc->ep0_in) {
1424                                 /* write next IN packet from response,
1425                                  * or set up the status stage.
1426                                  */
1427                                 if (req)
1428                                         stat = write_fifo(ep0, req);
1429                                 UDC_EP_NUM_REG = UDC_EP_DIR;
1430                                 if (!req && udc->ep0_pending) {
1431                                         UDC_EP_NUM_REG = UDC_EP_SEL;
1432                                         UDC_CTRL_REG = UDC_CLR_EP;
1433                                         UDC_CTRL_REG = UDC_SET_FIFO_EN;
1434                                         UDC_EP_NUM_REG = 0;
1435                                         udc->ep0_pending = 0;
1436                                 } /* else:  6 wait states before it'll tx */
1437                         } else {
1438                                 /* ack status stage of OUT transfer */
1439                                 UDC_EP_NUM_REG = UDC_EP_DIR;
1440                                 if (req)
1441                                         done(ep0, req, 0);
1442                         }
1443                         req = NULL;
1444                 } else if (stat & UDC_STALL) {
1445                         UDC_CTRL_REG = UDC_CLR_HALT;
1446                         UDC_EP_NUM_REG = UDC_EP_DIR;
1447                 } else {
1448                         UDC_EP_NUM_REG = UDC_EP_DIR;
1449                 }
1450         }
1451
1452         /* OUT == RX from host */
1453         if (irq_src & UDC_EP0_RX) {
1454                 int     stat;
1455
1456                 UDC_IRQ_SRC_REG = UDC_EP0_RX;
1457                 UDC_EP_NUM_REG = UDC_EP_SEL;
1458                 stat = UDC_STAT_FLG_REG;
1459                 if (stat & UDC_ACK) {
1460                         if (!udc->ep0_in) {
1461                                 stat = 0;
1462                                 /* read next OUT packet of request, maybe
1463                                  * reactiviting the fifo; stall on errors.
1464                                  */
1465                                 if (!req || (stat = read_fifo(ep0, req)) < 0) {
1466                                         UDC_SYSCON2_REG = UDC_STALL_CMD;
1467                                         udc->ep0_pending = 0;
1468                                         stat = 0;
1469                                 } else if (stat == 0)
1470                                         UDC_CTRL_REG = UDC_SET_FIFO_EN;
1471                                 UDC_EP_NUM_REG = 0;
1472
1473                                 /* activate status stage */
1474                                 if (stat == 1) {
1475                                         done(ep0, req, 0);
1476                                         /* that may have STALLed ep0... */
1477                                         UDC_EP_NUM_REG = UDC_EP_SEL|UDC_EP_DIR;
1478                                         UDC_CTRL_REG = UDC_CLR_EP;
1479                                         UDC_CTRL_REG = UDC_SET_FIFO_EN;
1480                                         UDC_EP_NUM_REG = UDC_EP_DIR;
1481                                         udc->ep0_pending = 0;
1482                                 }
1483                         } else {
1484                                 /* ack status stage of IN transfer */
1485                                 UDC_EP_NUM_REG = 0;
1486                                 if (req)
1487                                         done(ep0, req, 0);
1488                         }
1489                 } else if (stat & UDC_STALL) {
1490                         UDC_CTRL_REG = UDC_CLR_HALT;
1491                         UDC_EP_NUM_REG = 0;
1492                 } else {
1493                         UDC_EP_NUM_REG = 0;
1494                 }
1495         }
1496
1497         /* SETUP starts all control transfers */
1498         if (irq_src & UDC_SETUP) {
1499                 union u {
1500                         u16                     word[4];
1501                         struct usb_ctrlrequest  r;
1502                 } u;
1503                 int                     status = -EINVAL;
1504                 struct omap_ep          *ep;
1505
1506                 /* read the (latest) SETUP message */
1507                 do {
1508                         UDC_EP_NUM_REG = UDC_SETUP_SEL;
1509                         /* two bytes at a time */
1510                         u.word[0] = UDC_DATA_REG;
1511                         u.word[1] = UDC_DATA_REG;
1512                         u.word[2] = UDC_DATA_REG;
1513                         u.word[3] = UDC_DATA_REG;
1514                         UDC_EP_NUM_REG = 0;
1515                 } while (UDC_IRQ_SRC_REG & UDC_SETUP);
1516
1517                 /* Delegate almost all control requests to the gadget driver,
1518                  * except for a handful of ch9 status/feature requests that
1519                  * hardware doesn't autodecode _and_ the gadget API hides.
1520                  */
1521                 udc->ep0_in = (u.r.bRequestType & USB_DIR_IN) != 0;
1522                 udc->ep0_set_config = 0;
1523                 udc->ep0_pending = 1;
1524                 ep0->stopped = 0;
1525                 ep0->ackwait = 0;
1526                 switch (u.r.bRequest) {
1527                 case USB_REQ_SET_CONFIGURATION:
1528                         /* udc needs to know when ep != 0 is valid */
1529                         if (u.r.bRequestType != USB_RECIP_DEVICE)
1530                                 goto delegate;
1531                         if (u.r.wLength != 0)
1532                                 goto do_stall;
1533                         udc->ep0_set_config = 1;
1534                         udc->ep0_reset_config = (u.r.wValue == 0);
1535                         VDBG("set config %d\n", u.r.wValue);
1536
1537                         /* update udc NOW since gadget driver may start
1538                          * queueing requests immediately; clear config
1539                          * later if it fails the request.
1540                          */
1541                         if (udc->ep0_reset_config)
1542                                 UDC_SYSCON2_REG = UDC_CLR_CFG;
1543                         else
1544                                 UDC_SYSCON2_REG = UDC_DEV_CFG;
1545                         update_otg(udc);
1546                         goto delegate;
1547                 case USB_REQ_CLEAR_FEATURE:
1548                         /* clear endpoint halt */
1549                         if (u.r.bRequestType != USB_RECIP_ENDPOINT)
1550                                 goto delegate;
1551                         if (u.r.wValue != USB_ENDPOINT_HALT
1552                                         || u.r.wLength != 0)
1553                                 goto do_stall;
1554                         ep = &udc->ep[u.r.wIndex & 0xf];
1555                         if (ep != ep0) {
1556                                 if (u.r.wIndex & USB_DIR_IN)
1557                                         ep += 16;
1558                                 if (ep->bmAttributes == USB_ENDPOINT_XFER_ISOC
1559                                                 || !ep->desc)
1560                                         goto do_stall;
1561                                 use_ep(ep, 0);
1562                                 UDC_CTRL_REG = UDC_RESET_EP;
1563                                 ep->ackwait = 0;
1564                                 if (!(ep->bEndpointAddress & USB_DIR_IN)) {
1565                                         UDC_CTRL_REG = UDC_SET_FIFO_EN;
1566                                         ep->ackwait = 1 + ep->double_buf;
1567                                 }
1568                                 /* NOTE:  assumes the host behaves sanely,
1569                                  * only clearing real halts.  Else we may
1570                                  * need to kill pending transfers and then
1571                                  * restart the queue... very messy for DMA!
1572                                  */
1573                         }
1574                         VDBG("%s halt cleared by host\n", ep->name);
1575                         goto ep0out_status_stage;
1576                 case USB_REQ_SET_FEATURE:
1577                         /* set endpoint halt */
1578                         if (u.r.bRequestType != USB_RECIP_ENDPOINT)
1579                                 goto delegate;
1580                         if (u.r.wValue != USB_ENDPOINT_HALT
1581                                         || u.r.wLength != 0)
1582                                 goto do_stall;
1583                         ep = &udc->ep[u.r.wIndex & 0xf];
1584                         if (u.r.wIndex & USB_DIR_IN)
1585                                 ep += 16;
1586                         if (ep->bmAttributes == USB_ENDPOINT_XFER_ISOC
1587                                         || ep == ep0 || !ep->desc)
1588                                 goto do_stall;
1589                         if (use_dma && ep->has_dma) {
1590                                 /* this has rude side-effects (aborts) and
1591                                  * can't really work if DMA-IN is active
1592                                  */
1593                                 DBG("%s host set_halt, NYET \n", ep->name);
1594                                 goto do_stall;
1595                         }
1596                         use_ep(ep, 0);
1597                         /* can't halt if fifo isn't empty... */
1598                         UDC_CTRL_REG = UDC_CLR_EP;
1599                         UDC_CTRL_REG = UDC_SET_HALT;
1600                         VDBG("%s halted by host\n", ep->name);
1601 ep0out_status_stage:
1602                         status = 0;
1603                         UDC_EP_NUM_REG = UDC_EP_SEL|UDC_EP_DIR;
1604                         UDC_CTRL_REG = UDC_CLR_EP;
1605                         UDC_CTRL_REG = UDC_SET_FIFO_EN;
1606                         UDC_EP_NUM_REG = UDC_EP_DIR;
1607                         udc->ep0_pending = 0;
1608                         break;
1609                 case USB_REQ_GET_STATUS:
1610                         /* return interface status.  if we were pedantic,
1611                          * we'd detect non-existent interfaces, and stall.
1612                          */
1613                         if (u.r.bRequestType
1614                                         != (USB_DIR_IN|USB_RECIP_INTERFACE))
1615                                 goto delegate;
1616                         /* return two zero bytes */
1617                         UDC_EP_NUM_REG = UDC_EP_SEL|UDC_EP_DIR;
1618                         UDC_DATA_REG = 0;
1619                         UDC_CTRL_REG = UDC_SET_FIFO_EN;
1620                         UDC_EP_NUM_REG = UDC_EP_DIR;
1621                         status = 0;
1622                         VDBG("GET_STATUS, interface %d\n", u.r.wIndex);
1623                         /* next, status stage */
1624                         break;
1625                 default:
1626 delegate:
1627                         /* activate the ep0out fifo right away */
1628                         if (!udc->ep0_in && u.r.wLength) {
1629                                 UDC_EP_NUM_REG = 0;
1630                                 UDC_CTRL_REG = UDC_SET_FIFO_EN;
1631                         }
1632
1633                         /* gadget drivers see class/vendor specific requests,
1634                          * {SET,GET}_{INTERFACE,DESCRIPTOR,CONFIGURATION},
1635                          * and more
1636                          */
1637                         VDBG("SETUP %02x.%02x v%04x i%04x l%04x\n",
1638                                 u.r.bRequestType, u.r.bRequest,
1639                                 u.r.wValue, u.r.wIndex, u.r.wLength);
1640
1641                         /* The gadget driver may return an error here,
1642                          * causing an immediate protocol stall.
1643                          *
1644                          * Else it must issue a response, either queueing a
1645                          * response buffer for the DATA stage, or halting ep0
1646                          * (causing a protocol stall, not a real halt).  A
1647                          * zero length buffer means no DATA stage.
1648                          *
1649                          * It's fine to issue that response after the setup()
1650                          * call returns, and this IRQ was handled.
1651                          */
1652                         udc->ep0_setup = 1;
1653                         spin_unlock(&udc->lock);
1654                         status = udc->driver->setup (&udc->gadget, &u.r);
1655                         spin_lock(&udc->lock);
1656                         udc->ep0_setup = 0;
1657                 }
1658
1659                 if (status < 0) {
1660 do_stall:
1661                         VDBG("req %02x.%02x protocol STALL; stat %d\n",
1662                                         u.r.bRequestType, u.r.bRequest, status);
1663                         if (udc->ep0_set_config) {
1664                                 if (udc->ep0_reset_config)
1665                                         WARN("error resetting config?\n");
1666                                 else
1667                                         UDC_SYSCON2_REG = UDC_CLR_CFG;
1668                         }
1669                         UDC_SYSCON2_REG = UDC_STALL_CMD;
1670                         udc->ep0_pending = 0;
1671                 }
1672         }
1673 }
1674
1675 /*-------------------------------------------------------------------------*/
1676
1677 #define OTG_FLAGS (UDC_B_HNP_ENABLE|UDC_A_HNP_SUPPORT|UDC_A_ALT_HNP_SUPPORT)
1678
1679 static void devstate_irq(struct omap_udc *udc, u16 irq_src)
1680 {
1681         u16     devstat, change;
1682
1683         devstat = UDC_DEVSTAT_REG;
1684         change = devstat ^ udc->devstat;
1685         udc->devstat = devstat;
1686
1687         if (change & (UDC_USB_RESET|UDC_ATT)) {
1688                 udc_quiesce(udc);
1689
1690                 if (change & UDC_ATT) {
1691                         /* driver for any external transceiver will
1692                          * have called omap_vbus_session() already
1693                          */
1694                         if (devstat & UDC_ATT) {
1695                                 udc->gadget.speed = USB_SPEED_FULL;
1696                                 VDBG("connect\n");
1697                                 if (!udc->transceiver)
1698                                         pullup_enable(udc);
1699                                 // if (driver->connect) call it
1700                         } else if (udc->gadget.speed != USB_SPEED_UNKNOWN) {
1701                                 udc->gadget.speed = USB_SPEED_UNKNOWN;
1702                                 if (!udc->transceiver)
1703                                         pullup_disable(udc);
1704                                 DBG("disconnect, gadget %s\n",
1705                                         udc->driver->driver.name);
1706                                 if (udc->driver->disconnect) {
1707                                         spin_unlock(&udc->lock);
1708                                         udc->driver->disconnect(&udc->gadget);
1709                                         spin_lock(&udc->lock);
1710                                 }
1711                         }
1712                         change &= ~UDC_ATT;
1713                 }
1714
1715                 if (change & UDC_USB_RESET) {
1716                         if (devstat & UDC_USB_RESET) {
1717                                 VDBG("RESET=1\n");
1718                         } else {
1719                                 udc->gadget.speed = USB_SPEED_FULL;
1720                                 INFO("USB reset done, gadget %s\n",
1721                                         udc->driver->driver.name);
1722                                 /* ep0 traffic is legal from now on */
1723                                 UDC_IRQ_EN_REG = UDC_DS_CHG_IE | UDC_EP0_IE;
1724                         }
1725                         change &= ~UDC_USB_RESET;
1726                 }
1727         }
1728         if (change & UDC_SUS) {
1729                 if (udc->gadget.speed != USB_SPEED_UNKNOWN) {
1730                         // FIXME tell isp1301 to suspend/resume (?)
1731                         if (devstat & UDC_SUS) {
1732                                 VDBG("suspend\n");
1733                                 update_otg(udc);
1734                                 /* HNP could be under way already */
1735                                 if (udc->gadget.speed == USB_SPEED_FULL
1736                                                 && udc->driver->suspend) {
1737                                         spin_unlock(&udc->lock);
1738                                         udc->driver->suspend(&udc->gadget);
1739                                         spin_lock(&udc->lock);
1740                                 }
1741                         } else {
1742                                 VDBG("resume\n");
1743                                 if (udc->gadget.speed == USB_SPEED_FULL
1744                                                 && udc->driver->resume) {
1745                                         spin_unlock(&udc->lock);
1746                                         udc->driver->resume(&udc->gadget);
1747                                         spin_lock(&udc->lock);
1748                                 }
1749                         }
1750                 }
1751                 change &= ~UDC_SUS;
1752         }
1753         if (!cpu_is_omap15xx() && (change & OTG_FLAGS)) {
1754                 update_otg(udc);
1755                 change &= ~OTG_FLAGS;
1756         }
1757
1758         change &= ~(UDC_CFG|UDC_DEF|UDC_ADD);
1759         if (change)
1760                 VDBG("devstat %03x, ignore change %03x\n",
1761                         devstat,  change);
1762
1763         UDC_IRQ_SRC_REG = UDC_DS_CHG;
1764 }
1765
1766 static irqreturn_t
1767 omap_udc_irq(int irq, void *_udc, struct pt_regs *r)
1768 {
1769         struct omap_udc *udc = _udc;
1770         u16             irq_src;
1771         irqreturn_t     status = IRQ_NONE;
1772         unsigned long   flags;
1773
1774         spin_lock_irqsave(&udc->lock, flags);
1775         irq_src = UDC_IRQ_SRC_REG;
1776
1777         /* Device state change (usb ch9 stuff) */
1778         if (irq_src & UDC_DS_CHG) {
1779                 devstate_irq(_udc, irq_src);
1780                 status = IRQ_HANDLED;
1781                 irq_src &= ~UDC_DS_CHG;
1782         }
1783
1784         /* EP0 control transfers */
1785         if (irq_src & (UDC_EP0_RX|UDC_SETUP|UDC_EP0_TX)) {
1786                 ep0_irq(_udc, irq_src);
1787                 status = IRQ_HANDLED;
1788                 irq_src &= ~(UDC_EP0_RX|UDC_SETUP|UDC_EP0_TX);
1789         }
1790
1791         /* DMA transfer completion */
1792         if (use_dma && (irq_src & (UDC_TXN_DONE|UDC_RXN_CNT|UDC_RXN_EOT))) {
1793                 dma_irq(_udc, irq_src);
1794                 status = IRQ_HANDLED;
1795                 irq_src &= ~(UDC_TXN_DONE|UDC_RXN_CNT|UDC_RXN_EOT);
1796         }
1797
1798         irq_src &= ~(UDC_SOF|UDC_EPN_TX|UDC_EPN_RX);
1799         if (irq_src)
1800                 DBG("udc_irq, unhandled %03x\n", irq_src);
1801         spin_unlock_irqrestore(&udc->lock, flags);
1802
1803         return status;
1804 }
1805
1806 /* workaround for seemingly-lost IRQs for RX ACKs... */
1807 #define PIO_OUT_TIMEOUT (jiffies + HZ/3)
1808 #define HALF_FULL(f)    (!((f)&(UDC_NON_ISO_FIFO_FULL|UDC_NON_ISO_FIFO_EMPTY)))
1809
1810 static void pio_out_timer(unsigned long _ep)
1811 {
1812         struct omap_ep  *ep = (void *) _ep;
1813         unsigned long   flags;
1814         u16             stat_flg;
1815
1816         spin_lock_irqsave(&ep->udc->lock, flags);
1817         if (!list_empty(&ep->queue) && ep->ackwait) {
1818                 use_ep(ep, 0);
1819                 stat_flg = UDC_STAT_FLG_REG;
1820
1821                 if ((stat_flg & UDC_ACK) && (!(stat_flg & UDC_FIFO_EN)
1822                                 || (ep->double_buf && HALF_FULL(stat_flg)))) {
1823                         struct omap_req *req;
1824
1825                         VDBG("%s: lose, %04x\n", ep->ep.name, stat_flg);
1826                         req = container_of(ep->queue.next,
1827                                         struct omap_req, queue);
1828                         UDC_EP_NUM_REG = ep->bEndpointAddress | UDC_EP_SEL;
1829                         (void) read_fifo(ep, req);
1830                         UDC_EP_NUM_REG = ep->bEndpointAddress;
1831                         UDC_CTRL_REG = UDC_SET_FIFO_EN;
1832                         ep->ackwait = 1 + ep->double_buf;
1833                 }
1834         }
1835         mod_timer(&ep->timer, PIO_OUT_TIMEOUT);
1836         spin_unlock_irqrestore(&ep->udc->lock, flags);
1837 }
1838
1839 static irqreturn_t
1840 omap_udc_pio_irq(int irq, void *_dev, struct pt_regs *r)
1841 {
1842         u16             epn_stat, irq_src;
1843         irqreturn_t     status = IRQ_NONE;
1844         struct omap_ep  *ep;
1845         int             epnum;
1846         struct omap_udc *udc = _dev;
1847         struct omap_req *req;
1848         unsigned long   flags;
1849
1850         spin_lock_irqsave(&udc->lock, flags);
1851         epn_stat = UDC_EPN_STAT_REG;
1852         irq_src = UDC_IRQ_SRC_REG;
1853
1854         /* handle OUT first, to avoid some wasteful NAKs */
1855         if (irq_src & UDC_EPN_RX) {
1856                 epnum = (epn_stat >> 8) & 0x0f;
1857                 UDC_IRQ_SRC_REG = UDC_EPN_RX;
1858                 status = IRQ_HANDLED;
1859                 ep = &udc->ep[epnum];
1860                 ep->irqs++;
1861
1862                 UDC_EP_NUM_REG = epnum | UDC_EP_SEL;
1863                 ep->fnf = 0;
1864                 if ((UDC_STAT_FLG_REG & UDC_ACK)) {
1865                         ep->ackwait--;
1866                         if (!list_empty(&ep->queue)) {
1867                                 int stat;
1868                                 req = container_of(ep->queue.next,
1869                                                 struct omap_req, queue);
1870                                 stat = read_fifo(ep, req);
1871                                 if (!ep->double_buf)
1872                                         ep->fnf = 1;
1873                         }
1874                 }
1875                 /* min 6 clock delay before clearing EP_SEL ... */
1876                 epn_stat = UDC_EPN_STAT_REG;
1877                 epn_stat = UDC_EPN_STAT_REG;
1878                 UDC_EP_NUM_REG = epnum;
1879
1880                 /* enabling fifo _after_ clearing ACK, contrary to docs,
1881                  * reduces lossage; timer still needed though (sigh).
1882                  */
1883                 if (ep->fnf) {
1884                         UDC_CTRL_REG = UDC_SET_FIFO_EN;
1885                         ep->ackwait = 1 + ep->double_buf;
1886                 }
1887                 mod_timer(&ep->timer, PIO_OUT_TIMEOUT);
1888         }
1889
1890         /* then IN transfers */
1891         else if (irq_src & UDC_EPN_TX) {
1892                 epnum = epn_stat & 0x0f;
1893                 UDC_IRQ_SRC_REG = UDC_EPN_TX;
1894                 status = IRQ_HANDLED;
1895                 ep = &udc->ep[16 + epnum];
1896                 ep->irqs++;
1897
1898                 UDC_EP_NUM_REG = epnum | UDC_EP_DIR | UDC_EP_SEL;
1899                 if ((UDC_STAT_FLG_REG & UDC_ACK)) {
1900                         ep->ackwait = 0;
1901                         if (!list_empty(&ep->queue)) {
1902                                 req = container_of(ep->queue.next,
1903                                                 struct omap_req, queue);
1904                                 (void) write_fifo(ep, req);
1905                         }
1906                 }
1907                 /* min 6 clock delay before clearing EP_SEL ... */
1908                 epn_stat = UDC_EPN_STAT_REG;
1909                 epn_stat = UDC_EPN_STAT_REG;
1910                 UDC_EP_NUM_REG = epnum | UDC_EP_DIR;
1911                 /* then 6 clocks before it'd tx */
1912         }
1913
1914         spin_unlock_irqrestore(&udc->lock, flags);
1915         return status;
1916 }
1917
1918 #ifdef  USE_ISO
1919 static irqreturn_t
1920 omap_udc_iso_irq(int irq, void *_dev, struct pt_regs *r)
1921 {
1922         struct omap_udc *udc = _dev;
1923         struct omap_ep  *ep;
1924         int             pending = 0;
1925         unsigned long   flags;
1926
1927         spin_lock_irqsave(&udc->lock, flags);
1928
1929         /* handle all non-DMA ISO transfers */
1930         list_for_each_entry (ep, &udc->iso, iso) {
1931                 u16             stat;
1932                 struct omap_req *req;
1933
1934                 if (ep->has_dma || list_empty(&ep->queue))
1935                         continue;
1936                 req = list_entry(ep->queue.next, struct omap_req, queue);
1937
1938                 use_ep(ep, UDC_EP_SEL);
1939                 stat = UDC_STAT_FLG_REG;
1940
1941                 /* NOTE: like the other controller drivers, this isn't
1942                  * currently reporting lost or damaged frames.
1943                  */
1944                 if (ep->bEndpointAddress & USB_DIR_IN) {
1945                         if (stat & UDC_MISS_IN)
1946                                 /* done(ep, req, -EPROTO) */;
1947                         else
1948                                 write_fifo(ep, req);
1949                 } else {
1950                         int     status = 0;
1951
1952                         if (stat & UDC_NO_RXPACKET)
1953                                 status = -EREMOTEIO;
1954                         else if (stat & UDC_ISO_ERR)
1955                                 status = -EILSEQ;
1956                         else if (stat & UDC_DATA_FLUSH)
1957                                 status = -ENOSR;
1958
1959                         if (status)
1960                                 /* done(ep, req, status) */;
1961                         else
1962                                 read_fifo(ep, req);
1963                 }
1964                 deselect_ep();
1965                 /* 6 wait states before next EP */
1966
1967                 ep->irqs++;
1968                 if (!list_empty(&ep->queue))
1969                         pending = 1;
1970         }
1971         if (!pending)
1972                 UDC_IRQ_EN_REG &= ~UDC_SOF_IE;
1973         UDC_IRQ_SRC_REG = UDC_SOF;
1974
1975         spin_unlock_irqrestore(&udc->lock, flags);
1976         return IRQ_HANDLED;
1977 }
1978 #endif
1979
1980 /*-------------------------------------------------------------------------*/
1981
1982 static struct omap_udc *udc;
1983
1984 int usb_gadget_register_driver (struct usb_gadget_driver *driver)
1985 {
1986         int             status = -ENODEV;
1987         struct omap_ep  *ep;
1988         unsigned long   flags;
1989
1990         /* basic sanity tests */
1991         if (!udc)
1992                 return -ENODEV;
1993         if (!driver
1994                         // FIXME if otg, check:  driver->is_otg
1995                         || driver->speed < USB_SPEED_FULL
1996                         || !driver->bind
1997                         || !driver->unbind
1998                         || !driver->setup)
1999                 return -EINVAL;
2000
2001         spin_lock_irqsave(&udc->lock, flags);
2002         if (udc->driver) {
2003                 spin_unlock_irqrestore(&udc->lock, flags);
2004                 return -EBUSY;
2005         }
2006
2007         /* reset state */
2008         list_for_each_entry (ep, &udc->gadget.ep_list, ep.ep_list) {
2009                 ep->irqs = 0;
2010                 if (ep->bmAttributes == USB_ENDPOINT_XFER_ISOC)
2011                         continue;
2012                 use_ep(ep, 0);
2013                 UDC_CTRL_REG = UDC_SET_HALT;
2014         }
2015         udc->ep0_pending = 0;
2016         udc->ep[0].irqs = 0;
2017         udc->softconnect = 1;
2018
2019         /* hook up the driver */
2020         driver->driver.bus = NULL;
2021         udc->driver = driver;
2022         udc->gadget.dev.driver = &driver->driver;
2023         spin_unlock_irqrestore(&udc->lock, flags);
2024
2025         status = driver->bind (&udc->gadget);
2026         if (status) {
2027                 DBG("bind to %s --> %d\n", driver->driver.name, status);
2028                 udc->gadget.dev.driver = NULL;
2029                 udc->driver = NULL;
2030                 goto done;
2031         }
2032         DBG("bound to driver %s\n", driver->driver.name);
2033
2034         UDC_IRQ_SRC_REG = UDC_IRQ_SRC_MASK;
2035
2036         /* connect to bus through transceiver */
2037         if (udc->transceiver) {
2038                 status = otg_set_peripheral(udc->transceiver, &udc->gadget);
2039                 if (status < 0) {
2040                         ERR("can't bind to transceiver\n");
2041                         driver->unbind (&udc->gadget);
2042                         udc->gadget.dev.driver = NULL;
2043                         udc->driver = NULL;
2044                         goto done;
2045                 }
2046         } else {
2047                 if (can_pullup(udc))
2048                         pullup_enable (udc);
2049                 else
2050                         pullup_disable (udc);
2051         }
2052
2053         /* boards that don't have VBUS sensing can't autogate 48MHz;
2054          * can't enter deep sleep while a gadget driver is active.
2055          */
2056         if (machine_is_omap_innovator() || machine_is_omap_osk())
2057                 omap_vbus_session(&udc->gadget, 1);
2058
2059 done:
2060         return status;
2061 }
2062 EXPORT_SYMBOL(usb_gadget_register_driver);
2063
2064 int usb_gadget_unregister_driver (struct usb_gadget_driver *driver)
2065 {
2066         unsigned long   flags;
2067         int             status = -ENODEV;
2068
2069         if (!udc)
2070                 return -ENODEV;
2071         if (!driver || driver != udc->driver)
2072                 return -EINVAL;
2073
2074         if (machine_is_omap_innovator() || machine_is_omap_osk())
2075                 omap_vbus_session(&udc->gadget, 0);
2076
2077         if (udc->transceiver)
2078                 (void) otg_set_peripheral(udc->transceiver, NULL);
2079         else
2080                 pullup_disable(udc);
2081
2082         spin_lock_irqsave(&udc->lock, flags);
2083         udc_quiesce(udc);
2084         spin_unlock_irqrestore(&udc->lock, flags);
2085
2086         driver->unbind(&udc->gadget);
2087         udc->gadget.dev.driver = NULL;
2088         udc->driver = NULL;
2089
2090         DBG("unregistered driver '%s'\n", driver->driver.name);
2091         return status;
2092 }
2093 EXPORT_SYMBOL(usb_gadget_unregister_driver);
2094
2095
2096 /*-------------------------------------------------------------------------*/
2097
2098 #ifdef CONFIG_USB_GADGET_DEBUG_FILES
2099
2100 #include <linux/seq_file.h>
2101
2102 static const char proc_filename[] = "driver/udc";
2103
2104 #define FOURBITS "%s%s%s%s"
2105 #define EIGHTBITS FOURBITS FOURBITS
2106
2107 static void proc_ep_show(struct seq_file *s, struct omap_ep *ep)
2108 {
2109         u16             stat_flg;
2110         struct omap_req *req;
2111         char            buf[20];
2112
2113         use_ep(ep, 0);
2114
2115         if (use_dma && ep->has_dma)
2116                 snprintf(buf, sizeof buf, "(%cxdma%d lch%d) ",
2117                         (ep->bEndpointAddress & USB_DIR_IN) ? 't' : 'r',
2118                         ep->dma_channel - 1, ep->lch);
2119         else
2120                 buf[0] = 0;
2121
2122         stat_flg = UDC_STAT_FLG_REG;
2123         seq_printf(s,
2124                 "\n%s %s%s%sirqs %ld stat %04x " EIGHTBITS FOURBITS "%s\n",
2125                 ep->name, buf,
2126                 ep->double_buf ? "dbuf " : "",
2127                 ({char *s; switch(ep->ackwait){
2128                 case 0: s = ""; break;
2129                 case 1: s = "(ackw) "; break;
2130                 case 2: s = "(ackw2) "; break;
2131                 default: s = "(?) "; break;
2132                 } s;}),
2133                 ep->irqs, stat_flg,
2134                 (stat_flg & UDC_NO_RXPACKET) ? "no_rxpacket " : "",
2135                 (stat_flg & UDC_MISS_IN) ? "miss_in " : "",
2136                 (stat_flg & UDC_DATA_FLUSH) ? "data_flush " : "",
2137                 (stat_flg & UDC_ISO_ERR) ? "iso_err " : "",
2138                 (stat_flg & UDC_ISO_FIFO_EMPTY) ? "iso_fifo_empty " : "",
2139                 (stat_flg & UDC_ISO_FIFO_FULL) ? "iso_fifo_full " : "",
2140                 (stat_flg & UDC_EP_HALTED) ? "HALT " : "",
2141                 (stat_flg & UDC_STALL) ? "STALL " : "",
2142                 (stat_flg & UDC_NAK) ? "NAK " : "",
2143                 (stat_flg & UDC_ACK) ? "ACK " : "",
2144                 (stat_flg & UDC_FIFO_EN) ? "fifo_en " : "",
2145                 (stat_flg & UDC_NON_ISO_FIFO_EMPTY) ? "fifo_empty " : "",
2146                 (stat_flg & UDC_NON_ISO_FIFO_FULL) ? "fifo_full " : "");
2147
2148         if (list_empty (&ep->queue))
2149                 seq_printf(s, "\t(queue empty)\n");
2150         else
2151                 list_for_each_entry (req, &ep->queue, queue) {
2152                         unsigned        length = req->req.actual;
2153
2154                         if (use_dma && buf[0]) {
2155                                 length += ((ep->bEndpointAddress & USB_DIR_IN)
2156                                                 ? dma_src_len : dma_dest_len)
2157                                         (ep, req->req.dma + length);
2158                                 buf[0] = 0;
2159                         }
2160                         seq_printf(s, "\treq %p len %d/%d buf %p\n",
2161                                         &req->req, length,
2162                                         req->req.length, req->req.buf);
2163                 }
2164 }
2165
2166 static char *trx_mode(unsigned m, int enabled)
2167 {
2168         switch (m) {
2169         case 0:         return enabled ? "*6wire" : "unused";
2170         case 1:         return "4wire";
2171         case 2:         return "3wire";
2172         case 3:         return "6wire";
2173         default:        return "unknown";
2174         }
2175 }
2176
2177 static int proc_otg_show(struct seq_file *s)
2178 {
2179         u32             tmp;
2180         u32             trans;
2181
2182         tmp = OTG_REV_REG;
2183         trans = USB_TRANSCEIVER_CTRL_REG;
2184         seq_printf(s, "\nOTG rev %d.%d, transceiver_ctrl %03x\n",
2185                 tmp >> 4, tmp & 0xf, trans);
2186         tmp = OTG_SYSCON_1_REG;
2187         seq_printf(s, "otg_syscon1 %08x usb2 %s, usb1 %s, usb0 %s,"
2188                         FOURBITS "\n", tmp,
2189                 trx_mode(USB2_TRX_MODE(tmp), trans & CONF_USB2_UNI_R),
2190                 trx_mode(USB1_TRX_MODE(tmp), trans & CONF_USB1_UNI_R),
2191                 (USB0_TRX_MODE(tmp) == 0)
2192                         ? "internal"
2193                         : trx_mode(USB0_TRX_MODE(tmp), 1),
2194                 (tmp & OTG_IDLE_EN) ? " !otg" : "",
2195                 (tmp & HST_IDLE_EN) ? " !host" : "",
2196                 (tmp & DEV_IDLE_EN) ? " !dev" : "",
2197                 (tmp & OTG_RESET_DONE) ? " reset_done" : " reset_active");
2198         tmp = OTG_SYSCON_2_REG;
2199         seq_printf(s, "otg_syscon2 %08x%s" EIGHTBITS
2200                         " b_ase_brst=%d hmc=%d\n", tmp,
2201                 (tmp & OTG_EN) ? " otg_en" : "",
2202                 (tmp & USBX_SYNCHRO) ? " synchro" : "",
2203                 // much more SRP stuff
2204                 (tmp & SRP_DATA) ? " srp_data" : "",
2205                 (tmp & SRP_VBUS) ? " srp_vbus" : "",
2206                 (tmp & OTG_PADEN) ? " otg_paden" : "",
2207                 (tmp & HMC_PADEN) ? " hmc_paden" : "",
2208                 (tmp & UHOST_EN) ? " uhost_en" : "",
2209                 (tmp & HMC_TLLSPEED) ? " tllspeed" : "",
2210                 (tmp & HMC_TLLATTACH) ? " tllattach" : "",
2211                 B_ASE_BRST(tmp),
2212                 OTG_HMC(tmp));
2213         tmp = OTG_CTRL_REG;
2214         seq_printf(s, "otg_ctrl    %06x" EIGHTBITS EIGHTBITS "%s\n", tmp,
2215                 (tmp & OTG_ASESSVLD) ? " asess" : "",
2216                 (tmp & OTG_BSESSEND) ? " bsess_end" : "",
2217                 (tmp & OTG_BSESSVLD) ? " bsess" : "",
2218                 (tmp & OTG_VBUSVLD) ? " vbus" : "",
2219                 (tmp & OTG_ID) ? " id" : "",
2220                 (tmp & OTG_DRIVER_SEL) ? " DEVICE" : " HOST",
2221                 (tmp & OTG_A_SETB_HNPEN) ? " a_setb_hnpen" : "",
2222                 (tmp & OTG_A_BUSREQ) ? " a_bus" : "",
2223                 (tmp & OTG_B_HNPEN) ? " b_hnpen" : "",
2224                 (tmp & OTG_B_BUSREQ) ? " b_bus" : "",
2225                 (tmp & OTG_BUSDROP) ? " busdrop" : "",
2226                 (tmp & OTG_PULLDOWN) ? " down" : "",
2227                 (tmp & OTG_PULLUP) ? " up" : "",
2228                 (tmp & OTG_DRV_VBUS) ? " drv" : "",
2229                 (tmp & OTG_PD_VBUS) ? " pd_vb" : "",
2230                 (tmp & OTG_PU_VBUS) ? " pu_vb" : "",
2231                 (tmp & OTG_PU_ID) ? " pu_id" : ""
2232                 );
2233         tmp = OTG_IRQ_EN_REG;
2234         seq_printf(s, "otg_irq_en  %04x" "\n", tmp);
2235         tmp = OTG_IRQ_SRC_REG;
2236         seq_printf(s, "otg_irq_src %04x" "\n", tmp);
2237         tmp = OTG_OUTCTRL_REG;
2238         seq_printf(s, "otg_outctrl %04x" "\n", tmp);
2239         tmp = OTG_TEST_REG;
2240         seq_printf(s, "otg_test    %04x" "\n", tmp);
2241         return 0;
2242 }
2243
2244 static int proc_udc_show(struct seq_file *s, void *_)
2245 {
2246         u32             tmp;
2247         struct omap_ep  *ep;
2248         unsigned long   flags;
2249
2250         spin_lock_irqsave(&udc->lock, flags);
2251
2252         seq_printf(s, "%s, version: " DRIVER_VERSION
2253 #ifdef  USE_ISO
2254                 " (iso)"
2255 #endif
2256                 "%s\n",
2257                 driver_desc,
2258                 use_dma ?  " (dma)" : "");
2259
2260         tmp = UDC_REV_REG & 0xff;
2261         seq_printf(s,
2262                 "UDC rev %d.%d, fifo mode %d, gadget %s\n"
2263                 "hmc %d, transceiver %s\n",
2264                 tmp >> 4, tmp & 0xf,
2265                 fifo_mode,
2266                 udc->driver ? udc->driver->driver.name : "(none)",
2267                 HMC,
2268                 udc->transceiver ? udc->transceiver->label : "(none)");
2269         seq_printf(s, "ULPD control %04x req %04x status %04x\n",
2270                 __REG16(ULPD_CLOCK_CTRL),
2271                 __REG16(ULPD_SOFT_REQ),
2272                 __REG16(ULPD_STATUS_REQ));
2273
2274         /* OTG controller registers */
2275         if (!cpu_is_omap15xx())
2276                 proc_otg_show(s);
2277
2278         tmp = UDC_SYSCON1_REG;
2279         seq_printf(s, "\nsyscon1     %04x" EIGHTBITS "\n", tmp,
2280                 (tmp & UDC_CFG_LOCK) ? " cfg_lock" : "",
2281                 (tmp & UDC_DATA_ENDIAN) ? " data_endian" : "",
2282                 (tmp & UDC_DMA_ENDIAN) ? " dma_endian" : "",
2283                 (tmp & UDC_NAK_EN) ? " nak" : "",
2284                 (tmp & UDC_AUTODECODE_DIS) ? " autodecode_dis" : "",
2285                 (tmp & UDC_SELF_PWR) ? " self_pwr" : "",
2286                 (tmp & UDC_SOFF_DIS) ? " soff_dis" : "",
2287                 (tmp & UDC_PULLUP_EN) ? " PULLUP" : "");
2288         // syscon2 is write-only
2289
2290         /* UDC controller registers */
2291         if (!(tmp & UDC_PULLUP_EN)) {
2292                 seq_printf(s, "(suspended)\n");
2293                 spin_unlock_irqrestore(&udc->lock, flags);
2294                 return 0;
2295         }
2296
2297         tmp = UDC_DEVSTAT_REG;
2298         seq_printf(s, "devstat     %04x" EIGHTBITS "%s%s\n", tmp,
2299                 (tmp & UDC_B_HNP_ENABLE) ? " b_hnp" : "",
2300                 (tmp & UDC_A_HNP_SUPPORT) ? " a_hnp" : "",
2301                 (tmp & UDC_A_ALT_HNP_SUPPORT) ? " a_alt_hnp" : "",
2302                 (tmp & UDC_R_WK_OK) ? " r_wk_ok" : "",
2303                 (tmp & UDC_USB_RESET) ? " usb_reset" : "",
2304                 (tmp & UDC_SUS) ? " SUS" : "",
2305                 (tmp & UDC_CFG) ? " CFG" : "",
2306                 (tmp & UDC_ADD) ? " ADD" : "",
2307                 (tmp & UDC_DEF) ? " DEF" : "",
2308                 (tmp & UDC_ATT) ? " ATT" : "");
2309         seq_printf(s, "sof         %04x\n", UDC_SOF_REG);
2310         tmp = UDC_IRQ_EN_REG;
2311         seq_printf(s, "irq_en      %04x" FOURBITS "%s\n", tmp,
2312                 (tmp & UDC_SOF_IE) ? " sof" : "",
2313                 (tmp & UDC_EPN_RX_IE) ? " epn_rx" : "",
2314                 (tmp & UDC_EPN_TX_IE) ? " epn_tx" : "",
2315                 (tmp & UDC_DS_CHG_IE) ? " ds_chg" : "",
2316                 (tmp & UDC_EP0_IE) ? " ep0" : "");
2317         tmp = UDC_IRQ_SRC_REG;
2318         seq_printf(s, "irq_src     %04x" EIGHTBITS "%s%s\n", tmp,
2319                 (tmp & UDC_TXN_DONE) ? " txn_done" : "",
2320                 (tmp & UDC_RXN_CNT) ? " rxn_cnt" : "",
2321                 (tmp & UDC_RXN_EOT) ? " rxn_eot" : "",
2322                 (tmp & UDC_SOF) ? " sof" : "",
2323                 (tmp & UDC_EPN_RX) ? " epn_rx" : "",
2324                 (tmp & UDC_EPN_TX) ? " epn_tx" : "",
2325                 (tmp & UDC_DS_CHG) ? " ds_chg" : "",
2326                 (tmp & UDC_SETUP) ? " setup" : "",
2327                 (tmp & UDC_EP0_RX) ? " ep0out" : "",
2328                 (tmp & UDC_EP0_TX) ? " ep0in" : "");
2329         if (use_dma) {
2330                 unsigned i;
2331
2332                 tmp = UDC_DMA_IRQ_EN_REG;
2333                 seq_printf(s, "dma_irq_en  %04x%s" EIGHTBITS "\n", tmp,
2334                         (tmp & UDC_TX_DONE_IE(3)) ? " tx2_done" : "",
2335                         (tmp & UDC_RX_CNT_IE(3)) ? " rx2_cnt" : "",
2336                         (tmp & UDC_RX_EOT_IE(3)) ? " rx2_eot" : "",
2337
2338                         (tmp & UDC_TX_DONE_IE(2)) ? " tx1_done" : "",
2339                         (tmp & UDC_RX_CNT_IE(2)) ? " rx1_cnt" : "",
2340                         (tmp & UDC_RX_EOT_IE(2)) ? " rx1_eot" : "",
2341
2342                         (tmp & UDC_TX_DONE_IE(1)) ? " tx0_done" : "",
2343                         (tmp & UDC_RX_CNT_IE(1)) ? " rx0_cnt" : "",
2344                         (tmp & UDC_RX_EOT_IE(1)) ? " rx0_eot" : "");
2345
2346                 tmp = UDC_RXDMA_CFG_REG;
2347                 seq_printf(s, "rxdma_cfg   %04x\n", tmp);
2348                 if (tmp) {
2349                         for (i = 0; i < 3; i++) {
2350                                 if ((tmp & (0x0f << (i * 4))) == 0)
2351                                         continue;
2352                                 seq_printf(s, "rxdma[%d]    %04x\n", i,
2353                                                 UDC_RXDMA_REG(i + 1));
2354                         }
2355                 }
2356                 tmp = UDC_TXDMA_CFG_REG;
2357                 seq_printf(s, "txdma_cfg   %04x\n", tmp);
2358                 if (tmp) {
2359                         for (i = 0; i < 3; i++) {
2360                                 if (!(tmp & (0x0f << (i * 4))))
2361                                         continue;
2362                                 seq_printf(s, "txdma[%d]    %04x\n", i,
2363                                                 UDC_TXDMA_REG(i + 1));
2364                         }
2365                 }
2366         }
2367
2368         tmp = UDC_DEVSTAT_REG;
2369         if (tmp & UDC_ATT) {
2370                 proc_ep_show(s, &udc->ep[0]);
2371                 if (tmp & UDC_ADD) {
2372                         list_for_each_entry (ep, &udc->gadget.ep_list,
2373                                         ep.ep_list) {
2374                                 if (ep->desc)
2375                                         proc_ep_show(s, ep);
2376                         }
2377                 }
2378         }
2379         spin_unlock_irqrestore(&udc->lock, flags);
2380         return 0;
2381 }
2382
2383 static int proc_udc_open(struct inode *inode, struct file *file)
2384 {
2385         return single_open(file, proc_udc_show, NULL);
2386 }
2387
2388 static struct file_operations proc_ops = {
2389         .open           = proc_udc_open,
2390         .read           = seq_read,
2391         .llseek         = seq_lseek,
2392         .release        = single_release,
2393 };
2394
2395 static void create_proc_file(void)
2396 {
2397         struct proc_dir_entry *pde;
2398
2399         pde = create_proc_entry (proc_filename, 0, NULL);
2400         if (pde)
2401                 pde->proc_fops = &proc_ops;
2402 }
2403
2404 static void remove_proc_file(void)
2405 {
2406         remove_proc_entry(proc_filename, NULL);
2407 }
2408
2409 #else
2410
2411 static inline void create_proc_file(void) {}
2412 static inline void remove_proc_file(void) {}
2413
2414 #endif
2415
2416 /*-------------------------------------------------------------------------*/
2417
2418 /* Before this controller can enumerate, we need to pick an endpoint
2419  * configuration, or "fifo_mode"  That involves allocating 2KB of packet
2420  * buffer space among the endpoints we'll be operating.
2421  */
2422 static unsigned __init
2423 omap_ep_setup(char *name, u8 addr, u8 type,
2424                 unsigned buf, unsigned maxp, int dbuf)
2425 {
2426         struct omap_ep  *ep;
2427         u16             epn_rxtx = 0;
2428
2429         /* OUT endpoints first, then IN */
2430         ep = &udc->ep[addr & 0xf];
2431         if (addr & USB_DIR_IN)
2432                 ep += 16;
2433
2434         /* in case of ep init table bugs */
2435         BUG_ON(ep->name[0]);
2436
2437         /* chip setup ... bit values are same for IN, OUT */
2438         if (type == USB_ENDPOINT_XFER_ISOC) {
2439                 switch (maxp) {
2440                 case 8:         epn_rxtx = 0 << 12; break;
2441                 case 16:        epn_rxtx = 1 << 12; break;
2442                 case 32:        epn_rxtx = 2 << 12; break;
2443                 case 64:        epn_rxtx = 3 << 12; break;
2444                 case 128:       epn_rxtx = 4 << 12; break;
2445                 case 256:       epn_rxtx = 5 << 12; break;
2446                 case 512:       epn_rxtx = 6 << 12; break;
2447                 default:        BUG();
2448                 }
2449                 epn_rxtx |= UDC_EPN_RX_ISO;
2450                 dbuf = 1;
2451         } else {
2452                 /* double-buffering "not supported" on 15xx,
2453                  * and ignored for PIO-IN on 16xx
2454                  */
2455                 if (!use_dma || cpu_is_omap15xx())
2456                         dbuf = 0;
2457
2458                 switch (maxp) {
2459                 case 8:         epn_rxtx = 0 << 12; break;
2460                 case 16:        epn_rxtx = 1 << 12; break;
2461                 case 32:        epn_rxtx = 2 << 12; break;
2462                 case 64:        epn_rxtx = 3 << 12; break;
2463                 default:        BUG();
2464                 }
2465                 if (dbuf && addr)
2466                         epn_rxtx |= UDC_EPN_RX_DB;
2467                 init_timer(&ep->timer);
2468                 ep->timer.function = pio_out_timer;
2469                 ep->timer.data = (unsigned long) ep;
2470         }
2471         if (addr)
2472                 epn_rxtx |= UDC_EPN_RX_VALID;
2473         BUG_ON(buf & 0x07);
2474         epn_rxtx |= buf >> 3;
2475
2476         DBG("%s addr %02x rxtx %04x maxp %d%s buf %d\n",
2477                 name, addr, epn_rxtx, maxp, dbuf ? "x2" : "", buf);
2478
2479         if (addr & USB_DIR_IN)
2480                 UDC_EP_TX_REG(addr & 0xf) = epn_rxtx;
2481         else
2482                 UDC_EP_RX_REG(addr) = epn_rxtx;
2483
2484         /* next endpoint's buffer starts after this one's */
2485         buf += maxp;
2486         if (dbuf)
2487                 buf += maxp;
2488         BUG_ON(buf > 2048);
2489
2490         /* set up driver data structures */
2491         BUG_ON(strlen(name) >= sizeof ep->name);
2492         strlcpy(ep->name, name, sizeof ep->name);
2493         INIT_LIST_HEAD(&ep->queue);
2494         INIT_LIST_HEAD(&ep->iso);
2495         ep->bEndpointAddress = addr;
2496         ep->bmAttributes = type;
2497         ep->double_buf = dbuf;
2498         ep->udc = udc;
2499
2500         ep->ep.name = ep->name;
2501         ep->ep.ops = &omap_ep_ops;
2502         ep->ep.maxpacket = ep->maxpacket = maxp;
2503         list_add_tail (&ep->ep.ep_list, &udc->gadget.ep_list);
2504
2505         return buf;
2506 }
2507
2508 static void omap_udc_release(struct device *dev)
2509 {
2510         complete(udc->done);
2511         kfree (udc);
2512         udc = NULL;
2513 }
2514
2515 static int __init
2516 omap_udc_setup(struct platform_device *odev, struct otg_transceiver *xceiv)
2517 {
2518         unsigned        tmp, buf;
2519
2520         /* abolish any previous hardware state */
2521         UDC_SYSCON1_REG = 0;
2522         UDC_IRQ_EN_REG = 0;
2523         UDC_IRQ_SRC_REG = UDC_IRQ_SRC_MASK;
2524         UDC_DMA_IRQ_EN_REG = 0;
2525         UDC_RXDMA_CFG_REG = 0;
2526         UDC_TXDMA_CFG_REG = 0;
2527
2528         /* UDC_PULLUP_EN gates the chip clock */
2529         // OTG_SYSCON_1_REG |= DEV_IDLE_EN;
2530
2531         udc = kmalloc (sizeof *udc, SLAB_KERNEL);
2532         if (!udc)
2533                 return -ENOMEM;
2534
2535         memset(udc, 0, sizeof *udc);
2536         spin_lock_init (&udc->lock);
2537
2538         udc->gadget.ops = &omap_gadget_ops;
2539         udc->gadget.ep0 = &udc->ep[0].ep;
2540         INIT_LIST_HEAD(&udc->gadget.ep_list);
2541         INIT_LIST_HEAD(&udc->iso);
2542         udc->gadget.speed = USB_SPEED_UNKNOWN;
2543         udc->gadget.name = driver_name;
2544
2545         device_initialize(&udc->gadget.dev);
2546         strcpy (udc->gadget.dev.bus_id, "gadget");
2547         udc->gadget.dev.release = omap_udc_release;
2548         udc->gadget.dev.parent = &odev->dev;
2549         if (use_dma)
2550                 udc->gadget.dev.dma_mask = odev->dev.dma_mask;
2551
2552         udc->transceiver = xceiv;
2553
2554         /* ep0 is special; put it right after the SETUP buffer */
2555         buf = omap_ep_setup("ep0", 0, USB_ENDPOINT_XFER_CONTROL,
2556                         8 /* after SETUP */, 64 /* maxpacket */, 0);
2557         list_del_init(&udc->ep[0].ep.ep_list);
2558
2559         /* initially disable all non-ep0 endpoints */
2560         for (tmp = 1; tmp < 15; tmp++) {
2561                 UDC_EP_RX_REG(tmp) = 0;
2562                 UDC_EP_TX_REG(tmp) = 0;
2563         }
2564
2565 #define OMAP_BULK_EP(name,addr) \
2566         buf = omap_ep_setup(name "-bulk", addr, \
2567                         USB_ENDPOINT_XFER_BULK, buf, 64, 1);
2568 #define OMAP_INT_EP(name,addr, maxp) \
2569         buf = omap_ep_setup(name "-int", addr, \
2570                         USB_ENDPOINT_XFER_INT, buf, maxp, 0);
2571 #define OMAP_ISO_EP(name,addr, maxp) \
2572         buf = omap_ep_setup(name "-iso", addr, \
2573                         USB_ENDPOINT_XFER_ISOC, buf, maxp, 1);
2574
2575         switch (fifo_mode) {
2576         case 0:
2577                 OMAP_BULK_EP("ep1in",  USB_DIR_IN  | 1);
2578                 OMAP_BULK_EP("ep2out", USB_DIR_OUT | 2);
2579                 OMAP_INT_EP("ep3in",   USB_DIR_IN  | 3, 16);
2580                 break;
2581         case 1:
2582                 OMAP_BULK_EP("ep1in",  USB_DIR_IN  | 1);
2583                 OMAP_BULK_EP("ep2out", USB_DIR_OUT | 2);
2584                 OMAP_INT_EP("ep9in",   USB_DIR_IN  | 9, 16);
2585
2586                 OMAP_BULK_EP("ep3in",  USB_DIR_IN  | 3);
2587                 OMAP_BULK_EP("ep4out", USB_DIR_OUT | 4);
2588                 OMAP_INT_EP("ep10in",  USB_DIR_IN  | 10, 16);
2589
2590                 OMAP_BULK_EP("ep5in",  USB_DIR_IN  | 5);
2591                 OMAP_BULK_EP("ep5out", USB_DIR_OUT | 5);
2592                 OMAP_INT_EP("ep11in",  USB_DIR_IN  | 11, 16);
2593
2594                 OMAP_BULK_EP("ep6in",  USB_DIR_IN  | 6);
2595                 OMAP_BULK_EP("ep6out", USB_DIR_OUT | 6);
2596                 OMAP_INT_EP("ep12in",  USB_DIR_IN  | 12, 16);
2597
2598                 OMAP_BULK_EP("ep7in",  USB_DIR_IN  | 7);
2599                 OMAP_BULK_EP("ep7out", USB_DIR_OUT | 7);
2600                 OMAP_INT_EP("ep13in",  USB_DIR_IN  | 13, 16);
2601                 OMAP_INT_EP("ep13out", USB_DIR_OUT | 13, 16);
2602
2603                 OMAP_BULK_EP("ep8in",  USB_DIR_IN  | 8);
2604                 OMAP_BULK_EP("ep8out", USB_DIR_OUT | 8);
2605                 OMAP_INT_EP("ep14in",  USB_DIR_IN  | 14, 16);
2606                 OMAP_INT_EP("ep14out", USB_DIR_OUT | 14, 16);
2607
2608                 OMAP_BULK_EP("ep15in",  USB_DIR_IN  | 15);
2609                 OMAP_BULK_EP("ep15out", USB_DIR_OUT | 15);
2610
2611                 break;
2612
2613 #ifdef  USE_ISO
2614         case 2:                 /* mixed iso/bulk */
2615                 OMAP_ISO_EP("ep1in",   USB_DIR_IN  | 1, 256);
2616                 OMAP_ISO_EP("ep2out",  USB_DIR_OUT | 2, 256);
2617                 OMAP_ISO_EP("ep3in",   USB_DIR_IN  | 3, 128);
2618                 OMAP_ISO_EP("ep4out",  USB_DIR_OUT | 4, 128);
2619
2620                 OMAP_INT_EP("ep5in",   USB_DIR_IN  | 5, 16);
2621
2622                 OMAP_BULK_EP("ep6in",  USB_DIR_IN  | 6);
2623                 OMAP_BULK_EP("ep7out", USB_DIR_OUT | 7);
2624                 OMAP_INT_EP("ep8in",   USB_DIR_IN  | 8, 16);
2625                 break;
2626         case 3:                 /* mixed bulk/iso */
2627                 OMAP_BULK_EP("ep1in",  USB_DIR_IN  | 1);
2628                 OMAP_BULK_EP("ep2out", USB_DIR_OUT | 2);
2629                 OMAP_INT_EP("ep3in",   USB_DIR_IN  | 3, 16);
2630
2631                 OMAP_BULK_EP("ep4in",  USB_DIR_IN  | 4);
2632                 OMAP_BULK_EP("ep5out", USB_DIR_OUT | 5);
2633                 OMAP_INT_EP("ep6in",   USB_DIR_IN  | 6, 16);
2634
2635                 OMAP_ISO_EP("ep7in",   USB_DIR_IN  | 7, 256);
2636                 OMAP_ISO_EP("ep8out",  USB_DIR_OUT | 8, 256);
2637                 OMAP_INT_EP("ep9in",   USB_DIR_IN  | 9, 16);
2638                 break;
2639 #endif
2640
2641         /* add more modes as needed */
2642
2643         default:
2644                 ERR("unsupported fifo_mode #%d\n", fifo_mode);
2645                 return -ENODEV;
2646         }
2647         UDC_SYSCON1_REG = UDC_CFG_LOCK|UDC_SELF_PWR;
2648         INFO("fifo mode %d, %d bytes not used\n", fifo_mode, 2048 - buf);
2649         return 0;
2650 }
2651
2652 static int __init omap_udc_probe(struct device *dev)
2653 {
2654         struct platform_device  *odev = to_platform_device(dev);
2655         int                     status = -ENODEV;
2656         int                     hmc;
2657         struct otg_transceiver  *xceiv = NULL;
2658         const char              *type = NULL;
2659         struct omap_usb_config  *config = dev->platform_data;
2660
2661         /* NOTE:  "knows" the order of the resources! */
2662         if (!request_mem_region(odev->resource[0].start,
2663                         odev->resource[0].end - odev->resource[0].start + 1,
2664                         driver_name)) {
2665                 DBG("request_mem_region failed\n");
2666                 return -EBUSY;
2667         }
2668
2669         INFO("OMAP UDC rev %d.%d%s\n",
2670                 UDC_REV_REG >> 4, UDC_REV_REG & 0xf,
2671                 config->otg ? ", Mini-AB" : "");
2672
2673         /* use the mode given to us by board init code */
2674         if (cpu_is_omap15xx()) {
2675                 hmc = HMC_1510;
2676                 type = "(unknown)";
2677
2678                 if (machine_is_omap_innovator()) {
2679                         /* just set up software VBUS detect, and then
2680                          * later rig it so we always report VBUS.
2681                          * FIXME without really sensing VBUS, we can't
2682                          * know when to turn PULLUP_EN on/off; and that
2683                          * means we always "need" the 48MHz clock.
2684                          */
2685                         u32 tmp = FUNC_MUX_CTRL_0_REG;
2686
2687                         FUNC_MUX_CTRL_0_REG &= ~VBUS_CTRL_1510;
2688                         tmp |= VBUS_MODE_1510;
2689                         tmp &= ~VBUS_CTRL_1510;
2690                         FUNC_MUX_CTRL_0_REG = tmp;
2691                 }
2692         } else {
2693                 hmc = HMC_1610;
2694                 switch (hmc) {
2695                 case 0:                 /* POWERUP DEFAULT == 0 */
2696                 case 4:
2697                 case 12:
2698                 case 20:
2699                         if (!cpu_is_omap1710()) {
2700                                 type = "integrated";
2701                                 break;
2702                         }
2703                         /* FALL THROUGH */
2704                 case 3:
2705                 case 11:
2706                 case 16:
2707                 case 19:
2708                 case 25:
2709                         xceiv = otg_get_transceiver();
2710                         if (!xceiv) {
2711                                 DBG("external transceiver not registered!\n");
2712                                 if (config->otg)
2713                                         goto cleanup0;
2714                                 type = "unknown";
2715                         } else
2716                                 type = xceiv->label;
2717                         break;
2718                 case 21:                        /* internal loopback */
2719                         type = "loopback";
2720                         break;
2721                 case 14:                        /* transceiverless */
2722                         type = "no";
2723                         break;
2724
2725                 default:
2726                         ERR("unrecognized UDC HMC mode %d\n", hmc);
2727                         return -ENODEV;
2728                 }
2729         }
2730         INFO("hmc mode %d, %s transceiver\n", hmc, type);
2731
2732         /* a "gadget" abstracts/virtualizes the controller */
2733         status = omap_udc_setup(odev, xceiv);
2734         if (status) {
2735                 goto cleanup0;
2736         }
2737         xceiv = NULL;
2738         // "udc" is now valid
2739         pullup_disable(udc);
2740 #if     defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
2741         udc->gadget.is_otg = (config->otg != 0);
2742 #endif
2743
2744         /* USB general purpose IRQ:  ep0, state changes, dma, etc */
2745         status = request_irq(odev->resource[1].start, omap_udc_irq,
2746                         SA_SAMPLE_RANDOM, driver_name, udc);
2747         if (status != 0) {
2748                 ERR( "can't get irq %ld, err %d\n",
2749                         odev->resource[1].start, status);
2750                 goto cleanup1;
2751         }
2752
2753         /* USB "non-iso" IRQ (PIO for all but ep0) */
2754         status = request_irq(odev->resource[2].start, omap_udc_pio_irq,
2755                         SA_SAMPLE_RANDOM, "omap_udc pio", udc);
2756         if (status != 0) {
2757                 ERR( "can't get irq %ld, err %d\n",
2758                         odev->resource[2].start, status);
2759                 goto cleanup2;
2760         }
2761 #ifdef  USE_ISO
2762         status = request_irq(odev->resource[3].start, omap_udc_iso_irq,
2763                         SA_INTERRUPT, "omap_udc iso", udc);
2764         if (status != 0) {
2765                 ERR("can't get irq %ld, err %d\n",
2766                         odev->resource[3].start, status);
2767                 goto cleanup3;
2768         }
2769 #endif
2770
2771         create_proc_file();
2772         device_add(&udc->gadget.dev);
2773         return 0;
2774
2775 #ifdef  USE_ISO
2776 cleanup3:
2777         free_irq(odev->resource[2].start, udc);
2778 #endif
2779
2780 cleanup2:
2781         free_irq(odev->resource[1].start, udc);
2782
2783 cleanup1:
2784         kfree (udc);
2785         udc = NULL;
2786
2787 cleanup0:
2788         if (xceiv)
2789                 put_device(xceiv->dev);
2790         release_mem_region(odev->resource[0].start,
2791                         odev->resource[0].end - odev->resource[0].start + 1);
2792         return status;
2793 }
2794
2795 static int __exit omap_udc_remove(struct device *dev)
2796 {
2797         struct platform_device  *odev = to_platform_device(dev);
2798         DECLARE_COMPLETION(done);
2799
2800         if (!udc)
2801                 return -ENODEV;
2802
2803         udc->done = &done;
2804
2805         pullup_disable(udc);
2806         if (udc->transceiver) {
2807                 put_device(udc->transceiver->dev);
2808                 udc->transceiver = NULL;
2809         }
2810         UDC_SYSCON1_REG = 0;
2811
2812         remove_proc_file();
2813
2814 #ifdef  USE_ISO
2815         free_irq(odev->resource[3].start, udc);
2816 #endif
2817         free_irq(odev->resource[2].start, udc);
2818         free_irq(odev->resource[1].start, udc);
2819
2820         release_mem_region(odev->resource[0].start,
2821                         odev->resource[0].end - odev->resource[0].start + 1);
2822
2823         device_unregister(&udc->gadget.dev);
2824         wait_for_completion(&done);
2825
2826         return 0;
2827 }
2828
2829 /* suspend/resume/wakeup from sysfs (echo > power/state) or when the
2830  * system is forced into deep sleep
2831  *
2832  * REVISIT we should probably reject suspend requests when there's a host
2833  * session active, rather than disconnecting, at least on boards that can
2834  * report VBUS irqs (UDC_DEVSTAT_REG.UDC_ATT).  And in any case, we need to
2835  * make host resumes and VBUS detection trigger OMAP wakeup events; that
2836  * may involve talking to an external transceiver (e.g. isp1301).
2837  */
2838 static int omap_udc_suspend(struct device *dev, pm_message_t message, u32 level)
2839 {
2840         u32     devstat;
2841
2842         if (level != SUSPEND_POWER_DOWN)
2843                 return 0;
2844         devstat = UDC_DEVSTAT_REG;
2845
2846         /* we're requesting 48 MHz clock if the pullup is enabled
2847          * (== we're attached to the host) and we're not suspended,
2848          * which would prevent entry to deep sleep...
2849          */
2850         if ((devstat & UDC_ATT) != 0 && (devstat & UDC_SUS) == 0) {
2851                 WARN("session active; suspend requires disconnect\n");
2852                 omap_pullup(&udc->gadget, 0);
2853         }
2854
2855         udc->gadget.dev.power.power_state = PMSG_SUSPEND;
2856         udc->gadget.dev.parent->power.power_state = PMSG_SUSPEND;
2857         return 0;
2858 }
2859
2860 static int omap_udc_resume(struct device *dev, u32 level)
2861 {
2862         if (level != RESUME_POWER_ON)
2863                 return 0;
2864
2865         DBG("resume + wakeup/SRP\n");
2866         udc->gadget.dev.parent->power.power_state = PMSG_ON;
2867         udc->gadget.dev.power.power_state = PMSG_ON;
2868         omap_pullup(&udc->gadget, 1);
2869
2870         /* maybe the host would enumerate us if we nudged it */
2871         msleep(100);
2872         return omap_wakeup(&udc->gadget);
2873 }
2874
2875 /*-------------------------------------------------------------------------*/
2876
2877 static struct device_driver udc_driver = {
2878         .name           = (char *) driver_name,
2879         .bus            = &platform_bus_type,
2880         .probe          = omap_udc_probe,
2881         .remove         = __exit_p(omap_udc_remove),
2882         .suspend        = omap_udc_suspend,
2883         .resume         = omap_udc_resume,
2884 };
2885
2886 static int __init udc_init(void)
2887 {
2888         INFO("%s, version: " DRIVER_VERSION
2889 #ifdef  USE_ISO
2890                 " (iso)"
2891 #endif
2892                 "%s\n", driver_desc,
2893                 use_dma ?  " (dma)" : "");
2894         return driver_register(&udc_driver);
2895 }
2896 module_init(udc_init);
2897
2898 static void __exit udc_exit(void)
2899 {
2900         driver_unregister(&udc_driver);
2901 }
2902 module_exit(udc_exit);
2903
2904 MODULE_DESCRIPTION(DRIVER_DESC);
2905 MODULE_LICENSE("GPL");
2906