2 * c67x00-ll-hpi.c: Cypress C67X00 USB Low level interface using HPI
4 * Copyright (C) 2006-2008 Barco N.V.
5 * Derived from the Cypress cy7c67200/300 ezusb linux driver and
6 * based on multiple host controller drivers inside the linux kernel.
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
24 #include <asm/byteorder.h>
26 #include <linux/usb/c67x00.h>
31 struct c67x00_lcp_int_data {
35 /* -------------------------------------------------------------------------- */
36 /* Interface definitions */
38 #define COMM_ACK 0x0FED
39 #define COMM_NAK 0xDEAD
41 #define COMM_RESET 0xFA50
42 #define COMM_EXEC_INT 0xCE01
43 #define COMM_INT_NUM 0x01C2
45 /* Registers 0 to COMM_REGS-1 */
46 #define COMM_R(x) (0x01C4 + 2 * (x))
48 #define HUSB_SIE_pCurrentTDPtr(x) ((x) ? 0x01B2 : 0x01B0)
49 #define HUSB_SIE_pTDListDone_Sem(x) ((x) ? 0x01B8 : 0x01B6)
50 #define HUSB_pEOT 0x01B4
52 /* Software interrupts */
54 #define HUSB_SIE_INIT_INT(x) ((x) ? 0x0073 : 0x0072)
55 #define HUSB_RESET_INT 0x0074
57 #define SUSB_INIT_INT 0x0071
58 #define SUSB_INIT_INT_LOC (SUSB_INIT_INT * 2)
60 /* -----------------------------------------------------------------------
63 * The c67x00 chip also support control via SPI or HSS serial
64 * interfaces. However, this driver assumes that register access can
65 * be performed from IRQ context. While this is a safe assuption with
66 * the HPI interface, it is not true for the serial interfaces.
75 static inline u16 hpi_read_reg(struct c67x00_device *dev, int reg)
77 return __raw_readw(dev->hpi.base + reg * dev->hpi.regstep);
80 static inline void hpi_write_reg(struct c67x00_device *dev, int reg, u16 value)
82 __raw_writew(value, dev->hpi.base + reg * dev->hpi.regstep);
85 static inline u16 hpi_read_word_nolock(struct c67x00_device *dev, u16 reg)
87 hpi_write_reg(dev, HPI_ADDR, reg);
88 return hpi_read_reg(dev, HPI_DATA);
91 static u16 hpi_read_word(struct c67x00_device *dev, u16 reg)
96 spin_lock_irqsave(&dev->hpi.lock, flags);
97 value = hpi_read_word_nolock(dev, reg);
98 spin_unlock_irqrestore(&dev->hpi.lock, flags);
103 static void hpi_write_word_nolock(struct c67x00_device *dev, u16 reg, u16 value)
105 hpi_write_reg(dev, HPI_ADDR, reg);
106 hpi_write_reg(dev, HPI_DATA, value);
109 static void hpi_write_word(struct c67x00_device *dev, u16 reg, u16 value)
113 spin_lock_irqsave(&dev->hpi.lock, flags);
114 hpi_write_word_nolock(dev, reg, value);
115 spin_unlock_irqrestore(&dev->hpi.lock, flags);
119 * Only data is little endian, addr has cpu endianess
121 static void hpi_write_words_le16(struct c67x00_device *dev, u16 addr,
122 u16 *data, u16 count)
127 spin_lock_irqsave(&dev->hpi.lock, flags);
129 hpi_write_reg(dev, HPI_ADDR, addr);
130 for (i = 0; i < count; i++)
131 hpi_write_reg(dev, HPI_DATA, cpu_to_le16(*data++));
133 spin_unlock_irqrestore(&dev->hpi.lock, flags);
137 * Only data is little endian, addr has cpu endianess
139 static void hpi_read_words_le16(struct c67x00_device *dev, u16 addr,
140 u16 *data, u16 count)
145 spin_lock_irqsave(&dev->hpi.lock, flags);
146 hpi_write_reg(dev, HPI_ADDR, addr);
147 for (i = 0; i < count; i++)
148 *data++ = le16_to_cpu(hpi_read_reg(dev, HPI_DATA));
150 spin_unlock_irqrestore(&dev->hpi.lock, flags);
153 static void hpi_set_bits(struct c67x00_device *dev, u16 reg, u16 mask)
158 spin_lock_irqsave(&dev->hpi.lock, flags);
159 value = hpi_read_word_nolock(dev, reg);
160 hpi_write_word_nolock(dev, reg, value | mask);
161 spin_unlock_irqrestore(&dev->hpi.lock, flags);
164 static void hpi_clear_bits(struct c67x00_device *dev, u16 reg, u16 mask)
169 spin_lock_irqsave(&dev->hpi.lock, flags);
170 value = hpi_read_word_nolock(dev, reg);
171 hpi_write_word_nolock(dev, reg, value & ~mask);
172 spin_unlock_irqrestore(&dev->hpi.lock, flags);
175 static u16 hpi_recv_mbox(struct c67x00_device *dev)
180 spin_lock_irqsave(&dev->hpi.lock, flags);
181 value = hpi_read_reg(dev, HPI_MAILBOX);
182 spin_unlock_irqrestore(&dev->hpi.lock, flags);
187 static u16 hpi_send_mbox(struct c67x00_device *dev, u16 value)
191 spin_lock_irqsave(&dev->hpi.lock, flags);
192 hpi_write_reg(dev, HPI_MAILBOX, value);
193 spin_unlock_irqrestore(&dev->hpi.lock, flags);
198 u16 c67x00_ll_hpi_status(struct c67x00_device *dev)
203 spin_lock_irqsave(&dev->hpi.lock, flags);
204 value = hpi_read_reg(dev, HPI_STATUS);
205 spin_unlock_irqrestore(&dev->hpi.lock, flags);
210 void c67x00_ll_hpi_reg_init(struct c67x00_device *dev)
215 c67x00_ll_hpi_status(dev);
216 hpi_write_word(dev, HPI_IRQ_ROUTING_REG, 0);
218 for (i = 0; i < C67X00_SIES; i++) {
219 hpi_write_word(dev, SIEMSG_REG(i), 0);
220 hpi_read_word(dev, SIEMSG_REG(i));
224 void c67x00_ll_hpi_enable_sofeop(struct c67x00_sie *sie)
226 hpi_set_bits(sie->dev, HPI_IRQ_ROUTING_REG,
227 SOFEOP_TO_HPI_EN(sie->sie_num));
230 void c67x00_ll_hpi_disable_sofeop(struct c67x00_sie *sie)
232 hpi_clear_bits(sie->dev, HPI_IRQ_ROUTING_REG,
233 SOFEOP_TO_HPI_EN(sie->sie_num));
236 /* -------------------------------------------------------------------------- */
239 static inline u16 ll_recv_msg(struct c67x00_device *dev)
243 res = wait_for_completion_timeout(&dev->hpi.lcp.msg_received, 5 * HZ);
246 return (res == 0) ? -EIO : 0;
249 /* -------------------------------------------------------------------------- */
250 /* General functions */
252 u16 c67x00_ll_fetch_siemsg(struct c67x00_device *dev, int sie_num)
256 val = hpi_read_word(dev, SIEMSG_REG(sie_num));
257 /* clear register to allow next message */
258 hpi_write_word(dev, SIEMSG_REG(sie_num), 0);
263 u16 c67x00_ll_get_usb_ctl(struct c67x00_sie *sie)
265 return hpi_read_word(sie->dev, USB_CTL_REG(sie->sie_num));
269 * c67x00_ll_usb_clear_status - clear the USB status bits
271 void c67x00_ll_usb_clear_status(struct c67x00_sie *sie, u16 bits)
273 hpi_write_word(sie->dev, USB_STAT_REG(sie->sie_num), bits);
276 u16 c67x00_ll_usb_get_status(struct c67x00_sie *sie)
278 return hpi_read_word(sie->dev, USB_STAT_REG(sie->sie_num));
281 /* -------------------------------------------------------------------------- */
283 static int c67x00_comm_exec_int(struct c67x00_device *dev, u16 nr,
284 struct c67x00_lcp_int_data *data)
288 mutex_lock(&dev->hpi.lcp.mutex);
289 hpi_write_word(dev, COMM_INT_NUM, nr);
290 for (i = 0; i < COMM_REGS; i++)
291 hpi_write_word(dev, COMM_R(i), data->regs[i]);
292 hpi_send_mbox(dev, COMM_EXEC_INT);
293 rc = ll_recv_msg(dev);
294 mutex_unlock(&dev->hpi.lcp.mutex);
299 /* -------------------------------------------------------------------------- */
300 /* Host specific functions */
302 void c67x00_ll_set_husb_eot(struct c67x00_device *dev, u16 value)
304 mutex_lock(&dev->hpi.lcp.mutex);
305 hpi_write_word(dev, HUSB_pEOT, value);
306 mutex_unlock(&dev->hpi.lcp.mutex);
309 static inline void c67x00_ll_husb_sie_init(struct c67x00_sie *sie)
311 struct c67x00_device *dev = sie->dev;
312 struct c67x00_lcp_int_data data;
315 rc = c67x00_comm_exec_int(dev, HUSB_SIE_INIT_INT(sie->sie_num), &data);
316 BUG_ON(rc); /* No return path for error code; crash spectacularly */
319 void c67x00_ll_husb_reset(struct c67x00_sie *sie, int port)
321 struct c67x00_device *dev = sie->dev;
322 struct c67x00_lcp_int_data data;
325 data.regs[0] = 50; /* Reset USB port for 50ms */
326 data.regs[1] = port | (sie->sie_num << 1);
327 rc = c67x00_comm_exec_int(dev, HUSB_RESET_INT, &data);
328 BUG_ON(rc); /* No return path for error code; crash spectacularly */
331 void c67x00_ll_husb_set_current_td(struct c67x00_sie *sie, u16 addr)
333 hpi_write_word(sie->dev, HUSB_SIE_pCurrentTDPtr(sie->sie_num), addr);
336 u16 c67x00_ll_husb_get_current_td(struct c67x00_sie *sie)
338 return hpi_read_word(sie->dev, HUSB_SIE_pCurrentTDPtr(sie->sie_num));
341 u16 c67x00_ll_husb_get_frame(struct c67x00_sie *sie)
343 return hpi_read_word(sie->dev, HOST_FRAME_REG(sie->sie_num));
346 void c67x00_ll_husb_init_host_port(struct c67x00_sie *sie)
348 /* Set port into host mode */
349 hpi_set_bits(sie->dev, USB_CTL_REG(sie->sie_num), HOST_MODE);
350 c67x00_ll_husb_sie_init(sie);
351 /* Clear interrupts */
352 c67x00_ll_usb_clear_status(sie, HOST_STAT_MASK);
354 if (!(hpi_read_word(sie->dev, USB_CTL_REG(sie->sie_num)) & HOST_MODE))
355 dev_warn(sie_dev(sie),
356 "SIE %d not set to host mode\n", sie->sie_num);
359 void c67x00_ll_husb_reset_port(struct c67x00_sie *sie, int port)
361 /* Clear connect change */
362 c67x00_ll_usb_clear_status(sie, PORT_CONNECT_CHANGE(port));
364 /* Enable interrupts */
365 hpi_set_bits(sie->dev, HPI_IRQ_ROUTING_REG,
366 SOFEOP_TO_CPU_EN(sie->sie_num));
367 hpi_set_bits(sie->dev, HOST_IRQ_EN_REG(sie->sie_num),
368 SOF_EOP_IRQ_EN | DONE_IRQ_EN);
370 /* Enable pull down transistors */
371 hpi_set_bits(sie->dev, USB_CTL_REG(sie->sie_num), PORT_RES_EN(port));
374 /* -------------------------------------------------------------------------- */
376 void c67x00_ll_irq(struct c67x00_device *dev, u16 int_status)
378 if ((int_status & MBX_OUT_FLG) == 0)
381 dev->hpi.lcp.last_msg = hpi_recv_mbox(dev);
382 complete(&dev->hpi.lcp.msg_received);
385 /* -------------------------------------------------------------------------- */
387 int c67x00_ll_reset(struct c67x00_device *dev)
391 mutex_lock(&dev->hpi.lcp.mutex);
392 hpi_send_mbox(dev, COMM_RESET);
393 rc = ll_recv_msg(dev);
394 mutex_unlock(&dev->hpi.lcp.mutex);
399 /* -------------------------------------------------------------------------- */
402 * c67x00_ll_write_mem_le16 - write into c67x00 memory
403 * Only data is little endian, addr has cpu endianess.
405 void c67x00_ll_write_mem_le16(struct c67x00_device *dev, u16 addr,
411 if (addr + len > 0xffff) {
412 dev_err(&dev->pdev->dev,
413 "Trying to write beyond writable region!\n");
418 /* unaligned access */
420 tmp = hpi_read_word(dev, addr - 1);
421 tmp = (tmp & 0x00ff) | (*buf++ << 8);
422 hpi_write_word(dev, addr - 1, tmp);
427 hpi_write_words_le16(dev, addr, (u16 *)buf, len / 2);
434 tmp = hpi_read_word(dev, addr);
435 tmp = (tmp & 0xff00) | *buf;
436 hpi_write_word(dev, addr, tmp);
441 * c67x00_ll_read_mem_le16 - read from c67x00 memory
442 * Only data is little endian, addr has cpu endianess.
444 void c67x00_ll_read_mem_le16(struct c67x00_device *dev, u16 addr,
450 /* unaligned access */
452 tmp = hpi_read_word(dev, addr - 1);
453 *buf++ = (tmp >> 8) & 0x00ff;
458 hpi_read_words_le16(dev, addr, (u16 *)buf, len / 2);
465 tmp = hpi_read_word(dev, addr);
470 /* -------------------------------------------------------------------------- */
472 void c67x00_ll_init(struct c67x00_device *dev)
474 mutex_init(&dev->hpi.lcp.mutex);
475 init_completion(&dev->hpi.lcp.msg_received);
478 void c67x00_ll_release(struct c67x00_device *dev)