4 * Driver for M32R serial ports
6 * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
7 * Based on drivers/serial/8250.c.
9 * Copyright (C) 2001 Russell King.
10 * Copyright (C) 2004 Hirokazu Takata <takata at linux-m32r.org>
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or
15 * (at your option) any later version.
19 * A note about mapbase / membase
21 * mapbase is the physical address of the IO port. Currently, we don't
22 * support this very well, and it may well be dropped from this driver
23 * in future. As such, mapbase should be NULL.
25 * membase is an 'ioremapped' cookie. This is compatible with the old
26 * serial.c driver, and is currently the preferred form.
29 #if defined(CONFIG_SERIAL_M32R_SIO_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
33 #include <linux/module.h>
34 #include <linux/tty.h>
35 #include <linux/ioport.h>
36 #include <linux/init.h>
37 #include <linux/console.h>
38 #include <linux/sysrq.h>
39 #include <linux/serial.h>
40 #include <linux/serialP.h>
41 #include <linux/delay.h>
47 #define PORT_M32R_BASE PORT_M32R_SIO
48 #define PORT_INDEX(x) (x - PORT_M32R_BASE + 1)
49 #define BAUD_RATE 115200
51 #include <linux/serial_core.h>
53 #include "m32r_sio_reg.h"
59 #define DEBUG_AUTOCONF(fmt...) printk(fmt)
61 #define DEBUG_AUTOCONF(fmt...) do { } while (0)
65 #define DEBUG_INTR(fmt...) printk(fmt)
67 #define DEBUG_INTR(fmt...) do { } while (0)
70 #define PASS_LIMIT 256
73 * We default to IRQ0 for the "no irq" hack. Some
74 * machine types want others as well - they're free
75 * to redefine this in their header file.
77 #define is_real_interrupt(irq) ((irq) != 0)
79 #define BASE_BAUD 115200
81 /* Standard COM flags */
82 #define STD_COM_FLAGS (UPF_BOOT_AUTOCONF | UPF_SKIP_TEST)
85 * SERIAL_PORT_DFNS tells us about built-in ports that have no
86 * standard enumeration mechanism. Platforms that can find all
87 * serial ports via mechanisms like ACPI or PCI need not supply it.
89 #if defined(CONFIG_PLAT_USRV)
91 #define SERIAL_PORT_DFNS \
92 /* UART CLK PORT IRQ FLAGS */ \
93 { 0, BASE_BAUD, 0x3F8, PLD_IRQ_UART0, STD_COM_FLAGS }, /* ttyS0 */ \
94 { 0, BASE_BAUD, 0x2F8, PLD_IRQ_UART1, STD_COM_FLAGS }, /* ttyS1 */
96 #else /* !CONFIG_PLAT_USRV */
98 #if defined(CONFIG_SERIAL_M32R_PLDSIO)
99 #define SERIAL_PORT_DFNS \
100 { 0, BASE_BAUD, ((unsigned long)PLD_ESIO0CR), PLD_IRQ_SIO0_RCV, \
101 STD_COM_FLAGS }, /* ttyS0 */
103 #define SERIAL_PORT_DFNS \
104 { 0, BASE_BAUD, M32R_SIO_OFFSET, M32R_IRQ_SIO0_R, \
105 STD_COM_FLAGS }, /* ttyS0 */
108 #endif /* !CONFIG_PLAT_USRV */
110 static struct old_serial_port old_serial_port[] = {
114 #define UART_NR ARRAY_SIZE(old_serial_port)
116 struct uart_sio_port {
117 struct uart_port port;
118 struct timer_list timer; /* "no irq" timer */
119 struct list_head list; /* ports on this IRQ */
124 unsigned char mcr_mask; /* mask of user bits */
125 unsigned char mcr_force; /* mask of forced bits */
126 unsigned char lsr_break_flag;
129 * We provide a per-port pm hook.
131 void (*pm)(struct uart_port *port,
132 unsigned int state, unsigned int old);
137 struct list_head *head;
140 static struct irq_info irq_lists[NR_IRQS];
143 * Here we define the default xmit fifo size used for each type of UART.
145 static const struct serial_uart_config uart_config[] = {
148 .dfl_xmit_fifo_size = 1,
151 [PORT_INDEX(PORT_M32R_SIO)] = {
153 .dfl_xmit_fifo_size = 1,
158 #ifdef CONFIG_SERIAL_M32R_PLDSIO
160 #define __sio_in(x) inw((unsigned long)(x))
161 #define __sio_out(v,x) outw((v),(unsigned long)(x))
163 static inline void sio_set_baud_rate(unsigned long baud)
165 unsigned short sbaud;
166 sbaud = (boot_cpu_data.bus_clock / (baud * 4))-1;
167 __sio_out(sbaud, PLD_ESIO0BAUR);
170 static void sio_reset(void)
174 tmp = __sio_in(PLD_ESIO0RXB);
175 tmp = __sio_in(PLD_ESIO0RXB);
176 tmp = __sio_in(PLD_ESIO0CR);
177 sio_set_baud_rate(BAUD_RATE);
178 __sio_out(0x0300, PLD_ESIO0CR);
179 __sio_out(0x0003, PLD_ESIO0CR);
182 static void sio_init(void)
186 tmp = __sio_in(PLD_ESIO0RXB);
187 tmp = __sio_in(PLD_ESIO0RXB);
188 tmp = __sio_in(PLD_ESIO0CR);
189 __sio_out(0x0300, PLD_ESIO0CR);
190 __sio_out(0x0003, PLD_ESIO0CR);
193 static void sio_error(int *status)
195 printk("SIO0 error[%04x]\n", *status);
198 } while ((*status = __sio_in(PLD_ESIO0CR)) != 3);
201 #else /* not CONFIG_SERIAL_M32R_PLDSIO */
203 #define __sio_in(x) inl(x)
204 #define __sio_out(v,x) outl((v),(x))
206 static inline void sio_set_baud_rate(unsigned long baud)
210 i = boot_cpu_data.bus_clock / (baud * 16);
211 j = (boot_cpu_data.bus_clock - (i * baud * 16)) / baud;
215 __sio_out(i, M32R_SIO0_BAUR_PORTL);
216 __sio_out(j, M32R_SIO0_RBAUR_PORTL);
219 static void sio_reset(void)
221 __sio_out(0x00000300, M32R_SIO0_CR_PORTL); /* init status */
222 __sio_out(0x00000800, M32R_SIO0_MOD1_PORTL); /* 8bit */
223 __sio_out(0x00000080, M32R_SIO0_MOD0_PORTL); /* 1stop non */
224 sio_set_baud_rate(BAUD_RATE);
225 __sio_out(0x00000000, M32R_SIO0_TRCR_PORTL);
226 __sio_out(0x00000003, M32R_SIO0_CR_PORTL); /* RXCEN */
229 static void sio_init(void)
233 tmp = __sio_in(M32R_SIO0_RXB_PORTL);
234 tmp = __sio_in(M32R_SIO0_RXB_PORTL);
235 tmp = __sio_in(M32R_SIO0_STS_PORTL);
236 __sio_out(0x00000003, M32R_SIO0_CR_PORTL);
239 static void sio_error(int *status)
241 printk("SIO0 error[%04x]\n", *status);
244 } while ((*status = __sio_in(M32R_SIO0_CR_PORTL)) != 3);
247 #endif /* CONFIG_SERIAL_M32R_PLDSIO */
249 static unsigned int sio_in(struct uart_sio_port *up, int offset)
251 return __sio_in(up->port.iobase + offset);
254 static void sio_out(struct uart_sio_port *up, int offset, int value)
256 __sio_out(value, up->port.iobase + offset);
259 static unsigned int serial_in(struct uart_sio_port *up, int offset)
264 return __sio_in(offset);
267 static void serial_out(struct uart_sio_port *up, int offset, int value)
272 __sio_out(value, offset);
275 static void m32r_sio_stop_tx(struct uart_port *port)
277 struct uart_sio_port *up = (struct uart_sio_port *)port;
279 if (up->ier & UART_IER_THRI) {
280 up->ier &= ~UART_IER_THRI;
281 serial_out(up, UART_IER, up->ier);
285 static void m32r_sio_start_tx(struct uart_port *port)
287 #ifdef CONFIG_SERIAL_M32R_PLDSIO
288 struct uart_sio_port *up = (struct uart_sio_port *)port;
289 struct circ_buf *xmit = &up->port.info->xmit;
291 if (!(up->ier & UART_IER_THRI)) {
292 up->ier |= UART_IER_THRI;
293 serial_out(up, UART_IER, up->ier);
294 serial_out(up, UART_TX, xmit->buf[xmit->tail]);
295 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
296 up->port.icount.tx++;
298 while((serial_in(up, UART_LSR) & UART_EMPTY) != UART_EMPTY);
300 struct uart_sio_port *up = (struct uart_sio_port *)port;
302 if (!(up->ier & UART_IER_THRI)) {
303 up->ier |= UART_IER_THRI;
304 serial_out(up, UART_IER, up->ier);
309 static void m32r_sio_stop_rx(struct uart_port *port)
311 struct uart_sio_port *up = (struct uart_sio_port *)port;
313 up->ier &= ~UART_IER_RLSI;
314 up->port.read_status_mask &= ~UART_LSR_DR;
315 serial_out(up, UART_IER, up->ier);
318 static void m32r_sio_enable_ms(struct uart_port *port)
320 struct uart_sio_port *up = (struct uart_sio_port *)port;
322 up->ier |= UART_IER_MSI;
323 serial_out(up, UART_IER, up->ier);
326 static void receive_chars(struct uart_sio_port *up, int *status,
327 struct pt_regs *regs)
329 struct tty_struct *tty = up->port.info->tty;
335 ch = sio_in(up, SIORXB);
337 up->port.icount.rx++;
339 if (unlikely(*status & (UART_LSR_BI | UART_LSR_PE |
340 UART_LSR_FE | UART_LSR_OE))) {
342 * For statistics only
344 if (*status & UART_LSR_BI) {
345 *status &= ~(UART_LSR_FE | UART_LSR_PE);
346 up->port.icount.brk++;
348 * We do the SysRQ and SAK checking
349 * here because otherwise the break
350 * may get masked by ignore_status_mask
351 * or read_status_mask.
353 if (uart_handle_break(&up->port))
355 } else if (*status & UART_LSR_PE)
356 up->port.icount.parity++;
357 else if (*status & UART_LSR_FE)
358 up->port.icount.frame++;
359 if (*status & UART_LSR_OE)
360 up->port.icount.overrun++;
363 * Mask off conditions which should be ingored.
365 *status &= up->port.read_status_mask;
367 if (up->port.line == up->port.cons->index) {
368 /* Recover the break flag from console xmit */
369 *status |= up->lsr_break_flag;
370 up->lsr_break_flag = 0;
373 if (*status & UART_LSR_BI) {
374 DEBUG_INTR("handling break....");
376 } else if (*status & UART_LSR_PE)
378 else if (*status & UART_LSR_FE)
381 if (uart_handle_sysrq_char(&up->port, ch, regs))
383 if ((*status & up->port.ignore_status_mask) == 0)
384 tty_insert_flip_char(tty, ch, flag);
386 if (*status & UART_LSR_OE) {
388 * Overrun is special, since it's reported
389 * immediately, and doesn't affect the current
392 tty_insert_flip_char(tty, 0, TTY_OVERRUN);
395 *status = serial_in(up, UART_LSR);
396 } while ((*status & UART_LSR_DR) && (max_count-- > 0));
397 tty_flip_buffer_push(tty);
400 static void transmit_chars(struct uart_sio_port *up)
402 struct circ_buf *xmit = &up->port.info->xmit;
405 if (up->port.x_char) {
406 #ifndef CONFIG_SERIAL_M32R_PLDSIO /* XXX */
407 serial_out(up, UART_TX, up->port.x_char);
409 up->port.icount.tx++;
413 if (uart_circ_empty(xmit) || uart_tx_stopped(&up->port)) {
414 m32r_sio_stop_tx(&up->port);
418 count = up->port.fifosize;
420 serial_out(up, UART_TX, xmit->buf[xmit->tail]);
421 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
422 up->port.icount.tx++;
423 if (uart_circ_empty(xmit))
425 while (!serial_in(up, UART_LSR) & UART_LSR_THRE);
427 } while (--count > 0);
429 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
430 uart_write_wakeup(&up->port);
432 DEBUG_INTR("THRE...");
434 if (uart_circ_empty(xmit))
435 m32r_sio_stop_tx(&up->port);
439 * This handles the interrupt from one port.
441 static inline void m32r_sio_handle_port(struct uart_sio_port *up,
442 unsigned int status, struct pt_regs *regs)
444 DEBUG_INTR("status = %x...", status);
447 receive_chars(up, &status, regs);
453 * This is the serial driver's interrupt routine.
455 * Arjan thinks the old way was overly complex, so it got simplified.
456 * Alan disagrees, saying that need the complexity to handle the weird
457 * nature of ISA shared interrupts. (This is a special exception.)
459 * In order to handle ISA shared interrupts properly, we need to check
460 * that all ports have been serviced, and therefore the ISA interrupt
461 * line has been de-asserted.
463 * This means we need to loop through all ports. checking that they
464 * don't have an interrupt pending.
466 static irqreturn_t m32r_sio_interrupt(int irq, void *dev_id,
467 struct pt_regs *regs)
469 struct irq_info *i = dev_id;
470 struct list_head *l, *end = NULL;
471 int pass_counter = 0;
473 DEBUG_INTR("m32r_sio_interrupt(%d)...", irq);
475 #ifdef CONFIG_SERIAL_M32R_PLDSIO
476 // if (irq == PLD_IRQ_SIO0_SND)
477 // irq = PLD_IRQ_SIO0_RCV;
479 if (irq == M32R_IRQ_SIO0_S)
480 irq = M32R_IRQ_SIO0_R;
487 struct uart_sio_port *up;
490 up = list_entry(l, struct uart_sio_port, list);
492 sts = sio_in(up, SIOSTS);
494 spin_lock(&up->port.lock);
495 m32r_sio_handle_port(up, sts, regs);
496 spin_unlock(&up->port.lock);
499 } else if (end == NULL)
504 if (l == i->head && pass_counter++ > PASS_LIMIT) {
511 spin_unlock(&i->lock);
513 DEBUG_INTR("end.\n");
519 * To support ISA shared interrupts, we need to have one interrupt
520 * handler that ensures that the IRQ line has been deasserted
521 * before returning. Failing to do this will result in the IRQ
522 * line being stuck active, and, since ISA irqs are edge triggered,
523 * no more IRQs will be seen.
525 static void serial_do_unlink(struct irq_info *i, struct uart_sio_port *up)
527 spin_lock_irq(&i->lock);
529 if (!list_empty(i->head)) {
530 if (i->head == &up->list)
531 i->head = i->head->next;
534 BUG_ON(i->head != &up->list);
538 spin_unlock_irq(&i->lock);
541 static int serial_link_irq_chain(struct uart_sio_port *up)
543 struct irq_info *i = irq_lists + up->port.irq;
544 int ret, irq_flags = up->port.flags & UPF_SHARE_IRQ ? IRQF_SHARED : 0;
546 spin_lock_irq(&i->lock);
549 list_add(&up->list, i->head);
550 spin_unlock_irq(&i->lock);
554 INIT_LIST_HEAD(&up->list);
556 spin_unlock_irq(&i->lock);
558 ret = request_irq(up->port.irq, m32r_sio_interrupt,
559 irq_flags, "SIO0-RX", i);
560 ret |= request_irq(up->port.irq + 1, m32r_sio_interrupt,
561 irq_flags, "SIO0-TX", i);
563 serial_do_unlink(i, up);
569 static void serial_unlink_irq_chain(struct uart_sio_port *up)
571 struct irq_info *i = irq_lists + up->port.irq;
573 BUG_ON(i->head == NULL);
575 if (list_empty(i->head)) {
576 free_irq(up->port.irq, i);
577 free_irq(up->port.irq + 1, i);
580 serial_do_unlink(i, up);
584 * This function is used to handle ports that do not have an interrupt.
586 static void m32r_sio_timeout(unsigned long data)
588 struct uart_sio_port *up = (struct uart_sio_port *)data;
589 unsigned int timeout;
592 sts = sio_in(up, SIOSTS);
594 spin_lock(&up->port.lock);
595 m32r_sio_handle_port(up, sts, NULL);
596 spin_unlock(&up->port.lock);
599 timeout = up->port.timeout;
600 timeout = timeout > 6 ? (timeout / 2 - 2) : 1;
601 mod_timer(&up->timer, jiffies + timeout);
604 static unsigned int m32r_sio_tx_empty(struct uart_port *port)
606 struct uart_sio_port *up = (struct uart_sio_port *)port;
610 spin_lock_irqsave(&up->port.lock, flags);
611 ret = serial_in(up, UART_LSR) & UART_LSR_TEMT ? TIOCSER_TEMT : 0;
612 spin_unlock_irqrestore(&up->port.lock, flags);
617 static unsigned int m32r_sio_get_mctrl(struct uart_port *port)
622 static void m32r_sio_set_mctrl(struct uart_port *port, unsigned int mctrl)
627 static void m32r_sio_break_ctl(struct uart_port *port, int break_state)
632 static int m32r_sio_startup(struct uart_port *port)
634 struct uart_sio_port *up = (struct uart_sio_port *)port;
640 * If the "interrupt" for this port doesn't correspond with any
641 * hardware interrupt, we use a timer-based system. The original
642 * driver used to do this with IRQ0.
644 if (!is_real_interrupt(up->port.irq)) {
645 unsigned int timeout = up->port.timeout;
647 timeout = timeout > 6 ? (timeout / 2 - 2) : 1;
649 up->timer.data = (unsigned long)up;
650 mod_timer(&up->timer, jiffies + timeout);
652 retval = serial_link_irq_chain(up);
658 * Finally, enable interrupts. Note: Modem status interrupts
659 * are set via set_termios(), which will be occurring imminently
660 * anyway, so we don't enable them here.
662 * - M32R_PLDSIO: 0x04
664 up->ier = UART_IER_MSI | UART_IER_RLSI | UART_IER_RDI;
665 sio_out(up, SIOTRCR, up->ier);
668 * And clear the interrupt registers again for luck.
675 static void m32r_sio_shutdown(struct uart_port *port)
677 struct uart_sio_port *up = (struct uart_sio_port *)port;
680 * Disable interrupts from this port
683 sio_out(up, SIOTRCR, 0);
686 * Disable break condition and FIFOs
691 if (!is_real_interrupt(up->port.irq))
692 del_timer_sync(&up->timer);
694 serial_unlink_irq_chain(up);
697 static unsigned int m32r_sio_get_divisor(struct uart_port *port,
700 return uart_get_divisor(port, baud);
703 static void m32r_sio_set_termios(struct uart_port *port,
704 struct termios *termios, struct termios *old)
706 struct uart_sio_port *up = (struct uart_sio_port *)port;
707 unsigned char cval = 0;
709 unsigned int baud, quot;
711 switch (termios->c_cflag & CSIZE) {
713 cval = UART_LCR_WLEN5;
716 cval = UART_LCR_WLEN6;
719 cval = UART_LCR_WLEN7;
723 cval = UART_LCR_WLEN8;
727 if (termios->c_cflag & CSTOPB)
728 cval |= UART_LCR_STOP;
729 if (termios->c_cflag & PARENB)
730 cval |= UART_LCR_PARITY;
731 if (!(termios->c_cflag & PARODD))
732 cval |= UART_LCR_EPAR;
734 if (termios->c_cflag & CMSPAR)
735 cval |= UART_LCR_SPAR;
739 * Ask the core to calculate the divisor for us.
741 #ifdef CONFIG_SERIAL_M32R_PLDSIO
742 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/4);
744 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
746 quot = m32r_sio_get_divisor(port, baud);
749 * Ok, we're now changing the port state. Do it with
750 * interrupts disabled.
752 spin_lock_irqsave(&up->port.lock, flags);
754 sio_set_baud_rate(baud);
757 * Update the per-port timeout.
759 uart_update_timeout(port, termios->c_cflag, baud);
761 up->port.read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;
762 if (termios->c_iflag & INPCK)
763 up->port.read_status_mask |= UART_LSR_FE | UART_LSR_PE;
764 if (termios->c_iflag & (BRKINT | PARMRK))
765 up->port.read_status_mask |= UART_LSR_BI;
768 * Characteres to ignore
770 up->port.ignore_status_mask = 0;
771 if (termios->c_iflag & IGNPAR)
772 up->port.ignore_status_mask |= UART_LSR_PE | UART_LSR_FE;
773 if (termios->c_iflag & IGNBRK) {
774 up->port.ignore_status_mask |= UART_LSR_BI;
776 * If we're ignoring parity and break indicators,
777 * ignore overruns too (for real raw support).
779 if (termios->c_iflag & IGNPAR)
780 up->port.ignore_status_mask |= UART_LSR_OE;
784 * ignore all characters if CREAD is not set
786 if ((termios->c_cflag & CREAD) == 0)
787 up->port.ignore_status_mask |= UART_LSR_DR;
790 * CTS flow control flag and modem status interrupts
792 up->ier &= ~UART_IER_MSI;
793 if (UART_ENABLE_MS(&up->port, termios->c_cflag))
794 up->ier |= UART_IER_MSI;
796 serial_out(up, UART_IER, up->ier);
798 up->lcr = cval; /* Save LCR */
799 spin_unlock_irqrestore(&up->port.lock, flags);
802 static void m32r_sio_pm(struct uart_port *port, unsigned int state,
803 unsigned int oldstate)
805 struct uart_sio_port *up = (struct uart_sio_port *)port;
808 up->pm(port, state, oldstate);
812 * Resource handling. This is complicated by the fact that resources
813 * depend on the port type. Maybe we should be claiming the standard
814 * 8250 ports, and then trying to get other resources as necessary?
817 m32r_sio_request_std_resource(struct uart_sio_port *up, struct resource **res)
819 unsigned int size = 8 << up->port.regshift;
820 #ifndef CONFIG_SERIAL_M32R_PLDSIO
825 switch (up->port.iotype) {
827 if (up->port.mapbase) {
828 #ifdef CONFIG_SERIAL_M32R_PLDSIO
829 *res = request_mem_region(up->port.mapbase, size, "serial");
831 start = up->port.mapbase;
832 *res = request_mem_region(start, size, "serial");
840 *res = request_region(up->port.iobase, size, "serial");
848 static void m32r_sio_release_port(struct uart_port *port)
850 struct uart_sio_port *up = (struct uart_sio_port *)port;
851 unsigned long start, offset = 0, size = 0;
853 size <<= up->port.regshift;
855 switch (up->port.iotype) {
857 if (up->port.mapbase) {
861 iounmap(up->port.membase);
862 up->port.membase = NULL;
864 start = up->port.mapbase;
867 release_mem_region(start + offset, size);
868 release_mem_region(start, 8 << up->port.regshift);
873 start = up->port.iobase;
876 release_region(start + offset, size);
877 release_region(start + offset, 8 << up->port.regshift);
885 static int m32r_sio_request_port(struct uart_port *port)
887 struct uart_sio_port *up = (struct uart_sio_port *)port;
888 struct resource *res = NULL;
891 ret = m32r_sio_request_std_resource(up, &res);
894 * If we have a mapbase, then request that as well.
896 if (ret == 0 && up->port.flags & UPF_IOREMAP) {
897 int size = res->end - res->start + 1;
899 up->port.membase = ioremap(up->port.mapbase, size);
900 if (!up->port.membase)
906 release_resource(res);
912 static void m32r_sio_config_port(struct uart_port *port, int flags)
914 struct uart_sio_port *up = (struct uart_sio_port *)port;
916 spin_lock_irqsave(&up->port.lock, flags);
918 up->port.type = (PORT_M32R_SIO - PORT_M32R_BASE + 1);
919 up->port.fifosize = uart_config[up->port.type].dfl_xmit_fifo_size;
921 spin_unlock_irqrestore(&up->port.lock, flags);
925 m32r_sio_verify_port(struct uart_port *port, struct serial_struct *ser)
927 if (ser->irq >= NR_IRQS || ser->irq < 0 ||
928 ser->baud_base < 9600 || ser->type < PORT_UNKNOWN ||
929 ser->type >= ARRAY_SIZE(uart_config))
935 m32r_sio_type(struct uart_port *port)
937 int type = port->type;
939 if (type >= ARRAY_SIZE(uart_config))
941 return uart_config[type].name;
944 static struct uart_ops m32r_sio_pops = {
945 .tx_empty = m32r_sio_tx_empty,
946 .set_mctrl = m32r_sio_set_mctrl,
947 .get_mctrl = m32r_sio_get_mctrl,
948 .stop_tx = m32r_sio_stop_tx,
949 .start_tx = m32r_sio_start_tx,
950 .stop_rx = m32r_sio_stop_rx,
951 .enable_ms = m32r_sio_enable_ms,
952 .break_ctl = m32r_sio_break_ctl,
953 .startup = m32r_sio_startup,
954 .shutdown = m32r_sio_shutdown,
955 .set_termios = m32r_sio_set_termios,
957 .type = m32r_sio_type,
958 .release_port = m32r_sio_release_port,
959 .request_port = m32r_sio_request_port,
960 .config_port = m32r_sio_config_port,
961 .verify_port = m32r_sio_verify_port,
964 static struct uart_sio_port m32r_sio_ports[UART_NR];
966 static void __init m32r_sio_init_ports(void)
968 struct uart_sio_port *up;
969 static int first = 1;
976 for (i = 0, up = m32r_sio_ports; i < ARRAY_SIZE(old_serial_port);
978 up->port.iobase = old_serial_port[i].port;
979 up->port.irq = irq_canonicalize(old_serial_port[i].irq);
980 up->port.uartclk = old_serial_port[i].baud_base * 16;
981 up->port.flags = old_serial_port[i].flags;
982 up->port.membase = old_serial_port[i].iomem_base;
983 up->port.iotype = old_serial_port[i].io_type;
984 up->port.regshift = old_serial_port[i].iomem_reg_shift;
985 up->port.ops = &m32r_sio_pops;
989 static void __init m32r_sio_register_ports(struct uart_driver *drv)
993 m32r_sio_init_ports();
995 for (i = 0; i < UART_NR; i++) {
996 struct uart_sio_port *up = &m32r_sio_ports[i];
999 up->port.ops = &m32r_sio_pops;
1000 init_timer(&up->timer);
1001 up->timer.function = m32r_sio_timeout;
1004 * ALPHA_KLUDGE_MCR needs to be killed.
1006 up->mcr_mask = ~ALPHA_KLUDGE_MCR;
1007 up->mcr_force = ALPHA_KLUDGE_MCR;
1009 uart_add_one_port(drv, &up->port);
1013 #ifdef CONFIG_SERIAL_M32R_SIO_CONSOLE
1016 * Wait for transmitter & holding register to empty
1018 static inline void wait_for_xmitr(struct uart_sio_port *up)
1020 unsigned int status, tmout = 10000;
1022 /* Wait up to 10ms for the character(s) to be sent. */
1024 status = sio_in(up, SIOSTS);
1029 } while ((status & UART_EMPTY) != UART_EMPTY);
1031 /* Wait up to 1s for flow control if necessary */
1032 if (up->port.flags & UPF_CONS_FLOW) {
1039 static void m32r_sio_console_putchar(struct uart_port *port, int ch)
1041 struct uart_sio_port *up = (struct uart_sio_port *)port;
1044 sio_out(up, SIOTXB, ch);
1048 * Print a string to the serial port trying not to disturb
1049 * any possible real use of the port...
1051 * The console_lock must be held when we get here.
1053 static void m32r_sio_console_write(struct console *co, const char *s,
1056 struct uart_sio_port *up = &m32r_sio_ports[co->index];
1060 * First save the UER then disable the interrupts
1062 ier = sio_in(up, SIOTRCR);
1063 sio_out(up, SIOTRCR, 0);
1065 uart_console_write(&up->port, s, count, m32r_sio_console_putchar);
1068 * Finally, wait for transmitter to become empty
1069 * and restore the IER
1072 sio_out(up, SIOTRCR, ier);
1075 static int __init m32r_sio_console_setup(struct console *co, char *options)
1077 struct uart_port *port;
1084 * Check whether an invalid uart number has been specified, and
1085 * if so, search for the first available port that does have
1088 if (co->index >= UART_NR)
1090 port = &m32r_sio_ports[co->index].port;
1095 spin_lock_init(&port->lock);
1098 uart_parse_options(options, &baud, &parity, &bits, &flow);
1100 return uart_set_options(port, co, baud, parity, bits, flow);
1103 static struct uart_driver m32r_sio_reg;
1104 static struct console m32r_sio_console = {
1106 .write = m32r_sio_console_write,
1107 .device = uart_console_device,
1108 .setup = m32r_sio_console_setup,
1109 .flags = CON_PRINTBUFFER,
1111 .data = &m32r_sio_reg,
1114 static int __init m32r_sio_console_init(void)
1118 m32r_sio_init_ports();
1119 register_console(&m32r_sio_console);
1122 console_initcall(m32r_sio_console_init);
1124 #define M32R_SIO_CONSOLE &m32r_sio_console
1126 #define M32R_SIO_CONSOLE NULL
1129 static struct uart_driver m32r_sio_reg = {
1130 .owner = THIS_MODULE,
1131 .driver_name = "sio",
1136 .cons = M32R_SIO_CONSOLE,
1140 * m32r_sio_suspend_port - suspend one serial port
1141 * @line: serial line number
1143 * Suspend one serial port.
1145 void m32r_sio_suspend_port(int line)
1147 uart_suspend_port(&m32r_sio_reg, &m32r_sio_ports[line].port);
1151 * m32r_sio_resume_port - resume one serial port
1152 * @line: serial line number
1154 * Resume one serial port.
1156 void m32r_sio_resume_port(int line)
1158 uart_resume_port(&m32r_sio_reg, &m32r_sio_ports[line].port);
1161 static int __init m32r_sio_init(void)
1165 printk(KERN_INFO "Serial: M32R SIO driver $Revision: 1.11 $ ");
1167 for (i = 0; i < NR_IRQS; i++)
1168 spin_lock_init(&irq_lists[i].lock);
1170 ret = uart_register_driver(&m32r_sio_reg);
1172 m32r_sio_register_ports(&m32r_sio_reg);
1177 static void __exit m32r_sio_exit(void)
1181 for (i = 0; i < UART_NR; i++)
1182 uart_remove_one_port(&m32r_sio_reg, &m32r_sio_ports[i].port);
1184 uart_unregister_driver(&m32r_sio_reg);
1187 module_init(m32r_sio_init);
1188 module_exit(m32r_sio_exit);
1190 EXPORT_SYMBOL(m32r_sio_suspend_port);
1191 EXPORT_SYMBOL(m32r_sio_resume_port);
1193 MODULE_LICENSE("GPL");
1194 MODULE_DESCRIPTION("Generic M32R SIO serial driver $Revision: 1.11 $");