2 * Blackfin On-Chip Serial Driver
4 * Copyright 2006-2007 Analog Devices Inc.
6 * Enter bugs at http://blackfin.uclinux.org/
8 * Licensed under the GPL-2 or later.
11 #if defined(CONFIG_SERIAL_BFIN_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
15 #include <linux/module.h>
16 #include <linux/ioport.h>
17 #include <linux/init.h>
18 #include <linux/console.h>
19 #include <linux/sysrq.h>
20 #include <linux/platform_device.h>
21 #include <linux/tty.h>
22 #include <linux/tty_flip.h>
23 #include <linux/serial_core.h>
25 #ifdef CONFIG_KGDB_UART
26 #include <linux/kgdb.h>
27 #include <asm/irq_regs.h>
31 #include <asm/mach/bfin_serial_5xx.h>
33 #ifdef CONFIG_SERIAL_BFIN_DMA
34 #include <linux/dma-mapping.h>
37 #include <asm/cacheflush.h>
40 /* UART name and device definitions */
41 #define BFIN_SERIAL_NAME "ttyBF"
42 #define BFIN_SERIAL_MAJOR 204
43 #define BFIN_SERIAL_MINOR 64
46 * Setup for console. Argument comes from the menuconfig
48 #define DMA_RX_XCOUNT 512
49 #define DMA_RX_YCOUNT (PAGE_SIZE / DMA_RX_XCOUNT)
51 #define DMA_RX_FLUSH_JIFFIES (HZ / 50)
53 #ifdef CONFIG_SERIAL_BFIN_DMA
54 static void bfin_serial_dma_tx_chars(struct bfin_serial_port *uart);
56 static void bfin_serial_tx_chars(struct bfin_serial_port *uart);
59 static void bfin_serial_mctrl_check(struct bfin_serial_port *uart);
62 * interrupts are disabled on entry
64 static void bfin_serial_stop_tx(struct uart_port *port)
66 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
67 struct circ_buf *xmit = &uart->port.info->xmit;
69 while (!(UART_GET_LSR(uart) & TEMT))
72 #ifdef CONFIG_SERIAL_BFIN_DMA
73 disable_dma(uart->tx_dma_channel);
74 xmit->tail = (xmit->tail + uart->tx_count) & (UART_XMIT_SIZE - 1);
75 uart->port.icount.tx += uart->tx_count;
81 UART_PUT_LSR(uart, TFI);
83 UART_CLEAR_IER(uart, ETBEI);
88 * port is locked and interrupts are disabled
90 static void bfin_serial_start_tx(struct uart_port *port)
92 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
94 #ifdef CONFIG_SERIAL_BFIN_DMA
96 bfin_serial_dma_tx_chars(uart);
98 UART_SET_IER(uart, ETBEI);
99 bfin_serial_tx_chars(uart);
104 * Interrupts are enabled
106 static void bfin_serial_stop_rx(struct uart_port *port)
108 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
109 #ifdef CONFIG_KGDB_UART
110 if (uart->port.line != CONFIG_KGDB_UART_PORT)
112 UART_CLEAR_IER(uart, ERBFI);
116 * Set the modem control timer to fire immediately.
118 static void bfin_serial_enable_ms(struct uart_port *port)
122 #ifdef CONFIG_KGDB_UART
123 static int kgdb_entry_state;
125 void kgdb_put_debug_char(int chr)
127 struct bfin_serial_port *uart;
129 if (CONFIG_KGDB_UART_PORT < 0
130 || CONFIG_KGDB_UART_PORT >= BFIN_UART_NR_PORTS)
131 uart = &bfin_serial_ports[0];
133 uart = &bfin_serial_ports[CONFIG_KGDB_UART_PORT];
135 while (!(UART_GET_LSR(uart) & THRE)) {
139 UART_CLEAR_DLAB(uart);
140 UART_PUT_CHAR(uart, (unsigned char)chr);
144 int kgdb_get_debug_char(void)
146 struct bfin_serial_port *uart;
149 if (CONFIG_KGDB_UART_PORT < 0
150 || CONFIG_KGDB_UART_PORT >= BFIN_UART_NR_PORTS)
151 uart = &bfin_serial_ports[0];
153 uart = &bfin_serial_ports[CONFIG_KGDB_UART_PORT];
155 while(!(UART_GET_LSR(uart) & DR)) {
158 UART_CLEAR_DLAB(uart);
159 chr = UART_GET_CHAR(uart);
166 #if ANOMALY_05000363 && defined(CONFIG_SERIAL_BFIN_PIO)
167 # define UART_GET_ANOMALY_THRESHOLD(uart) ((uart)->anomaly_threshold)
168 # define UART_SET_ANOMALY_THRESHOLD(uart, v) ((uart)->anomaly_threshold = (v))
170 # define UART_GET_ANOMALY_THRESHOLD(uart) 0
171 # define UART_SET_ANOMALY_THRESHOLD(uart, v)
174 #ifdef CONFIG_SERIAL_BFIN_PIO
175 static void bfin_serial_rx_chars(struct bfin_serial_port *uart)
177 struct tty_struct *tty = uart->port.info->tty;
178 unsigned int status, ch, flg;
179 static struct timeval anomaly_start = { .tv_sec = 0 };
181 status = UART_GET_LSR(uart);
182 UART_CLEAR_LSR(uart);
184 ch = UART_GET_CHAR(uart);
185 uart->port.icount.rx++;
187 #ifdef CONFIG_KGDB_UART
188 if (uart->port.line == CONFIG_KGDB_UART_PORT) {
189 struct pt_regs *regs = get_irq_regs();
190 if (uart->port.cons->index == CONFIG_KGDB_UART_PORT && ch == 0x1) { /* Ctrl + A */
191 kgdb_breakkey_pressed(regs);
193 } else if (kgdb_entry_state == 0 && ch == '$') {/* connection from KGDB */
194 kgdb_entry_state = 1;
195 } else if (kgdb_entry_state == 1 && ch == 'q') {
196 kgdb_entry_state = 0;
197 kgdb_breakkey_pressed(regs);
199 } else if (ch == 0x3) {/* Ctrl + C */
200 kgdb_entry_state = 0;
201 kgdb_breakkey_pressed(regs);
204 kgdb_entry_state = 0;
209 if (ANOMALY_05000363) {
210 /* The BF533 (and BF561) family of processors have a nice anomaly
211 * where they continuously generate characters for a "single" break.
212 * We have to basically ignore this flood until the "next" valid
213 * character comes across. Due to the nature of the flood, it is
214 * not possible to reliably catch bytes that are sent too quickly
215 * after this break. So application code talking to the Blackfin
216 * which sends a break signal must allow at least 1.5 character
217 * times after the end of the break for things to stabilize. This
218 * timeout was picked as it must absolutely be larger than 1
219 * character time +/- some percent. So 1.5 sounds good. All other
220 * Blackfin families operate properly. Woo.
222 if (anomaly_start.tv_sec) {
226 if ((~ch & (~ch + 1)) & 0xff)
227 goto known_good_char;
229 do_gettimeofday(&curr);
230 if (curr.tv_sec - anomaly_start.tv_sec > 1)
231 goto known_good_char;
234 if (curr.tv_sec != anomaly_start.tv_sec)
235 usecs += USEC_PER_SEC;
236 usecs += curr.tv_usec - anomaly_start.tv_usec;
238 if (usecs > UART_GET_ANOMALY_THRESHOLD(uart))
239 goto known_good_char;
242 anomaly_start.tv_sec = 0;
244 anomaly_start = curr;
249 anomaly_start.tv_sec = 0;
254 if (ANOMALY_05000363)
255 if (bfin_revid() < 5)
256 do_gettimeofday(&anomaly_start);
257 uart->port.icount.brk++;
258 if (uart_handle_break(&uart->port))
260 status &= ~(PE | FE);
263 uart->port.icount.parity++;
265 uart->port.icount.overrun++;
267 uart->port.icount.frame++;
269 status &= uart->port.read_status_mask;
273 else if (status & PE)
275 else if (status & FE)
280 if (uart_handle_sysrq_char(&uart->port, ch))
283 uart_insert_char(&uart->port, status, OE, ch, flg);
286 tty_flip_buffer_push(tty);
289 static void bfin_serial_tx_chars(struct bfin_serial_port *uart)
291 struct circ_buf *xmit = &uart->port.info->xmit;
293 if (uart->port.x_char) {
294 UART_PUT_CHAR(uart, uart->port.x_char);
295 uart->port.icount.tx++;
296 uart->port.x_char = 0;
299 * Check the modem control lines before
300 * transmitting anything.
302 bfin_serial_mctrl_check(uart);
304 if (uart_circ_empty(xmit) || uart_tx_stopped(&uart->port)) {
305 bfin_serial_stop_tx(&uart->port);
309 while ((UART_GET_LSR(uart) & THRE) && xmit->tail != xmit->head) {
310 UART_PUT_CHAR(uart, xmit->buf[xmit->tail]);
311 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
312 uart->port.icount.tx++;
316 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
317 uart_write_wakeup(&uart->port);
319 if (uart_circ_empty(xmit))
320 bfin_serial_stop_tx(&uart->port);
323 static irqreturn_t bfin_serial_rx_int(int irq, void *dev_id)
325 struct bfin_serial_port *uart = dev_id;
327 spin_lock(&uart->port.lock);
328 while (UART_GET_LSR(uart) & DR)
329 bfin_serial_rx_chars(uart);
330 spin_unlock(&uart->port.lock);
335 static irqreturn_t bfin_serial_tx_int(int irq, void *dev_id)
337 struct bfin_serial_port *uart = dev_id;
339 spin_lock(&uart->port.lock);
340 if (UART_GET_LSR(uart) & THRE)
341 bfin_serial_tx_chars(uart);
342 spin_unlock(&uart->port.lock);
348 #ifdef CONFIG_SERIAL_BFIN_CTSRTS
349 static void bfin_serial_do_work(struct work_struct *work)
351 struct bfin_serial_port *uart = container_of(work, struct bfin_serial_port, cts_workqueue);
353 bfin_serial_mctrl_check(uart);
357 #ifdef CONFIG_SERIAL_BFIN_DMA
358 static void bfin_serial_dma_tx_chars(struct bfin_serial_port *uart)
360 struct circ_buf *xmit = &uart->port.info->xmit;
364 if (uart_circ_empty(xmit) || uart_tx_stopped(&uart->port)) {
370 if (uart->port.x_char) {
371 UART_PUT_CHAR(uart, uart->port.x_char);
372 uart->port.icount.tx++;
373 uart->port.x_char = 0;
377 * Check the modem control lines before
378 * transmitting anything.
380 bfin_serial_mctrl_check(uart);
382 uart->tx_count = CIRC_CNT(xmit->head, xmit->tail, UART_XMIT_SIZE);
383 if (uart->tx_count > (UART_XMIT_SIZE - xmit->tail))
384 uart->tx_count = UART_XMIT_SIZE - xmit->tail;
385 blackfin_dcache_flush_range((unsigned long)(xmit->buf+xmit->tail),
386 (unsigned long)(xmit->buf+xmit->tail+uart->tx_count));
387 set_dma_config(uart->tx_dma_channel,
388 set_bfin_dma_config(DIR_READ, DMA_FLOW_STOP,
393 set_dma_start_addr(uart->tx_dma_channel, (unsigned long)(xmit->buf+xmit->tail));
394 set_dma_x_count(uart->tx_dma_channel, uart->tx_count);
395 set_dma_x_modify(uart->tx_dma_channel, 1);
396 enable_dma(uart->tx_dma_channel);
398 UART_SET_IER(uart, ETBEI);
401 static void bfin_serial_dma_rx_chars(struct bfin_serial_port *uart)
403 struct tty_struct *tty = uart->port.info->tty;
406 status = UART_GET_LSR(uart);
407 UART_CLEAR_LSR(uart);
409 uart->port.icount.rx +=
410 CIRC_CNT(uart->rx_dma_buf.head, uart->rx_dma_buf.tail,
414 uart->port.icount.brk++;
415 if (uart_handle_break(&uart->port))
416 goto dma_ignore_char;
417 status &= ~(PE | FE);
420 uart->port.icount.parity++;
422 uart->port.icount.overrun++;
424 uart->port.icount.frame++;
426 status &= uart->port.read_status_mask;
430 else if (status & PE)
432 else if (status & FE)
437 for (i = uart->rx_dma_buf.tail; i != uart->rx_dma_buf.head; i++) {
438 if (i >= UART_XMIT_SIZE)
440 if (!uart_handle_sysrq_char(&uart->port, uart->rx_dma_buf.buf[i]))
441 uart_insert_char(&uart->port, status, OE,
442 uart->rx_dma_buf.buf[i], flg);
446 tty_flip_buffer_push(tty);
449 void bfin_serial_rx_dma_timeout(struct bfin_serial_port *uart)
453 uart->rx_dma_nrows = get_dma_curr_ycount(uart->rx_dma_channel);
454 x_pos = get_dma_curr_xcount(uart->rx_dma_channel);
455 uart->rx_dma_nrows = DMA_RX_YCOUNT - uart->rx_dma_nrows;
456 if (uart->rx_dma_nrows == DMA_RX_YCOUNT)
457 uart->rx_dma_nrows = 0;
458 x_pos = DMA_RX_XCOUNT - x_pos;
459 if (x_pos == DMA_RX_XCOUNT)
462 pos = uart->rx_dma_nrows * DMA_RX_XCOUNT + x_pos;
463 if (pos != uart->rx_dma_buf.tail) {
464 uart->rx_dma_buf.head = pos;
465 bfin_serial_dma_rx_chars(uart);
466 uart->rx_dma_buf.tail = uart->rx_dma_buf.head;
469 mod_timer(&(uart->rx_dma_timer), jiffies + DMA_RX_FLUSH_JIFFIES);
472 static irqreturn_t bfin_serial_dma_tx_int(int irq, void *dev_id)
474 struct bfin_serial_port *uart = dev_id;
475 struct circ_buf *xmit = &uart->port.info->xmit;
477 spin_lock(&uart->port.lock);
478 if (!(get_dma_curr_irqstat(uart->tx_dma_channel)&DMA_RUN)) {
479 disable_dma(uart->tx_dma_channel);
480 clear_dma_irqstat(uart->tx_dma_channel);
481 UART_CLEAR_IER(uart, ETBEI);
482 xmit->tail = (xmit->tail + uart->tx_count) & (UART_XMIT_SIZE - 1);
483 uart->port.icount.tx += uart->tx_count;
485 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
486 uart_write_wakeup(&uart->port);
488 bfin_serial_dma_tx_chars(uart);
491 spin_unlock(&uart->port.lock);
495 static irqreturn_t bfin_serial_dma_rx_int(int irq, void *dev_id)
497 struct bfin_serial_port *uart = dev_id;
498 unsigned short irqstat;
500 spin_lock(&uart->port.lock);
501 irqstat = get_dma_curr_irqstat(uart->rx_dma_channel);
502 clear_dma_irqstat(uart->rx_dma_channel);
503 spin_unlock(&uart->port.lock);
505 mod_timer(&(uart->rx_dma_timer), jiffies);
512 * Return TIOCSER_TEMT when transmitter is not busy.
514 static unsigned int bfin_serial_tx_empty(struct uart_port *port)
516 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
519 lsr = UART_GET_LSR(uart);
526 static unsigned int bfin_serial_get_mctrl(struct uart_port *port)
528 #ifdef CONFIG_SERIAL_BFIN_CTSRTS
529 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
530 if (uart->cts_pin < 0)
531 return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
533 if (UART_GET_CTS(uart))
534 return TIOCM_DSR | TIOCM_CAR;
537 return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
540 static void bfin_serial_set_mctrl(struct uart_port *port, unsigned int mctrl)
542 #ifdef CONFIG_SERIAL_BFIN_CTSRTS
543 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
544 if (uart->rts_pin < 0)
547 if (mctrl & TIOCM_RTS)
548 UART_CLEAR_RTS(uart);
555 * Handle any change of modem status signal since we were last called.
557 static void bfin_serial_mctrl_check(struct bfin_serial_port *uart)
559 #ifdef CONFIG_SERIAL_BFIN_CTSRTS
561 struct uart_info *info = uart->port.info;
562 struct tty_struct *tty = info->tty;
564 status = bfin_serial_get_mctrl(&uart->port);
565 uart_handle_cts_change(&uart->port, status & TIOCM_CTS);
566 if (!(status & TIOCM_CTS)) {
568 schedule_work(&uart->cts_workqueue);
576 * Interrupts are always disabled.
578 static void bfin_serial_break_ctl(struct uart_port *port, int break_state)
580 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
581 u16 lcr = UART_GET_LCR(uart);
586 UART_PUT_LCR(uart, lcr);
590 static int bfin_serial_startup(struct uart_port *port)
592 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
594 #ifdef CONFIG_SERIAL_BFIN_DMA
595 dma_addr_t dma_handle;
597 if (request_dma(uart->rx_dma_channel, "BFIN_UART_RX") < 0) {
598 printk(KERN_NOTICE "Unable to attach Blackfin UART RX DMA channel\n");
602 if (request_dma(uart->tx_dma_channel, "BFIN_UART_TX") < 0) {
603 printk(KERN_NOTICE "Unable to attach Blackfin UART TX DMA channel\n");
604 free_dma(uart->rx_dma_channel);
608 set_dma_callback(uart->rx_dma_channel, bfin_serial_dma_rx_int, uart);
609 set_dma_callback(uart->tx_dma_channel, bfin_serial_dma_tx_int, uart);
611 uart->rx_dma_buf.buf = (unsigned char *)dma_alloc_coherent(NULL, PAGE_SIZE, &dma_handle, GFP_DMA);
612 uart->rx_dma_buf.head = 0;
613 uart->rx_dma_buf.tail = 0;
614 uart->rx_dma_nrows = 0;
616 set_dma_config(uart->rx_dma_channel,
617 set_bfin_dma_config(DIR_WRITE, DMA_FLOW_AUTO,
618 INTR_ON_ROW, DIMENSION_2D,
621 set_dma_x_count(uart->rx_dma_channel, DMA_RX_XCOUNT);
622 set_dma_x_modify(uart->rx_dma_channel, 1);
623 set_dma_y_count(uart->rx_dma_channel, DMA_RX_YCOUNT);
624 set_dma_y_modify(uart->rx_dma_channel, 1);
625 set_dma_start_addr(uart->rx_dma_channel, (unsigned long)uart->rx_dma_buf.buf);
626 enable_dma(uart->rx_dma_channel);
628 uart->rx_dma_timer.data = (unsigned long)(uart);
629 uart->rx_dma_timer.function = (void *)bfin_serial_rx_dma_timeout;
630 uart->rx_dma_timer.expires = jiffies + DMA_RX_FLUSH_JIFFIES;
631 add_timer(&(uart->rx_dma_timer));
633 if (request_irq(uart->port.irq, bfin_serial_rx_int, IRQF_DISABLED,
634 "BFIN_UART_RX", uart)) {
635 # ifdef CONFIG_KGDB_UART
636 if (uart->port.line != CONFIG_KGDB_UART_PORT) {
638 printk(KERN_NOTICE "Unable to attach BlackFin UART RX interrupt\n");
640 # ifdef CONFIG_KGDB_UART
646 (uart->port.irq+1, bfin_serial_tx_int, IRQF_DISABLED,
647 "BFIN_UART_TX", uart)) {
648 printk(KERN_NOTICE "Unable to attach BlackFin UART TX interrupt\n");
649 free_irq(uart->port.irq, uart);
653 UART_SET_IER(uart, ERBFI);
657 static void bfin_serial_shutdown(struct uart_port *port)
659 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
661 #ifdef CONFIG_SERIAL_BFIN_DMA
662 disable_dma(uart->tx_dma_channel);
663 free_dma(uart->tx_dma_channel);
664 disable_dma(uart->rx_dma_channel);
665 free_dma(uart->rx_dma_channel);
666 del_timer(&(uart->rx_dma_timer));
667 dma_free_coherent(NULL, PAGE_SIZE, uart->rx_dma_buf.buf, 0);
669 #ifdef CONFIG_KGDB_UART
670 if (uart->port.line != CONFIG_KGDB_UART_PORT)
672 free_irq(uart->port.irq, uart);
673 free_irq(uart->port.irq+1, uart);
678 bfin_serial_set_termios(struct uart_port *port, struct ktermios *termios,
679 struct ktermios *old)
681 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
683 unsigned int baud, quot;
684 unsigned short val, ier, lcr = 0;
686 switch (termios->c_cflag & CSIZE) {
700 printk(KERN_ERR "%s: word lengh not supported\n",
704 if (termios->c_cflag & CSTOPB)
706 if (termios->c_cflag & PARENB)
708 if (!(termios->c_cflag & PARODD))
710 if (termios->c_cflag & CMSPAR)
713 port->read_status_mask = OE;
714 if (termios->c_iflag & INPCK)
715 port->read_status_mask |= (FE | PE);
716 if (termios->c_iflag & (BRKINT | PARMRK))
717 port->read_status_mask |= BI;
720 * Characters to ignore
722 port->ignore_status_mask = 0;
723 if (termios->c_iflag & IGNPAR)
724 port->ignore_status_mask |= FE | PE;
725 if (termios->c_iflag & IGNBRK) {
726 port->ignore_status_mask |= BI;
728 * If we're ignoring parity and break indicators,
729 * ignore overruns too (for real raw support).
731 if (termios->c_iflag & IGNPAR)
732 port->ignore_status_mask |= OE;
735 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
736 quot = uart_get_divisor(port, baud);
737 spin_lock_irqsave(&uart->port.lock, flags);
739 UART_SET_ANOMALY_THRESHOLD(uart, USEC_PER_SEC / baud * 15);
742 ier = UART_GET_IER(uart);
743 UART_DISABLE_INTS(uart);
745 /* Set DLAB in LCR to Access DLL and DLH */
748 UART_PUT_DLL(uart, quot & 0xFF);
749 UART_PUT_DLH(uart, (quot >> 8) & 0xFF);
752 /* Clear DLAB in LCR to Access THR RBR IER */
753 UART_CLEAR_DLAB(uart);
755 UART_PUT_LCR(uart, lcr);
758 UART_ENABLE_INTS(uart, ier);
760 val = UART_GET_GCTL(uart);
762 UART_PUT_GCTL(uart, val);
764 spin_unlock_irqrestore(&uart->port.lock, flags);
767 static const char *bfin_serial_type(struct uart_port *port)
769 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
771 return uart->port.type == PORT_BFIN ? "BFIN-UART" : NULL;
775 * Release the memory region(s) being used by 'port'.
777 static void bfin_serial_release_port(struct uart_port *port)
782 * Request the memory region(s) being used by 'port'.
784 static int bfin_serial_request_port(struct uart_port *port)
790 * Configure/autoconfigure the port.
792 static void bfin_serial_config_port(struct uart_port *port, int flags)
794 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
796 if (flags & UART_CONFIG_TYPE &&
797 bfin_serial_request_port(&uart->port) == 0)
798 uart->port.type = PORT_BFIN;
802 * Verify the new serial_struct (for TIOCSSERIAL).
803 * The only change we allow are to the flags and type, and
804 * even then only between PORT_BFIN and PORT_UNKNOWN
807 bfin_serial_verify_port(struct uart_port *port, struct serial_struct *ser)
813 * Enable the IrDA function if tty->ldisc.num is N_IRDA.
814 * In other cases, disable IrDA function.
816 static void bfin_serial_set_ldisc(struct uart_port *port)
818 int line = port->line;
821 if (line >= port->info->tty->driver->num)
824 switch (port->info->tty->ldisc.num) {
826 val = UART_GET_GCTL(&bfin_serial_ports[line]);
827 val |= (IREN | RPOLC);
828 UART_PUT_GCTL(&bfin_serial_ports[line], val);
831 val = UART_GET_GCTL(&bfin_serial_ports[line]);
832 val &= ~(IREN | RPOLC);
833 UART_PUT_GCTL(&bfin_serial_ports[line], val);
837 static struct uart_ops bfin_serial_pops = {
838 .tx_empty = bfin_serial_tx_empty,
839 .set_mctrl = bfin_serial_set_mctrl,
840 .get_mctrl = bfin_serial_get_mctrl,
841 .stop_tx = bfin_serial_stop_tx,
842 .start_tx = bfin_serial_start_tx,
843 .stop_rx = bfin_serial_stop_rx,
844 .enable_ms = bfin_serial_enable_ms,
845 .break_ctl = bfin_serial_break_ctl,
846 .startup = bfin_serial_startup,
847 .shutdown = bfin_serial_shutdown,
848 .set_termios = bfin_serial_set_termios,
849 .set_ldisc = bfin_serial_set_ldisc,
850 .type = bfin_serial_type,
851 .release_port = bfin_serial_release_port,
852 .request_port = bfin_serial_request_port,
853 .config_port = bfin_serial_config_port,
854 .verify_port = bfin_serial_verify_port,
857 static void __init bfin_serial_init_ports(void)
859 static int first = 1;
866 for (i = 0; i < nr_ports; i++) {
867 bfin_serial_ports[i].port.uartclk = get_sclk();
868 bfin_serial_ports[i].port.ops = &bfin_serial_pops;
869 bfin_serial_ports[i].port.line = i;
870 bfin_serial_ports[i].port.iotype = UPIO_MEM;
871 bfin_serial_ports[i].port.membase =
872 (void __iomem *)bfin_serial_resource[i].uart_base_addr;
873 bfin_serial_ports[i].port.mapbase =
874 bfin_serial_resource[i].uart_base_addr;
875 bfin_serial_ports[i].port.irq =
876 bfin_serial_resource[i].uart_irq;
877 bfin_serial_ports[i].port.flags = UPF_BOOT_AUTOCONF;
878 #ifdef CONFIG_SERIAL_BFIN_DMA
879 bfin_serial_ports[i].tx_done = 1;
880 bfin_serial_ports[i].tx_count = 0;
881 bfin_serial_ports[i].tx_dma_channel =
882 bfin_serial_resource[i].uart_tx_dma_channel;
883 bfin_serial_ports[i].rx_dma_channel =
884 bfin_serial_resource[i].uart_rx_dma_channel;
885 init_timer(&(bfin_serial_ports[i].rx_dma_timer));
887 #ifdef CONFIG_SERIAL_BFIN_CTSRTS
888 INIT_WORK(&bfin_serial_ports[i].cts_workqueue, bfin_serial_do_work);
889 bfin_serial_ports[i].cts_pin =
890 bfin_serial_resource[i].uart_cts_pin;
891 bfin_serial_ports[i].rts_pin =
892 bfin_serial_resource[i].uart_rts_pin;
894 bfin_serial_hw_init(&bfin_serial_ports[i]);
899 #ifdef CONFIG_SERIAL_BFIN_CONSOLE
901 * If the port was already initialised (eg, by a boot loader),
902 * try to determine the current setup.
905 bfin_serial_console_get_options(struct bfin_serial_port *uart, int *baud,
906 int *parity, int *bits)
908 unsigned short status;
910 status = UART_GET_IER(uart) & (ERBFI | ETBEI);
911 if (status == (ERBFI | ETBEI)) {
912 /* ok, the port was enabled */
915 lcr = UART_GET_LCR(uart);
924 switch (lcr & 0x03) {
925 case 0: *bits = 5; break;
926 case 1: *bits = 6; break;
927 case 2: *bits = 7; break;
928 case 3: *bits = 8; break;
930 /* Set DLAB in LCR to Access DLL and DLH */
933 dll = UART_GET_DLL(uart);
934 dlh = UART_GET_DLH(uart);
936 /* Clear DLAB in LCR to Access THR RBR IER */
937 UART_CLEAR_DLAB(uart);
939 *baud = get_sclk() / (16*(dll | dlh << 8));
941 pr_debug("%s:baud = %d, parity = %c, bits= %d\n", __func__, *baud, *parity, *bits);
945 #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
946 static struct uart_driver bfin_serial_reg;
949 bfin_serial_console_setup(struct console *co, char *options)
951 struct bfin_serial_port *uart;
952 # ifdef CONFIG_SERIAL_BFIN_CONSOLE
956 # ifdef CONFIG_SERIAL_BFIN_CTSRTS
964 * Check whether an invalid uart number has been specified, and
965 * if so, search for the first available port that does have
968 if (co->index == -1 || co->index >= nr_ports)
970 uart = &bfin_serial_ports[co->index];
972 # ifdef CONFIG_SERIAL_BFIN_CONSOLE
974 uart_parse_options(options, &baud, &parity, &bits, &flow);
976 bfin_serial_console_get_options(uart, &baud, &parity, &bits);
978 return uart_set_options(&uart->port, co, baud, parity, bits, flow);
983 #endif /* defined (CONFIG_SERIAL_BFIN_CONSOLE) ||
984 defined (CONFIG_EARLY_PRINTK) */
986 #ifdef CONFIG_SERIAL_BFIN_CONSOLE
987 static void bfin_serial_console_putchar(struct uart_port *port, int ch)
989 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
990 while (!(UART_GET_LSR(uart) & THRE))
992 UART_PUT_CHAR(uart, ch);
997 * Interrupts are disabled on entering
1000 bfin_serial_console_write(struct console *co, const char *s, unsigned int count)
1002 struct bfin_serial_port *uart = &bfin_serial_ports[co->index];
1005 spin_lock_irqsave(&uart->port.lock, flags);
1006 uart_console_write(&uart->port, s, count, bfin_serial_console_putchar);
1007 spin_unlock_irqrestore(&uart->port.lock, flags);
1011 static struct console bfin_serial_console = {
1012 .name = BFIN_SERIAL_NAME,
1013 .write = bfin_serial_console_write,
1014 .device = uart_console_device,
1015 .setup = bfin_serial_console_setup,
1016 .flags = CON_PRINTBUFFER,
1018 .data = &bfin_serial_reg,
1021 static int __init bfin_serial_rs_console_init(void)
1023 bfin_serial_init_ports();
1024 register_console(&bfin_serial_console);
1025 #ifdef CONFIG_KGDB_UART
1026 kgdb_entry_state = 0;
1031 console_initcall(bfin_serial_rs_console_init);
1033 #define BFIN_SERIAL_CONSOLE &bfin_serial_console
1035 #define BFIN_SERIAL_CONSOLE NULL
1036 #endif /* CONFIG_SERIAL_BFIN_CONSOLE */
1039 #ifdef CONFIG_EARLY_PRINTK
1040 static __init void early_serial_putc(struct uart_port *port, int ch)
1042 unsigned timeout = 0xffff;
1043 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
1045 while ((!(UART_GET_LSR(uart) & THRE)) && --timeout)
1047 UART_PUT_CHAR(uart, ch);
1050 static __init void early_serial_write(struct console *con, const char *s,
1053 struct bfin_serial_port *uart = &bfin_serial_ports[con->index];
1056 for (i = 0; i < n; i++, s++) {
1058 early_serial_putc(&uart->port, '\r');
1059 early_serial_putc(&uart->port, *s);
1063 static struct __init console bfin_early_serial_console = {
1064 .name = "early_BFuart",
1065 .write = early_serial_write,
1066 .device = uart_console_device,
1067 .flags = CON_PRINTBUFFER,
1068 .setup = bfin_serial_console_setup,
1070 .data = &bfin_serial_reg,
1073 struct console __init *bfin_earlyserial_init(unsigned int port,
1076 struct bfin_serial_port *uart;
1079 if (port == -1 || port >= nr_ports)
1081 bfin_serial_init_ports();
1082 bfin_early_serial_console.index = port;
1083 uart = &bfin_serial_ports[port];
1089 bfin_serial_set_termios(&uart->port, &t, &t);
1090 return &bfin_early_serial_console;
1093 #endif /* CONFIG_SERIAL_BFIN_CONSOLE */
1095 static struct uart_driver bfin_serial_reg = {
1096 .owner = THIS_MODULE,
1097 .driver_name = "bfin-uart",
1098 .dev_name = BFIN_SERIAL_NAME,
1099 .major = BFIN_SERIAL_MAJOR,
1100 .minor = BFIN_SERIAL_MINOR,
1101 .nr = BFIN_UART_NR_PORTS,
1102 .cons = BFIN_SERIAL_CONSOLE,
1105 static int bfin_serial_suspend(struct platform_device *dev, pm_message_t state)
1107 struct bfin_serial_port *uart = platform_get_drvdata(dev);
1110 uart_suspend_port(&bfin_serial_reg, &uart->port);
1115 static int bfin_serial_resume(struct platform_device *dev)
1117 struct bfin_serial_port *uart = platform_get_drvdata(dev);
1120 uart_resume_port(&bfin_serial_reg, &uart->port);
1125 static int bfin_serial_probe(struct platform_device *dev)
1127 struct resource *res = dev->resource;
1130 for (i = 0; i < dev->num_resources; i++, res++)
1131 if (res->flags & IORESOURCE_MEM)
1134 if (i < dev->num_resources) {
1135 for (i = 0; i < nr_ports; i++, res++) {
1136 if (bfin_serial_ports[i].port.mapbase != res->start)
1138 bfin_serial_ports[i].port.dev = &dev->dev;
1139 uart_add_one_port(&bfin_serial_reg, &bfin_serial_ports[i].port);
1140 platform_set_drvdata(dev, &bfin_serial_ports[i]);
1147 static int bfin_serial_remove(struct platform_device *pdev)
1149 struct bfin_serial_port *uart = platform_get_drvdata(pdev);
1152 #ifdef CONFIG_SERIAL_BFIN_CTSRTS
1153 gpio_free(uart->cts_pin);
1154 gpio_free(uart->rts_pin);
1157 platform_set_drvdata(pdev, NULL);
1160 uart_remove_one_port(&bfin_serial_reg, &uart->port);
1165 static struct platform_driver bfin_serial_driver = {
1166 .probe = bfin_serial_probe,
1167 .remove = bfin_serial_remove,
1168 .suspend = bfin_serial_suspend,
1169 .resume = bfin_serial_resume,
1171 .name = "bfin-uart",
1172 .owner = THIS_MODULE,
1176 static int __init bfin_serial_init(void)
1179 #ifdef CONFIG_KGDB_UART
1180 struct bfin_serial_port *uart = &bfin_serial_ports[CONFIG_KGDB_UART_PORT];
1184 pr_info("Serial: Blackfin serial driver\n");
1186 bfin_serial_init_ports();
1188 ret = uart_register_driver(&bfin_serial_reg);
1190 ret = platform_driver_register(&bfin_serial_driver);
1192 pr_debug("uart register failed\n");
1193 uart_unregister_driver(&bfin_serial_reg);
1196 #ifdef CONFIG_KGDB_UART
1197 if (uart->port.cons->index != CONFIG_KGDB_UART_PORT) {
1198 request_irq(uart->port.irq, bfin_serial_rx_int,
1199 IRQF_DISABLED, "BFIN_UART_RX", uart);
1200 pr_info("Request irq for kgdb uart port\n");
1201 UART_SET_IER(uart, ERBFI);
1203 t.c_cflag = CS8|B57600;
1207 t.c_line = CONFIG_KGDB_UART_PORT;
1208 bfin_serial_set_termios(&uart->port, &t, &t);
1214 static void __exit bfin_serial_exit(void)
1216 platform_driver_unregister(&bfin_serial_driver);
1217 uart_unregister_driver(&bfin_serial_reg);
1220 module_init(bfin_serial_init);
1221 module_exit(bfin_serial_exit);
1223 MODULE_AUTHOR("Aubrey.Li <aubrey.li@analog.com>");
1224 MODULE_DESCRIPTION("Blackfin generic serial port driver");
1225 MODULE_LICENSE("GPL");
1226 MODULE_ALIAS_CHARDEV_MAJOR(BFIN_SERIAL_MAJOR);
1227 MODULE_ALIAS("platform:bfin-uart");