2 * Blackfin On-Chip Serial Driver
4 * Copyright 2006-2007 Analog Devices Inc.
6 * Enter bugs at http://blackfin.uclinux.org/
8 * Licensed under the GPL-2 or later.
11 #if defined(CONFIG_SERIAL_BFIN_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
15 #include <linux/module.h>
16 #include <linux/ioport.h>
17 #include <linux/init.h>
18 #include <linux/console.h>
19 #include <linux/sysrq.h>
20 #include <linux/platform_device.h>
21 #include <linux/tty.h>
22 #include <linux/tty_flip.h>
23 #include <linux/serial_core.h>
25 #ifdef CONFIG_KGDB_UART
26 #include <linux/kgdb.h>
27 #include <asm/irq_regs.h>
31 #include <asm/mach/bfin_serial_5xx.h>
33 #ifdef CONFIG_SERIAL_BFIN_DMA
34 #include <linux/dma-mapping.h>
37 #include <asm/cacheflush.h>
40 /* UART name and device definitions */
41 #define BFIN_SERIAL_NAME "ttyBF"
42 #define BFIN_SERIAL_MAJOR 204
43 #define BFIN_SERIAL_MINOR 64
46 * Setup for console. Argument comes from the menuconfig
48 #define DMA_RX_XCOUNT 512
49 #define DMA_RX_YCOUNT (PAGE_SIZE / DMA_RX_XCOUNT)
51 #define DMA_RX_FLUSH_JIFFIES (HZ / 50)
53 #ifdef CONFIG_SERIAL_BFIN_DMA
54 static void bfin_serial_dma_tx_chars(struct bfin_serial_port *uart);
56 static void bfin_serial_tx_chars(struct bfin_serial_port *uart);
59 static void bfin_serial_mctrl_check(struct bfin_serial_port *uart);
62 * interrupts are disabled on entry
64 static void bfin_serial_stop_tx(struct uart_port *port)
66 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
67 struct circ_buf *xmit = &uart->port.info->xmit;
68 #if !defined(CONFIG_BF54x) && !defined(CONFIG_SERIAL_BFIN_DMA)
72 while (!(UART_GET_LSR(uart) & TEMT))
75 #ifdef CONFIG_SERIAL_BFIN_DMA
76 disable_dma(uart->tx_dma_channel);
77 xmit->tail = (xmit->tail + uart->tx_count) & (UART_XMIT_SIZE - 1);
78 uart->port.icount.tx += uart->tx_count;
84 UART_PUT_LSR(uart, TFI);
85 UART_CLEAR_IER(uart, ETBEI);
87 ier = UART_GET_IER(uart);
89 UART_PUT_IER(uart, ier);
95 * port is locked and interrupts are disabled
97 static void bfin_serial_start_tx(struct uart_port *port)
99 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
101 #ifdef CONFIG_SERIAL_BFIN_DMA
103 bfin_serial_dma_tx_chars(uart);
106 UART_SET_IER(uart, ETBEI);
109 ier = UART_GET_IER(uart);
111 UART_PUT_IER(uart, ier);
113 bfin_serial_tx_chars(uart);
118 * Interrupts are enabled
120 static void bfin_serial_stop_rx(struct uart_port *port)
122 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
123 #ifdef CONFIG_KGDB_UART
124 if (uart->port.line != CONFIG_KGDB_UART_PORT) {
127 UART_CLEAR_IER(uart, ERBFI);
131 ier = UART_GET_IER(uart);
133 UART_PUT_IER(uart, ier);
135 #ifdef CONFIG_KGDB_UART
141 * Set the modem control timer to fire immediately.
143 static void bfin_serial_enable_ms(struct uart_port *port)
147 #ifdef CONFIG_KGDB_UART
148 static int kgdb_entry_state;
150 void kgdb_put_debug_char(int chr)
152 struct bfin_serial_port *uart;
154 if (CONFIG_KGDB_UART_PORT<0 || CONFIG_KGDB_UART_PORT>=NR_PORTS)
155 uart = &bfin_serial_ports[0];
157 uart = &bfin_serial_ports[CONFIG_KGDB_UART_PORT];
159 while (!(UART_GET_LSR(uart) & THRE)) {
164 UART_PUT_LCR(uart, UART_GET_LCR(uart)&(~DLAB));
167 UART_PUT_CHAR(uart, (unsigned char)chr);
171 int kgdb_get_debug_char(void)
173 struct bfin_serial_port *uart;
176 if (CONFIG_KGDB_UART_PORT<0 || CONFIG_KGDB_UART_PORT>=NR_PORTS)
177 uart = &bfin_serial_ports[0];
179 uart = &bfin_serial_ports[CONFIG_KGDB_UART_PORT];
181 while(!(UART_GET_LSR(uart) & DR)) {
185 UART_PUT_LCR(uart, UART_GET_LCR(uart)&(~DLAB));
188 chr = UART_GET_CHAR(uart);
195 #if ANOMALY_05000230 && defined(CONFIG_SERIAL_BFIN_PIO)
196 # define UART_GET_ANOMALY_THRESHOLD(uart) ((uart)->anomaly_threshold)
197 # define UART_SET_ANOMALY_THRESHOLD(uart, v) ((uart)->anomaly_threshold = (v))
199 # define UART_GET_ANOMALY_THRESHOLD(uart) 0
200 # define UART_SET_ANOMALY_THRESHOLD(uart, v)
203 #ifdef CONFIG_SERIAL_BFIN_PIO
204 static void bfin_serial_rx_chars(struct bfin_serial_port *uart)
206 struct tty_struct *tty = uart->port.info->tty;
207 unsigned int status, ch, flg;
208 static struct timeval anomaly_start = { .tv_sec = 0 };
209 #ifdef CONFIG_KGDB_UART
210 struct pt_regs *regs = get_irq_regs();
213 status = UART_GET_LSR(uart);
214 UART_CLEAR_LSR(uart);
216 ch = UART_GET_CHAR(uart);
217 uart->port.icount.rx++;
219 #ifdef CONFIG_KGDB_UART
220 if (uart->port.line == CONFIG_KGDB_UART_PORT) {
221 if (uart->port.cons->index == CONFIG_KGDB_UART_PORT && ch == 0x1) { /* Ctrl + A */
222 kgdb_breakkey_pressed(regs);
224 } else if (kgdb_entry_state == 0 && ch == '$') {/* connection from KGDB */
225 kgdb_entry_state = 1;
226 } else if (kgdb_entry_state == 1 && ch == 'q') {
227 kgdb_entry_state = 0;
228 kgdb_breakkey_pressed(regs);
230 } else if (ch == 0x3) {/* Ctrl + C */
231 kgdb_entry_state = 0;
232 kgdb_breakkey_pressed(regs);
235 kgdb_entry_state = 0;
240 if (ANOMALY_05000230) {
241 /* The BF533 (and BF561) family of processors have a nice anomaly
242 * where they continuously generate characters for a "single" break.
243 * We have to basically ignore this flood until the "next" valid
244 * character comes across. Due to the nature of the flood, it is
245 * not possible to reliably catch bytes that are sent too quickly
246 * after this break. So application code talking to the Blackfin
247 * which sends a break signal must allow at least 1.5 character
248 * times after the end of the break for things to stabilize. This
249 * timeout was picked as it must absolutely be larger than 1
250 * character time +/- some percent. So 1.5 sounds good. All other
251 * Blackfin families operate properly. Woo.
252 * Note: While Anomaly 05000230 does not directly address this,
253 * the changes that went in for it also fixed this issue.
254 * That anomaly was fixed in 0.5+ silicon. I like bunnies.
256 if (anomaly_start.tv_sec) {
260 if ((~ch & (~ch + 1)) & 0xff)
261 goto known_good_char;
263 do_gettimeofday(&curr);
264 if (curr.tv_sec - anomaly_start.tv_sec > 1)
265 goto known_good_char;
268 if (curr.tv_sec != anomaly_start.tv_sec)
269 usecs += USEC_PER_SEC;
270 usecs += curr.tv_usec - anomaly_start.tv_usec;
272 if (usecs > UART_GET_ANOMALY_THRESHOLD(uart))
273 goto known_good_char;
276 anomaly_start.tv_sec = 0;
278 anomaly_start = curr;
283 anomaly_start.tv_sec = 0;
288 if (ANOMALY_05000230)
289 if (bfin_revid() < 5)
290 do_gettimeofday(&anomaly_start);
291 uart->port.icount.brk++;
292 if (uart_handle_break(&uart->port))
294 status &= ~(PE | FE);
297 uart->port.icount.parity++;
299 uart->port.icount.overrun++;
301 uart->port.icount.frame++;
303 status &= uart->port.read_status_mask;
307 else if (status & PE)
309 else if (status & FE)
314 if (uart_handle_sysrq_char(&uart->port, ch))
317 uart_insert_char(&uart->port, status, OE, ch, flg);
320 tty_flip_buffer_push(tty);
323 static void bfin_serial_tx_chars(struct bfin_serial_port *uart)
325 struct circ_buf *xmit = &uart->port.info->xmit;
327 if (uart->port.x_char) {
328 UART_PUT_CHAR(uart, uart->port.x_char);
329 uart->port.icount.tx++;
330 uart->port.x_char = 0;
333 * Check the modem control lines before
334 * transmitting anything.
336 bfin_serial_mctrl_check(uart);
338 if (uart_circ_empty(xmit) || uart_tx_stopped(&uart->port)) {
339 bfin_serial_stop_tx(&uart->port);
343 while ((UART_GET_LSR(uart) & THRE) && xmit->tail != xmit->head) {
344 UART_PUT_CHAR(uart, xmit->buf[xmit->tail]);
345 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
346 uart->port.icount.tx++;
350 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
351 uart_write_wakeup(&uart->port);
353 if (uart_circ_empty(xmit))
354 bfin_serial_stop_tx(&uart->port);
357 static irqreturn_t bfin_serial_rx_int(int irq, void *dev_id)
359 struct bfin_serial_port *uart = dev_id;
361 spin_lock(&uart->port.lock);
362 while (UART_GET_LSR(uart) & DR)
363 bfin_serial_rx_chars(uart);
364 spin_unlock(&uart->port.lock);
369 static irqreturn_t bfin_serial_tx_int(int irq, void *dev_id)
371 struct bfin_serial_port *uart = dev_id;
373 spin_lock(&uart->port.lock);
374 if (UART_GET_LSR(uart) & THRE)
375 bfin_serial_tx_chars(uart);
376 spin_unlock(&uart->port.lock);
382 #ifdef CONFIG_SERIAL_BFIN_CTSRTS
383 static void bfin_serial_do_work(struct work_struct *work)
385 struct bfin_serial_port *uart = container_of(work, struct bfin_serial_port, cts_workqueue);
387 bfin_serial_mctrl_check(uart);
391 #ifdef CONFIG_SERIAL_BFIN_DMA
392 static void bfin_serial_dma_tx_chars(struct bfin_serial_port *uart)
394 struct circ_buf *xmit = &uart->port.info->xmit;
399 if (uart_circ_empty(xmit) || uart_tx_stopped(&uart->port)) {
405 if (uart->port.x_char) {
406 UART_PUT_CHAR(uart, uart->port.x_char);
407 uart->port.icount.tx++;
408 uart->port.x_char = 0;
412 * Check the modem control lines before
413 * transmitting anything.
415 bfin_serial_mctrl_check(uart);
417 uart->tx_count = CIRC_CNT(xmit->head, xmit->tail, UART_XMIT_SIZE);
418 if (uart->tx_count > (UART_XMIT_SIZE - xmit->tail))
419 uart->tx_count = UART_XMIT_SIZE - xmit->tail;
420 blackfin_dcache_flush_range((unsigned long)(xmit->buf+xmit->tail),
421 (unsigned long)(xmit->buf+xmit->tail+uart->tx_count));
422 set_dma_config(uart->tx_dma_channel,
423 set_bfin_dma_config(DIR_READ, DMA_FLOW_STOP,
428 set_dma_start_addr(uart->tx_dma_channel, (unsigned long)(xmit->buf+xmit->tail));
429 set_dma_x_count(uart->tx_dma_channel, uart->tx_count);
430 set_dma_x_modify(uart->tx_dma_channel, 1);
431 enable_dma(uart->tx_dma_channel);
434 UART_SET_IER(uart, ETBEI);
436 ier = UART_GET_IER(uart);
438 UART_PUT_IER(uart, ier);
442 static void bfin_serial_dma_rx_chars(struct bfin_serial_port *uart)
444 struct tty_struct *tty = uart->port.info->tty;
447 status = UART_GET_LSR(uart);
448 UART_CLEAR_LSR(uart);
450 uart->port.icount.rx +=
451 CIRC_CNT(uart->rx_dma_buf.head, uart->rx_dma_buf.tail,
455 uart->port.icount.brk++;
456 if (uart_handle_break(&uart->port))
457 goto dma_ignore_char;
458 status &= ~(PE | FE);
461 uart->port.icount.parity++;
463 uart->port.icount.overrun++;
465 uart->port.icount.frame++;
467 status &= uart->port.read_status_mask;
471 else if (status & PE)
473 else if (status & FE)
478 for (i = uart->rx_dma_buf.tail; i != uart->rx_dma_buf.head; i++) {
479 if (i >= UART_XMIT_SIZE)
481 if (!uart_handle_sysrq_char(&uart->port, uart->rx_dma_buf.buf[i]))
482 uart_insert_char(&uart->port, status, OE,
483 uart->rx_dma_buf.buf[i], flg);
487 tty_flip_buffer_push(tty);
490 void bfin_serial_rx_dma_timeout(struct bfin_serial_port *uart)
494 uart->rx_dma_nrows = get_dma_curr_ycount(uart->rx_dma_channel);
495 x_pos = get_dma_curr_xcount(uart->rx_dma_channel);
496 uart->rx_dma_nrows = DMA_RX_YCOUNT - uart->rx_dma_nrows;
497 if (uart->rx_dma_nrows == DMA_RX_YCOUNT)
498 uart->rx_dma_nrows = 0;
499 x_pos = DMA_RX_XCOUNT - x_pos;
500 if (x_pos == DMA_RX_XCOUNT)
503 pos = uart->rx_dma_nrows * DMA_RX_XCOUNT + x_pos;
504 if (pos != uart->rx_dma_buf.tail) {
505 uart->rx_dma_buf.head = pos;
506 bfin_serial_dma_rx_chars(uart);
507 uart->rx_dma_buf.tail = uart->rx_dma_buf.head;
510 uart->rx_dma_timer.expires = jiffies + DMA_RX_FLUSH_JIFFIES;
511 add_timer(&(uart->rx_dma_timer));
514 static irqreturn_t bfin_serial_dma_tx_int(int irq, void *dev_id)
516 struct bfin_serial_port *uart = dev_id;
517 struct circ_buf *xmit = &uart->port.info->xmit;
520 spin_lock(&uart->port.lock);
521 if (!(get_dma_curr_irqstat(uart->tx_dma_channel)&DMA_RUN)) {
522 disable_dma(uart->tx_dma_channel);
523 clear_dma_irqstat(uart->tx_dma_channel);
525 UART_CLEAR_IER(uart, ETBEI);
527 ier = UART_GET_IER(uart);
529 UART_PUT_IER(uart, ier);
531 xmit->tail = (xmit->tail + uart->tx_count) & (UART_XMIT_SIZE - 1);
532 uart->port.icount.tx += uart->tx_count;
534 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
535 uart_write_wakeup(&uart->port);
537 bfin_serial_dma_tx_chars(uart);
540 spin_unlock(&uart->port.lock);
544 static irqreturn_t bfin_serial_dma_rx_int(int irq, void *dev_id)
546 struct bfin_serial_port *uart = dev_id;
547 unsigned short irqstat;
549 spin_lock(&uart->port.lock);
550 irqstat = get_dma_curr_irqstat(uart->rx_dma_channel);
551 clear_dma_irqstat(uart->rx_dma_channel);
552 spin_unlock(&uart->port.lock);
554 del_timer(&(uart->rx_dma_timer));
555 uart->rx_dma_timer.expires = jiffies;
556 add_timer(&(uart->rx_dma_timer));
563 * Return TIOCSER_TEMT when transmitter is not busy.
565 static unsigned int bfin_serial_tx_empty(struct uart_port *port)
567 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
570 lsr = UART_GET_LSR(uart);
577 static unsigned int bfin_serial_get_mctrl(struct uart_port *port)
579 #ifdef CONFIG_SERIAL_BFIN_CTSRTS
580 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
581 if (uart->cts_pin < 0)
582 return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
585 if (UART_GET_MSR(uart) & CTS)
587 if (gpio_get_value(uart->cts_pin))
589 return TIOCM_DSR | TIOCM_CAR;
592 return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
595 static void bfin_serial_set_mctrl(struct uart_port *port, unsigned int mctrl)
597 #ifdef CONFIG_SERIAL_BFIN_CTSRTS
598 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
599 if (uart->rts_pin < 0)
602 if (mctrl & TIOCM_RTS)
604 UART_PUT_MCR(uart, UART_GET_MCR(uart) & ~MRTS);
606 gpio_set_value(uart->rts_pin, 0);
610 UART_PUT_MCR(uart, UART_GET_MCR(uart) | MRTS);
612 gpio_set_value(uart->rts_pin, 1);
618 * Handle any change of modem status signal since we were last called.
620 static void bfin_serial_mctrl_check(struct bfin_serial_port *uart)
622 #ifdef CONFIG_SERIAL_BFIN_CTSRTS
624 struct uart_info *info = uart->port.info;
625 struct tty_struct *tty = info->tty;
627 status = bfin_serial_get_mctrl(&uart->port);
628 uart_handle_cts_change(&uart->port, status & TIOCM_CTS);
629 if (!(status & TIOCM_CTS)) {
631 schedule_work(&uart->cts_workqueue);
639 * Interrupts are always disabled.
641 static void bfin_serial_break_ctl(struct uart_port *port, int break_state)
643 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
644 u16 lcr = UART_GET_LCR(uart);
649 UART_PUT_LCR(uart, lcr);
653 static int bfin_serial_startup(struct uart_port *port)
655 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
657 #ifdef CONFIG_SERIAL_BFIN_DMA
658 dma_addr_t dma_handle;
660 if (request_dma(uart->rx_dma_channel, "BFIN_UART_RX") < 0) {
661 printk(KERN_NOTICE "Unable to attach Blackfin UART RX DMA channel\n");
665 if (request_dma(uart->tx_dma_channel, "BFIN_UART_TX") < 0) {
666 printk(KERN_NOTICE "Unable to attach Blackfin UART TX DMA channel\n");
667 free_dma(uart->rx_dma_channel);
671 set_dma_callback(uart->rx_dma_channel, bfin_serial_dma_rx_int, uart);
672 set_dma_callback(uart->tx_dma_channel, bfin_serial_dma_tx_int, uart);
674 uart->rx_dma_buf.buf = (unsigned char *)dma_alloc_coherent(NULL, PAGE_SIZE, &dma_handle, GFP_DMA);
675 uart->rx_dma_buf.head = 0;
676 uart->rx_dma_buf.tail = 0;
677 uart->rx_dma_nrows = 0;
679 set_dma_config(uart->rx_dma_channel,
680 set_bfin_dma_config(DIR_WRITE, DMA_FLOW_AUTO,
681 INTR_ON_ROW, DIMENSION_2D,
684 set_dma_x_count(uart->rx_dma_channel, DMA_RX_XCOUNT);
685 set_dma_x_modify(uart->rx_dma_channel, 1);
686 set_dma_y_count(uart->rx_dma_channel, DMA_RX_YCOUNT);
687 set_dma_y_modify(uart->rx_dma_channel, 1);
688 set_dma_start_addr(uart->rx_dma_channel, (unsigned long)uart->rx_dma_buf.buf);
689 enable_dma(uart->rx_dma_channel);
691 uart->rx_dma_timer.data = (unsigned long)(uart);
692 uart->rx_dma_timer.function = (void *)bfin_serial_rx_dma_timeout;
693 uart->rx_dma_timer.expires = jiffies + DMA_RX_FLUSH_JIFFIES;
694 add_timer(&(uart->rx_dma_timer));
696 if (request_irq(uart->port.irq, bfin_serial_rx_int, IRQF_DISABLED,
697 "BFIN_UART_RX", uart)) {
698 # ifdef CONFIG_KGDB_UART
699 if (uart->port.line != CONFIG_KGDB_UART_PORT) {
701 printk(KERN_NOTICE "Unable to attach BlackFin UART RX interrupt\n");
703 # ifdef CONFIG_KGDB_UART
710 (uart->port.irq+1, bfin_serial_tx_int, IRQF_DISABLED,
711 "BFIN_UART_TX", uart)) {
712 printk(KERN_NOTICE "Unable to attach BlackFin UART TX interrupt\n");
713 free_irq(uart->port.irq, uart);
718 UART_SET_IER(uart, ERBFI);
720 UART_PUT_IER(uart, UART_GET_IER(uart) | ERBFI);
725 static void bfin_serial_shutdown(struct uart_port *port)
727 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
729 #ifdef CONFIG_SERIAL_BFIN_DMA
730 disable_dma(uart->tx_dma_channel);
731 free_dma(uart->tx_dma_channel);
732 disable_dma(uart->rx_dma_channel);
733 free_dma(uart->rx_dma_channel);
734 del_timer(&(uart->rx_dma_timer));
735 dma_free_coherent(NULL, PAGE_SIZE, uart->rx_dma_buf.buf, 0);
737 #ifdef CONFIG_KGDB_UART
738 if (uart->port.line != CONFIG_KGDB_UART_PORT)
740 free_irq(uart->port.irq, uart);
741 free_irq(uart->port.irq+1, uart);
746 bfin_serial_set_termios(struct uart_port *port, struct ktermios *termios,
747 struct ktermios *old)
749 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
751 unsigned int baud, quot;
752 unsigned short val, ier, lsr, lcr = 0;
754 switch (termios->c_cflag & CSIZE) {
768 printk(KERN_ERR "%s: word lengh not supported\n",
772 if (termios->c_cflag & CSTOPB)
774 if (termios->c_cflag & PARENB)
776 if (!(termios->c_cflag & PARODD))
778 if (termios->c_cflag & CMSPAR)
781 port->read_status_mask = OE;
782 if (termios->c_iflag & INPCK)
783 port->read_status_mask |= (FE | PE);
784 if (termios->c_iflag & (BRKINT | PARMRK))
785 port->read_status_mask |= BI;
788 * Characters to ignore
790 port->ignore_status_mask = 0;
791 if (termios->c_iflag & IGNPAR)
792 port->ignore_status_mask |= FE | PE;
793 if (termios->c_iflag & IGNBRK) {
794 port->ignore_status_mask |= BI;
796 * If we're ignoring parity and break indicators,
797 * ignore overruns too (for real raw support).
799 if (termios->c_iflag & IGNPAR)
800 port->ignore_status_mask |= OE;
803 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
804 quot = uart_get_divisor(port, baud);
805 spin_lock_irqsave(&uart->port.lock, flags);
807 UART_SET_ANOMALY_THRESHOLD(uart, USEC_PER_SEC / baud * 15);
810 lsr = UART_GET_LSR(uart);
811 } while (!(lsr & TEMT));
814 ier = UART_GET_IER(uart);
816 UART_CLEAR_IER(uart, 0xF);
818 UART_PUT_IER(uart, 0);
822 /* Set DLAB in LCR to Access DLL and DLH */
823 val = UART_GET_LCR(uart);
825 UART_PUT_LCR(uart, val);
829 UART_PUT_DLL(uart, quot & 0xFF);
831 UART_PUT_DLH(uart, (quot >> 8) & 0xFF);
835 /* Clear DLAB in LCR to Access THR RBR IER */
836 val = UART_GET_LCR(uart);
838 UART_PUT_LCR(uart, val);
842 UART_PUT_LCR(uart, lcr);
846 UART_SET_IER(uart, ier);
848 UART_PUT_IER(uart, ier);
851 val = UART_GET_GCTL(uart);
853 UART_PUT_GCTL(uart, val);
855 spin_unlock_irqrestore(&uart->port.lock, flags);
858 static const char *bfin_serial_type(struct uart_port *port)
860 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
862 return uart->port.type == PORT_BFIN ? "BFIN-UART" : NULL;
866 * Release the memory region(s) being used by 'port'.
868 static void bfin_serial_release_port(struct uart_port *port)
873 * Request the memory region(s) being used by 'port'.
875 static int bfin_serial_request_port(struct uart_port *port)
881 * Configure/autoconfigure the port.
883 static void bfin_serial_config_port(struct uart_port *port, int flags)
885 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
887 if (flags & UART_CONFIG_TYPE &&
888 bfin_serial_request_port(&uart->port) == 0)
889 uart->port.type = PORT_BFIN;
893 * Verify the new serial_struct (for TIOCSSERIAL).
894 * The only change we allow are to the flags and type, and
895 * even then only between PORT_BFIN and PORT_UNKNOWN
898 bfin_serial_verify_port(struct uart_port *port, struct serial_struct *ser)
903 static struct uart_ops bfin_serial_pops = {
904 .tx_empty = bfin_serial_tx_empty,
905 .set_mctrl = bfin_serial_set_mctrl,
906 .get_mctrl = bfin_serial_get_mctrl,
907 .stop_tx = bfin_serial_stop_tx,
908 .start_tx = bfin_serial_start_tx,
909 .stop_rx = bfin_serial_stop_rx,
910 .enable_ms = bfin_serial_enable_ms,
911 .break_ctl = bfin_serial_break_ctl,
912 .startup = bfin_serial_startup,
913 .shutdown = bfin_serial_shutdown,
914 .set_termios = bfin_serial_set_termios,
915 .type = bfin_serial_type,
916 .release_port = bfin_serial_release_port,
917 .request_port = bfin_serial_request_port,
918 .config_port = bfin_serial_config_port,
919 .verify_port = bfin_serial_verify_port,
922 static void __init bfin_serial_init_ports(void)
924 static int first = 1;
931 for (i = 0; i < nr_ports; i++) {
932 bfin_serial_ports[i].port.uartclk = get_sclk();
933 bfin_serial_ports[i].port.ops = &bfin_serial_pops;
934 bfin_serial_ports[i].port.line = i;
935 bfin_serial_ports[i].port.iotype = UPIO_MEM;
936 bfin_serial_ports[i].port.membase =
937 (void __iomem *)bfin_serial_resource[i].uart_base_addr;
938 bfin_serial_ports[i].port.mapbase =
939 bfin_serial_resource[i].uart_base_addr;
940 bfin_serial_ports[i].port.irq =
941 bfin_serial_resource[i].uart_irq;
942 bfin_serial_ports[i].port.flags = UPF_BOOT_AUTOCONF;
943 #ifdef CONFIG_SERIAL_BFIN_DMA
944 bfin_serial_ports[i].tx_done = 1;
945 bfin_serial_ports[i].tx_count = 0;
946 bfin_serial_ports[i].tx_dma_channel =
947 bfin_serial_resource[i].uart_tx_dma_channel;
948 bfin_serial_ports[i].rx_dma_channel =
949 bfin_serial_resource[i].uart_rx_dma_channel;
950 init_timer(&(bfin_serial_ports[i].rx_dma_timer));
952 #ifdef CONFIG_SERIAL_BFIN_CTSRTS
953 INIT_WORK(&bfin_serial_ports[i].cts_workqueue, bfin_serial_do_work);
954 bfin_serial_ports[i].cts_pin =
955 bfin_serial_resource[i].uart_cts_pin;
956 bfin_serial_ports[i].rts_pin =
957 bfin_serial_resource[i].uart_rts_pin;
959 bfin_serial_hw_init(&bfin_serial_ports[i]);
964 #ifdef CONFIG_SERIAL_BFIN_CONSOLE
966 * If the port was already initialised (eg, by a boot loader),
967 * try to determine the current setup.
970 bfin_serial_console_get_options(struct bfin_serial_port *uart, int *baud,
971 int *parity, int *bits)
973 unsigned short status;
975 status = UART_GET_IER(uart) & (ERBFI | ETBEI);
976 if (status == (ERBFI | ETBEI)) {
977 /* ok, the port was enabled */
978 unsigned short lcr, val;
979 unsigned short dlh, dll;
981 lcr = UART_GET_LCR(uart);
990 switch (lcr & 0x03) {
991 case 0: *bits = 5; break;
992 case 1: *bits = 6; break;
993 case 2: *bits = 7; break;
994 case 3: *bits = 8; break;
997 /* Set DLAB in LCR to Access DLL and DLH */
998 val = UART_GET_LCR(uart);
1000 UART_PUT_LCR(uart, val);
1003 dll = UART_GET_DLL(uart);
1004 dlh = UART_GET_DLH(uart);
1006 #ifndef CONFIG_BF54x
1007 /* Clear DLAB in LCR to Access THR RBR IER */
1008 val = UART_GET_LCR(uart);
1010 UART_PUT_LCR(uart, val);
1013 *baud = get_sclk() / (16*(dll | dlh << 8));
1015 pr_debug("%s:baud = %d, parity = %c, bits= %d\n", __FUNCTION__, *baud, *parity, *bits);
1019 #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
1020 static struct uart_driver bfin_serial_reg;
1023 bfin_serial_console_setup(struct console *co, char *options)
1025 struct bfin_serial_port *uart;
1026 # ifdef CONFIG_SERIAL_BFIN_CONSOLE
1030 # ifdef CONFIG_SERIAL_BFIN_CTSRTS
1038 * Check whether an invalid uart number has been specified, and
1039 * if so, search for the first available port that does have
1042 if (co->index == -1 || co->index >= nr_ports)
1044 uart = &bfin_serial_ports[co->index];
1046 # ifdef CONFIG_SERIAL_BFIN_CONSOLE
1048 uart_parse_options(options, &baud, &parity, &bits, &flow);
1050 bfin_serial_console_get_options(uart, &baud, &parity, &bits);
1052 return uart_set_options(&uart->port, co, baud, parity, bits, flow);
1057 #endif /* defined (CONFIG_SERIAL_BFIN_CONSOLE) ||
1058 defined (CONFIG_EARLY_PRINTK) */
1060 #ifdef CONFIG_SERIAL_BFIN_CONSOLE
1061 static void bfin_serial_console_putchar(struct uart_port *port, int ch)
1063 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
1064 while (!(UART_GET_LSR(uart) & THRE))
1066 UART_PUT_CHAR(uart, ch);
1071 * Interrupts are disabled on entering
1074 bfin_serial_console_write(struct console *co, const char *s, unsigned int count)
1076 struct bfin_serial_port *uart = &bfin_serial_ports[co->index];
1079 spin_lock_irqsave(&uart->port.lock, flags);
1080 uart_console_write(&uart->port, s, count, bfin_serial_console_putchar);
1081 spin_unlock_irqrestore(&uart->port.lock, flags);
1085 static struct console bfin_serial_console = {
1086 .name = BFIN_SERIAL_NAME,
1087 .write = bfin_serial_console_write,
1088 .device = uart_console_device,
1089 .setup = bfin_serial_console_setup,
1090 .flags = CON_PRINTBUFFER,
1092 .data = &bfin_serial_reg,
1095 static int __init bfin_serial_rs_console_init(void)
1097 bfin_serial_init_ports();
1098 register_console(&bfin_serial_console);
1099 #ifdef CONFIG_KGDB_UART
1100 kgdb_entry_state = 0;
1105 console_initcall(bfin_serial_rs_console_init);
1107 #define BFIN_SERIAL_CONSOLE &bfin_serial_console
1109 #define BFIN_SERIAL_CONSOLE NULL
1110 #endif /* CONFIG_SERIAL_BFIN_CONSOLE */
1113 #ifdef CONFIG_EARLY_PRINTK
1114 static __init void early_serial_putc(struct uart_port *port, int ch)
1116 unsigned timeout = 0xffff;
1117 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
1119 while ((!(UART_GET_LSR(uart) & THRE)) && --timeout)
1121 UART_PUT_CHAR(uart, ch);
1124 static __init void early_serial_write(struct console *con, const char *s,
1127 struct bfin_serial_port *uart = &bfin_serial_ports[con->index];
1130 for (i = 0; i < n; i++, s++) {
1132 early_serial_putc(&uart->port, '\r');
1133 early_serial_putc(&uart->port, *s);
1137 static struct __init console bfin_early_serial_console = {
1138 .name = "early_BFuart",
1139 .write = early_serial_write,
1140 .device = uart_console_device,
1141 .flags = CON_PRINTBUFFER,
1142 .setup = bfin_serial_console_setup,
1144 .data = &bfin_serial_reg,
1147 struct console __init *bfin_earlyserial_init(unsigned int port,
1150 struct bfin_serial_port *uart;
1153 if (port == -1 || port >= nr_ports)
1155 bfin_serial_init_ports();
1156 bfin_early_serial_console.index = port;
1157 uart = &bfin_serial_ports[port];
1163 bfin_serial_set_termios(&uart->port, &t, &t);
1164 return &bfin_early_serial_console;
1167 #endif /* CONFIG_SERIAL_BFIN_CONSOLE */
1169 static struct uart_driver bfin_serial_reg = {
1170 .owner = THIS_MODULE,
1171 .driver_name = "bfin-uart",
1172 .dev_name = BFIN_SERIAL_NAME,
1173 .major = BFIN_SERIAL_MAJOR,
1174 .minor = BFIN_SERIAL_MINOR,
1176 .cons = BFIN_SERIAL_CONSOLE,
1179 static int bfin_serial_suspend(struct platform_device *dev, pm_message_t state)
1181 struct bfin_serial_port *uart = platform_get_drvdata(dev);
1184 uart_suspend_port(&bfin_serial_reg, &uart->port);
1189 static int bfin_serial_resume(struct platform_device *dev)
1191 struct bfin_serial_port *uart = platform_get_drvdata(dev);
1194 uart_resume_port(&bfin_serial_reg, &uart->port);
1199 static int bfin_serial_probe(struct platform_device *dev)
1201 struct resource *res = dev->resource;
1204 for (i = 0; i < dev->num_resources; i++, res++)
1205 if (res->flags & IORESOURCE_MEM)
1208 if (i < dev->num_resources) {
1209 for (i = 0; i < nr_ports; i++, res++) {
1210 if (bfin_serial_ports[i].port.mapbase != res->start)
1212 bfin_serial_ports[i].port.dev = &dev->dev;
1213 uart_add_one_port(&bfin_serial_reg, &bfin_serial_ports[i].port);
1214 platform_set_drvdata(dev, &bfin_serial_ports[i]);
1221 static int bfin_serial_remove(struct platform_device *pdev)
1223 struct bfin_serial_port *uart = platform_get_drvdata(pdev);
1226 #ifdef CONFIG_SERIAL_BFIN_CTSRTS
1227 gpio_free(uart->cts_pin);
1228 gpio_free(uart->rts_pin);
1231 platform_set_drvdata(pdev, NULL);
1234 uart_remove_one_port(&bfin_serial_reg, &uart->port);
1239 static struct platform_driver bfin_serial_driver = {
1240 .probe = bfin_serial_probe,
1241 .remove = bfin_serial_remove,
1242 .suspend = bfin_serial_suspend,
1243 .resume = bfin_serial_resume,
1245 .name = "bfin-uart",
1246 .owner = THIS_MODULE,
1250 static int __init bfin_serial_init(void)
1253 #ifdef CONFIG_KGDB_UART
1254 struct bfin_serial_port *uart = &bfin_serial_ports[CONFIG_KGDB_UART_PORT];
1258 pr_info("Serial: Blackfin serial driver\n");
1260 bfin_serial_init_ports();
1262 ret = uart_register_driver(&bfin_serial_reg);
1264 ret = platform_driver_register(&bfin_serial_driver);
1266 pr_debug("uart register failed\n");
1267 uart_unregister_driver(&bfin_serial_reg);
1270 #ifdef CONFIG_KGDB_UART
1271 if (uart->port.cons->index != CONFIG_KGDB_UART_PORT) {
1272 request_irq(uart->port.irq, bfin_serial_rx_int,
1273 IRQF_DISABLED, "BFIN_UART_RX", uart);
1274 pr_info("Request irq for kgdb uart port\n");
1276 UART_SET_IER(uart, ERBFI);
1278 UART_PUT_IER(uart, UART_GET_IER(uart) | ERBFI);
1281 t.c_cflag = CS8|B57600;
1285 t.c_line = CONFIG_KGDB_UART_PORT;
1286 bfin_serial_set_termios(&uart->port, &t, &t);
1292 static void __exit bfin_serial_exit(void)
1294 platform_driver_unregister(&bfin_serial_driver);
1295 uart_unregister_driver(&bfin_serial_reg);
1298 module_init(bfin_serial_init);
1299 module_exit(bfin_serial_exit);
1301 MODULE_AUTHOR("Aubrey.Li <aubrey.li@analog.com>");
1302 MODULE_DESCRIPTION("Blackfin generic serial port driver");
1303 MODULE_LICENSE("GPL");
1304 MODULE_ALIAS_CHARDEV_MAJOR(BFIN_SERIAL_MAJOR);
1305 MODULE_ALIAS("platform:bfin-uart");