2 * linux/drivers/char/8250.c
4 * Driver for 8250/16550-type serial ports
6 * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
8 * Copyright (C) 2001 Russell King.
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
15 * $Id: 8250.c,v 1.90 2002/07/28 10:03:27 rmk Exp $
17 * A note about mapbase / membase
19 * mapbase is the physical address of the IO port.
20 * membase is an 'ioremapped' cookie.
22 #include <linux/config.h>
24 #if defined(CONFIG_SERIAL_8250_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
28 #include <linux/module.h>
29 #include <linux/moduleparam.h>
30 #include <linux/ioport.h>
31 #include <linux/init.h>
32 #include <linux/console.h>
33 #include <linux/sysrq.h>
34 #include <linux/mca.h>
35 #include <linux/delay.h>
36 #include <linux/device.h>
37 #include <linux/tty.h>
38 #include <linux/tty_flip.h>
39 #include <linux/serial_reg.h>
40 #include <linux/serial_core.h>
41 #include <linux/serial.h>
42 #include <linux/serial_8250.h>
51 * share_irqs - whether we pass SA_SHIRQ to request_irq(). This option
52 * is unsafe when used on edge-triggered interrupts.
54 static unsigned int share_irqs = SERIAL8250_SHARE_IRQS;
60 #define DEBUG_AUTOCONF(fmt...) printk(fmt)
62 #define DEBUG_AUTOCONF(fmt...) do { } while (0)
66 #define DEBUG_INTR(fmt...) printk(fmt)
68 #define DEBUG_INTR(fmt...) do { } while (0)
71 #define PASS_LIMIT 256
74 * We default to IRQ0 for the "no irq" hack. Some
75 * machine types want others as well - they're free
76 * to redefine this in their header file.
78 #define is_real_interrupt(irq) ((irq) != 0)
81 * This converts from our new CONFIG_ symbols to the symbols
82 * that asm/serial.h expects. You _NEED_ to comment out the
83 * linux/config.h include contained inside asm/serial.h for
86 #undef CONFIG_SERIAL_MANY_PORTS
87 #undef CONFIG_SERIAL_DETECT_IRQ
88 #undef CONFIG_SERIAL_MULTIPORT
91 #ifdef CONFIG_SERIAL_8250_DETECT_IRQ
92 #define CONFIG_SERIAL_DETECT_IRQ 1
94 #ifdef CONFIG_SERIAL_8250_MULTIPORT
95 #define CONFIG_SERIAL_MULTIPORT 1
97 #ifdef CONFIG_SERIAL_8250_MANY_PORTS
98 #define CONFIG_SERIAL_MANY_PORTS 1
102 * HUB6 is always on. This will be removed once the header
103 * files have been cleaned.
105 #define CONFIG_HUB6 1
107 #include <asm/serial.h>
110 * SERIAL_PORT_DFNS tells us about built-in ports that have no
111 * standard enumeration mechanism. Platforms that can find all
112 * serial ports via mechanisms like ACPI or PCI need not supply it.
114 #ifndef SERIAL_PORT_DFNS
115 #define SERIAL_PORT_DFNS
118 static struct old_serial_port old_serial_port[] = {
119 SERIAL_PORT_DFNS /* defined in asm/serial.h */
122 #define UART_NR (ARRAY_SIZE(old_serial_port) + CONFIG_SERIAL_8250_NR_UARTS)
124 #ifdef CONFIG_SERIAL_8250_RSA
126 #define PORT_RSA_MAX 4
127 static unsigned long probe_rsa[PORT_RSA_MAX];
128 static unsigned int probe_rsa_count;
129 #endif /* CONFIG_SERIAL_8250_RSA */
131 struct uart_8250_port {
132 struct uart_port port;
133 struct timer_list timer; /* "no irq" timer */
134 struct list_head list; /* ports on this IRQ */
135 unsigned short capabilities; /* port capabilities */
136 unsigned short bugs; /* port bugs */
137 unsigned int tx_loadsz; /* transmit fifo load size */
142 unsigned char mcr_mask; /* mask of user bits */
143 unsigned char mcr_force; /* mask of forced bits */
144 unsigned char lsr_break_flag;
147 * We provide a per-port pm hook.
149 void (*pm)(struct uart_port *port,
150 unsigned int state, unsigned int old);
155 struct list_head *head;
158 static struct irq_info irq_lists[NR_IRQS];
161 * Here we define the default xmit fifo size used for each type of UART.
163 static const struct serial8250_config uart_config[] = {
188 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
189 .flags = UART_CAP_FIFO,
200 .flags = UART_CAP_FIFO | UART_CAP_EFR | UART_CAP_SLEEP,
206 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_01 |
208 .flags = UART_CAP_FIFO | UART_CAP_EFR | UART_CAP_SLEEP,
214 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10 |
216 .flags = UART_CAP_FIFO | UART_CAP_SLEEP | UART_CAP_AFE,
224 .name = "16C950/954",
227 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
228 .flags = UART_CAP_FIFO,
234 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_01 |
236 .flags = UART_CAP_FIFO | UART_CAP_EFR | UART_CAP_SLEEP,
242 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
243 .flags = UART_CAP_FIFO | UART_CAP_EFR | UART_CAP_SLEEP,
249 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_11,
250 .flags = UART_CAP_FIFO,
256 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
257 .flags = UART_CAP_FIFO | UART_NATSEMI,
263 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
264 .flags = UART_CAP_FIFO | UART_CAP_UUE,
268 static _INLINE_ unsigned int serial_in(struct uart_8250_port *up, int offset)
270 offset <<= up->port.regshift;
272 switch (up->port.iotype) {
274 outb(up->port.hub6 - 1 + offset, up->port.iobase);
275 return inb(up->port.iobase + 1);
278 return readb(up->port.membase + offset);
281 return readl(up->port.membase + offset);
284 return inb(up->port.iobase + offset);
289 serial_out(struct uart_8250_port *up, int offset, int value)
291 offset <<= up->port.regshift;
293 switch (up->port.iotype) {
295 outb(up->port.hub6 - 1 + offset, up->port.iobase);
296 outb(value, up->port.iobase + 1);
300 writeb(value, up->port.membase + offset);
304 writel(value, up->port.membase + offset);
308 outb(value, up->port.iobase + offset);
313 * We used to support using pause I/O for certain machines. We
314 * haven't supported this for a while, but just in case it's badly
315 * needed for certain old 386 machines, I've left these #define's
318 #define serial_inp(up, offset) serial_in(up, offset)
319 #define serial_outp(up, offset, value) serial_out(up, offset, value)
325 static void serial_icr_write(struct uart_8250_port *up, int offset, int value)
327 serial_out(up, UART_SCR, offset);
328 serial_out(up, UART_ICR, value);
331 static unsigned int serial_icr_read(struct uart_8250_port *up, int offset)
335 serial_icr_write(up, UART_ACR, up->acr | UART_ACR_ICRRD);
336 serial_out(up, UART_SCR, offset);
337 value = serial_in(up, UART_ICR);
338 serial_icr_write(up, UART_ACR, up->acr);
346 static inline void serial8250_clear_fifos(struct uart_8250_port *p)
348 if (p->capabilities & UART_CAP_FIFO) {
349 serial_outp(p, UART_FCR, UART_FCR_ENABLE_FIFO);
350 serial_outp(p, UART_FCR, UART_FCR_ENABLE_FIFO |
351 UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT);
352 serial_outp(p, UART_FCR, 0);
357 * IER sleep support. UARTs which have EFRs need the "extended
358 * capability" bit enabled. Note that on XR16C850s, we need to
359 * reset LCR to write to IER.
361 static inline void serial8250_set_sleep(struct uart_8250_port *p, int sleep)
363 if (p->capabilities & UART_CAP_SLEEP) {
364 if (p->capabilities & UART_CAP_EFR) {
365 serial_outp(p, UART_LCR, 0xBF);
366 serial_outp(p, UART_EFR, UART_EFR_ECB);
367 serial_outp(p, UART_LCR, 0);
369 serial_outp(p, UART_IER, sleep ? UART_IERX_SLEEP : 0);
370 if (p->capabilities & UART_CAP_EFR) {
371 serial_outp(p, UART_LCR, 0xBF);
372 serial_outp(p, UART_EFR, 0);
373 serial_outp(p, UART_LCR, 0);
378 #ifdef CONFIG_SERIAL_8250_RSA
380 * Attempts to turn on the RSA FIFO. Returns zero on failure.
381 * We set the port uart clock rate if we succeed.
383 static int __enable_rsa(struct uart_8250_port *up)
388 mode = serial_inp(up, UART_RSA_MSR);
389 result = mode & UART_RSA_MSR_FIFO;
392 serial_outp(up, UART_RSA_MSR, mode | UART_RSA_MSR_FIFO);
393 mode = serial_inp(up, UART_RSA_MSR);
394 result = mode & UART_RSA_MSR_FIFO;
398 up->port.uartclk = SERIAL_RSA_BAUD_BASE * 16;
403 static void enable_rsa(struct uart_8250_port *up)
405 if (up->port.type == PORT_RSA) {
406 if (up->port.uartclk != SERIAL_RSA_BAUD_BASE * 16) {
407 spin_lock_irq(&up->port.lock);
409 spin_unlock_irq(&up->port.lock);
411 if (up->port.uartclk == SERIAL_RSA_BAUD_BASE * 16)
412 serial_outp(up, UART_RSA_FRR, 0);
417 * Attempts to turn off the RSA FIFO. Returns zero on failure.
418 * It is unknown why interrupts were disabled in here. However,
419 * the caller is expected to preserve this behaviour by grabbing
420 * the spinlock before calling this function.
422 static void disable_rsa(struct uart_8250_port *up)
427 if (up->port.type == PORT_RSA &&
428 up->port.uartclk == SERIAL_RSA_BAUD_BASE * 16) {
429 spin_lock_irq(&up->port.lock);
431 mode = serial_inp(up, UART_RSA_MSR);
432 result = !(mode & UART_RSA_MSR_FIFO);
435 serial_outp(up, UART_RSA_MSR, mode & ~UART_RSA_MSR_FIFO);
436 mode = serial_inp(up, UART_RSA_MSR);
437 result = !(mode & UART_RSA_MSR_FIFO);
441 up->port.uartclk = SERIAL_RSA_BAUD_BASE_LO * 16;
442 spin_unlock_irq(&up->port.lock);
445 #endif /* CONFIG_SERIAL_8250_RSA */
448 * This is a quickie test to see how big the FIFO is.
449 * It doesn't work at all the time, more's the pity.
451 static int size_fifo(struct uart_8250_port *up)
453 unsigned char old_fcr, old_mcr, old_dll, old_dlm, old_lcr;
456 old_lcr = serial_inp(up, UART_LCR);
457 serial_outp(up, UART_LCR, 0);
458 old_fcr = serial_inp(up, UART_FCR);
459 old_mcr = serial_inp(up, UART_MCR);
460 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO |
461 UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT);
462 serial_outp(up, UART_MCR, UART_MCR_LOOP);
463 serial_outp(up, UART_LCR, UART_LCR_DLAB);
464 old_dll = serial_inp(up, UART_DLL);
465 old_dlm = serial_inp(up, UART_DLM);
466 serial_outp(up, UART_DLL, 0x01);
467 serial_outp(up, UART_DLM, 0x00);
468 serial_outp(up, UART_LCR, 0x03);
469 for (count = 0; count < 256; count++)
470 serial_outp(up, UART_TX, count);
471 mdelay(20);/* FIXME - schedule_timeout */
472 for (count = 0; (serial_inp(up, UART_LSR) & UART_LSR_DR) &&
473 (count < 256); count++)
474 serial_inp(up, UART_RX);
475 serial_outp(up, UART_FCR, old_fcr);
476 serial_outp(up, UART_MCR, old_mcr);
477 serial_outp(up, UART_LCR, UART_LCR_DLAB);
478 serial_outp(up, UART_DLL, old_dll);
479 serial_outp(up, UART_DLM, old_dlm);
480 serial_outp(up, UART_LCR, old_lcr);
486 * Read UART ID using the divisor method - set DLL and DLM to zero
487 * and the revision will be in DLL and device type in DLM. We
488 * preserve the device state across this.
490 static unsigned int autoconfig_read_divisor_id(struct uart_8250_port *p)
492 unsigned char old_dll, old_dlm, old_lcr;
495 old_lcr = serial_inp(p, UART_LCR);
496 serial_outp(p, UART_LCR, UART_LCR_DLAB);
498 old_dll = serial_inp(p, UART_DLL);
499 old_dlm = serial_inp(p, UART_DLM);
501 serial_outp(p, UART_DLL, 0);
502 serial_outp(p, UART_DLM, 0);
504 id = serial_inp(p, UART_DLL) | serial_inp(p, UART_DLM) << 8;
506 serial_outp(p, UART_DLL, old_dll);
507 serial_outp(p, UART_DLM, old_dlm);
508 serial_outp(p, UART_LCR, old_lcr);
514 * This is a helper routine to autodetect StarTech/Exar/Oxsemi UART's.
515 * When this function is called we know it is at least a StarTech
516 * 16650 V2, but it might be one of several StarTech UARTs, or one of
517 * its clones. (We treat the broken original StarTech 16650 V1 as a
518 * 16550, and why not? Startech doesn't seem to even acknowledge its
521 * What evil have men's minds wrought...
523 static void autoconfig_has_efr(struct uart_8250_port *up)
525 unsigned int id1, id2, id3, rev;
528 * Everything with an EFR has SLEEP
530 up->capabilities |= UART_CAP_EFR | UART_CAP_SLEEP;
533 * First we check to see if it's an Oxford Semiconductor UART.
535 * If we have to do this here because some non-National
536 * Semiconductor clone chips lock up if you try writing to the
537 * LSR register (which serial_icr_read does)
541 * Check for Oxford Semiconductor 16C950.
543 * EFR [4] must be set else this test fails.
545 * This shouldn't be necessary, but Mike Hudson (Exoray@isys.ca)
546 * claims that it's needed for 952 dual UART's (which are not
547 * recommended for new designs).
550 serial_out(up, UART_LCR, 0xBF);
551 serial_out(up, UART_EFR, UART_EFR_ECB);
552 serial_out(up, UART_LCR, 0x00);
553 id1 = serial_icr_read(up, UART_ID1);
554 id2 = serial_icr_read(up, UART_ID2);
555 id3 = serial_icr_read(up, UART_ID3);
556 rev = serial_icr_read(up, UART_REV);
558 DEBUG_AUTOCONF("950id=%02x:%02x:%02x:%02x ", id1, id2, id3, rev);
560 if (id1 == 0x16 && id2 == 0xC9 &&
561 (id3 == 0x50 || id3 == 0x52 || id3 == 0x54)) {
562 up->port.type = PORT_16C950;
565 * Enable work around for the Oxford Semiconductor 952 rev B
566 * chip which causes it to seriously miscalculate baud rates
569 if (id3 == 0x52 && rev == 0x01)
570 up->bugs |= UART_BUG_QUOT;
575 * We check for a XR16C850 by setting DLL and DLM to 0, and then
576 * reading back DLL and DLM. The chip type depends on the DLM
578 * 0x10 - XR16C850 and the DLL contains the chip revision.
582 id1 = autoconfig_read_divisor_id(up);
583 DEBUG_AUTOCONF("850id=%04x ", id1);
586 if (id2 == 0x10 || id2 == 0x12 || id2 == 0x14) {
587 up->port.type = PORT_16850;
592 * It wasn't an XR16C850.
594 * We distinguish between the '654 and the '650 by counting
595 * how many bytes are in the FIFO. I'm using this for now,
596 * since that's the technique that was sent to me in the
597 * serial driver update, but I'm not convinced this works.
598 * I've had problems doing this in the past. -TYT
600 if (size_fifo(up) == 64)
601 up->port.type = PORT_16654;
603 up->port.type = PORT_16650V2;
607 * We detected a chip without a FIFO. Only two fall into
608 * this category - the original 8250 and the 16450. The
609 * 16450 has a scratch register (accessible with LCR=0)
611 static void autoconfig_8250(struct uart_8250_port *up)
613 unsigned char scratch, status1, status2;
615 up->port.type = PORT_8250;
617 scratch = serial_in(up, UART_SCR);
618 serial_outp(up, UART_SCR, 0xa5);
619 status1 = serial_in(up, UART_SCR);
620 serial_outp(up, UART_SCR, 0x5a);
621 status2 = serial_in(up, UART_SCR);
622 serial_outp(up, UART_SCR, scratch);
624 if (status1 == 0xa5 && status2 == 0x5a)
625 up->port.type = PORT_16450;
628 static int broken_efr(struct uart_8250_port *up)
631 * Exar ST16C2550 "A2" devices incorrectly detect as
632 * having an EFR, and report an ID of 0x0201. See
633 * http://www.exar.com/info.php?pdf=dan180_oct2004.pdf
635 if (autoconfig_read_divisor_id(up) == 0x0201 && size_fifo(up) == 16)
642 * We know that the chip has FIFOs. Does it have an EFR? The
643 * EFR is located in the same register position as the IIR and
644 * we know the top two bits of the IIR are currently set. The
645 * EFR should contain zero. Try to read the EFR.
647 static void autoconfig_16550a(struct uart_8250_port *up)
649 unsigned char status1, status2;
650 unsigned int iersave;
652 up->port.type = PORT_16550A;
653 up->capabilities |= UART_CAP_FIFO;
656 * Check for presence of the EFR when DLAB is set.
657 * Only ST16C650V1 UARTs pass this test.
659 serial_outp(up, UART_LCR, UART_LCR_DLAB);
660 if (serial_in(up, UART_EFR) == 0) {
661 serial_outp(up, UART_EFR, 0xA8);
662 if (serial_in(up, UART_EFR) != 0) {
663 DEBUG_AUTOCONF("EFRv1 ");
664 up->port.type = PORT_16650;
665 up->capabilities |= UART_CAP_EFR | UART_CAP_SLEEP;
667 DEBUG_AUTOCONF("Motorola 8xxx DUART ");
669 serial_outp(up, UART_EFR, 0);
674 * Maybe it requires 0xbf to be written to the LCR.
675 * (other ST16C650V2 UARTs, TI16C752A, etc)
677 serial_outp(up, UART_LCR, 0xBF);
678 if (serial_in(up, UART_EFR) == 0 && !broken_efr(up)) {
679 DEBUG_AUTOCONF("EFRv2 ");
680 autoconfig_has_efr(up);
685 * Check for a National Semiconductor SuperIO chip.
686 * Attempt to switch to bank 2, read the value of the LOOP bit
687 * from EXCR1. Switch back to bank 0, change it in MCR. Then
688 * switch back to bank 2, read it from EXCR1 again and check
689 * it's changed. If so, set baud_base in EXCR2 to 921600. -- dwmw2
691 serial_outp(up, UART_LCR, 0);
692 status1 = serial_in(up, UART_MCR);
693 serial_outp(up, UART_LCR, 0xE0);
694 status2 = serial_in(up, 0x02); /* EXCR1 */
696 if (!((status2 ^ status1) & UART_MCR_LOOP)) {
697 serial_outp(up, UART_LCR, 0);
698 serial_outp(up, UART_MCR, status1 ^ UART_MCR_LOOP);
699 serial_outp(up, UART_LCR, 0xE0);
700 status2 = serial_in(up, 0x02); /* EXCR1 */
701 serial_outp(up, UART_LCR, 0);
702 serial_outp(up, UART_MCR, status1);
704 if ((status2 ^ status1) & UART_MCR_LOOP) {
707 serial_outp(up, UART_LCR, 0xE0);
709 quot = serial_inp(up, UART_DLM) << 8;
710 quot += serial_inp(up, UART_DLL);
713 status1 = serial_in(up, 0x04); /* EXCR1 */
714 status1 &= ~0xB0; /* Disable LOCK, mask out PRESL[01] */
715 status1 |= 0x10; /* 1.625 divisor for baud_base --> 921600 */
716 serial_outp(up, 0x04, status1);
718 serial_outp(up, UART_DLL, quot & 0xff);
719 serial_outp(up, UART_DLM, quot >> 8);
721 serial_outp(up, UART_LCR, 0);
723 up->port.uartclk = 921600*16;
724 up->port.type = PORT_NS16550A;
725 up->capabilities |= UART_NATSEMI;
731 * No EFR. Try to detect a TI16750, which only sets bit 5 of
732 * the IIR when 64 byte FIFO mode is enabled when DLAB is set.
733 * Try setting it with and without DLAB set. Cheap clones
734 * set bit 5 without DLAB set.
736 serial_outp(up, UART_LCR, 0);
737 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO | UART_FCR7_64BYTE);
738 status1 = serial_in(up, UART_IIR) >> 5;
739 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
740 serial_outp(up, UART_LCR, UART_LCR_DLAB);
741 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO | UART_FCR7_64BYTE);
742 status2 = serial_in(up, UART_IIR) >> 5;
743 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
744 serial_outp(up, UART_LCR, 0);
746 DEBUG_AUTOCONF("iir1=%d iir2=%d ", status1, status2);
748 if (status1 == 6 && status2 == 7) {
749 up->port.type = PORT_16750;
750 up->capabilities |= UART_CAP_AFE | UART_CAP_SLEEP;
755 * Try writing and reading the UART_IER_UUE bit (b6).
756 * If it works, this is probably one of the Xscale platform's
758 * We're going to explicitly set the UUE bit to 0 before
759 * trying to write and read a 1 just to make sure it's not
760 * already a 1 and maybe locked there before we even start start.
762 iersave = serial_in(up, UART_IER);
763 serial_outp(up, UART_IER, iersave & ~UART_IER_UUE);
764 if (!(serial_in(up, UART_IER) & UART_IER_UUE)) {
766 * OK it's in a known zero state, try writing and reading
767 * without disturbing the current state of the other bits.
769 serial_outp(up, UART_IER, iersave | UART_IER_UUE);
770 if (serial_in(up, UART_IER) & UART_IER_UUE) {
773 * We'll leave the UART_IER_UUE bit set to 1 (enabled).
775 DEBUG_AUTOCONF("Xscale ");
776 up->port.type = PORT_XSCALE;
777 up->capabilities |= UART_CAP_UUE;
782 * If we got here we couldn't force the IER_UUE bit to 0.
783 * Log it and continue.
785 DEBUG_AUTOCONF("Couldn't force IER_UUE to 0 ");
787 serial_outp(up, UART_IER, iersave);
791 * This routine is called by rs_init() to initialize a specific serial
792 * port. It determines what type of UART chip this serial port is
793 * using: 8250, 16450, 16550, 16550A. The important question is
794 * whether or not this UART is a 16550A or not, since this will
795 * determine whether or not we can use its FIFO features or not.
797 static void autoconfig(struct uart_8250_port *up, unsigned int probeflags)
799 unsigned char status1, scratch, scratch2, scratch3;
800 unsigned char save_lcr, save_mcr;
803 if (!up->port.iobase && !up->port.mapbase && !up->port.membase)
806 DEBUG_AUTOCONF("ttyS%d: autoconf (0x%04x, 0x%p): ",
807 up->port.line, up->port.iobase, up->port.membase);
810 * We really do need global IRQs disabled here - we're going to
811 * be frobbing the chips IRQ enable register to see if it exists.
813 spin_lock_irqsave(&up->port.lock, flags);
814 // save_flags(flags); cli();
816 up->capabilities = 0;
819 if (!(up->port.flags & UPF_BUGGY_UART)) {
821 * Do a simple existence test first; if we fail this,
822 * there's no point trying anything else.
824 * 0x80 is used as a nonsense port to prevent against
825 * false positives due to ISA bus float. The
826 * assumption is that 0x80 is a non-existent port;
827 * which should be safe since include/asm/io.h also
828 * makes this assumption.
830 * Note: this is safe as long as MCR bit 4 is clear
831 * and the device is in "PC" mode.
833 scratch = serial_inp(up, UART_IER);
834 serial_outp(up, UART_IER, 0);
838 scratch2 = serial_inp(up, UART_IER);
839 serial_outp(up, UART_IER, 0x0F);
843 scratch3 = serial_inp(up, UART_IER);
844 serial_outp(up, UART_IER, scratch);
845 if (scratch2 != 0 || scratch3 != 0x0F) {
847 * We failed; there's nothing here
849 DEBUG_AUTOCONF("IER test failed (%02x, %02x) ",
855 save_mcr = serial_in(up, UART_MCR);
856 save_lcr = serial_in(up, UART_LCR);
859 * Check to see if a UART is really there. Certain broken
860 * internal modems based on the Rockwell chipset fail this
861 * test, because they apparently don't implement the loopback
862 * test mode. So this test is skipped on the COM 1 through
863 * COM 4 ports. This *should* be safe, since no board
864 * manufacturer would be stupid enough to design a board
865 * that conflicts with COM 1-4 --- we hope!
867 if (!(up->port.flags & UPF_SKIP_TEST)) {
868 serial_outp(up, UART_MCR, UART_MCR_LOOP | 0x0A);
869 status1 = serial_inp(up, UART_MSR) & 0xF0;
870 serial_outp(up, UART_MCR, save_mcr);
871 if (status1 != 0x90) {
872 DEBUG_AUTOCONF("LOOP test failed (%02x) ",
879 * We're pretty sure there's a port here. Lets find out what
880 * type of port it is. The IIR top two bits allows us to find
881 * out if its 8250 or 16450, 16550, 16550A or later. This
882 * determines what we test for next.
884 * We also initialise the EFR (if any) to zero for later. The
885 * EFR occupies the same register location as the FCR and IIR.
887 serial_outp(up, UART_LCR, 0xBF);
888 serial_outp(up, UART_EFR, 0);
889 serial_outp(up, UART_LCR, 0);
891 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
892 scratch = serial_in(up, UART_IIR) >> 6;
894 DEBUG_AUTOCONF("iir=%d ", scratch);
901 up->port.type = PORT_UNKNOWN;
904 up->port.type = PORT_16550;
907 autoconfig_16550a(up);
911 #ifdef CONFIG_SERIAL_8250_RSA
913 * Only probe for RSA ports if we got the region.
915 if (up->port.type == PORT_16550A && probeflags & PROBE_RSA) {
918 for (i = 0 ; i < probe_rsa_count; ++i) {
919 if (probe_rsa[i] == up->port.iobase &&
921 up->port.type = PORT_RSA;
927 serial_outp(up, UART_LCR, save_lcr);
929 if (up->capabilities != uart_config[up->port.type].flags) {
931 "ttyS%d: detected caps %08x should be %08x\n",
932 up->port.line, up->capabilities,
933 uart_config[up->port.type].flags);
936 up->port.fifosize = uart_config[up->port.type].fifo_size;
937 up->capabilities = uart_config[up->port.type].flags;
938 up->tx_loadsz = uart_config[up->port.type].tx_loadsz;
940 if (up->port.type == PORT_UNKNOWN)
946 #ifdef CONFIG_SERIAL_8250_RSA
947 if (up->port.type == PORT_RSA)
948 serial_outp(up, UART_RSA_FRR, 0);
950 serial_outp(up, UART_MCR, save_mcr);
951 serial8250_clear_fifos(up);
952 (void)serial_in(up, UART_RX);
953 serial_outp(up, UART_IER, 0);
956 spin_unlock_irqrestore(&up->port.lock, flags);
957 // restore_flags(flags);
958 DEBUG_AUTOCONF("type=%s\n", uart_config[up->port.type].name);
961 static void autoconfig_irq(struct uart_8250_port *up)
963 unsigned char save_mcr, save_ier;
964 unsigned char save_ICP = 0;
965 unsigned int ICP = 0;
969 if (up->port.flags & UPF_FOURPORT) {
970 ICP = (up->port.iobase & 0xfe0) | 0x1f;
971 save_ICP = inb_p(ICP);
976 /* forget possible initially masked and pending IRQ */
977 probe_irq_off(probe_irq_on());
978 save_mcr = serial_inp(up, UART_MCR);
979 save_ier = serial_inp(up, UART_IER);
980 serial_outp(up, UART_MCR, UART_MCR_OUT1 | UART_MCR_OUT2);
982 irqs = probe_irq_on();
983 serial_outp(up, UART_MCR, 0);
985 if (up->port.flags & UPF_FOURPORT) {
986 serial_outp(up, UART_MCR,
987 UART_MCR_DTR | UART_MCR_RTS);
989 serial_outp(up, UART_MCR,
990 UART_MCR_DTR | UART_MCR_RTS | UART_MCR_OUT2);
992 serial_outp(up, UART_IER, 0x0f); /* enable all intrs */
993 (void)serial_inp(up, UART_LSR);
994 (void)serial_inp(up, UART_RX);
995 (void)serial_inp(up, UART_IIR);
996 (void)serial_inp(up, UART_MSR);
997 serial_outp(up, UART_TX, 0xFF);
999 irq = probe_irq_off(irqs);
1001 serial_outp(up, UART_MCR, save_mcr);
1002 serial_outp(up, UART_IER, save_ier);
1004 if (up->port.flags & UPF_FOURPORT)
1005 outb_p(save_ICP, ICP);
1007 up->port.irq = (irq > 0) ? irq : 0;
1010 static void serial8250_stop_tx(struct uart_port *port, unsigned int tty_stop)
1012 struct uart_8250_port *up = (struct uart_8250_port *)port;
1014 if (up->ier & UART_IER_THRI) {
1015 up->ier &= ~UART_IER_THRI;
1016 serial_out(up, UART_IER, up->ier);
1020 * We only do this from uart_stop - if we run out of
1021 * characters to send, we don't want to prevent the
1022 * FIFO from emptying.
1024 if (up->port.type == PORT_16C950 && tty_stop) {
1025 up->acr |= UART_ACR_TXDIS;
1026 serial_icr_write(up, UART_ACR, up->acr);
1030 static void serial8250_start_tx(struct uart_port *port, unsigned int tty_start)
1032 struct uart_8250_port *up = (struct uart_8250_port *)port;
1034 if (!(up->ier & UART_IER_THRI)) {
1035 up->ier |= UART_IER_THRI;
1036 serial_out(up, UART_IER, up->ier);
1039 * We only do this from uart_start
1041 if (tty_start && up->port.type == PORT_16C950) {
1042 up->acr &= ~UART_ACR_TXDIS;
1043 serial_icr_write(up, UART_ACR, up->acr);
1047 static void serial8250_stop_rx(struct uart_port *port)
1049 struct uart_8250_port *up = (struct uart_8250_port *)port;
1051 up->ier &= ~UART_IER_RLSI;
1052 up->port.read_status_mask &= ~UART_LSR_DR;
1053 serial_out(up, UART_IER, up->ier);
1056 static void serial8250_enable_ms(struct uart_port *port)
1058 struct uart_8250_port *up = (struct uart_8250_port *)port;
1060 up->ier |= UART_IER_MSI;
1061 serial_out(up, UART_IER, up->ier);
1064 static _INLINE_ void
1065 receive_chars(struct uart_8250_port *up, int *status, struct pt_regs *regs)
1067 struct tty_struct *tty = up->port.info->tty;
1068 unsigned char ch, lsr = *status;
1069 int max_count = 256;
1073 /* The following is not allowed by the tty layer and
1074 unsafe. It should be fixed ASAP */
1075 if (unlikely(tty->flip.count >= TTY_FLIPBUF_SIZE)) {
1076 if (tty->low_latency) {
1077 spin_unlock(&up->port.lock);
1078 tty_flip_buffer_push(tty);
1079 spin_lock(&up->port.lock);
1082 * If this failed then we will throw away the
1083 * bytes but must do so to clear interrupts
1086 ch = serial_inp(up, UART_RX);
1088 up->port.icount.rx++;
1090 #ifdef CONFIG_SERIAL_8250_CONSOLE
1092 * Recover the break flag from console xmit
1094 if (up->port.line == up->port.cons->index) {
1095 lsr |= up->lsr_break_flag;
1096 up->lsr_break_flag = 0;
1100 if (unlikely(lsr & (UART_LSR_BI | UART_LSR_PE |
1101 UART_LSR_FE | UART_LSR_OE))) {
1103 * For statistics only
1105 if (lsr & UART_LSR_BI) {
1106 lsr &= ~(UART_LSR_FE | UART_LSR_PE);
1107 up->port.icount.brk++;
1109 * We do the SysRQ and SAK checking
1110 * here because otherwise the break
1111 * may get masked by ignore_status_mask
1112 * or read_status_mask.
1114 if (uart_handle_break(&up->port))
1116 } else if (lsr & UART_LSR_PE)
1117 up->port.icount.parity++;
1118 else if (lsr & UART_LSR_FE)
1119 up->port.icount.frame++;
1120 if (lsr & UART_LSR_OE)
1121 up->port.icount.overrun++;
1124 * Mask off conditions which should be ignored.
1126 lsr &= up->port.read_status_mask;
1128 if (lsr & UART_LSR_BI) {
1129 DEBUG_INTR("handling break....");
1131 } else if (lsr & UART_LSR_PE)
1133 else if (lsr & UART_LSR_FE)
1136 if (uart_handle_sysrq_char(&up->port, ch, regs))
1139 uart_insert_char(&up->port, lsr, UART_LSR_OE, ch, flag);
1142 lsr = serial_inp(up, UART_LSR);
1143 } while ((lsr & UART_LSR_DR) && (max_count-- > 0));
1144 spin_unlock(&up->port.lock);
1145 tty_flip_buffer_push(tty);
1146 spin_lock(&up->port.lock);
1150 static _INLINE_ void transmit_chars(struct uart_8250_port *up)
1152 struct circ_buf *xmit = &up->port.info->xmit;
1155 if (up->port.x_char) {
1156 serial_outp(up, UART_TX, up->port.x_char);
1157 up->port.icount.tx++;
1158 up->port.x_char = 0;
1161 if (uart_circ_empty(xmit) || uart_tx_stopped(&up->port)) {
1162 serial8250_stop_tx(&up->port, 0);
1166 count = up->tx_loadsz;
1168 serial_out(up, UART_TX, xmit->buf[xmit->tail]);
1169 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
1170 up->port.icount.tx++;
1171 if (uart_circ_empty(xmit))
1173 } while (--count > 0);
1175 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
1176 uart_write_wakeup(&up->port);
1178 DEBUG_INTR("THRE...");
1180 if (uart_circ_empty(xmit))
1181 serial8250_stop_tx(&up->port, 0);
1184 static _INLINE_ void check_modem_status(struct uart_8250_port *up)
1188 status = serial_in(up, UART_MSR);
1190 if ((status & UART_MSR_ANY_DELTA) == 0)
1193 if (status & UART_MSR_TERI)
1194 up->port.icount.rng++;
1195 if (status & UART_MSR_DDSR)
1196 up->port.icount.dsr++;
1197 if (status & UART_MSR_DDCD)
1198 uart_handle_dcd_change(&up->port, status & UART_MSR_DCD);
1199 if (status & UART_MSR_DCTS)
1200 uart_handle_cts_change(&up->port, status & UART_MSR_CTS);
1202 wake_up_interruptible(&up->port.info->delta_msr_wait);
1206 * This handles the interrupt from one port.
1209 serial8250_handle_port(struct uart_8250_port *up, struct pt_regs *regs)
1211 unsigned int status = serial_inp(up, UART_LSR);
1213 DEBUG_INTR("status = %x...", status);
1215 if (status & UART_LSR_DR)
1216 receive_chars(up, &status, regs);
1217 check_modem_status(up);
1218 if (status & UART_LSR_THRE)
1223 * This is the serial driver's interrupt routine.
1225 * Arjan thinks the old way was overly complex, so it got simplified.
1226 * Alan disagrees, saying that need the complexity to handle the weird
1227 * nature of ISA shared interrupts. (This is a special exception.)
1229 * In order to handle ISA shared interrupts properly, we need to check
1230 * that all ports have been serviced, and therefore the ISA interrupt
1231 * line has been de-asserted.
1233 * This means we need to loop through all ports. checking that they
1234 * don't have an interrupt pending.
1236 static irqreturn_t serial8250_interrupt(int irq, void *dev_id, struct pt_regs *regs)
1238 struct irq_info *i = dev_id;
1239 struct list_head *l, *end = NULL;
1240 int pass_counter = 0, handled = 0;
1242 DEBUG_INTR("serial8250_interrupt(%d)...", irq);
1244 spin_lock(&i->lock);
1248 struct uart_8250_port *up;
1251 up = list_entry(l, struct uart_8250_port, list);
1253 iir = serial_in(up, UART_IIR);
1254 if (!(iir & UART_IIR_NO_INT)) {
1255 spin_lock(&up->port.lock);
1256 serial8250_handle_port(up, regs);
1257 spin_unlock(&up->port.lock);
1262 } else if (end == NULL)
1267 if (l == i->head && pass_counter++ > PASS_LIMIT) {
1268 /* If we hit this, we're dead. */
1269 printk(KERN_ERR "serial8250: too much work for "
1275 spin_unlock(&i->lock);
1277 DEBUG_INTR("end.\n");
1279 return IRQ_RETVAL(handled);
1283 * To support ISA shared interrupts, we need to have one interrupt
1284 * handler that ensures that the IRQ line has been deasserted
1285 * before returning. Failing to do this will result in the IRQ
1286 * line being stuck active, and, since ISA irqs are edge triggered,
1287 * no more IRQs will be seen.
1289 static void serial_do_unlink(struct irq_info *i, struct uart_8250_port *up)
1291 spin_lock_irq(&i->lock);
1293 if (!list_empty(i->head)) {
1294 if (i->head == &up->list)
1295 i->head = i->head->next;
1296 list_del(&up->list);
1298 BUG_ON(i->head != &up->list);
1302 spin_unlock_irq(&i->lock);
1305 static int serial_link_irq_chain(struct uart_8250_port *up)
1307 struct irq_info *i = irq_lists + up->port.irq;
1308 int ret, irq_flags = up->port.flags & UPF_SHARE_IRQ ? SA_SHIRQ : 0;
1310 spin_lock_irq(&i->lock);
1313 list_add(&up->list, i->head);
1314 spin_unlock_irq(&i->lock);
1318 INIT_LIST_HEAD(&up->list);
1319 i->head = &up->list;
1320 spin_unlock_irq(&i->lock);
1322 ret = request_irq(up->port.irq, serial8250_interrupt,
1323 irq_flags, "serial", i);
1325 serial_do_unlink(i, up);
1331 static void serial_unlink_irq_chain(struct uart_8250_port *up)
1333 struct irq_info *i = irq_lists + up->port.irq;
1335 BUG_ON(i->head == NULL);
1337 if (list_empty(i->head))
1338 free_irq(up->port.irq, i);
1340 serial_do_unlink(i, up);
1344 * This function is used to handle ports that do not have an
1345 * interrupt. This doesn't work very well for 16450's, but gives
1346 * barely passable results for a 16550A. (Although at the expense
1347 * of much CPU overhead).
1349 static void serial8250_timeout(unsigned long data)
1351 struct uart_8250_port *up = (struct uart_8250_port *)data;
1352 unsigned int timeout;
1355 iir = serial_in(up, UART_IIR);
1356 if (!(iir & UART_IIR_NO_INT)) {
1357 spin_lock(&up->port.lock);
1358 serial8250_handle_port(up, NULL);
1359 spin_unlock(&up->port.lock);
1362 timeout = up->port.timeout;
1363 timeout = timeout > 6 ? (timeout / 2 - 2) : 1;
1364 mod_timer(&up->timer, jiffies + timeout);
1367 static unsigned int serial8250_tx_empty(struct uart_port *port)
1369 struct uart_8250_port *up = (struct uart_8250_port *)port;
1370 unsigned long flags;
1373 spin_lock_irqsave(&up->port.lock, flags);
1374 ret = serial_in(up, UART_LSR) & UART_LSR_TEMT ? TIOCSER_TEMT : 0;
1375 spin_unlock_irqrestore(&up->port.lock, flags);
1380 static unsigned int serial8250_get_mctrl(struct uart_port *port)
1382 struct uart_8250_port *up = (struct uart_8250_port *)port;
1383 unsigned long flags;
1384 unsigned char status;
1387 spin_lock_irqsave(&up->port.lock, flags);
1388 status = serial_in(up, UART_MSR);
1389 spin_unlock_irqrestore(&up->port.lock, flags);
1392 if (status & UART_MSR_DCD)
1394 if (status & UART_MSR_RI)
1396 if (status & UART_MSR_DSR)
1398 if (status & UART_MSR_CTS)
1403 static void serial8250_set_mctrl(struct uart_port *port, unsigned int mctrl)
1405 struct uart_8250_port *up = (struct uart_8250_port *)port;
1406 unsigned char mcr = 0;
1408 if (mctrl & TIOCM_RTS)
1409 mcr |= UART_MCR_RTS;
1410 if (mctrl & TIOCM_DTR)
1411 mcr |= UART_MCR_DTR;
1412 if (mctrl & TIOCM_OUT1)
1413 mcr |= UART_MCR_OUT1;
1414 if (mctrl & TIOCM_OUT2)
1415 mcr |= UART_MCR_OUT2;
1416 if (mctrl & TIOCM_LOOP)
1417 mcr |= UART_MCR_LOOP;
1419 mcr = (mcr & up->mcr_mask) | up->mcr_force | up->mcr;
1421 serial_out(up, UART_MCR, mcr);
1424 static void serial8250_break_ctl(struct uart_port *port, int break_state)
1426 struct uart_8250_port *up = (struct uart_8250_port *)port;
1427 unsigned long flags;
1429 spin_lock_irqsave(&up->port.lock, flags);
1430 if (break_state == -1)
1431 up->lcr |= UART_LCR_SBC;
1433 up->lcr &= ~UART_LCR_SBC;
1434 serial_out(up, UART_LCR, up->lcr);
1435 spin_unlock_irqrestore(&up->port.lock, flags);
1438 static int serial8250_startup(struct uart_port *port)
1440 struct uart_8250_port *up = (struct uart_8250_port *)port;
1441 unsigned long flags;
1444 up->capabilities = uart_config[up->port.type].flags;
1447 if (up->port.type == PORT_16C950) {
1448 /* Wake up and initialize UART */
1450 serial_outp(up, UART_LCR, 0xBF);
1451 serial_outp(up, UART_EFR, UART_EFR_ECB);
1452 serial_outp(up, UART_IER, 0);
1453 serial_outp(up, UART_LCR, 0);
1454 serial_icr_write(up, UART_CSR, 0); /* Reset the UART */
1455 serial_outp(up, UART_LCR, 0xBF);
1456 serial_outp(up, UART_EFR, UART_EFR_ECB);
1457 serial_outp(up, UART_LCR, 0);
1460 #ifdef CONFIG_SERIAL_8250_RSA
1462 * If this is an RSA port, see if we can kick it up to the
1463 * higher speed clock.
1469 * Clear the FIFO buffers and disable them.
1470 * (they will be reeanbled in set_termios())
1472 serial8250_clear_fifos(up);
1475 * Clear the interrupt registers.
1477 (void) serial_inp(up, UART_LSR);
1478 (void) serial_inp(up, UART_RX);
1479 (void) serial_inp(up, UART_IIR);
1480 (void) serial_inp(up, UART_MSR);
1483 * At this point, there's no way the LSR could still be 0xff;
1484 * if it is, then bail out, because there's likely no UART
1487 if (!(up->port.flags & UPF_BUGGY_UART) &&
1488 (serial_inp(up, UART_LSR) == 0xff)) {
1489 printk("ttyS%d: LSR safety check engaged!\n", up->port.line);
1494 * For a XR16C850, we need to set the trigger levels
1496 if (up->port.type == PORT_16850) {
1499 serial_outp(up, UART_LCR, 0xbf);
1501 fctr = serial_inp(up, UART_FCTR) & ~(UART_FCTR_RX|UART_FCTR_TX);
1502 serial_outp(up, UART_FCTR, fctr | UART_FCTR_TRGD | UART_FCTR_RX);
1503 serial_outp(up, UART_TRG, UART_TRG_96);
1504 serial_outp(up, UART_FCTR, fctr | UART_FCTR_TRGD | UART_FCTR_TX);
1505 serial_outp(up, UART_TRG, UART_TRG_96);
1507 serial_outp(up, UART_LCR, 0);
1511 * If the "interrupt" for this port doesn't correspond with any
1512 * hardware interrupt, we use a timer-based system. The original
1513 * driver used to do this with IRQ0.
1515 if (!is_real_interrupt(up->port.irq)) {
1516 unsigned int timeout = up->port.timeout;
1518 timeout = timeout > 6 ? (timeout / 2 - 2) : 1;
1520 up->timer.data = (unsigned long)up;
1521 mod_timer(&up->timer, jiffies + timeout);
1523 retval = serial_link_irq_chain(up);
1529 * Now, initialize the UART
1531 serial_outp(up, UART_LCR, UART_LCR_WLEN8);
1533 spin_lock_irqsave(&up->port.lock, flags);
1534 if (up->port.flags & UPF_FOURPORT) {
1535 if (!is_real_interrupt(up->port.irq))
1536 up->port.mctrl |= TIOCM_OUT1;
1539 * Most PC uarts need OUT2 raised to enable interrupts.
1541 if (is_real_interrupt(up->port.irq))
1542 up->port.mctrl |= TIOCM_OUT2;
1544 serial8250_set_mctrl(&up->port, up->port.mctrl);
1545 spin_unlock_irqrestore(&up->port.lock, flags);
1548 * Finally, enable interrupts. Note: Modem status interrupts
1549 * are set via set_termios(), which will be occurring imminently
1550 * anyway, so we don't enable them here.
1552 up->ier = UART_IER_RLSI | UART_IER_RDI;
1553 serial_outp(up, UART_IER, up->ier);
1555 if (up->port.flags & UPF_FOURPORT) {
1558 * Enable interrupts on the AST Fourport board
1560 icp = (up->port.iobase & 0xfe0) | 0x01f;
1566 * And clear the interrupt registers again for luck.
1568 (void) serial_inp(up, UART_LSR);
1569 (void) serial_inp(up, UART_RX);
1570 (void) serial_inp(up, UART_IIR);
1571 (void) serial_inp(up, UART_MSR);
1576 static void serial8250_shutdown(struct uart_port *port)
1578 struct uart_8250_port *up = (struct uart_8250_port *)port;
1579 unsigned long flags;
1582 * Disable interrupts from this port
1585 serial_outp(up, UART_IER, 0);
1587 spin_lock_irqsave(&up->port.lock, flags);
1588 if (up->port.flags & UPF_FOURPORT) {
1589 /* reset interrupts on the AST Fourport board */
1590 inb((up->port.iobase & 0xfe0) | 0x1f);
1591 up->port.mctrl |= TIOCM_OUT1;
1593 up->port.mctrl &= ~TIOCM_OUT2;
1595 serial8250_set_mctrl(&up->port, up->port.mctrl);
1596 spin_unlock_irqrestore(&up->port.lock, flags);
1599 * Disable break condition and FIFOs
1601 serial_out(up, UART_LCR, serial_inp(up, UART_LCR) & ~UART_LCR_SBC);
1602 serial8250_clear_fifos(up);
1604 #ifdef CONFIG_SERIAL_8250_RSA
1606 * Reset the RSA board back to 115kbps compat mode.
1612 * Read data port to reset things, and then unlink from
1615 (void) serial_in(up, UART_RX);
1617 if (!is_real_interrupt(up->port.irq))
1618 del_timer_sync(&up->timer);
1620 serial_unlink_irq_chain(up);
1623 static unsigned int serial8250_get_divisor(struct uart_port *port, unsigned int baud)
1628 * Handle magic divisors for baud rates above baud_base on
1629 * SMSC SuperIO chips.
1631 if ((port->flags & UPF_MAGIC_MULTIPLIER) &&
1632 baud == (port->uartclk/4))
1634 else if ((port->flags & UPF_MAGIC_MULTIPLIER) &&
1635 baud == (port->uartclk/8))
1638 quot = uart_get_divisor(port, baud);
1644 serial8250_set_termios(struct uart_port *port, struct termios *termios,
1645 struct termios *old)
1647 struct uart_8250_port *up = (struct uart_8250_port *)port;
1648 unsigned char cval, fcr = 0;
1649 unsigned long flags;
1650 unsigned int baud, quot;
1652 switch (termios->c_cflag & CSIZE) {
1668 if (termios->c_cflag & CSTOPB)
1670 if (termios->c_cflag & PARENB)
1671 cval |= UART_LCR_PARITY;
1672 if (!(termios->c_cflag & PARODD))
1673 cval |= UART_LCR_EPAR;
1675 if (termios->c_cflag & CMSPAR)
1676 cval |= UART_LCR_SPAR;
1680 * Ask the core to calculate the divisor for us.
1682 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
1683 quot = serial8250_get_divisor(port, baud);
1686 * Oxford Semi 952 rev B workaround
1688 if (up->bugs & UART_BUG_QUOT && (quot & 0xff) == 0)
1691 if (up->capabilities & UART_CAP_FIFO && up->port.fifosize > 1) {
1693 fcr = UART_FCR_ENABLE_FIFO | UART_FCR_TRIGGER_1;
1695 fcr = uart_config[up->port.type].fcr;
1699 * MCR-based auto flow control. When AFE is enabled, RTS will be
1700 * deasserted when the receive FIFO contains more characters than
1701 * the trigger, or the MCR RTS bit is cleared. In the case where
1702 * the remote UART is not using CTS auto flow control, we must
1703 * have sufficient FIFO entries for the latency of the remote
1704 * UART to respond. IOW, at least 32 bytes of FIFO.
1706 if (up->capabilities & UART_CAP_AFE && up->port.fifosize >= 32) {
1707 up->mcr &= ~UART_MCR_AFE;
1708 if (termios->c_cflag & CRTSCTS)
1709 up->mcr |= UART_MCR_AFE;
1713 * Ok, we're now changing the port state. Do it with
1714 * interrupts disabled.
1716 spin_lock_irqsave(&up->port.lock, flags);
1719 * Update the per-port timeout.
1721 uart_update_timeout(port, termios->c_cflag, baud);
1723 up->port.read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;
1724 if (termios->c_iflag & INPCK)
1725 up->port.read_status_mask |= UART_LSR_FE | UART_LSR_PE;
1726 if (termios->c_iflag & (BRKINT | PARMRK))
1727 up->port.read_status_mask |= UART_LSR_BI;
1730 * Characteres to ignore
1732 up->port.ignore_status_mask = 0;
1733 if (termios->c_iflag & IGNPAR)
1734 up->port.ignore_status_mask |= UART_LSR_PE | UART_LSR_FE;
1735 if (termios->c_iflag & IGNBRK) {
1736 up->port.ignore_status_mask |= UART_LSR_BI;
1738 * If we're ignoring parity and break indicators,
1739 * ignore overruns too (for real raw support).
1741 if (termios->c_iflag & IGNPAR)
1742 up->port.ignore_status_mask |= UART_LSR_OE;
1746 * ignore all characters if CREAD is not set
1748 if ((termios->c_cflag & CREAD) == 0)
1749 up->port.ignore_status_mask |= UART_LSR_DR;
1752 * CTS flow control flag and modem status interrupts
1754 up->ier &= ~UART_IER_MSI;
1755 if (UART_ENABLE_MS(&up->port, termios->c_cflag))
1756 up->ier |= UART_IER_MSI;
1757 if (up->capabilities & UART_CAP_UUE)
1758 up->ier |= UART_IER_UUE | UART_IER_RTOIE;
1760 serial_out(up, UART_IER, up->ier);
1762 if (up->capabilities & UART_CAP_EFR) {
1763 unsigned char efr = 0;
1765 * TI16C752/Startech hardware flow control. FIXME:
1766 * - TI16C752 requires control thresholds to be set.
1767 * - UART_MCR_RTS is ineffective if auto-RTS mode is enabled.
1769 if (termios->c_cflag & CRTSCTS)
1770 efr |= UART_EFR_CTS;
1772 serial_outp(up, UART_LCR, 0xBF);
1773 serial_outp(up, UART_EFR, efr);
1776 if (up->capabilities & UART_NATSEMI) {
1777 /* Switch to bank 2 not bank 1, to avoid resetting EXCR2 */
1778 serial_outp(up, UART_LCR, 0xe0);
1780 serial_outp(up, UART_LCR, cval | UART_LCR_DLAB);/* set DLAB */
1783 serial_outp(up, UART_DLL, quot & 0xff); /* LS of divisor */
1784 serial_outp(up, UART_DLM, quot >> 8); /* MS of divisor */
1787 * LCR DLAB must be set to enable 64-byte FIFO mode. If the FCR
1788 * is written without DLAB set, this mode will be disabled.
1790 if (up->port.type == PORT_16750)
1791 serial_outp(up, UART_FCR, fcr);
1793 serial_outp(up, UART_LCR, cval); /* reset DLAB */
1794 up->lcr = cval; /* Save LCR */
1795 if (up->port.type != PORT_16750) {
1796 if (fcr & UART_FCR_ENABLE_FIFO) {
1797 /* emulated UARTs (Lucent Venus 167x) need two steps */
1798 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
1800 serial_outp(up, UART_FCR, fcr); /* set fcr */
1802 serial8250_set_mctrl(&up->port, up->port.mctrl);
1803 spin_unlock_irqrestore(&up->port.lock, flags);
1807 serial8250_pm(struct uart_port *port, unsigned int state,
1808 unsigned int oldstate)
1810 struct uart_8250_port *p = (struct uart_8250_port *)port;
1812 serial8250_set_sleep(p, state != 0);
1815 p->pm(port, state, oldstate);
1819 * Resource handling.
1821 static int serial8250_request_std_resource(struct uart_8250_port *up)
1823 unsigned int size = 8 << up->port.regshift;
1826 switch (up->port.iotype) {
1828 if (!up->port.mapbase)
1831 if (!request_mem_region(up->port.mapbase, size, "serial")) {
1836 if (up->port.flags & UPF_IOREMAP) {
1837 up->port.membase = ioremap(up->port.mapbase, size);
1838 if (!up->port.membase) {
1839 release_mem_region(up->port.mapbase, size);
1847 if (!request_region(up->port.iobase, size, "serial"))
1854 static void serial8250_release_std_resource(struct uart_8250_port *up)
1856 unsigned int size = 8 << up->port.regshift;
1858 switch (up->port.iotype) {
1860 if (!up->port.mapbase)
1863 if (up->port.flags & UPF_IOREMAP) {
1864 iounmap(up->port.membase);
1865 up->port.membase = NULL;
1868 release_mem_region(up->port.mapbase, size);
1873 release_region(up->port.iobase, size);
1878 static int serial8250_request_rsa_resource(struct uart_8250_port *up)
1880 unsigned long start = UART_RSA_BASE << up->port.regshift;
1881 unsigned int size = 8 << up->port.regshift;
1884 switch (up->port.iotype) {
1891 start += up->port.iobase;
1892 if (!request_region(start, size, "serial-rsa"))
1900 static void serial8250_release_rsa_resource(struct uart_8250_port *up)
1902 unsigned long offset = UART_RSA_BASE << up->port.regshift;
1903 unsigned int size = 8 << up->port.regshift;
1905 switch (up->port.iotype) {
1911 release_region(up->port.iobase + offset, size);
1916 static void serial8250_release_port(struct uart_port *port)
1918 struct uart_8250_port *up = (struct uart_8250_port *)port;
1920 serial8250_release_std_resource(up);
1921 if (up->port.type == PORT_RSA)
1922 serial8250_release_rsa_resource(up);
1925 static int serial8250_request_port(struct uart_port *port)
1927 struct uart_8250_port *up = (struct uart_8250_port *)port;
1930 ret = serial8250_request_std_resource(up);
1931 if (ret == 0 && up->port.type == PORT_RSA) {
1932 ret = serial8250_request_rsa_resource(up);
1934 serial8250_release_std_resource(up);
1940 static void serial8250_config_port(struct uart_port *port, int flags)
1942 struct uart_8250_port *up = (struct uart_8250_port *)port;
1943 int probeflags = PROBE_ANY;
1947 * Don't probe for MCA ports on non-MCA machines.
1949 if (up->port.flags & UPF_BOOT_ONLYMCA && !MCA_bus)
1953 * Find the region that we can probe for. This in turn
1954 * tells us whether we can probe for the type of port.
1956 ret = serial8250_request_std_resource(up);
1960 ret = serial8250_request_rsa_resource(up);
1962 probeflags &= ~PROBE_RSA;
1964 if (flags & UART_CONFIG_TYPE)
1965 autoconfig(up, probeflags);
1966 if (up->port.type != PORT_UNKNOWN && flags & UART_CONFIG_IRQ)
1969 if (up->port.type != PORT_RSA && probeflags & PROBE_RSA)
1970 serial8250_release_rsa_resource(up);
1971 if (up->port.type == PORT_UNKNOWN)
1972 serial8250_release_std_resource(up);
1976 serial8250_verify_port(struct uart_port *port, struct serial_struct *ser)
1978 if (ser->irq >= NR_IRQS || ser->irq < 0 ||
1979 ser->baud_base < 9600 || ser->type < PORT_UNKNOWN ||
1980 ser->type >= ARRAY_SIZE(uart_config) || ser->type == PORT_CIRRUS ||
1981 ser->type == PORT_STARTECH)
1987 serial8250_type(struct uart_port *port)
1989 int type = port->type;
1991 if (type >= ARRAY_SIZE(uart_config))
1993 return uart_config[type].name;
1996 static struct uart_ops serial8250_pops = {
1997 .tx_empty = serial8250_tx_empty,
1998 .set_mctrl = serial8250_set_mctrl,
1999 .get_mctrl = serial8250_get_mctrl,
2000 .stop_tx = serial8250_stop_tx,
2001 .start_tx = serial8250_start_tx,
2002 .stop_rx = serial8250_stop_rx,
2003 .enable_ms = serial8250_enable_ms,
2004 .break_ctl = serial8250_break_ctl,
2005 .startup = serial8250_startup,
2006 .shutdown = serial8250_shutdown,
2007 .set_termios = serial8250_set_termios,
2008 .pm = serial8250_pm,
2009 .type = serial8250_type,
2010 .release_port = serial8250_release_port,
2011 .request_port = serial8250_request_port,
2012 .config_port = serial8250_config_port,
2013 .verify_port = serial8250_verify_port,
2016 static struct uart_8250_port serial8250_ports[UART_NR];
2018 static void __init serial8250_isa_init_ports(void)
2020 struct uart_8250_port *up;
2021 static int first = 1;
2028 for (i = 0; i < UART_NR; i++) {
2029 struct uart_8250_port *up = &serial8250_ports[i];
2032 spin_lock_init(&up->port.lock);
2034 init_timer(&up->timer);
2035 up->timer.function = serial8250_timeout;
2038 * ALPHA_KLUDGE_MCR needs to be killed.
2040 up->mcr_mask = ~ALPHA_KLUDGE_MCR;
2041 up->mcr_force = ALPHA_KLUDGE_MCR;
2043 up->port.ops = &serial8250_pops;
2046 for (i = 0, up = serial8250_ports; i < ARRAY_SIZE(old_serial_port);
2048 up->port.iobase = old_serial_port[i].port;
2049 up->port.irq = irq_canonicalize(old_serial_port[i].irq);
2050 up->port.uartclk = old_serial_port[i].baud_base * 16;
2051 up->port.flags = old_serial_port[i].flags;
2052 up->port.hub6 = old_serial_port[i].hub6;
2053 up->port.membase = old_serial_port[i].iomem_base;
2054 up->port.iotype = old_serial_port[i].io_type;
2055 up->port.regshift = old_serial_port[i].iomem_reg_shift;
2057 up->port.flags |= UPF_SHARE_IRQ;
2062 serial8250_register_ports(struct uart_driver *drv, struct device *dev)
2066 serial8250_isa_init_ports();
2068 for (i = 0; i < UART_NR; i++) {
2069 struct uart_8250_port *up = &serial8250_ports[i];
2072 uart_add_one_port(drv, &up->port);
2076 #ifdef CONFIG_SERIAL_8250_CONSOLE
2078 #define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE)
2081 * Wait for transmitter & holding register to empty
2083 static inline void wait_for_xmitr(struct uart_8250_port *up)
2085 unsigned int status, tmout = 10000;
2087 /* Wait up to 10ms for the character(s) to be sent. */
2089 status = serial_in(up, UART_LSR);
2091 if (status & UART_LSR_BI)
2092 up->lsr_break_flag = UART_LSR_BI;
2097 } while ((status & BOTH_EMPTY) != BOTH_EMPTY);
2099 /* Wait up to 1s for flow control if necessary */
2100 if (up->port.flags & UPF_CONS_FLOW) {
2103 ((serial_in(up, UART_MSR) & UART_MSR_CTS) == 0))
2109 * Print a string to the serial port trying not to disturb
2110 * any possible real use of the port...
2112 * The console_lock must be held when we get here.
2115 serial8250_console_write(struct console *co, const char *s, unsigned int count)
2117 struct uart_8250_port *up = &serial8250_ports[co->index];
2122 * First save the UER then disable the interrupts
2124 ier = serial_in(up, UART_IER);
2126 if (up->capabilities & UART_CAP_UUE)
2127 serial_out(up, UART_IER, UART_IER_UUE);
2129 serial_out(up, UART_IER, 0);
2132 * Now, do each character
2134 for (i = 0; i < count; i++, s++) {
2138 * Send the character out.
2139 * If a LF, also do CR...
2141 serial_out(up, UART_TX, *s);
2144 serial_out(up, UART_TX, 13);
2149 * Finally, wait for transmitter to become empty
2150 * and restore the IER
2153 serial_out(up, UART_IER, ier);
2156 static int serial8250_console_setup(struct console *co, char *options)
2158 struct uart_port *port;
2165 * Check whether an invalid uart number has been specified, and
2166 * if so, search for the first available port that does have
2169 if (co->index >= UART_NR)
2171 port = &serial8250_ports[co->index].port;
2172 if (!port->iobase && !port->membase)
2176 uart_parse_options(options, &baud, &parity, &bits, &flow);
2178 return uart_set_options(port, co, baud, parity, bits, flow);
2181 static struct uart_driver serial8250_reg;
2182 static struct console serial8250_console = {
2184 .write = serial8250_console_write,
2185 .device = uart_console_device,
2186 .setup = serial8250_console_setup,
2187 .flags = CON_PRINTBUFFER,
2189 .data = &serial8250_reg,
2192 static int __init serial8250_console_init(void)
2194 serial8250_isa_init_ports();
2195 register_console(&serial8250_console);
2198 console_initcall(serial8250_console_init);
2200 static int __init find_port(struct uart_port *p)
2203 struct uart_port *port;
2205 for (line = 0; line < UART_NR; line++) {
2206 port = &serial8250_ports[line].port;
2207 if (p->iotype == port->iotype &&
2208 p->iobase == port->iobase &&
2209 p->membase == port->membase)
2215 int __init serial8250_start_console(struct uart_port *port, char *options)
2219 line = find_port(port);
2223 add_preferred_console("ttyS", line, options);
2224 printk("Adding console on ttyS%d at %s 0x%lx (options '%s')\n",
2225 line, port->iotype == UPIO_MEM ? "MMIO" : "I/O port",
2226 port->iotype == UPIO_MEM ? (unsigned long) port->mapbase :
2227 (unsigned long) port->iobase, options);
2228 if (!(serial8250_console.flags & CON_ENABLED)) {
2229 serial8250_console.flags &= ~CON_PRINTBUFFER;
2230 register_console(&serial8250_console);
2235 #define SERIAL8250_CONSOLE &serial8250_console
2237 #define SERIAL8250_CONSOLE NULL
2240 static struct uart_driver serial8250_reg = {
2241 .owner = THIS_MODULE,
2242 .driver_name = "serial",
2243 .devfs_name = "tts/",
2248 .cons = SERIAL8250_CONSOLE,
2251 int __init early_serial_setup(struct uart_port *port)
2253 if (port->line >= ARRAY_SIZE(serial8250_ports))
2256 serial8250_isa_init_ports();
2257 serial8250_ports[port->line].port = *port;
2258 serial8250_ports[port->line].port.ops = &serial8250_pops;
2263 * serial8250_suspend_port - suspend one serial port
2264 * @line: serial line number
2265 * @level: the level of port suspension, as per uart_suspend_port
2267 * Suspend one serial port.
2269 void serial8250_suspend_port(int line)
2271 uart_suspend_port(&serial8250_reg, &serial8250_ports[line].port);
2275 * serial8250_resume_port - resume one serial port
2276 * @line: serial line number
2277 * @level: the level of port resumption, as per uart_resume_port
2279 * Resume one serial port.
2281 void serial8250_resume_port(int line)
2283 uart_resume_port(&serial8250_reg, &serial8250_ports[line].port);
2287 * Register a set of serial devices attached to a platform device. The
2288 * list is terminated with a zero flags entry, which means we expect
2289 * all entries to have at least UPF_BOOT_AUTOCONF set.
2291 static int __devinit serial8250_probe(struct device *dev)
2293 struct plat_serial8250_port *p = dev->platform_data;
2294 struct uart_port port;
2296 memset(&port, 0, sizeof(struct uart_port));
2298 for (; p && p->flags != 0; p++) {
2299 port.iobase = p->iobase;
2300 port.membase = p->membase;
2302 port.uartclk = p->uartclk;
2303 port.regshift = p->regshift;
2304 port.iotype = p->iotype;
2305 port.flags = p->flags;
2306 port.mapbase = p->mapbase;
2309 port.flags |= UPF_SHARE_IRQ;
2310 serial8250_register_port(&port);
2316 * Remove serial ports registered against a platform device.
2318 static int __devexit serial8250_remove(struct device *dev)
2322 for (i = 0; i < UART_NR; i++) {
2323 struct uart_8250_port *up = &serial8250_ports[i];
2325 if (up->port.dev == dev)
2326 serial8250_unregister_port(i);
2331 static int serial8250_suspend(struct device *dev, pm_message_t state, u32 level)
2335 if (level != SUSPEND_DISABLE)
2338 for (i = 0; i < UART_NR; i++) {
2339 struct uart_8250_port *up = &serial8250_ports[i];
2341 if (up->port.type != PORT_UNKNOWN && up->port.dev == dev)
2342 uart_suspend_port(&serial8250_reg, &up->port);
2348 static int serial8250_resume(struct device *dev, u32 level)
2352 if (level != RESUME_ENABLE)
2355 for (i = 0; i < UART_NR; i++) {
2356 struct uart_8250_port *up = &serial8250_ports[i];
2358 if (up->port.type != PORT_UNKNOWN && up->port.dev == dev)
2359 uart_resume_port(&serial8250_reg, &up->port);
2365 static struct device_driver serial8250_isa_driver = {
2366 .name = "serial8250",
2367 .bus = &platform_bus_type,
2368 .probe = serial8250_probe,
2369 .remove = __devexit_p(serial8250_remove),
2370 .suspend = serial8250_suspend,
2371 .resume = serial8250_resume,
2375 * This "device" covers _all_ ISA 8250-compatible serial devices listed
2376 * in the table in include/asm/serial.h
2378 static struct platform_device *serial8250_isa_devs;
2381 * serial8250_register_port and serial8250_unregister_port allows for
2382 * 16x50 serial ports to be configured at run-time, to support PCMCIA
2383 * modems and PCI multiport cards.
2385 static DECLARE_MUTEX(serial_sem);
2387 static struct uart_8250_port *serial8250_find_match_or_unused(struct uart_port *port)
2392 * First, find a port entry which matches.
2394 for (i = 0; i < UART_NR; i++)
2395 if (uart_match_port(&serial8250_ports[i].port, port))
2396 return &serial8250_ports[i];
2399 * We didn't find a matching entry, so look for the first
2400 * free entry. We look for one which hasn't been previously
2401 * used (indicated by zero iobase).
2403 for (i = 0; i < UART_NR; i++)
2404 if (serial8250_ports[i].port.type == PORT_UNKNOWN &&
2405 serial8250_ports[i].port.iobase == 0)
2406 return &serial8250_ports[i];
2409 * That also failed. Last resort is to find any entry which
2410 * doesn't have a real port associated with it.
2412 for (i = 0; i < UART_NR; i++)
2413 if (serial8250_ports[i].port.type == PORT_UNKNOWN)
2414 return &serial8250_ports[i];
2420 * serial8250_register_port - register a serial port
2421 * @port: serial port template
2423 * Configure the serial port specified by the request. If the
2424 * port exists and is in use, it is hung up and unregistered
2427 * The port is then probed and if necessary the IRQ is autodetected
2428 * If this fails an error is returned.
2430 * On success the port is ready to use and the line number is returned.
2432 int serial8250_register_port(struct uart_port *port)
2434 struct uart_8250_port *uart;
2437 if (port->uartclk == 0)
2442 uart = serial8250_find_match_or_unused(port);
2444 uart_remove_one_port(&serial8250_reg, &uart->port);
2446 uart->port.iobase = port->iobase;
2447 uart->port.membase = port->membase;
2448 uart->port.irq = port->irq;
2449 uart->port.uartclk = port->uartclk;
2450 uart->port.fifosize = port->fifosize;
2451 uart->port.regshift = port->regshift;
2452 uart->port.iotype = port->iotype;
2453 uart->port.flags = port->flags | UPF_BOOT_AUTOCONF;
2454 uart->port.mapbase = port->mapbase;
2456 uart->port.dev = port->dev;
2458 ret = uart_add_one_port(&serial8250_reg, &uart->port);
2460 ret = uart->port.line;
2466 EXPORT_SYMBOL(serial8250_register_port);
2469 * serial8250_unregister_port - remove a 16x50 serial port at runtime
2470 * @line: serial line number
2472 * Remove one serial port. This may not be called from interrupt
2473 * context. We hand the port back to the our control.
2475 void serial8250_unregister_port(int line)
2477 struct uart_8250_port *uart = &serial8250_ports[line];
2480 uart_remove_one_port(&serial8250_reg, &uart->port);
2481 if (serial8250_isa_devs) {
2482 uart->port.flags &= ~UPF_BOOT_AUTOCONF;
2483 uart->port.type = PORT_UNKNOWN;
2484 uart->port.dev = &serial8250_isa_devs->dev;
2485 uart_add_one_port(&serial8250_reg, &uart->port);
2487 uart->port.dev = NULL;
2491 EXPORT_SYMBOL(serial8250_unregister_port);
2493 static int __init serial8250_init(void)
2497 printk(KERN_INFO "Serial: 8250/16550 driver $Revision: 1.90 $ "
2498 "%d ports, IRQ sharing %sabled\n", (int) UART_NR,
2499 share_irqs ? "en" : "dis");
2501 for (i = 0; i < NR_IRQS; i++)
2502 spin_lock_init(&irq_lists[i].lock);
2504 ret = uart_register_driver(&serial8250_reg);
2508 serial8250_isa_devs = platform_device_register_simple("serial8250",
2510 if (IS_ERR(serial8250_isa_devs)) {
2511 ret = PTR_ERR(serial8250_isa_devs);
2515 serial8250_register_ports(&serial8250_reg, &serial8250_isa_devs->dev);
2517 ret = driver_register(&serial8250_isa_driver);
2521 platform_device_unregister(serial8250_isa_devs);
2523 uart_unregister_driver(&serial8250_reg);
2528 static void __exit serial8250_exit(void)
2530 struct platform_device *isa_dev = serial8250_isa_devs;
2533 * This tells serial8250_unregister_port() not to re-register
2534 * the ports (thereby making serial8250_isa_driver permanently
2537 serial8250_isa_devs = NULL;
2539 driver_unregister(&serial8250_isa_driver);
2540 platform_device_unregister(isa_dev);
2542 uart_unregister_driver(&serial8250_reg);
2545 module_init(serial8250_init);
2546 module_exit(serial8250_exit);
2548 EXPORT_SYMBOL(serial8250_suspend_port);
2549 EXPORT_SYMBOL(serial8250_resume_port);
2551 MODULE_LICENSE("GPL");
2552 MODULE_DESCRIPTION("Generic 8250/16x50 serial driver $Revision: 1.90 $");
2554 module_param(share_irqs, uint, 0644);
2555 MODULE_PARM_DESC(share_irqs, "Share IRQs with other non-8250/16x50 devices"
2558 #ifdef CONFIG_SERIAL_8250_RSA
2559 module_param_array(probe_rsa, ulong, &probe_rsa_count, 0444);
2560 MODULE_PARM_DESC(probe_rsa, "Probe I/O ports for RSA");
2562 MODULE_ALIAS_CHARDEV_MAJOR(TTY_MAJOR);
2565 * register_serial - configure a 16x50 serial port at runtime
2566 * @req: request structure
2568 * Configure the serial port specified by the request. If the
2569 * port exists and is in use an error is returned. If the port
2570 * is not currently in the table it is added.
2572 * The port is then probed and if necessary the IRQ is autodetected
2573 * If this fails an error is returned.
2575 * On success the port is ready to use and the line number is returned.
2577 * Note: this function is deprecated - use serial8250_register_port
2580 int register_serial(struct serial_struct *req)
2582 struct uart_port port;
2584 port.iobase = req->port;
2585 port.membase = req->iomem_base;
2586 port.irq = req->irq;
2587 port.uartclk = req->baud_base * 16;
2588 port.fifosize = req->xmit_fifo_size;
2589 port.regshift = req->iomem_reg_shift;
2590 port.iotype = req->io_type;
2591 port.flags = req->flags | UPF_BOOT_AUTOCONF;
2592 port.mapbase = req->iomap_base;
2596 port.flags |= UPF_SHARE_IRQ;
2598 if (HIGH_BITS_OFFSET)
2599 port.iobase |= (long) req->port_high << HIGH_BITS_OFFSET;
2602 * If a clock rate wasn't specified by the low level driver, then
2603 * default to the standard clock rate. This should be 115200 (*16)
2604 * and should not depend on the architecture's BASE_BAUD definition.
2605 * However, since this API will be deprecated, it's probably a
2606 * better idea to convert the drivers to use the new API
2607 * (serial8250_register_port and serial8250_unregister_port).
2609 if (port.uartclk == 0) {
2611 "Serial: registering port at [%08x,%08lx,%p] irq %d with zero baud_base\n",
2612 port.iobase, port.mapbase, port.membase, port.irq);
2613 printk(KERN_WARNING "Serial: see %s:%d for more information\n",
2614 __FILE__, __LINE__);
2618 * Fix it up for now, but this is only a temporary measure.
2620 port.uartclk = BASE_BAUD * 16;
2623 return serial8250_register_port(&port);
2625 EXPORT_SYMBOL(register_serial);
2628 * unregister_serial - remove a 16x50 serial port at runtime
2629 * @line: serial line number
2631 * Remove one serial port. This may not be called from interrupt
2632 * context. We hand the port back to our local PM control.
2634 * Note: this function is deprecated - use serial8250_unregister_port
2637 void unregister_serial(int line)
2639 serial8250_unregister_port(line);
2641 EXPORT_SYMBOL(unregister_serial);