2 * linux/drivers/char/8250.c
4 * Driver for 8250/16550-type serial ports
6 * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
8 * Copyright (C) 2001 Russell King.
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
15 * $Id: 8250.c,v 1.90 2002/07/28 10:03:27 rmk Exp $
17 * A note about mapbase / membase
19 * mapbase is the physical address of the IO port.
20 * membase is an 'ioremapped' cookie.
22 #include <linux/config.h>
24 #if defined(CONFIG_SERIAL_8250_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
28 #include <linux/module.h>
29 #include <linux/moduleparam.h>
30 #include <linux/ioport.h>
31 #include <linux/init.h>
32 #include <linux/console.h>
33 #include <linux/sysrq.h>
34 #include <linux/mca.h>
35 #include <linux/delay.h>
36 #include <linux/platform_device.h>
37 #include <linux/tty.h>
38 #include <linux/tty_flip.h>
39 #include <linux/serial_reg.h>
40 #include <linux/serial_core.h>
41 #include <linux/serial.h>
42 #include <linux/serial_8250.h>
51 * share_irqs - whether we pass SA_SHIRQ to request_irq(). This option
52 * is unsafe when used on edge-triggered interrupts.
54 static unsigned int share_irqs = SERIAL8250_SHARE_IRQS;
60 #define DEBUG_AUTOCONF(fmt...) printk(fmt)
62 #define DEBUG_AUTOCONF(fmt...) do { } while (0)
66 #define DEBUG_INTR(fmt...) printk(fmt)
68 #define DEBUG_INTR(fmt...) do { } while (0)
71 #define PASS_LIMIT 256
74 * We default to IRQ0 for the "no irq" hack. Some
75 * machine types want others as well - they're free
76 * to redefine this in their header file.
78 #define is_real_interrupt(irq) ((irq) != 0)
80 #ifdef CONFIG_SERIAL_8250_DETECT_IRQ
81 #define CONFIG_SERIAL_DETECT_IRQ 1
83 #ifdef CONFIG_SERIAL_8250_MANY_PORTS
84 #define CONFIG_SERIAL_MANY_PORTS 1
88 * HUB6 is always on. This will be removed once the header
89 * files have been cleaned.
93 #include <asm/serial.h>
96 * SERIAL_PORT_DFNS tells us about built-in ports that have no
97 * standard enumeration mechanism. Platforms that can find all
98 * serial ports via mechanisms like ACPI or PCI need not supply it.
100 #ifndef SERIAL_PORT_DFNS
101 #define SERIAL_PORT_DFNS
104 static struct old_serial_port old_serial_port[] = {
105 SERIAL_PORT_DFNS /* defined in asm/serial.h */
108 #define UART_NR CONFIG_SERIAL_8250_NR_UARTS
110 #ifdef CONFIG_SERIAL_8250_RSA
112 #define PORT_RSA_MAX 4
113 static unsigned long probe_rsa[PORT_RSA_MAX];
114 static unsigned int probe_rsa_count;
115 #endif /* CONFIG_SERIAL_8250_RSA */
117 struct uart_8250_port {
118 struct uart_port port;
119 struct timer_list timer; /* "no irq" timer */
120 struct list_head list; /* ports on this IRQ */
121 unsigned short capabilities; /* port capabilities */
122 unsigned short bugs; /* port bugs */
123 unsigned int tx_loadsz; /* transmit fifo load size */
128 unsigned char mcr_mask; /* mask of user bits */
129 unsigned char mcr_force; /* mask of forced bits */
130 unsigned char lsr_break_flag;
133 * We provide a per-port pm hook.
135 void (*pm)(struct uart_port *port,
136 unsigned int state, unsigned int old);
141 struct list_head *head;
144 static struct irq_info irq_lists[NR_IRQS];
147 * Here we define the default xmit fifo size used for each type of UART.
149 static const struct serial8250_config uart_config[] = {
174 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
175 .flags = UART_CAP_FIFO,
186 .flags = UART_CAP_FIFO | UART_CAP_EFR | UART_CAP_SLEEP,
192 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_01 |
194 .flags = UART_CAP_FIFO | UART_CAP_EFR | UART_CAP_SLEEP,
200 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10 |
202 .flags = UART_CAP_FIFO | UART_CAP_SLEEP | UART_CAP_AFE,
210 .name = "16C950/954",
213 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
214 .flags = UART_CAP_FIFO,
220 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_01 |
222 .flags = UART_CAP_FIFO | UART_CAP_EFR | UART_CAP_SLEEP,
228 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
229 .flags = UART_CAP_FIFO | UART_CAP_EFR | UART_CAP_SLEEP,
235 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_11,
236 .flags = UART_CAP_FIFO,
242 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
243 .flags = UART_CAP_FIFO | UART_NATSEMI,
249 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
250 .flags = UART_CAP_FIFO | UART_CAP_UUE,
254 #ifdef CONFIG_SERIAL_8250_AU1X00
256 /* Au1x00 UART hardware has a weird register layout */
257 static const u8 au_io_in_map[] = {
267 static const u8 au_io_out_map[] = {
275 /* sane hardware needs no mapping */
276 static inline int map_8250_in_reg(struct uart_8250_port *up, int offset)
278 if (up->port.iotype != UPIO_AU)
280 return au_io_in_map[offset];
283 static inline int map_8250_out_reg(struct uart_8250_port *up, int offset)
285 if (up->port.iotype != UPIO_AU)
287 return au_io_out_map[offset];
292 /* sane hardware needs no mapping */
293 #define map_8250_in_reg(up, offset) (offset)
294 #define map_8250_out_reg(up, offset) (offset)
298 static _INLINE_ unsigned int serial_in(struct uart_8250_port *up, int offset)
300 offset = map_8250_in_reg(up, offset) << up->port.regshift;
302 switch (up->port.iotype) {
304 outb(up->port.hub6 - 1 + offset, up->port.iobase);
305 return inb(up->port.iobase + 1);
308 return readb(up->port.membase + offset);
311 return readl(up->port.membase + offset);
313 #ifdef CONFIG_SERIAL_8250_AU1X00
315 return __raw_readl(up->port.membase + offset);
319 return inb(up->port.iobase + offset);
324 serial_out(struct uart_8250_port *up, int offset, int value)
326 offset = map_8250_out_reg(up, offset) << up->port.regshift;
328 switch (up->port.iotype) {
330 outb(up->port.hub6 - 1 + offset, up->port.iobase);
331 outb(value, up->port.iobase + 1);
335 writeb(value, up->port.membase + offset);
339 writel(value, up->port.membase + offset);
342 #ifdef CONFIG_SERIAL_8250_AU1X00
344 __raw_writel(value, up->port.membase + offset);
349 outb(value, up->port.iobase + offset);
354 * We used to support using pause I/O for certain machines. We
355 * haven't supported this for a while, but just in case it's badly
356 * needed for certain old 386 machines, I've left these #define's
359 #define serial_inp(up, offset) serial_in(up, offset)
360 #define serial_outp(up, offset, value) serial_out(up, offset, value)
366 static void serial_icr_write(struct uart_8250_port *up, int offset, int value)
368 serial_out(up, UART_SCR, offset);
369 serial_out(up, UART_ICR, value);
372 static unsigned int serial_icr_read(struct uart_8250_port *up, int offset)
376 serial_icr_write(up, UART_ACR, up->acr | UART_ACR_ICRRD);
377 serial_out(up, UART_SCR, offset);
378 value = serial_in(up, UART_ICR);
379 serial_icr_write(up, UART_ACR, up->acr);
387 static inline void serial8250_clear_fifos(struct uart_8250_port *p)
389 if (p->capabilities & UART_CAP_FIFO) {
390 serial_outp(p, UART_FCR, UART_FCR_ENABLE_FIFO);
391 serial_outp(p, UART_FCR, UART_FCR_ENABLE_FIFO |
392 UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT);
393 serial_outp(p, UART_FCR, 0);
398 * IER sleep support. UARTs which have EFRs need the "extended
399 * capability" bit enabled. Note that on XR16C850s, we need to
400 * reset LCR to write to IER.
402 static inline void serial8250_set_sleep(struct uart_8250_port *p, int sleep)
404 if (p->capabilities & UART_CAP_SLEEP) {
405 if (p->capabilities & UART_CAP_EFR) {
406 serial_outp(p, UART_LCR, 0xBF);
407 serial_outp(p, UART_EFR, UART_EFR_ECB);
408 serial_outp(p, UART_LCR, 0);
410 serial_outp(p, UART_IER, sleep ? UART_IERX_SLEEP : 0);
411 if (p->capabilities & UART_CAP_EFR) {
412 serial_outp(p, UART_LCR, 0xBF);
413 serial_outp(p, UART_EFR, 0);
414 serial_outp(p, UART_LCR, 0);
419 #ifdef CONFIG_SERIAL_8250_RSA
421 * Attempts to turn on the RSA FIFO. Returns zero on failure.
422 * We set the port uart clock rate if we succeed.
424 static int __enable_rsa(struct uart_8250_port *up)
429 mode = serial_inp(up, UART_RSA_MSR);
430 result = mode & UART_RSA_MSR_FIFO;
433 serial_outp(up, UART_RSA_MSR, mode | UART_RSA_MSR_FIFO);
434 mode = serial_inp(up, UART_RSA_MSR);
435 result = mode & UART_RSA_MSR_FIFO;
439 up->port.uartclk = SERIAL_RSA_BAUD_BASE * 16;
444 static void enable_rsa(struct uart_8250_port *up)
446 if (up->port.type == PORT_RSA) {
447 if (up->port.uartclk != SERIAL_RSA_BAUD_BASE * 16) {
448 spin_lock_irq(&up->port.lock);
450 spin_unlock_irq(&up->port.lock);
452 if (up->port.uartclk == SERIAL_RSA_BAUD_BASE * 16)
453 serial_outp(up, UART_RSA_FRR, 0);
458 * Attempts to turn off the RSA FIFO. Returns zero on failure.
459 * It is unknown why interrupts were disabled in here. However,
460 * the caller is expected to preserve this behaviour by grabbing
461 * the spinlock before calling this function.
463 static void disable_rsa(struct uart_8250_port *up)
468 if (up->port.type == PORT_RSA &&
469 up->port.uartclk == SERIAL_RSA_BAUD_BASE * 16) {
470 spin_lock_irq(&up->port.lock);
472 mode = serial_inp(up, UART_RSA_MSR);
473 result = !(mode & UART_RSA_MSR_FIFO);
476 serial_outp(up, UART_RSA_MSR, mode & ~UART_RSA_MSR_FIFO);
477 mode = serial_inp(up, UART_RSA_MSR);
478 result = !(mode & UART_RSA_MSR_FIFO);
482 up->port.uartclk = SERIAL_RSA_BAUD_BASE_LO * 16;
483 spin_unlock_irq(&up->port.lock);
486 #endif /* CONFIG_SERIAL_8250_RSA */
489 * This is a quickie test to see how big the FIFO is.
490 * It doesn't work at all the time, more's the pity.
492 static int size_fifo(struct uart_8250_port *up)
494 unsigned char old_fcr, old_mcr, old_dll, old_dlm, old_lcr;
497 old_lcr = serial_inp(up, UART_LCR);
498 serial_outp(up, UART_LCR, 0);
499 old_fcr = serial_inp(up, UART_FCR);
500 old_mcr = serial_inp(up, UART_MCR);
501 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO |
502 UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT);
503 serial_outp(up, UART_MCR, UART_MCR_LOOP);
504 serial_outp(up, UART_LCR, UART_LCR_DLAB);
505 old_dll = serial_inp(up, UART_DLL);
506 old_dlm = serial_inp(up, UART_DLM);
507 serial_outp(up, UART_DLL, 0x01);
508 serial_outp(up, UART_DLM, 0x00);
509 serial_outp(up, UART_LCR, 0x03);
510 for (count = 0; count < 256; count++)
511 serial_outp(up, UART_TX, count);
512 mdelay(20);/* FIXME - schedule_timeout */
513 for (count = 0; (serial_inp(up, UART_LSR) & UART_LSR_DR) &&
514 (count < 256); count++)
515 serial_inp(up, UART_RX);
516 serial_outp(up, UART_FCR, old_fcr);
517 serial_outp(up, UART_MCR, old_mcr);
518 serial_outp(up, UART_LCR, UART_LCR_DLAB);
519 serial_outp(up, UART_DLL, old_dll);
520 serial_outp(up, UART_DLM, old_dlm);
521 serial_outp(up, UART_LCR, old_lcr);
527 * Read UART ID using the divisor method - set DLL and DLM to zero
528 * and the revision will be in DLL and device type in DLM. We
529 * preserve the device state across this.
531 static unsigned int autoconfig_read_divisor_id(struct uart_8250_port *p)
533 unsigned char old_dll, old_dlm, old_lcr;
536 old_lcr = serial_inp(p, UART_LCR);
537 serial_outp(p, UART_LCR, UART_LCR_DLAB);
539 old_dll = serial_inp(p, UART_DLL);
540 old_dlm = serial_inp(p, UART_DLM);
542 serial_outp(p, UART_DLL, 0);
543 serial_outp(p, UART_DLM, 0);
545 id = serial_inp(p, UART_DLL) | serial_inp(p, UART_DLM) << 8;
547 serial_outp(p, UART_DLL, old_dll);
548 serial_outp(p, UART_DLM, old_dlm);
549 serial_outp(p, UART_LCR, old_lcr);
555 * This is a helper routine to autodetect StarTech/Exar/Oxsemi UART's.
556 * When this function is called we know it is at least a StarTech
557 * 16650 V2, but it might be one of several StarTech UARTs, or one of
558 * its clones. (We treat the broken original StarTech 16650 V1 as a
559 * 16550, and why not? Startech doesn't seem to even acknowledge its
562 * What evil have men's minds wrought...
564 static void autoconfig_has_efr(struct uart_8250_port *up)
566 unsigned int id1, id2, id3, rev;
569 * Everything with an EFR has SLEEP
571 up->capabilities |= UART_CAP_EFR | UART_CAP_SLEEP;
574 * First we check to see if it's an Oxford Semiconductor UART.
576 * If we have to do this here because some non-National
577 * Semiconductor clone chips lock up if you try writing to the
578 * LSR register (which serial_icr_read does)
582 * Check for Oxford Semiconductor 16C950.
584 * EFR [4] must be set else this test fails.
586 * This shouldn't be necessary, but Mike Hudson (Exoray@isys.ca)
587 * claims that it's needed for 952 dual UART's (which are not
588 * recommended for new designs).
591 serial_out(up, UART_LCR, 0xBF);
592 serial_out(up, UART_EFR, UART_EFR_ECB);
593 serial_out(up, UART_LCR, 0x00);
594 id1 = serial_icr_read(up, UART_ID1);
595 id2 = serial_icr_read(up, UART_ID2);
596 id3 = serial_icr_read(up, UART_ID3);
597 rev = serial_icr_read(up, UART_REV);
599 DEBUG_AUTOCONF("950id=%02x:%02x:%02x:%02x ", id1, id2, id3, rev);
601 if (id1 == 0x16 && id2 == 0xC9 &&
602 (id3 == 0x50 || id3 == 0x52 || id3 == 0x54)) {
603 up->port.type = PORT_16C950;
606 * Enable work around for the Oxford Semiconductor 952 rev B
607 * chip which causes it to seriously miscalculate baud rates
610 if (id3 == 0x52 && rev == 0x01)
611 up->bugs |= UART_BUG_QUOT;
616 * We check for a XR16C850 by setting DLL and DLM to 0, and then
617 * reading back DLL and DLM. The chip type depends on the DLM
619 * 0x10 - XR16C850 and the DLL contains the chip revision.
623 id1 = autoconfig_read_divisor_id(up);
624 DEBUG_AUTOCONF("850id=%04x ", id1);
627 if (id2 == 0x10 || id2 == 0x12 || id2 == 0x14) {
628 up->port.type = PORT_16850;
633 * It wasn't an XR16C850.
635 * We distinguish between the '654 and the '650 by counting
636 * how many bytes are in the FIFO. I'm using this for now,
637 * since that's the technique that was sent to me in the
638 * serial driver update, but I'm not convinced this works.
639 * I've had problems doing this in the past. -TYT
641 if (size_fifo(up) == 64)
642 up->port.type = PORT_16654;
644 up->port.type = PORT_16650V2;
648 * We detected a chip without a FIFO. Only two fall into
649 * this category - the original 8250 and the 16450. The
650 * 16450 has a scratch register (accessible with LCR=0)
652 static void autoconfig_8250(struct uart_8250_port *up)
654 unsigned char scratch, status1, status2;
656 up->port.type = PORT_8250;
658 scratch = serial_in(up, UART_SCR);
659 serial_outp(up, UART_SCR, 0xa5);
660 status1 = serial_in(up, UART_SCR);
661 serial_outp(up, UART_SCR, 0x5a);
662 status2 = serial_in(up, UART_SCR);
663 serial_outp(up, UART_SCR, scratch);
665 if (status1 == 0xa5 && status2 == 0x5a)
666 up->port.type = PORT_16450;
669 static int broken_efr(struct uart_8250_port *up)
672 * Exar ST16C2550 "A2" devices incorrectly detect as
673 * having an EFR, and report an ID of 0x0201. See
674 * http://www.exar.com/info.php?pdf=dan180_oct2004.pdf
676 if (autoconfig_read_divisor_id(up) == 0x0201 && size_fifo(up) == 16)
683 * We know that the chip has FIFOs. Does it have an EFR? The
684 * EFR is located in the same register position as the IIR and
685 * we know the top two bits of the IIR are currently set. The
686 * EFR should contain zero. Try to read the EFR.
688 static void autoconfig_16550a(struct uart_8250_port *up)
690 unsigned char status1, status2;
691 unsigned int iersave;
693 up->port.type = PORT_16550A;
694 up->capabilities |= UART_CAP_FIFO;
697 * Check for presence of the EFR when DLAB is set.
698 * Only ST16C650V1 UARTs pass this test.
700 serial_outp(up, UART_LCR, UART_LCR_DLAB);
701 if (serial_in(up, UART_EFR) == 0) {
702 serial_outp(up, UART_EFR, 0xA8);
703 if (serial_in(up, UART_EFR) != 0) {
704 DEBUG_AUTOCONF("EFRv1 ");
705 up->port.type = PORT_16650;
706 up->capabilities |= UART_CAP_EFR | UART_CAP_SLEEP;
708 DEBUG_AUTOCONF("Motorola 8xxx DUART ");
710 serial_outp(up, UART_EFR, 0);
715 * Maybe it requires 0xbf to be written to the LCR.
716 * (other ST16C650V2 UARTs, TI16C752A, etc)
718 serial_outp(up, UART_LCR, 0xBF);
719 if (serial_in(up, UART_EFR) == 0 && !broken_efr(up)) {
720 DEBUG_AUTOCONF("EFRv2 ");
721 autoconfig_has_efr(up);
726 * Check for a National Semiconductor SuperIO chip.
727 * Attempt to switch to bank 2, read the value of the LOOP bit
728 * from EXCR1. Switch back to bank 0, change it in MCR. Then
729 * switch back to bank 2, read it from EXCR1 again and check
730 * it's changed. If so, set baud_base in EXCR2 to 921600. -- dwmw2
732 serial_outp(up, UART_LCR, 0);
733 status1 = serial_in(up, UART_MCR);
734 serial_outp(up, UART_LCR, 0xE0);
735 status2 = serial_in(up, 0x02); /* EXCR1 */
737 if (!((status2 ^ status1) & UART_MCR_LOOP)) {
738 serial_outp(up, UART_LCR, 0);
739 serial_outp(up, UART_MCR, status1 ^ UART_MCR_LOOP);
740 serial_outp(up, UART_LCR, 0xE0);
741 status2 = serial_in(up, 0x02); /* EXCR1 */
742 serial_outp(up, UART_LCR, 0);
743 serial_outp(up, UART_MCR, status1);
745 if ((status2 ^ status1) & UART_MCR_LOOP) {
748 serial_outp(up, UART_LCR, 0xE0);
750 quot = serial_inp(up, UART_DLM) << 8;
751 quot += serial_inp(up, UART_DLL);
754 status1 = serial_in(up, 0x04); /* EXCR1 */
755 status1 &= ~0xB0; /* Disable LOCK, mask out PRESL[01] */
756 status1 |= 0x10; /* 1.625 divisor for baud_base --> 921600 */
757 serial_outp(up, 0x04, status1);
759 serial_outp(up, UART_DLL, quot & 0xff);
760 serial_outp(up, UART_DLM, quot >> 8);
762 serial_outp(up, UART_LCR, 0);
764 up->port.uartclk = 921600*16;
765 up->port.type = PORT_NS16550A;
766 up->capabilities |= UART_NATSEMI;
772 * No EFR. Try to detect a TI16750, which only sets bit 5 of
773 * the IIR when 64 byte FIFO mode is enabled when DLAB is set.
774 * Try setting it with and without DLAB set. Cheap clones
775 * set bit 5 without DLAB set.
777 serial_outp(up, UART_LCR, 0);
778 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO | UART_FCR7_64BYTE);
779 status1 = serial_in(up, UART_IIR) >> 5;
780 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
781 serial_outp(up, UART_LCR, UART_LCR_DLAB);
782 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO | UART_FCR7_64BYTE);
783 status2 = serial_in(up, UART_IIR) >> 5;
784 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
785 serial_outp(up, UART_LCR, 0);
787 DEBUG_AUTOCONF("iir1=%d iir2=%d ", status1, status2);
789 if (status1 == 6 && status2 == 7) {
790 up->port.type = PORT_16750;
791 up->capabilities |= UART_CAP_AFE | UART_CAP_SLEEP;
796 * Try writing and reading the UART_IER_UUE bit (b6).
797 * If it works, this is probably one of the Xscale platform's
799 * We're going to explicitly set the UUE bit to 0 before
800 * trying to write and read a 1 just to make sure it's not
801 * already a 1 and maybe locked there before we even start start.
803 iersave = serial_in(up, UART_IER);
804 serial_outp(up, UART_IER, iersave & ~UART_IER_UUE);
805 if (!(serial_in(up, UART_IER) & UART_IER_UUE)) {
807 * OK it's in a known zero state, try writing and reading
808 * without disturbing the current state of the other bits.
810 serial_outp(up, UART_IER, iersave | UART_IER_UUE);
811 if (serial_in(up, UART_IER) & UART_IER_UUE) {
814 * We'll leave the UART_IER_UUE bit set to 1 (enabled).
816 DEBUG_AUTOCONF("Xscale ");
817 up->port.type = PORT_XSCALE;
818 up->capabilities |= UART_CAP_UUE;
823 * If we got here we couldn't force the IER_UUE bit to 0.
824 * Log it and continue.
826 DEBUG_AUTOCONF("Couldn't force IER_UUE to 0 ");
828 serial_outp(up, UART_IER, iersave);
832 * This routine is called by rs_init() to initialize a specific serial
833 * port. It determines what type of UART chip this serial port is
834 * using: 8250, 16450, 16550, 16550A. The important question is
835 * whether or not this UART is a 16550A or not, since this will
836 * determine whether or not we can use its FIFO features or not.
838 static void autoconfig(struct uart_8250_port *up, unsigned int probeflags)
840 unsigned char status1, scratch, scratch2, scratch3;
841 unsigned char save_lcr, save_mcr;
844 if (!up->port.iobase && !up->port.mapbase && !up->port.membase)
847 DEBUG_AUTOCONF("ttyS%d: autoconf (0x%04x, 0x%p): ",
848 up->port.line, up->port.iobase, up->port.membase);
851 * We really do need global IRQs disabled here - we're going to
852 * be frobbing the chips IRQ enable register to see if it exists.
854 spin_lock_irqsave(&up->port.lock, flags);
855 // save_flags(flags); cli();
857 up->capabilities = 0;
860 if (!(up->port.flags & UPF_BUGGY_UART)) {
862 * Do a simple existence test first; if we fail this,
863 * there's no point trying anything else.
865 * 0x80 is used as a nonsense port to prevent against
866 * false positives due to ISA bus float. The
867 * assumption is that 0x80 is a non-existent port;
868 * which should be safe since include/asm/io.h also
869 * makes this assumption.
871 * Note: this is safe as long as MCR bit 4 is clear
872 * and the device is in "PC" mode.
874 scratch = serial_inp(up, UART_IER);
875 serial_outp(up, UART_IER, 0);
879 scratch2 = serial_inp(up, UART_IER);
880 serial_outp(up, UART_IER, 0x0F);
884 scratch3 = serial_inp(up, UART_IER);
885 serial_outp(up, UART_IER, scratch);
886 if (scratch2 != 0 || scratch3 != 0x0F) {
888 * We failed; there's nothing here
890 DEBUG_AUTOCONF("IER test failed (%02x, %02x) ",
896 save_mcr = serial_in(up, UART_MCR);
897 save_lcr = serial_in(up, UART_LCR);
900 * Check to see if a UART is really there. Certain broken
901 * internal modems based on the Rockwell chipset fail this
902 * test, because they apparently don't implement the loopback
903 * test mode. So this test is skipped on the COM 1 through
904 * COM 4 ports. This *should* be safe, since no board
905 * manufacturer would be stupid enough to design a board
906 * that conflicts with COM 1-4 --- we hope!
908 if (!(up->port.flags & UPF_SKIP_TEST)) {
909 serial_outp(up, UART_MCR, UART_MCR_LOOP | 0x0A);
910 status1 = serial_inp(up, UART_MSR) & 0xF0;
911 serial_outp(up, UART_MCR, save_mcr);
912 if (status1 != 0x90) {
913 DEBUG_AUTOCONF("LOOP test failed (%02x) ",
920 * We're pretty sure there's a port here. Lets find out what
921 * type of port it is. The IIR top two bits allows us to find
922 * out if it's 8250 or 16450, 16550, 16550A or later. This
923 * determines what we test for next.
925 * We also initialise the EFR (if any) to zero for later. The
926 * EFR occupies the same register location as the FCR and IIR.
928 serial_outp(up, UART_LCR, 0xBF);
929 serial_outp(up, UART_EFR, 0);
930 serial_outp(up, UART_LCR, 0);
932 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
933 scratch = serial_in(up, UART_IIR) >> 6;
935 DEBUG_AUTOCONF("iir=%d ", scratch);
942 up->port.type = PORT_UNKNOWN;
945 up->port.type = PORT_16550;
948 autoconfig_16550a(up);
952 #ifdef CONFIG_SERIAL_8250_RSA
954 * Only probe for RSA ports if we got the region.
956 if (up->port.type == PORT_16550A && probeflags & PROBE_RSA) {
959 for (i = 0 ; i < probe_rsa_count; ++i) {
960 if (probe_rsa[i] == up->port.iobase &&
962 up->port.type = PORT_RSA;
969 #ifdef CONFIG_SERIAL_8250_AU1X00
970 /* if access method is AU, it is a 16550 with a quirk */
971 if (up->port.type == PORT_16550A && up->port.iotype == UPIO_AU)
972 up->bugs |= UART_BUG_NOMSR;
975 serial_outp(up, UART_LCR, save_lcr);
977 if (up->capabilities != uart_config[up->port.type].flags) {
979 "ttyS%d: detected caps %08x should be %08x\n",
980 up->port.line, up->capabilities,
981 uart_config[up->port.type].flags);
984 up->port.fifosize = uart_config[up->port.type].fifo_size;
985 up->capabilities = uart_config[up->port.type].flags;
986 up->tx_loadsz = uart_config[up->port.type].tx_loadsz;
988 if (up->port.type == PORT_UNKNOWN)
994 #ifdef CONFIG_SERIAL_8250_RSA
995 if (up->port.type == PORT_RSA)
996 serial_outp(up, UART_RSA_FRR, 0);
998 serial_outp(up, UART_MCR, save_mcr);
999 serial8250_clear_fifos(up);
1000 (void)serial_in(up, UART_RX);
1001 serial_outp(up, UART_IER, 0);
1004 spin_unlock_irqrestore(&up->port.lock, flags);
1005 // restore_flags(flags);
1006 DEBUG_AUTOCONF("type=%s\n", uart_config[up->port.type].name);
1009 static void autoconfig_irq(struct uart_8250_port *up)
1011 unsigned char save_mcr, save_ier;
1012 unsigned char save_ICP = 0;
1013 unsigned int ICP = 0;
1017 if (up->port.flags & UPF_FOURPORT) {
1018 ICP = (up->port.iobase & 0xfe0) | 0x1f;
1019 save_ICP = inb_p(ICP);
1024 /* forget possible initially masked and pending IRQ */
1025 probe_irq_off(probe_irq_on());
1026 save_mcr = serial_inp(up, UART_MCR);
1027 save_ier = serial_inp(up, UART_IER);
1028 serial_outp(up, UART_MCR, UART_MCR_OUT1 | UART_MCR_OUT2);
1030 irqs = probe_irq_on();
1031 serial_outp(up, UART_MCR, 0);
1033 if (up->port.flags & UPF_FOURPORT) {
1034 serial_outp(up, UART_MCR,
1035 UART_MCR_DTR | UART_MCR_RTS);
1037 serial_outp(up, UART_MCR,
1038 UART_MCR_DTR | UART_MCR_RTS | UART_MCR_OUT2);
1040 serial_outp(up, UART_IER, 0x0f); /* enable all intrs */
1041 (void)serial_inp(up, UART_LSR);
1042 (void)serial_inp(up, UART_RX);
1043 (void)serial_inp(up, UART_IIR);
1044 (void)serial_inp(up, UART_MSR);
1045 serial_outp(up, UART_TX, 0xFF);
1047 irq = probe_irq_off(irqs);
1049 serial_outp(up, UART_MCR, save_mcr);
1050 serial_outp(up, UART_IER, save_ier);
1052 if (up->port.flags & UPF_FOURPORT)
1053 outb_p(save_ICP, ICP);
1055 up->port.irq = (irq > 0) ? irq : 0;
1058 static inline void __stop_tx(struct uart_8250_port *p)
1060 if (p->ier & UART_IER_THRI) {
1061 p->ier &= ~UART_IER_THRI;
1062 serial_out(p, UART_IER, p->ier);
1066 static void serial8250_stop_tx(struct uart_port *port)
1068 struct uart_8250_port *up = (struct uart_8250_port *)port;
1073 * We really want to stop the transmitter from sending.
1075 if (up->port.type == PORT_16C950) {
1076 up->acr |= UART_ACR_TXDIS;
1077 serial_icr_write(up, UART_ACR, up->acr);
1081 static void transmit_chars(struct uart_8250_port *up);
1083 static void serial8250_start_tx(struct uart_port *port)
1085 struct uart_8250_port *up = (struct uart_8250_port *)port;
1087 if (!(up->ier & UART_IER_THRI)) {
1088 up->ier |= UART_IER_THRI;
1089 serial_out(up, UART_IER, up->ier);
1091 if (up->bugs & UART_BUG_TXEN) {
1092 unsigned char lsr, iir;
1093 lsr = serial_in(up, UART_LSR);
1094 iir = serial_in(up, UART_IIR);
1095 if (lsr & UART_LSR_TEMT && iir & UART_IIR_NO_INT)
1101 * Re-enable the transmitter if we disabled it.
1103 if (up->port.type == PORT_16C950 && up->acr & UART_ACR_TXDIS) {
1104 up->acr &= ~UART_ACR_TXDIS;
1105 serial_icr_write(up, UART_ACR, up->acr);
1109 static void serial8250_stop_rx(struct uart_port *port)
1111 struct uart_8250_port *up = (struct uart_8250_port *)port;
1113 up->ier &= ~UART_IER_RLSI;
1114 up->port.read_status_mask &= ~UART_LSR_DR;
1115 serial_out(up, UART_IER, up->ier);
1118 static void serial8250_enable_ms(struct uart_port *port)
1120 struct uart_8250_port *up = (struct uart_8250_port *)port;
1122 /* no MSR capabilities */
1123 if (up->bugs & UART_BUG_NOMSR)
1126 up->ier |= UART_IER_MSI;
1127 serial_out(up, UART_IER, up->ier);
1130 static _INLINE_ void
1131 receive_chars(struct uart_8250_port *up, int *status, struct pt_regs *regs)
1133 struct tty_struct *tty = up->port.info->tty;
1134 unsigned char ch, lsr = *status;
1135 int max_count = 256;
1139 /* The following is not allowed by the tty layer and
1140 unsafe. It should be fixed ASAP */
1141 if (unlikely(tty->flip.count >= TTY_FLIPBUF_SIZE)) {
1142 if (tty->low_latency) {
1143 spin_unlock(&up->port.lock);
1144 tty_flip_buffer_push(tty);
1145 spin_lock(&up->port.lock);
1148 * If this failed then we will throw away the
1149 * bytes but must do so to clear interrupts
1152 ch = serial_inp(up, UART_RX);
1154 up->port.icount.rx++;
1156 #ifdef CONFIG_SERIAL_8250_CONSOLE
1158 * Recover the break flag from console xmit
1160 if (up->port.line == up->port.cons->index) {
1161 lsr |= up->lsr_break_flag;
1162 up->lsr_break_flag = 0;
1166 if (unlikely(lsr & (UART_LSR_BI | UART_LSR_PE |
1167 UART_LSR_FE | UART_LSR_OE))) {
1169 * For statistics only
1171 if (lsr & UART_LSR_BI) {
1172 lsr &= ~(UART_LSR_FE | UART_LSR_PE);
1173 up->port.icount.brk++;
1175 * We do the SysRQ and SAK checking
1176 * here because otherwise the break
1177 * may get masked by ignore_status_mask
1178 * or read_status_mask.
1180 if (uart_handle_break(&up->port))
1182 } else if (lsr & UART_LSR_PE)
1183 up->port.icount.parity++;
1184 else if (lsr & UART_LSR_FE)
1185 up->port.icount.frame++;
1186 if (lsr & UART_LSR_OE)
1187 up->port.icount.overrun++;
1190 * Mask off conditions which should be ignored.
1192 lsr &= up->port.read_status_mask;
1194 if (lsr & UART_LSR_BI) {
1195 DEBUG_INTR("handling break....");
1197 } else if (lsr & UART_LSR_PE)
1199 else if (lsr & UART_LSR_FE)
1202 if (uart_handle_sysrq_char(&up->port, ch, regs))
1205 uart_insert_char(&up->port, lsr, UART_LSR_OE, ch, flag);
1208 lsr = serial_inp(up, UART_LSR);
1209 } while ((lsr & UART_LSR_DR) && (max_count-- > 0));
1210 spin_unlock(&up->port.lock);
1211 tty_flip_buffer_push(tty);
1212 spin_lock(&up->port.lock);
1216 static _INLINE_ void transmit_chars(struct uart_8250_port *up)
1218 struct circ_buf *xmit = &up->port.info->xmit;
1221 if (up->port.x_char) {
1222 serial_outp(up, UART_TX, up->port.x_char);
1223 up->port.icount.tx++;
1224 up->port.x_char = 0;
1227 if (uart_tx_stopped(&up->port)) {
1228 serial8250_stop_tx(&up->port);
1231 if (uart_circ_empty(xmit)) {
1236 count = up->tx_loadsz;
1238 serial_out(up, UART_TX, xmit->buf[xmit->tail]);
1239 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
1240 up->port.icount.tx++;
1241 if (uart_circ_empty(xmit))
1243 } while (--count > 0);
1245 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
1246 uart_write_wakeup(&up->port);
1248 DEBUG_INTR("THRE...");
1250 if (uart_circ_empty(xmit))
1254 static _INLINE_ void check_modem_status(struct uart_8250_port *up)
1258 status = serial_in(up, UART_MSR);
1260 if ((status & UART_MSR_ANY_DELTA) == 0)
1263 if (status & UART_MSR_TERI)
1264 up->port.icount.rng++;
1265 if (status & UART_MSR_DDSR)
1266 up->port.icount.dsr++;
1267 if (status & UART_MSR_DDCD)
1268 uart_handle_dcd_change(&up->port, status & UART_MSR_DCD);
1269 if (status & UART_MSR_DCTS)
1270 uart_handle_cts_change(&up->port, status & UART_MSR_CTS);
1272 wake_up_interruptible(&up->port.info->delta_msr_wait);
1276 * This handles the interrupt from one port.
1279 serial8250_handle_port(struct uart_8250_port *up, struct pt_regs *regs)
1281 unsigned int status = serial_inp(up, UART_LSR);
1283 DEBUG_INTR("status = %x...", status);
1285 if (status & UART_LSR_DR)
1286 receive_chars(up, &status, regs);
1287 check_modem_status(up);
1288 if (status & UART_LSR_THRE)
1293 * This is the serial driver's interrupt routine.
1295 * Arjan thinks the old way was overly complex, so it got simplified.
1296 * Alan disagrees, saying that need the complexity to handle the weird
1297 * nature of ISA shared interrupts. (This is a special exception.)
1299 * In order to handle ISA shared interrupts properly, we need to check
1300 * that all ports have been serviced, and therefore the ISA interrupt
1301 * line has been de-asserted.
1303 * This means we need to loop through all ports. checking that they
1304 * don't have an interrupt pending.
1306 static irqreturn_t serial8250_interrupt(int irq, void *dev_id, struct pt_regs *regs)
1308 struct irq_info *i = dev_id;
1309 struct list_head *l, *end = NULL;
1310 int pass_counter = 0, handled = 0;
1312 DEBUG_INTR("serial8250_interrupt(%d)...", irq);
1314 spin_lock(&i->lock);
1318 struct uart_8250_port *up;
1321 up = list_entry(l, struct uart_8250_port, list);
1323 iir = serial_in(up, UART_IIR);
1324 if (!(iir & UART_IIR_NO_INT)) {
1325 spin_lock(&up->port.lock);
1326 serial8250_handle_port(up, regs);
1327 spin_unlock(&up->port.lock);
1332 } else if (end == NULL)
1337 if (l == i->head && pass_counter++ > PASS_LIMIT) {
1338 /* If we hit this, we're dead. */
1339 printk(KERN_ERR "serial8250: too much work for "
1345 spin_unlock(&i->lock);
1347 DEBUG_INTR("end.\n");
1349 return IRQ_RETVAL(handled);
1353 * To support ISA shared interrupts, we need to have one interrupt
1354 * handler that ensures that the IRQ line has been deasserted
1355 * before returning. Failing to do this will result in the IRQ
1356 * line being stuck active, and, since ISA irqs are edge triggered,
1357 * no more IRQs will be seen.
1359 static void serial_do_unlink(struct irq_info *i, struct uart_8250_port *up)
1361 spin_lock_irq(&i->lock);
1363 if (!list_empty(i->head)) {
1364 if (i->head == &up->list)
1365 i->head = i->head->next;
1366 list_del(&up->list);
1368 BUG_ON(i->head != &up->list);
1372 spin_unlock_irq(&i->lock);
1375 static int serial_link_irq_chain(struct uart_8250_port *up)
1377 struct irq_info *i = irq_lists + up->port.irq;
1378 int ret, irq_flags = up->port.flags & UPF_SHARE_IRQ ? SA_SHIRQ : 0;
1380 spin_lock_irq(&i->lock);
1383 list_add(&up->list, i->head);
1384 spin_unlock_irq(&i->lock);
1388 INIT_LIST_HEAD(&up->list);
1389 i->head = &up->list;
1390 spin_unlock_irq(&i->lock);
1392 ret = request_irq(up->port.irq, serial8250_interrupt,
1393 irq_flags, "serial", i);
1395 serial_do_unlink(i, up);
1401 static void serial_unlink_irq_chain(struct uart_8250_port *up)
1403 struct irq_info *i = irq_lists + up->port.irq;
1405 BUG_ON(i->head == NULL);
1407 if (list_empty(i->head))
1408 free_irq(up->port.irq, i);
1410 serial_do_unlink(i, up);
1414 * This function is used to handle ports that do not have an
1415 * interrupt. This doesn't work very well for 16450's, but gives
1416 * barely passable results for a 16550A. (Although at the expense
1417 * of much CPU overhead).
1419 static void serial8250_timeout(unsigned long data)
1421 struct uart_8250_port *up = (struct uart_8250_port *)data;
1422 unsigned int timeout;
1425 iir = serial_in(up, UART_IIR);
1426 if (!(iir & UART_IIR_NO_INT)) {
1427 spin_lock(&up->port.lock);
1428 serial8250_handle_port(up, NULL);
1429 spin_unlock(&up->port.lock);
1432 timeout = up->port.timeout;
1433 timeout = timeout > 6 ? (timeout / 2 - 2) : 1;
1434 mod_timer(&up->timer, jiffies + timeout);
1437 static unsigned int serial8250_tx_empty(struct uart_port *port)
1439 struct uart_8250_port *up = (struct uart_8250_port *)port;
1440 unsigned long flags;
1443 spin_lock_irqsave(&up->port.lock, flags);
1444 ret = serial_in(up, UART_LSR) & UART_LSR_TEMT ? TIOCSER_TEMT : 0;
1445 spin_unlock_irqrestore(&up->port.lock, flags);
1450 static unsigned int serial8250_get_mctrl(struct uart_port *port)
1452 struct uart_8250_port *up = (struct uart_8250_port *)port;
1453 unsigned char status;
1456 status = serial_in(up, UART_MSR);
1459 if (status & UART_MSR_DCD)
1461 if (status & UART_MSR_RI)
1463 if (status & UART_MSR_DSR)
1465 if (status & UART_MSR_CTS)
1470 static void serial8250_set_mctrl(struct uart_port *port, unsigned int mctrl)
1472 struct uart_8250_port *up = (struct uart_8250_port *)port;
1473 unsigned char mcr = 0;
1475 if (mctrl & TIOCM_RTS)
1476 mcr |= UART_MCR_RTS;
1477 if (mctrl & TIOCM_DTR)
1478 mcr |= UART_MCR_DTR;
1479 if (mctrl & TIOCM_OUT1)
1480 mcr |= UART_MCR_OUT1;
1481 if (mctrl & TIOCM_OUT2)
1482 mcr |= UART_MCR_OUT2;
1483 if (mctrl & TIOCM_LOOP)
1484 mcr |= UART_MCR_LOOP;
1486 mcr = (mcr & up->mcr_mask) | up->mcr_force | up->mcr;
1488 serial_out(up, UART_MCR, mcr);
1491 static void serial8250_break_ctl(struct uart_port *port, int break_state)
1493 struct uart_8250_port *up = (struct uart_8250_port *)port;
1494 unsigned long flags;
1496 spin_lock_irqsave(&up->port.lock, flags);
1497 if (break_state == -1)
1498 up->lcr |= UART_LCR_SBC;
1500 up->lcr &= ~UART_LCR_SBC;
1501 serial_out(up, UART_LCR, up->lcr);
1502 spin_unlock_irqrestore(&up->port.lock, flags);
1505 static int serial8250_startup(struct uart_port *port)
1507 struct uart_8250_port *up = (struct uart_8250_port *)port;
1508 unsigned long flags;
1509 unsigned char lsr, iir;
1512 up->capabilities = uart_config[up->port.type].flags;
1515 if (up->port.type == PORT_16C950) {
1516 /* Wake up and initialize UART */
1518 serial_outp(up, UART_LCR, 0xBF);
1519 serial_outp(up, UART_EFR, UART_EFR_ECB);
1520 serial_outp(up, UART_IER, 0);
1521 serial_outp(up, UART_LCR, 0);
1522 serial_icr_write(up, UART_CSR, 0); /* Reset the UART */
1523 serial_outp(up, UART_LCR, 0xBF);
1524 serial_outp(up, UART_EFR, UART_EFR_ECB);
1525 serial_outp(up, UART_LCR, 0);
1528 #ifdef CONFIG_SERIAL_8250_RSA
1530 * If this is an RSA port, see if we can kick it up to the
1531 * higher speed clock.
1537 * Clear the FIFO buffers and disable them.
1538 * (they will be reeanbled in set_termios())
1540 serial8250_clear_fifos(up);
1543 * Clear the interrupt registers.
1545 (void) serial_inp(up, UART_LSR);
1546 (void) serial_inp(up, UART_RX);
1547 (void) serial_inp(up, UART_IIR);
1548 (void) serial_inp(up, UART_MSR);
1551 * At this point, there's no way the LSR could still be 0xff;
1552 * if it is, then bail out, because there's likely no UART
1555 if (!(up->port.flags & UPF_BUGGY_UART) &&
1556 (serial_inp(up, UART_LSR) == 0xff)) {
1557 printk("ttyS%d: LSR safety check engaged!\n", up->port.line);
1562 * For a XR16C850, we need to set the trigger levels
1564 if (up->port.type == PORT_16850) {
1567 serial_outp(up, UART_LCR, 0xbf);
1569 fctr = serial_inp(up, UART_FCTR) & ~(UART_FCTR_RX|UART_FCTR_TX);
1570 serial_outp(up, UART_FCTR, fctr | UART_FCTR_TRGD | UART_FCTR_RX);
1571 serial_outp(up, UART_TRG, UART_TRG_96);
1572 serial_outp(up, UART_FCTR, fctr | UART_FCTR_TRGD | UART_FCTR_TX);
1573 serial_outp(up, UART_TRG, UART_TRG_96);
1575 serial_outp(up, UART_LCR, 0);
1579 * If the "interrupt" for this port doesn't correspond with any
1580 * hardware interrupt, we use a timer-based system. The original
1581 * driver used to do this with IRQ0.
1583 if (!is_real_interrupt(up->port.irq)) {
1584 unsigned int timeout = up->port.timeout;
1586 timeout = timeout > 6 ? (timeout / 2 - 2) : 1;
1588 up->timer.data = (unsigned long)up;
1589 mod_timer(&up->timer, jiffies + timeout);
1591 retval = serial_link_irq_chain(up);
1597 * Now, initialize the UART
1599 serial_outp(up, UART_LCR, UART_LCR_WLEN8);
1601 spin_lock_irqsave(&up->port.lock, flags);
1602 if (up->port.flags & UPF_FOURPORT) {
1603 if (!is_real_interrupt(up->port.irq))
1604 up->port.mctrl |= TIOCM_OUT1;
1607 * Most PC uarts need OUT2 raised to enable interrupts.
1609 if (is_real_interrupt(up->port.irq))
1610 up->port.mctrl |= TIOCM_OUT2;
1612 serial8250_set_mctrl(&up->port, up->port.mctrl);
1615 * Do a quick test to see if we receive an
1616 * interrupt when we enable the TX irq.
1618 serial_outp(up, UART_IER, UART_IER_THRI);
1619 lsr = serial_in(up, UART_LSR);
1620 iir = serial_in(up, UART_IIR);
1621 serial_outp(up, UART_IER, 0);
1623 if (lsr & UART_LSR_TEMT && iir & UART_IIR_NO_INT) {
1624 if (!(up->bugs & UART_BUG_TXEN)) {
1625 up->bugs |= UART_BUG_TXEN;
1626 pr_debug("ttyS%d - enabling bad tx status workarounds\n",
1630 up->bugs &= ~UART_BUG_TXEN;
1633 spin_unlock_irqrestore(&up->port.lock, flags);
1636 * Finally, enable interrupts. Note: Modem status interrupts
1637 * are set via set_termios(), which will be occurring imminently
1638 * anyway, so we don't enable them here.
1640 up->ier = UART_IER_RLSI | UART_IER_RDI;
1641 serial_outp(up, UART_IER, up->ier);
1643 if (up->port.flags & UPF_FOURPORT) {
1646 * Enable interrupts on the AST Fourport board
1648 icp = (up->port.iobase & 0xfe0) | 0x01f;
1654 * And clear the interrupt registers again for luck.
1656 (void) serial_inp(up, UART_LSR);
1657 (void) serial_inp(up, UART_RX);
1658 (void) serial_inp(up, UART_IIR);
1659 (void) serial_inp(up, UART_MSR);
1664 static void serial8250_shutdown(struct uart_port *port)
1666 struct uart_8250_port *up = (struct uart_8250_port *)port;
1667 unsigned long flags;
1670 * Disable interrupts from this port
1673 serial_outp(up, UART_IER, 0);
1675 spin_lock_irqsave(&up->port.lock, flags);
1676 if (up->port.flags & UPF_FOURPORT) {
1677 /* reset interrupts on the AST Fourport board */
1678 inb((up->port.iobase & 0xfe0) | 0x1f);
1679 up->port.mctrl |= TIOCM_OUT1;
1681 up->port.mctrl &= ~TIOCM_OUT2;
1683 serial8250_set_mctrl(&up->port, up->port.mctrl);
1684 spin_unlock_irqrestore(&up->port.lock, flags);
1687 * Disable break condition and FIFOs
1689 serial_out(up, UART_LCR, serial_inp(up, UART_LCR) & ~UART_LCR_SBC);
1690 serial8250_clear_fifos(up);
1692 #ifdef CONFIG_SERIAL_8250_RSA
1694 * Reset the RSA board back to 115kbps compat mode.
1700 * Read data port to reset things, and then unlink from
1703 (void) serial_in(up, UART_RX);
1705 if (!is_real_interrupt(up->port.irq))
1706 del_timer_sync(&up->timer);
1708 serial_unlink_irq_chain(up);
1711 static unsigned int serial8250_get_divisor(struct uart_port *port, unsigned int baud)
1716 * Handle magic divisors for baud rates above baud_base on
1717 * SMSC SuperIO chips.
1719 if ((port->flags & UPF_MAGIC_MULTIPLIER) &&
1720 baud == (port->uartclk/4))
1722 else if ((port->flags & UPF_MAGIC_MULTIPLIER) &&
1723 baud == (port->uartclk/8))
1726 quot = uart_get_divisor(port, baud);
1732 serial8250_set_termios(struct uart_port *port, struct termios *termios,
1733 struct termios *old)
1735 struct uart_8250_port *up = (struct uart_8250_port *)port;
1736 unsigned char cval, fcr = 0;
1737 unsigned long flags;
1738 unsigned int baud, quot;
1740 switch (termios->c_cflag & CSIZE) {
1742 cval = UART_LCR_WLEN5;
1745 cval = UART_LCR_WLEN6;
1748 cval = UART_LCR_WLEN7;
1752 cval = UART_LCR_WLEN8;
1756 if (termios->c_cflag & CSTOPB)
1757 cval |= UART_LCR_STOP;
1758 if (termios->c_cflag & PARENB)
1759 cval |= UART_LCR_PARITY;
1760 if (!(termios->c_cflag & PARODD))
1761 cval |= UART_LCR_EPAR;
1763 if (termios->c_cflag & CMSPAR)
1764 cval |= UART_LCR_SPAR;
1768 * Ask the core to calculate the divisor for us.
1770 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
1771 quot = serial8250_get_divisor(port, baud);
1774 * Oxford Semi 952 rev B workaround
1776 if (up->bugs & UART_BUG_QUOT && (quot & 0xff) == 0)
1779 if (up->capabilities & UART_CAP_FIFO && up->port.fifosize > 1) {
1781 fcr = UART_FCR_ENABLE_FIFO | UART_FCR_TRIGGER_1;
1783 fcr = uart_config[up->port.type].fcr;
1787 * MCR-based auto flow control. When AFE is enabled, RTS will be
1788 * deasserted when the receive FIFO contains more characters than
1789 * the trigger, or the MCR RTS bit is cleared. In the case where
1790 * the remote UART is not using CTS auto flow control, we must
1791 * have sufficient FIFO entries for the latency of the remote
1792 * UART to respond. IOW, at least 32 bytes of FIFO.
1794 if (up->capabilities & UART_CAP_AFE && up->port.fifosize >= 32) {
1795 up->mcr &= ~UART_MCR_AFE;
1796 if (termios->c_cflag & CRTSCTS)
1797 up->mcr |= UART_MCR_AFE;
1801 * Ok, we're now changing the port state. Do it with
1802 * interrupts disabled.
1804 spin_lock_irqsave(&up->port.lock, flags);
1807 * Update the per-port timeout.
1809 uart_update_timeout(port, termios->c_cflag, baud);
1811 up->port.read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;
1812 if (termios->c_iflag & INPCK)
1813 up->port.read_status_mask |= UART_LSR_FE | UART_LSR_PE;
1814 if (termios->c_iflag & (BRKINT | PARMRK))
1815 up->port.read_status_mask |= UART_LSR_BI;
1818 * Characteres to ignore
1820 up->port.ignore_status_mask = 0;
1821 if (termios->c_iflag & IGNPAR)
1822 up->port.ignore_status_mask |= UART_LSR_PE | UART_LSR_FE;
1823 if (termios->c_iflag & IGNBRK) {
1824 up->port.ignore_status_mask |= UART_LSR_BI;
1826 * If we're ignoring parity and break indicators,
1827 * ignore overruns too (for real raw support).
1829 if (termios->c_iflag & IGNPAR)
1830 up->port.ignore_status_mask |= UART_LSR_OE;
1834 * ignore all characters if CREAD is not set
1836 if ((termios->c_cflag & CREAD) == 0)
1837 up->port.ignore_status_mask |= UART_LSR_DR;
1840 * CTS flow control flag and modem status interrupts
1842 up->ier &= ~UART_IER_MSI;
1843 if (!(up->bugs & UART_BUG_NOMSR) &&
1844 UART_ENABLE_MS(&up->port, termios->c_cflag))
1845 up->ier |= UART_IER_MSI;
1846 if (up->capabilities & UART_CAP_UUE)
1847 up->ier |= UART_IER_UUE | UART_IER_RTOIE;
1849 serial_out(up, UART_IER, up->ier);
1851 if (up->capabilities & UART_CAP_EFR) {
1852 unsigned char efr = 0;
1854 * TI16C752/Startech hardware flow control. FIXME:
1855 * - TI16C752 requires control thresholds to be set.
1856 * - UART_MCR_RTS is ineffective if auto-RTS mode is enabled.
1858 if (termios->c_cflag & CRTSCTS)
1859 efr |= UART_EFR_CTS;
1861 serial_outp(up, UART_LCR, 0xBF);
1862 serial_outp(up, UART_EFR, efr);
1865 if (up->capabilities & UART_NATSEMI) {
1866 /* Switch to bank 2 not bank 1, to avoid resetting EXCR2 */
1867 serial_outp(up, UART_LCR, 0xe0);
1869 serial_outp(up, UART_LCR, cval | UART_LCR_DLAB);/* set DLAB */
1872 serial_outp(up, UART_DLL, quot & 0xff); /* LS of divisor */
1873 serial_outp(up, UART_DLM, quot >> 8); /* MS of divisor */
1876 * LCR DLAB must be set to enable 64-byte FIFO mode. If the FCR
1877 * is written without DLAB set, this mode will be disabled.
1879 if (up->port.type == PORT_16750)
1880 serial_outp(up, UART_FCR, fcr);
1882 serial_outp(up, UART_LCR, cval); /* reset DLAB */
1883 up->lcr = cval; /* Save LCR */
1884 if (up->port.type != PORT_16750) {
1885 if (fcr & UART_FCR_ENABLE_FIFO) {
1886 /* emulated UARTs (Lucent Venus 167x) need two steps */
1887 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
1889 serial_outp(up, UART_FCR, fcr); /* set fcr */
1891 serial8250_set_mctrl(&up->port, up->port.mctrl);
1892 spin_unlock_irqrestore(&up->port.lock, flags);
1896 serial8250_pm(struct uart_port *port, unsigned int state,
1897 unsigned int oldstate)
1899 struct uart_8250_port *p = (struct uart_8250_port *)port;
1901 serial8250_set_sleep(p, state != 0);
1904 p->pm(port, state, oldstate);
1908 * Resource handling.
1910 static int serial8250_request_std_resource(struct uart_8250_port *up)
1912 unsigned int size = 8 << up->port.regshift;
1915 switch (up->port.iotype) {
1917 if (!up->port.mapbase)
1920 if (!request_mem_region(up->port.mapbase, size, "serial")) {
1925 if (up->port.flags & UPF_IOREMAP) {
1926 up->port.membase = ioremap(up->port.mapbase, size);
1927 if (!up->port.membase) {
1928 release_mem_region(up->port.mapbase, size);
1936 if (!request_region(up->port.iobase, size, "serial"))
1943 static void serial8250_release_std_resource(struct uart_8250_port *up)
1945 unsigned int size = 8 << up->port.regshift;
1947 switch (up->port.iotype) {
1949 if (!up->port.mapbase)
1952 if (up->port.flags & UPF_IOREMAP) {
1953 iounmap(up->port.membase);
1954 up->port.membase = NULL;
1957 release_mem_region(up->port.mapbase, size);
1962 release_region(up->port.iobase, size);
1967 static int serial8250_request_rsa_resource(struct uart_8250_port *up)
1969 unsigned long start = UART_RSA_BASE << up->port.regshift;
1970 unsigned int size = 8 << up->port.regshift;
1973 switch (up->port.iotype) {
1980 start += up->port.iobase;
1981 if (!request_region(start, size, "serial-rsa"))
1989 static void serial8250_release_rsa_resource(struct uart_8250_port *up)
1991 unsigned long offset = UART_RSA_BASE << up->port.regshift;
1992 unsigned int size = 8 << up->port.regshift;
1994 switch (up->port.iotype) {
2000 release_region(up->port.iobase + offset, size);
2005 static void serial8250_release_port(struct uart_port *port)
2007 struct uart_8250_port *up = (struct uart_8250_port *)port;
2009 serial8250_release_std_resource(up);
2010 if (up->port.type == PORT_RSA)
2011 serial8250_release_rsa_resource(up);
2014 static int serial8250_request_port(struct uart_port *port)
2016 struct uart_8250_port *up = (struct uart_8250_port *)port;
2019 ret = serial8250_request_std_resource(up);
2020 if (ret == 0 && up->port.type == PORT_RSA) {
2021 ret = serial8250_request_rsa_resource(up);
2023 serial8250_release_std_resource(up);
2029 static void serial8250_config_port(struct uart_port *port, int flags)
2031 struct uart_8250_port *up = (struct uart_8250_port *)port;
2032 int probeflags = PROBE_ANY;
2036 * Don't probe for MCA ports on non-MCA machines.
2038 if (up->port.flags & UPF_BOOT_ONLYMCA && !MCA_bus)
2042 * Find the region that we can probe for. This in turn
2043 * tells us whether we can probe for the type of port.
2045 ret = serial8250_request_std_resource(up);
2049 ret = serial8250_request_rsa_resource(up);
2051 probeflags &= ~PROBE_RSA;
2053 if (flags & UART_CONFIG_TYPE)
2054 autoconfig(up, probeflags);
2055 if (up->port.type != PORT_UNKNOWN && flags & UART_CONFIG_IRQ)
2058 if (up->port.type != PORT_RSA && probeflags & PROBE_RSA)
2059 serial8250_release_rsa_resource(up);
2060 if (up->port.type == PORT_UNKNOWN)
2061 serial8250_release_std_resource(up);
2065 serial8250_verify_port(struct uart_port *port, struct serial_struct *ser)
2067 if (ser->irq >= NR_IRQS || ser->irq < 0 ||
2068 ser->baud_base < 9600 || ser->type < PORT_UNKNOWN ||
2069 ser->type >= ARRAY_SIZE(uart_config) || ser->type == PORT_CIRRUS ||
2070 ser->type == PORT_STARTECH)
2076 serial8250_type(struct uart_port *port)
2078 int type = port->type;
2080 if (type >= ARRAY_SIZE(uart_config))
2082 return uart_config[type].name;
2085 static struct uart_ops serial8250_pops = {
2086 .tx_empty = serial8250_tx_empty,
2087 .set_mctrl = serial8250_set_mctrl,
2088 .get_mctrl = serial8250_get_mctrl,
2089 .stop_tx = serial8250_stop_tx,
2090 .start_tx = serial8250_start_tx,
2091 .stop_rx = serial8250_stop_rx,
2092 .enable_ms = serial8250_enable_ms,
2093 .break_ctl = serial8250_break_ctl,
2094 .startup = serial8250_startup,
2095 .shutdown = serial8250_shutdown,
2096 .set_termios = serial8250_set_termios,
2097 .pm = serial8250_pm,
2098 .type = serial8250_type,
2099 .release_port = serial8250_release_port,
2100 .request_port = serial8250_request_port,
2101 .config_port = serial8250_config_port,
2102 .verify_port = serial8250_verify_port,
2105 static struct uart_8250_port serial8250_ports[UART_NR];
2107 static void __init serial8250_isa_init_ports(void)
2109 struct uart_8250_port *up;
2110 static int first = 1;
2117 for (i = 0; i < UART_NR; i++) {
2118 struct uart_8250_port *up = &serial8250_ports[i];
2121 spin_lock_init(&up->port.lock);
2123 init_timer(&up->timer);
2124 up->timer.function = serial8250_timeout;
2127 * ALPHA_KLUDGE_MCR needs to be killed.
2129 up->mcr_mask = ~ALPHA_KLUDGE_MCR;
2130 up->mcr_force = ALPHA_KLUDGE_MCR;
2132 up->port.ops = &serial8250_pops;
2135 for (i = 0, up = serial8250_ports;
2136 i < ARRAY_SIZE(old_serial_port) && i < UART_NR;
2138 up->port.iobase = old_serial_port[i].port;
2139 up->port.irq = irq_canonicalize(old_serial_port[i].irq);
2140 up->port.uartclk = old_serial_port[i].baud_base * 16;
2141 up->port.flags = old_serial_port[i].flags;
2142 up->port.hub6 = old_serial_port[i].hub6;
2143 up->port.membase = old_serial_port[i].iomem_base;
2144 up->port.iotype = old_serial_port[i].io_type;
2145 up->port.regshift = old_serial_port[i].iomem_reg_shift;
2147 up->port.flags |= UPF_SHARE_IRQ;
2152 serial8250_register_ports(struct uart_driver *drv, struct device *dev)
2156 serial8250_isa_init_ports();
2158 for (i = 0; i < UART_NR; i++) {
2159 struct uart_8250_port *up = &serial8250_ports[i];
2162 uart_add_one_port(drv, &up->port);
2166 #ifdef CONFIG_SERIAL_8250_CONSOLE
2168 #define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE)
2171 * Wait for transmitter & holding register to empty
2173 static inline void wait_for_xmitr(struct uart_8250_port *up)
2175 unsigned int status, tmout = 10000;
2177 /* Wait up to 10ms for the character(s) to be sent. */
2179 status = serial_in(up, UART_LSR);
2181 if (status & UART_LSR_BI)
2182 up->lsr_break_flag = UART_LSR_BI;
2187 } while ((status & BOTH_EMPTY) != BOTH_EMPTY);
2189 /* Wait up to 1s for flow control if necessary */
2190 if (up->port.flags & UPF_CONS_FLOW) {
2193 ((serial_in(up, UART_MSR) & UART_MSR_CTS) == 0))
2199 * Print a string to the serial port trying not to disturb
2200 * any possible real use of the port...
2202 * The console_lock must be held when we get here.
2205 serial8250_console_write(struct console *co, const char *s, unsigned int count)
2207 struct uart_8250_port *up = &serial8250_ports[co->index];
2212 * First save the UER then disable the interrupts
2214 ier = serial_in(up, UART_IER);
2216 if (up->capabilities & UART_CAP_UUE)
2217 serial_out(up, UART_IER, UART_IER_UUE);
2219 serial_out(up, UART_IER, 0);
2222 * Now, do each character
2224 for (i = 0; i < count; i++, s++) {
2228 * Send the character out.
2229 * If a LF, also do CR...
2231 serial_out(up, UART_TX, *s);
2234 serial_out(up, UART_TX, 13);
2239 * Finally, wait for transmitter to become empty
2240 * and restore the IER
2243 serial_out(up, UART_IER, ier);
2246 static int serial8250_console_setup(struct console *co, char *options)
2248 struct uart_port *port;
2255 * Check whether an invalid uart number has been specified, and
2256 * if so, search for the first available port that does have
2259 if (co->index >= UART_NR)
2261 port = &serial8250_ports[co->index].port;
2262 if (!port->iobase && !port->membase)
2266 uart_parse_options(options, &baud, &parity, &bits, &flow);
2268 return uart_set_options(port, co, baud, parity, bits, flow);
2271 static struct uart_driver serial8250_reg;
2272 static struct console serial8250_console = {
2274 .write = serial8250_console_write,
2275 .device = uart_console_device,
2276 .setup = serial8250_console_setup,
2277 .flags = CON_PRINTBUFFER,
2279 .data = &serial8250_reg,
2282 static int __init serial8250_console_init(void)
2284 serial8250_isa_init_ports();
2285 register_console(&serial8250_console);
2288 console_initcall(serial8250_console_init);
2290 static int __init find_port(struct uart_port *p)
2293 struct uart_port *port;
2295 for (line = 0; line < UART_NR; line++) {
2296 port = &serial8250_ports[line].port;
2297 if (p->iotype == port->iotype &&
2298 p->iobase == port->iobase &&
2299 p->membase == port->membase)
2305 int __init serial8250_start_console(struct uart_port *port, char *options)
2309 line = find_port(port);
2313 add_preferred_console("ttyS", line, options);
2314 printk("Adding console on ttyS%d at %s 0x%lx (options '%s')\n",
2315 line, port->iotype == UPIO_MEM ? "MMIO" : "I/O port",
2316 port->iotype == UPIO_MEM ? (unsigned long) port->mapbase :
2317 (unsigned long) port->iobase, options);
2318 if (!(serial8250_console.flags & CON_ENABLED)) {
2319 serial8250_console.flags &= ~CON_PRINTBUFFER;
2320 register_console(&serial8250_console);
2325 #define SERIAL8250_CONSOLE &serial8250_console
2327 #define SERIAL8250_CONSOLE NULL
2330 static struct uart_driver serial8250_reg = {
2331 .owner = THIS_MODULE,
2332 .driver_name = "serial",
2333 .devfs_name = "tts/",
2338 .cons = SERIAL8250_CONSOLE,
2341 int __init early_serial_setup(struct uart_port *port)
2343 if (port->line >= ARRAY_SIZE(serial8250_ports))
2346 serial8250_isa_init_ports();
2347 serial8250_ports[port->line].port = *port;
2348 serial8250_ports[port->line].port.ops = &serial8250_pops;
2353 * serial8250_suspend_port - suspend one serial port
2354 * @line: serial line number
2355 * @level: the level of port suspension, as per uart_suspend_port
2357 * Suspend one serial port.
2359 void serial8250_suspend_port(int line)
2361 uart_suspend_port(&serial8250_reg, &serial8250_ports[line].port);
2365 * serial8250_resume_port - resume one serial port
2366 * @line: serial line number
2367 * @level: the level of port resumption, as per uart_resume_port
2369 * Resume one serial port.
2371 void serial8250_resume_port(int line)
2373 uart_resume_port(&serial8250_reg, &serial8250_ports[line].port);
2377 * Register a set of serial devices attached to a platform device. The
2378 * list is terminated with a zero flags entry, which means we expect
2379 * all entries to have at least UPF_BOOT_AUTOCONF set.
2381 static int __devinit serial8250_probe(struct device *dev)
2383 struct plat_serial8250_port *p = dev->platform_data;
2384 struct uart_port port;
2387 memset(&port, 0, sizeof(struct uart_port));
2389 for (i = 0; p && p->flags != 0; p++, i++) {
2390 port.iobase = p->iobase;
2391 port.membase = p->membase;
2393 port.uartclk = p->uartclk;
2394 port.regshift = p->regshift;
2395 port.iotype = p->iotype;
2396 port.flags = p->flags;
2397 port.mapbase = p->mapbase;
2398 port.hub6 = p->hub6;
2401 port.flags |= UPF_SHARE_IRQ;
2402 ret = serial8250_register_port(&port);
2404 dev_err(dev, "unable to register port at index %d "
2405 "(IO%lx MEM%lx IRQ%d): %d\n", i,
2406 p->iobase, p->mapbase, p->irq, ret);
2413 * Remove serial ports registered against a platform device.
2415 static int __devexit serial8250_remove(struct device *dev)
2419 for (i = 0; i < UART_NR; i++) {
2420 struct uart_8250_port *up = &serial8250_ports[i];
2422 if (up->port.dev == dev)
2423 serial8250_unregister_port(i);
2428 static int serial8250_suspend(struct device *dev, pm_message_t state)
2432 for (i = 0; i < UART_NR; i++) {
2433 struct uart_8250_port *up = &serial8250_ports[i];
2435 if (up->port.type != PORT_UNKNOWN && up->port.dev == dev)
2436 uart_suspend_port(&serial8250_reg, &up->port);
2442 static int serial8250_resume(struct device *dev)
2446 for (i = 0; i < UART_NR; i++) {
2447 struct uart_8250_port *up = &serial8250_ports[i];
2449 if (up->port.type != PORT_UNKNOWN && up->port.dev == dev)
2450 uart_resume_port(&serial8250_reg, &up->port);
2456 static struct device_driver serial8250_isa_driver = {
2457 .name = "serial8250",
2458 .bus = &platform_bus_type,
2459 .probe = serial8250_probe,
2460 .remove = __devexit_p(serial8250_remove),
2461 .suspend = serial8250_suspend,
2462 .resume = serial8250_resume,
2466 * This "device" covers _all_ ISA 8250-compatible serial devices listed
2467 * in the table in include/asm/serial.h
2469 static struct platform_device *serial8250_isa_devs;
2472 * serial8250_register_port and serial8250_unregister_port allows for
2473 * 16x50 serial ports to be configured at run-time, to support PCMCIA
2474 * modems and PCI multiport cards.
2476 static DECLARE_MUTEX(serial_sem);
2478 static struct uart_8250_port *serial8250_find_match_or_unused(struct uart_port *port)
2483 * First, find a port entry which matches.
2485 for (i = 0; i < UART_NR; i++)
2486 if (uart_match_port(&serial8250_ports[i].port, port))
2487 return &serial8250_ports[i];
2490 * We didn't find a matching entry, so look for the first
2491 * free entry. We look for one which hasn't been previously
2492 * used (indicated by zero iobase).
2494 for (i = 0; i < UART_NR; i++)
2495 if (serial8250_ports[i].port.type == PORT_UNKNOWN &&
2496 serial8250_ports[i].port.iobase == 0)
2497 return &serial8250_ports[i];
2500 * That also failed. Last resort is to find any entry which
2501 * doesn't have a real port associated with it.
2503 for (i = 0; i < UART_NR; i++)
2504 if (serial8250_ports[i].port.type == PORT_UNKNOWN)
2505 return &serial8250_ports[i];
2511 * serial8250_register_port - register a serial port
2512 * @port: serial port template
2514 * Configure the serial port specified by the request. If the
2515 * port exists and is in use, it is hung up and unregistered
2518 * The port is then probed and if necessary the IRQ is autodetected
2519 * If this fails an error is returned.
2521 * On success the port is ready to use and the line number is returned.
2523 int serial8250_register_port(struct uart_port *port)
2525 struct uart_8250_port *uart;
2528 if (port->uartclk == 0)
2533 uart = serial8250_find_match_or_unused(port);
2535 uart_remove_one_port(&serial8250_reg, &uart->port);
2537 uart->port.iobase = port->iobase;
2538 uart->port.membase = port->membase;
2539 uart->port.irq = port->irq;
2540 uart->port.uartclk = port->uartclk;
2541 uart->port.fifosize = port->fifosize;
2542 uart->port.regshift = port->regshift;
2543 uart->port.iotype = port->iotype;
2544 uart->port.flags = port->flags | UPF_BOOT_AUTOCONF;
2545 uart->port.mapbase = port->mapbase;
2547 uart->port.dev = port->dev;
2549 ret = uart_add_one_port(&serial8250_reg, &uart->port);
2551 ret = uart->port.line;
2557 EXPORT_SYMBOL(serial8250_register_port);
2560 * serial8250_unregister_port - remove a 16x50 serial port at runtime
2561 * @line: serial line number
2563 * Remove one serial port. This may not be called from interrupt
2564 * context. We hand the port back to the our control.
2566 void serial8250_unregister_port(int line)
2568 struct uart_8250_port *uart = &serial8250_ports[line];
2571 uart_remove_one_port(&serial8250_reg, &uart->port);
2572 if (serial8250_isa_devs) {
2573 uart->port.flags &= ~UPF_BOOT_AUTOCONF;
2574 uart->port.type = PORT_UNKNOWN;
2575 uart->port.dev = &serial8250_isa_devs->dev;
2576 uart_add_one_port(&serial8250_reg, &uart->port);
2578 uart->port.dev = NULL;
2582 EXPORT_SYMBOL(serial8250_unregister_port);
2584 static int __init serial8250_init(void)
2588 printk(KERN_INFO "Serial: 8250/16550 driver $Revision: 1.90 $ "
2589 "%d ports, IRQ sharing %sabled\n", (int) UART_NR,
2590 share_irqs ? "en" : "dis");
2592 for (i = 0; i < NR_IRQS; i++)
2593 spin_lock_init(&irq_lists[i].lock);
2595 ret = uart_register_driver(&serial8250_reg);
2599 serial8250_isa_devs = platform_device_register_simple("serial8250",
2600 PLAT8250_DEV_LEGACY, NULL, 0);
2601 if (IS_ERR(serial8250_isa_devs)) {
2602 ret = PTR_ERR(serial8250_isa_devs);
2606 serial8250_register_ports(&serial8250_reg, &serial8250_isa_devs->dev);
2608 ret = driver_register(&serial8250_isa_driver);
2612 platform_device_unregister(serial8250_isa_devs);
2614 uart_unregister_driver(&serial8250_reg);
2619 static void __exit serial8250_exit(void)
2621 struct platform_device *isa_dev = serial8250_isa_devs;
2624 * This tells serial8250_unregister_port() not to re-register
2625 * the ports (thereby making serial8250_isa_driver permanently
2628 serial8250_isa_devs = NULL;
2630 driver_unregister(&serial8250_isa_driver);
2631 platform_device_unregister(isa_dev);
2633 uart_unregister_driver(&serial8250_reg);
2636 module_init(serial8250_init);
2637 module_exit(serial8250_exit);
2639 EXPORT_SYMBOL(serial8250_suspend_port);
2640 EXPORT_SYMBOL(serial8250_resume_port);
2642 MODULE_LICENSE("GPL");
2643 MODULE_DESCRIPTION("Generic 8250/16x50 serial driver $Revision: 1.90 $");
2645 module_param(share_irqs, uint, 0644);
2646 MODULE_PARM_DESC(share_irqs, "Share IRQs with other non-8250/16x50 devices"
2649 #ifdef CONFIG_SERIAL_8250_RSA
2650 module_param_array(probe_rsa, ulong, &probe_rsa_count, 0444);
2651 MODULE_PARM_DESC(probe_rsa, "Probe I/O ports for RSA");
2653 MODULE_ALIAS_CHARDEV_MAJOR(TTY_MAJOR);