2 * libata-core.c - helper library for ATA
4 * Maintained by: Jeff Garzik <jgarzik@pobox.com>
5 * Please ALWAYS copy linux-ide@vger.kernel.org
8 * Copyright 2003-2004 Red Hat, Inc. All rights reserved.
9 * Copyright 2003-2004 Jeff Garzik
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2, or (at your option)
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
22 * You should have received a copy of the GNU General Public License
23 * along with this program; see the file COPYING. If not, write to
24 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
27 * libata documentation is available via 'make {ps|pdf}docs',
28 * as Documentation/DocBook/libata.*
30 * Hardware documentation available from http://www.t13.org/ and
31 * http://www.sata-io.org/
35 #include <linux/config.h>
36 #include <linux/kernel.h>
37 #include <linux/module.h>
38 #include <linux/pci.h>
39 #include <linux/init.h>
40 #include <linux/list.h>
42 #include <linux/highmem.h>
43 #include <linux/spinlock.h>
44 #include <linux/blkdev.h>
45 #include <linux/delay.h>
46 #include <linux/timer.h>
47 #include <linux/interrupt.h>
48 #include <linux/completion.h>
49 #include <linux/suspend.h>
50 #include <linux/workqueue.h>
51 #include <linux/jiffies.h>
52 #include <linux/scatterlist.h>
53 #include <scsi/scsi.h>
54 #include "scsi_priv.h"
55 #include <scsi/scsi_cmnd.h>
56 #include <scsi/scsi_host.h>
57 #include <linux/libata.h>
59 #include <asm/semaphore.h>
60 #include <asm/byteorder.h>
64 /* debounce timing parameters in msecs { interval, duration, timeout } */
65 const unsigned long sata_deb_timing_boot[] = { 5, 100, 2000 };
66 const unsigned long sata_deb_timing_eh[] = { 25, 500, 2000 };
67 const unsigned long sata_deb_timing_before_fsrst[] = { 100, 2000, 5000 };
69 static unsigned int ata_dev_init_params(struct ata_device *dev,
70 u16 heads, u16 sectors);
71 static unsigned int ata_dev_set_xfermode(struct ata_device *dev);
72 static void ata_dev_xfermask(struct ata_device *dev);
74 static unsigned int ata_unique_id = 1;
75 static struct workqueue_struct *ata_wq;
77 struct workqueue_struct *ata_aux_wq;
79 int atapi_enabled = 1;
80 module_param(atapi_enabled, int, 0444);
81 MODULE_PARM_DESC(atapi_enabled, "Enable discovery of ATAPI devices (0=off, 1=on)");
84 module_param(atapi_dmadir, int, 0444);
85 MODULE_PARM_DESC(atapi_dmadir, "Enable ATAPI DMADIR bridge support (0=off, 1=on)");
88 module_param_named(fua, libata_fua, int, 0444);
89 MODULE_PARM_DESC(fua, "FUA support (0=off, 1=on)");
91 MODULE_AUTHOR("Jeff Garzik");
92 MODULE_DESCRIPTION("Library module for ATA devices");
93 MODULE_LICENSE("GPL");
94 MODULE_VERSION(DRV_VERSION);
98 * ata_tf_to_fis - Convert ATA taskfile to SATA FIS structure
99 * @tf: Taskfile to convert
100 * @fis: Buffer into which data will output
101 * @pmp: Port multiplier port
103 * Converts a standard ATA taskfile to a Serial ATA
104 * FIS structure (Register - Host to Device).
107 * Inherited from caller.
110 void ata_tf_to_fis(const struct ata_taskfile *tf, u8 *fis, u8 pmp)
112 fis[0] = 0x27; /* Register - Host to Device FIS */
113 fis[1] = (pmp & 0xf) | (1 << 7); /* Port multiplier number,
114 bit 7 indicates Command FIS */
115 fis[2] = tf->command;
116 fis[3] = tf->feature;
123 fis[8] = tf->hob_lbal;
124 fis[9] = tf->hob_lbam;
125 fis[10] = tf->hob_lbah;
126 fis[11] = tf->hob_feature;
129 fis[13] = tf->hob_nsect;
140 * ata_tf_from_fis - Convert SATA FIS to ATA taskfile
141 * @fis: Buffer from which data will be input
142 * @tf: Taskfile to output
144 * Converts a serial ATA FIS structure to a standard ATA taskfile.
147 * Inherited from caller.
150 void ata_tf_from_fis(const u8 *fis, struct ata_taskfile *tf)
152 tf->command = fis[2]; /* status */
153 tf->feature = fis[3]; /* error */
160 tf->hob_lbal = fis[8];
161 tf->hob_lbam = fis[9];
162 tf->hob_lbah = fis[10];
165 tf->hob_nsect = fis[13];
168 static const u8 ata_rw_cmds[] = {
172 ATA_CMD_READ_MULTI_EXT,
173 ATA_CMD_WRITE_MULTI_EXT,
177 ATA_CMD_WRITE_MULTI_FUA_EXT,
181 ATA_CMD_PIO_READ_EXT,
182 ATA_CMD_PIO_WRITE_EXT,
195 ATA_CMD_WRITE_FUA_EXT
199 * ata_rwcmd_protocol - set taskfile r/w commands and protocol
200 * @qc: command to examine and configure
202 * Examine the device configuration and tf->flags to calculate
203 * the proper read/write commands and protocol to use.
208 int ata_rwcmd_protocol(struct ata_queued_cmd *qc)
210 struct ata_taskfile *tf = &qc->tf;
211 struct ata_device *dev = qc->dev;
214 int index, fua, lba48, write;
216 fua = (tf->flags & ATA_TFLAG_FUA) ? 4 : 0;
217 lba48 = (tf->flags & ATA_TFLAG_LBA48) ? 2 : 0;
218 write = (tf->flags & ATA_TFLAG_WRITE) ? 1 : 0;
220 if (dev->flags & ATA_DFLAG_PIO) {
221 tf->protocol = ATA_PROT_PIO;
222 index = dev->multi_count ? 0 : 8;
223 } else if (lba48 && (qc->ap->flags & ATA_FLAG_PIO_LBA48)) {
224 /* Unable to use DMA due to host limitation */
225 tf->protocol = ATA_PROT_PIO;
226 index = dev->multi_count ? 0 : 8;
228 tf->protocol = ATA_PROT_DMA;
232 cmd = ata_rw_cmds[index + fua + lba48 + write];
241 * ata_pack_xfermask - Pack pio, mwdma and udma masks into xfer_mask
242 * @pio_mask: pio_mask
243 * @mwdma_mask: mwdma_mask
244 * @udma_mask: udma_mask
246 * Pack @pio_mask, @mwdma_mask and @udma_mask into a single
247 * unsigned int xfer_mask.
255 static unsigned int ata_pack_xfermask(unsigned int pio_mask,
256 unsigned int mwdma_mask,
257 unsigned int udma_mask)
259 return ((pio_mask << ATA_SHIFT_PIO) & ATA_MASK_PIO) |
260 ((mwdma_mask << ATA_SHIFT_MWDMA) & ATA_MASK_MWDMA) |
261 ((udma_mask << ATA_SHIFT_UDMA) & ATA_MASK_UDMA);
265 * ata_unpack_xfermask - Unpack xfer_mask into pio, mwdma and udma masks
266 * @xfer_mask: xfer_mask to unpack
267 * @pio_mask: resulting pio_mask
268 * @mwdma_mask: resulting mwdma_mask
269 * @udma_mask: resulting udma_mask
271 * Unpack @xfer_mask into @pio_mask, @mwdma_mask and @udma_mask.
272 * Any NULL distination masks will be ignored.
274 static void ata_unpack_xfermask(unsigned int xfer_mask,
275 unsigned int *pio_mask,
276 unsigned int *mwdma_mask,
277 unsigned int *udma_mask)
280 *pio_mask = (xfer_mask & ATA_MASK_PIO) >> ATA_SHIFT_PIO;
282 *mwdma_mask = (xfer_mask & ATA_MASK_MWDMA) >> ATA_SHIFT_MWDMA;
284 *udma_mask = (xfer_mask & ATA_MASK_UDMA) >> ATA_SHIFT_UDMA;
287 static const struct ata_xfer_ent {
291 { ATA_SHIFT_PIO, ATA_BITS_PIO, XFER_PIO_0 },
292 { ATA_SHIFT_MWDMA, ATA_BITS_MWDMA, XFER_MW_DMA_0 },
293 { ATA_SHIFT_UDMA, ATA_BITS_UDMA, XFER_UDMA_0 },
298 * ata_xfer_mask2mode - Find matching XFER_* for the given xfer_mask
299 * @xfer_mask: xfer_mask of interest
301 * Return matching XFER_* value for @xfer_mask. Only the highest
302 * bit of @xfer_mask is considered.
308 * Matching XFER_* value, 0 if no match found.
310 static u8 ata_xfer_mask2mode(unsigned int xfer_mask)
312 int highbit = fls(xfer_mask) - 1;
313 const struct ata_xfer_ent *ent;
315 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
316 if (highbit >= ent->shift && highbit < ent->shift + ent->bits)
317 return ent->base + highbit - ent->shift;
322 * ata_xfer_mode2mask - Find matching xfer_mask for XFER_*
323 * @xfer_mode: XFER_* of interest
325 * Return matching xfer_mask for @xfer_mode.
331 * Matching xfer_mask, 0 if no match found.
333 static unsigned int ata_xfer_mode2mask(u8 xfer_mode)
335 const struct ata_xfer_ent *ent;
337 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
338 if (xfer_mode >= ent->base && xfer_mode < ent->base + ent->bits)
339 return 1 << (ent->shift + xfer_mode - ent->base);
344 * ata_xfer_mode2shift - Find matching xfer_shift for XFER_*
345 * @xfer_mode: XFER_* of interest
347 * Return matching xfer_shift for @xfer_mode.
353 * Matching xfer_shift, -1 if no match found.
355 static int ata_xfer_mode2shift(unsigned int xfer_mode)
357 const struct ata_xfer_ent *ent;
359 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
360 if (xfer_mode >= ent->base && xfer_mode < ent->base + ent->bits)
366 * ata_mode_string - convert xfer_mask to string
367 * @xfer_mask: mask of bits supported; only highest bit counts.
369 * Determine string which represents the highest speed
370 * (highest bit in @modemask).
376 * Constant C string representing highest speed listed in
377 * @mode_mask, or the constant C string "<n/a>".
379 static const char *ata_mode_string(unsigned int xfer_mask)
381 static const char * const xfer_mode_str[] = {
401 highbit = fls(xfer_mask) - 1;
402 if (highbit >= 0 && highbit < ARRAY_SIZE(xfer_mode_str))
403 return xfer_mode_str[highbit];
407 static const char *sata_spd_string(unsigned int spd)
409 static const char * const spd_str[] = {
414 if (spd == 0 || (spd - 1) >= ARRAY_SIZE(spd_str))
416 return spd_str[spd - 1];
419 void ata_dev_disable(struct ata_device *dev)
421 if (ata_dev_enabled(dev) && ata_msg_drv(dev->ap)) {
422 ata_dev_printk(dev, KERN_WARNING, "disabled\n");
428 * ata_pio_devchk - PATA device presence detection
429 * @ap: ATA channel to examine
430 * @device: Device to examine (starting at zero)
432 * This technique was originally described in
433 * Hale Landis's ATADRVR (www.ata-atapi.com), and
434 * later found its way into the ATA/ATAPI spec.
436 * Write a pattern to the ATA shadow registers,
437 * and if a device is present, it will respond by
438 * correctly storing and echoing back the
439 * ATA shadow register contents.
445 static unsigned int ata_pio_devchk(struct ata_port *ap,
448 struct ata_ioports *ioaddr = &ap->ioaddr;
451 ap->ops->dev_select(ap, device);
453 outb(0x55, ioaddr->nsect_addr);
454 outb(0xaa, ioaddr->lbal_addr);
456 outb(0xaa, ioaddr->nsect_addr);
457 outb(0x55, ioaddr->lbal_addr);
459 outb(0x55, ioaddr->nsect_addr);
460 outb(0xaa, ioaddr->lbal_addr);
462 nsect = inb(ioaddr->nsect_addr);
463 lbal = inb(ioaddr->lbal_addr);
465 if ((nsect == 0x55) && (lbal == 0xaa))
466 return 1; /* we found a device */
468 return 0; /* nothing found */
472 * ata_mmio_devchk - PATA device presence detection
473 * @ap: ATA channel to examine
474 * @device: Device to examine (starting at zero)
476 * This technique was originally described in
477 * Hale Landis's ATADRVR (www.ata-atapi.com), and
478 * later found its way into the ATA/ATAPI spec.
480 * Write a pattern to the ATA shadow registers,
481 * and if a device is present, it will respond by
482 * correctly storing and echoing back the
483 * ATA shadow register contents.
489 static unsigned int ata_mmio_devchk(struct ata_port *ap,
492 struct ata_ioports *ioaddr = &ap->ioaddr;
495 ap->ops->dev_select(ap, device);
497 writeb(0x55, (void __iomem *) ioaddr->nsect_addr);
498 writeb(0xaa, (void __iomem *) ioaddr->lbal_addr);
500 writeb(0xaa, (void __iomem *) ioaddr->nsect_addr);
501 writeb(0x55, (void __iomem *) ioaddr->lbal_addr);
503 writeb(0x55, (void __iomem *) ioaddr->nsect_addr);
504 writeb(0xaa, (void __iomem *) ioaddr->lbal_addr);
506 nsect = readb((void __iomem *) ioaddr->nsect_addr);
507 lbal = readb((void __iomem *) ioaddr->lbal_addr);
509 if ((nsect == 0x55) && (lbal == 0xaa))
510 return 1; /* we found a device */
512 return 0; /* nothing found */
516 * ata_devchk - PATA device presence detection
517 * @ap: ATA channel to examine
518 * @device: Device to examine (starting at zero)
520 * Dispatch ATA device presence detection, depending
521 * on whether we are using PIO or MMIO to talk to the
522 * ATA shadow registers.
528 static unsigned int ata_devchk(struct ata_port *ap,
531 if (ap->flags & ATA_FLAG_MMIO)
532 return ata_mmio_devchk(ap, device);
533 return ata_pio_devchk(ap, device);
537 * ata_dev_classify - determine device type based on ATA-spec signature
538 * @tf: ATA taskfile register set for device to be identified
540 * Determine from taskfile register contents whether a device is
541 * ATA or ATAPI, as per "Signature and persistence" section
542 * of ATA/PI spec (volume 1, sect 5.14).
548 * Device type, %ATA_DEV_ATA, %ATA_DEV_ATAPI, or %ATA_DEV_UNKNOWN
549 * the event of failure.
552 unsigned int ata_dev_classify(const struct ata_taskfile *tf)
554 /* Apple's open source Darwin code hints that some devices only
555 * put a proper signature into the LBA mid/high registers,
556 * So, we only check those. It's sufficient for uniqueness.
559 if (((tf->lbam == 0) && (tf->lbah == 0)) ||
560 ((tf->lbam == 0x3c) && (tf->lbah == 0xc3))) {
561 DPRINTK("found ATA device by sig\n");
565 if (((tf->lbam == 0x14) && (tf->lbah == 0xeb)) ||
566 ((tf->lbam == 0x69) && (tf->lbah == 0x96))) {
567 DPRINTK("found ATAPI device by sig\n");
568 return ATA_DEV_ATAPI;
571 DPRINTK("unknown device\n");
572 return ATA_DEV_UNKNOWN;
576 * ata_dev_try_classify - Parse returned ATA device signature
577 * @ap: ATA channel to examine
578 * @device: Device to examine (starting at zero)
579 * @r_err: Value of error register on completion
581 * After an event -- SRST, E.D.D., or SATA COMRESET -- occurs,
582 * an ATA/ATAPI-defined set of values is placed in the ATA
583 * shadow registers, indicating the results of device detection
586 * Select the ATA device, and read the values from the ATA shadow
587 * registers. Then parse according to the Error register value,
588 * and the spec-defined values examined by ata_dev_classify().
594 * Device type - %ATA_DEV_ATA, %ATA_DEV_ATAPI or %ATA_DEV_NONE.
598 ata_dev_try_classify(struct ata_port *ap, unsigned int device, u8 *r_err)
600 struct ata_taskfile tf;
604 ap->ops->dev_select(ap, device);
606 memset(&tf, 0, sizeof(tf));
608 ap->ops->tf_read(ap, &tf);
613 /* see if device passed diags */
616 else if ((device == 0) && (err == 0x81))
621 /* determine if device is ATA or ATAPI */
622 class = ata_dev_classify(&tf);
624 if (class == ATA_DEV_UNKNOWN)
626 if ((class == ATA_DEV_ATA) && (ata_chk_status(ap) == 0))
632 * ata_id_string - Convert IDENTIFY DEVICE page into string
633 * @id: IDENTIFY DEVICE results we will examine
634 * @s: string into which data is output
635 * @ofs: offset into identify device page
636 * @len: length of string to return. must be an even number.
638 * The strings in the IDENTIFY DEVICE page are broken up into
639 * 16-bit chunks. Run through the string, and output each
640 * 8-bit chunk linearly, regardless of platform.
646 void ata_id_string(const u16 *id, unsigned char *s,
647 unsigned int ofs, unsigned int len)
666 * ata_id_c_string - Convert IDENTIFY DEVICE page into C string
667 * @id: IDENTIFY DEVICE results we will examine
668 * @s: string into which data is output
669 * @ofs: offset into identify device page
670 * @len: length of string to return. must be an odd number.
672 * This function is identical to ata_id_string except that it
673 * trims trailing spaces and terminates the resulting string with
674 * null. @len must be actual maximum length (even number) + 1.
679 void ata_id_c_string(const u16 *id, unsigned char *s,
680 unsigned int ofs, unsigned int len)
686 ata_id_string(id, s, ofs, len - 1);
688 p = s + strnlen(s, len - 1);
689 while (p > s && p[-1] == ' ')
694 static u64 ata_id_n_sectors(const u16 *id)
696 if (ata_id_has_lba(id)) {
697 if (ata_id_has_lba48(id))
698 return ata_id_u64(id, 100);
700 return ata_id_u32(id, 60);
702 if (ata_id_current_chs_valid(id))
703 return ata_id_u32(id, 57);
705 return id[1] * id[3] * id[6];
710 * ata_noop_dev_select - Select device 0/1 on ATA bus
711 * @ap: ATA channel to manipulate
712 * @device: ATA device (numbered from zero) to select
714 * This function performs no actual function.
716 * May be used as the dev_select() entry in ata_port_operations.
721 void ata_noop_dev_select (struct ata_port *ap, unsigned int device)
727 * ata_std_dev_select - Select device 0/1 on ATA bus
728 * @ap: ATA channel to manipulate
729 * @device: ATA device (numbered from zero) to select
731 * Use the method defined in the ATA specification to
732 * make either device 0, or device 1, active on the
733 * ATA channel. Works with both PIO and MMIO.
735 * May be used as the dev_select() entry in ata_port_operations.
741 void ata_std_dev_select (struct ata_port *ap, unsigned int device)
746 tmp = ATA_DEVICE_OBS;
748 tmp = ATA_DEVICE_OBS | ATA_DEV1;
750 if (ap->flags & ATA_FLAG_MMIO) {
751 writeb(tmp, (void __iomem *) ap->ioaddr.device_addr);
753 outb(tmp, ap->ioaddr.device_addr);
755 ata_pause(ap); /* needed; also flushes, for mmio */
759 * ata_dev_select - Select device 0/1 on ATA bus
760 * @ap: ATA channel to manipulate
761 * @device: ATA device (numbered from zero) to select
762 * @wait: non-zero to wait for Status register BSY bit to clear
763 * @can_sleep: non-zero if context allows sleeping
765 * Use the method defined in the ATA specification to
766 * make either device 0, or device 1, active on the
769 * This is a high-level version of ata_std_dev_select(),
770 * which additionally provides the services of inserting
771 * the proper pauses and status polling, where needed.
777 void ata_dev_select(struct ata_port *ap, unsigned int device,
778 unsigned int wait, unsigned int can_sleep)
780 if (ata_msg_probe(ap)) {
781 ata_port_printk(ap, KERN_INFO, "ata_dev_select: ENTER, ata%u: "
782 "device %u, wait %u\n",
783 ap->id, device, wait);
789 ap->ops->dev_select(ap, device);
792 if (can_sleep && ap->device[device].class == ATA_DEV_ATAPI)
799 * ata_dump_id - IDENTIFY DEVICE info debugging output
800 * @id: IDENTIFY DEVICE page to dump
802 * Dump selected 16-bit words from the given IDENTIFY DEVICE
809 static inline void ata_dump_id(const u16 *id)
811 DPRINTK("49==0x%04x "
821 DPRINTK("80==0x%04x "
831 DPRINTK("88==0x%04x "
838 * ata_id_xfermask - Compute xfermask from the given IDENTIFY data
839 * @id: IDENTIFY data to compute xfer mask from
841 * Compute the xfermask for this device. This is not as trivial
842 * as it seems if we must consider early devices correctly.
844 * FIXME: pre IDE drive timing (do we care ?).
852 static unsigned int ata_id_xfermask(const u16 *id)
854 unsigned int pio_mask, mwdma_mask, udma_mask;
856 /* Usual case. Word 53 indicates word 64 is valid */
857 if (id[ATA_ID_FIELD_VALID] & (1 << 1)) {
858 pio_mask = id[ATA_ID_PIO_MODES] & 0x03;
862 /* If word 64 isn't valid then Word 51 high byte holds
863 * the PIO timing number for the maximum. Turn it into
866 pio_mask = (2 << (id[ATA_ID_OLD_PIO_MODES] & 0xFF)) - 1 ;
868 /* But wait.. there's more. Design your standards by
869 * committee and you too can get a free iordy field to
870 * process. However its the speeds not the modes that
871 * are supported... Note drivers using the timing API
872 * will get this right anyway
876 mwdma_mask = id[ATA_ID_MWDMA_MODES] & 0x07;
879 if (id[ATA_ID_FIELD_VALID] & (1 << 2))
880 udma_mask = id[ATA_ID_UDMA_MODES] & 0xff;
882 return ata_pack_xfermask(pio_mask, mwdma_mask, udma_mask);
886 * ata_port_queue_task - Queue port_task
887 * @ap: The ata_port to queue port_task for
888 * @fn: workqueue function to be scheduled
889 * @data: data value to pass to workqueue function
890 * @delay: delay time for workqueue function
892 * Schedule @fn(@data) for execution after @delay jiffies using
893 * port_task. There is one port_task per port and it's the
894 * user(low level driver)'s responsibility to make sure that only
895 * one task is active at any given time.
897 * libata core layer takes care of synchronization between
898 * port_task and EH. ata_port_queue_task() may be ignored for EH
902 * Inherited from caller.
904 void ata_port_queue_task(struct ata_port *ap, void (*fn)(void *), void *data,
909 if (ap->flags & ATA_FLAG_FLUSH_PORT_TASK)
912 PREPARE_WORK(&ap->port_task, fn, data);
915 rc = queue_work(ata_wq, &ap->port_task);
917 rc = queue_delayed_work(ata_wq, &ap->port_task, delay);
919 /* rc == 0 means that another user is using port task */
924 * ata_port_flush_task - Flush port_task
925 * @ap: The ata_port to flush port_task for
927 * After this function completes, port_task is guranteed not to
928 * be running or scheduled.
931 * Kernel thread context (may sleep)
933 void ata_port_flush_task(struct ata_port *ap)
939 spin_lock_irqsave(ap->lock, flags);
940 ap->flags |= ATA_FLAG_FLUSH_PORT_TASK;
941 spin_unlock_irqrestore(ap->lock, flags);
943 DPRINTK("flush #1\n");
944 flush_workqueue(ata_wq);
947 * At this point, if a task is running, it's guaranteed to see
948 * the FLUSH flag; thus, it will never queue pio tasks again.
951 if (!cancel_delayed_work(&ap->port_task)) {
953 ata_port_printk(ap, KERN_DEBUG, "%s: flush #2\n", __FUNCTION__);
954 flush_workqueue(ata_wq);
957 spin_lock_irqsave(ap->lock, flags);
958 ap->flags &= ~ATA_FLAG_FLUSH_PORT_TASK;
959 spin_unlock_irqrestore(ap->lock, flags);
962 ata_port_printk(ap, KERN_DEBUG, "%s: EXIT\n", __FUNCTION__);
965 void ata_qc_complete_internal(struct ata_queued_cmd *qc)
967 struct completion *waiting = qc->private_data;
973 * ata_exec_internal - execute libata internal command
974 * @dev: Device to which the command is sent
975 * @tf: Taskfile registers for the command and the result
976 * @cdb: CDB for packet command
977 * @dma_dir: Data tranfer direction of the command
978 * @buf: Data buffer of the command
979 * @buflen: Length of data buffer
981 * Executes libata internal command with timeout. @tf contains
982 * command on entry and result on return. Timeout and error
983 * conditions are reported via return value. No recovery action
984 * is taken after a command times out. It's caller's duty to
985 * clean up after timeout.
988 * None. Should be called with kernel context, might sleep.
991 * Zero on success, AC_ERR_* mask on failure
993 unsigned ata_exec_internal(struct ata_device *dev,
994 struct ata_taskfile *tf, const u8 *cdb,
995 int dma_dir, void *buf, unsigned int buflen)
997 struct ata_port *ap = dev->ap;
998 u8 command = tf->command;
999 struct ata_queued_cmd *qc;
1000 unsigned int tag, preempted_tag;
1001 u32 preempted_sactive, preempted_qc_active;
1002 DECLARE_COMPLETION(wait);
1003 unsigned long flags;
1004 unsigned int err_mask;
1007 spin_lock_irqsave(ap->lock, flags);
1009 /* no internal command while frozen */
1010 if (ap->flags & ATA_FLAG_FROZEN) {
1011 spin_unlock_irqrestore(ap->lock, flags);
1012 return AC_ERR_SYSTEM;
1015 /* initialize internal qc */
1017 /* XXX: Tag 0 is used for drivers with legacy EH as some
1018 * drivers choke if any other tag is given. This breaks
1019 * ata_tag_internal() test for those drivers. Don't use new
1020 * EH stuff without converting to it.
1022 if (ap->ops->error_handler)
1023 tag = ATA_TAG_INTERNAL;
1027 if (test_and_set_bit(tag, &ap->qc_allocated))
1029 qc = __ata_qc_from_tag(ap, tag);
1037 preempted_tag = ap->active_tag;
1038 preempted_sactive = ap->sactive;
1039 preempted_qc_active = ap->qc_active;
1040 ap->active_tag = ATA_TAG_POISON;
1044 /* prepare & issue qc */
1047 memcpy(qc->cdb, cdb, ATAPI_CDB_LEN);
1048 qc->flags |= ATA_QCFLAG_RESULT_TF;
1049 qc->dma_dir = dma_dir;
1050 if (dma_dir != DMA_NONE) {
1051 ata_sg_init_one(qc, buf, buflen);
1052 qc->nsect = buflen / ATA_SECT_SIZE;
1055 qc->private_data = &wait;
1056 qc->complete_fn = ata_qc_complete_internal;
1060 spin_unlock_irqrestore(ap->lock, flags);
1062 rc = wait_for_completion_timeout(&wait, ATA_TMOUT_INTERNAL);
1064 ata_port_flush_task(ap);
1067 spin_lock_irqsave(ap->lock, flags);
1069 /* We're racing with irq here. If we lose, the
1070 * following test prevents us from completing the qc
1071 * twice. If we win, the port is frozen and will be
1072 * cleaned up by ->post_internal_cmd().
1074 if (qc->flags & ATA_QCFLAG_ACTIVE) {
1075 qc->err_mask |= AC_ERR_TIMEOUT;
1077 if (ap->ops->error_handler)
1078 ata_port_freeze(ap);
1080 ata_qc_complete(qc);
1082 if (ata_msg_warn(ap))
1083 ata_dev_printk(dev, KERN_WARNING,
1084 "qc timeout (cmd 0x%x)\n", command);
1087 spin_unlock_irqrestore(ap->lock, flags);
1090 /* do post_internal_cmd */
1091 if (ap->ops->post_internal_cmd)
1092 ap->ops->post_internal_cmd(qc);
1094 if (qc->flags & ATA_QCFLAG_FAILED && !qc->err_mask) {
1095 if (ata_msg_warn(ap))
1096 ata_dev_printk(dev, KERN_WARNING,
1097 "zero err_mask for failed "
1098 "internal command, assuming AC_ERR_OTHER\n");
1099 qc->err_mask |= AC_ERR_OTHER;
1103 spin_lock_irqsave(ap->lock, flags);
1105 *tf = qc->result_tf;
1106 err_mask = qc->err_mask;
1109 ap->active_tag = preempted_tag;
1110 ap->sactive = preempted_sactive;
1111 ap->qc_active = preempted_qc_active;
1113 /* XXX - Some LLDDs (sata_mv) disable port on command failure.
1114 * Until those drivers are fixed, we detect the condition
1115 * here, fail the command with AC_ERR_SYSTEM and reenable the
1118 * Note that this doesn't change any behavior as internal
1119 * command failure results in disabling the device in the
1120 * higher layer for LLDDs without new reset/EH callbacks.
1122 * Kill the following code as soon as those drivers are fixed.
1124 if (ap->flags & ATA_FLAG_DISABLED) {
1125 err_mask |= AC_ERR_SYSTEM;
1129 spin_unlock_irqrestore(ap->lock, flags);
1135 * Execute a 'simple' command, that only consists of the opcode 'cmd' itself,
1136 * without filling any other registers
1138 static int ata_do_simple_cmd(struct ata_device *dev, u8 cmd)
1140 struct ata_taskfile tf;
1143 ata_tf_init(dev, &tf);
1146 tf.flags |= ATA_TFLAG_DEVICE;
1147 tf.protocol = ATA_PROT_NODATA;
1149 err = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0);
1151 ata_dev_printk(dev, KERN_ERR, "%s: ata command failed: %d\n",
1158 * ata_pio_need_iordy - check if iordy needed
1161 * Check if the current speed of the device requires IORDY. Used
1162 * by various controllers for chip configuration.
1165 unsigned int ata_pio_need_iordy(const struct ata_device *adev)
1168 int speed = adev->pio_mode - XFER_PIO_0;
1175 /* If we have no drive specific rule, then PIO 2 is non IORDY */
1177 if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE */
1178 pio = adev->id[ATA_ID_EIDE_PIO];
1179 /* Is the speed faster than the drive allows non IORDY ? */
1181 /* This is cycle times not frequency - watch the logic! */
1182 if (pio > 240) /* PIO2 is 240nS per cycle */
1191 * ata_dev_read_id - Read ID data from the specified device
1192 * @dev: target device
1193 * @p_class: pointer to class of the target device (may be changed)
1194 * @post_reset: is this read ID post-reset?
1195 * @id: buffer to read IDENTIFY data into
1197 * Read ID data from the specified device. ATA_CMD_ID_ATA is
1198 * performed on ATA devices and ATA_CMD_ID_ATAPI on ATAPI
1199 * devices. This function also issues ATA_CMD_INIT_DEV_PARAMS
1200 * for pre-ATA4 drives.
1203 * Kernel thread context (may sleep)
1206 * 0 on success, -errno otherwise.
1208 int ata_dev_read_id(struct ata_device *dev, unsigned int *p_class,
1209 int post_reset, u16 *id)
1211 struct ata_port *ap = dev->ap;
1212 unsigned int class = *p_class;
1213 struct ata_taskfile tf;
1214 unsigned int err_mask = 0;
1218 if (ata_msg_ctl(ap))
1219 ata_dev_printk(dev, KERN_DEBUG, "%s: ENTER, host %u, dev %u\n",
1220 __FUNCTION__, ap->id, dev->devno);
1222 ata_dev_select(ap, dev->devno, 1, 1); /* select device 0/1 */
1225 ata_tf_init(dev, &tf);
1229 tf.command = ATA_CMD_ID_ATA;
1232 tf.command = ATA_CMD_ID_ATAPI;
1236 reason = "unsupported class";
1240 tf.protocol = ATA_PROT_PIO;
1242 err_mask = ata_exec_internal(dev, &tf, NULL, DMA_FROM_DEVICE,
1243 id, sizeof(id[0]) * ATA_ID_WORDS);
1246 reason = "I/O error";
1250 swap_buf_le16(id, ATA_ID_WORDS);
1253 if ((class == ATA_DEV_ATA) != (ata_id_is_ata(id) | ata_id_is_cfa(id))) {
1255 reason = "device reports illegal type";
1259 if (post_reset && class == ATA_DEV_ATA) {
1261 * The exact sequence expected by certain pre-ATA4 drives is:
1264 * INITIALIZE DEVICE PARAMETERS
1266 * Some drives were very specific about that exact sequence.
1268 if (ata_id_major_version(id) < 4 || !ata_id_has_lba(id)) {
1269 err_mask = ata_dev_init_params(dev, id[3], id[6]);
1272 reason = "INIT_DEV_PARAMS failed";
1276 /* current CHS translation info (id[53-58]) might be
1277 * changed. reread the identify device info.
1289 if (ata_msg_warn(ap))
1290 ata_dev_printk(dev, KERN_WARNING, "failed to IDENTIFY "
1291 "(%s, err_mask=0x%x)\n", reason, err_mask);
1295 static inline u8 ata_dev_knobble(struct ata_device *dev)
1297 return ((dev->ap->cbl == ATA_CBL_SATA) && (!ata_id_is_sata(dev->id)));
1300 static void ata_dev_config_ncq(struct ata_device *dev,
1301 char *desc, size_t desc_sz)
1303 struct ata_port *ap = dev->ap;
1304 int hdepth = 0, ddepth = ata_id_queue_depth(dev->id);
1306 if (!ata_id_has_ncq(dev->id)) {
1311 if (ap->flags & ATA_FLAG_NCQ) {
1312 hdepth = min(ap->host->can_queue, ATA_MAX_QUEUE - 1);
1313 dev->flags |= ATA_DFLAG_NCQ;
1316 if (hdepth >= ddepth)
1317 snprintf(desc, desc_sz, "NCQ (depth %d)", ddepth);
1319 snprintf(desc, desc_sz, "NCQ (depth %d/%d)", hdepth, ddepth);
1323 * ata_dev_configure - Configure the specified ATA/ATAPI device
1324 * @dev: Target device to configure
1325 * @print_info: Enable device info printout
1327 * Configure @dev according to @dev->id. Generic and low-level
1328 * driver specific fixups are also applied.
1331 * Kernel thread context (may sleep)
1334 * 0 on success, -errno otherwise
1336 int ata_dev_configure(struct ata_device *dev, int print_info)
1338 struct ata_port *ap = dev->ap;
1339 const u16 *id = dev->id;
1340 unsigned int xfer_mask;
1343 if (!ata_dev_enabled(dev) && ata_msg_info(ap)) {
1344 ata_dev_printk(dev, KERN_INFO, "%s: ENTER/EXIT (host %u, dev %u) -- nodev\n",
1345 __FUNCTION__, ap->id, dev->devno);
1349 if (ata_msg_probe(ap))
1350 ata_dev_printk(dev, KERN_DEBUG, "%s: ENTER, host %u, dev %u\n",
1351 __FUNCTION__, ap->id, dev->devno);
1353 /* print device capabilities */
1354 if (ata_msg_probe(ap))
1355 ata_dev_printk(dev, KERN_DEBUG, "%s: cfg 49:%04x 82:%04x 83:%04x "
1356 "84:%04x 85:%04x 86:%04x 87:%04x 88:%04x\n",
1358 id[49], id[82], id[83], id[84],
1359 id[85], id[86], id[87], id[88]);
1361 /* initialize to-be-configured parameters */
1362 dev->flags &= ~ATA_DFLAG_CFG_MASK;
1363 dev->max_sectors = 0;
1371 * common ATA, ATAPI feature tests
1374 /* find max transfer mode; for printk only */
1375 xfer_mask = ata_id_xfermask(id);
1377 if (ata_msg_probe(ap))
1380 /* ATA-specific feature tests */
1381 if (dev->class == ATA_DEV_ATA) {
1382 dev->n_sectors = ata_id_n_sectors(id);
1384 if (ata_id_has_lba(id)) {
1385 const char *lba_desc;
1389 dev->flags |= ATA_DFLAG_LBA;
1390 if (ata_id_has_lba48(id)) {
1391 dev->flags |= ATA_DFLAG_LBA48;
1396 ata_dev_config_ncq(dev, ncq_desc, sizeof(ncq_desc));
1398 /* print device info to dmesg */
1399 if (ata_msg_info(ap))
1400 ata_dev_printk(dev, KERN_INFO, "ATA-%d, "
1401 "max %s, %Lu sectors: %s %s\n",
1402 ata_id_major_version(id),
1403 ata_mode_string(xfer_mask),
1404 (unsigned long long)dev->n_sectors,
1405 lba_desc, ncq_desc);
1409 /* Default translation */
1410 dev->cylinders = id[1];
1412 dev->sectors = id[6];
1414 if (ata_id_current_chs_valid(id)) {
1415 /* Current CHS translation is valid. */
1416 dev->cylinders = id[54];
1417 dev->heads = id[55];
1418 dev->sectors = id[56];
1421 /* print device info to dmesg */
1422 if (ata_msg_info(ap))
1423 ata_dev_printk(dev, KERN_INFO, "ATA-%d, "
1424 "max %s, %Lu sectors: CHS %u/%u/%u\n",
1425 ata_id_major_version(id),
1426 ata_mode_string(xfer_mask),
1427 (unsigned long long)dev->n_sectors,
1428 dev->cylinders, dev->heads, dev->sectors);
1431 if (dev->id[59] & 0x100) {
1432 dev->multi_count = dev->id[59] & 0xff;
1433 if (ata_msg_info(ap))
1434 ata_dev_printk(dev, KERN_INFO, "ata%u: dev %u multi count %u\n",
1435 ap->id, dev->devno, dev->multi_count);
1441 /* ATAPI-specific feature tests */
1442 else if (dev->class == ATA_DEV_ATAPI) {
1443 char *cdb_intr_string = "";
1445 rc = atapi_cdb_len(id);
1446 if ((rc < 12) || (rc > ATAPI_CDB_LEN)) {
1447 if (ata_msg_warn(ap))
1448 ata_dev_printk(dev, KERN_WARNING,
1449 "unsupported CDB len\n");
1453 dev->cdb_len = (unsigned int) rc;
1455 if (ata_id_cdb_intr(dev->id)) {
1456 dev->flags |= ATA_DFLAG_CDB_INTR;
1457 cdb_intr_string = ", CDB intr";
1460 /* print device info to dmesg */
1461 if (ata_msg_info(ap))
1462 ata_dev_printk(dev, KERN_INFO, "ATAPI, max %s%s\n",
1463 ata_mode_string(xfer_mask),
1467 ap->host->max_cmd_len = 0;
1468 for (i = 0; i < ATA_MAX_DEVICES; i++)
1469 ap->host->max_cmd_len = max_t(unsigned int,
1470 ap->host->max_cmd_len,
1471 ap->device[i].cdb_len);
1473 /* limit bridge transfers to udma5, 200 sectors */
1474 if (ata_dev_knobble(dev)) {
1475 if (ata_msg_info(ap))
1476 ata_dev_printk(dev, KERN_INFO,
1477 "applying bridge limits\n");
1478 dev->udma_mask &= ATA_UDMA5;
1479 dev->max_sectors = ATA_MAX_SECTORS;
1482 if (ap->ops->dev_config)
1483 ap->ops->dev_config(ap, dev);
1485 if (ata_msg_probe(ap))
1486 ata_dev_printk(dev, KERN_DEBUG, "%s: EXIT, drv_stat = 0x%x\n",
1487 __FUNCTION__, ata_chk_status(ap));
1491 if (ata_msg_probe(ap))
1492 ata_dev_printk(dev, KERN_DEBUG,
1493 "%s: EXIT, err\n", __FUNCTION__);
1498 * ata_bus_probe - Reset and probe ATA bus
1501 * Master ATA bus probing function. Initiates a hardware-dependent
1502 * bus reset, then attempts to identify any devices found on
1506 * PCI/etc. bus probe sem.
1509 * Zero on success, negative errno otherwise.
1512 static int ata_bus_probe(struct ata_port *ap)
1514 unsigned int classes[ATA_MAX_DEVICES];
1515 int tries[ATA_MAX_DEVICES];
1516 int i, rc, down_xfermask;
1517 struct ata_device *dev;
1521 for (i = 0; i < ATA_MAX_DEVICES; i++)
1522 tries[i] = ATA_PROBE_MAX_TRIES;
1527 /* reset and determine device classes */
1528 ap->ops->phy_reset(ap);
1530 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1531 dev = &ap->device[i];
1533 if (!(ap->flags & ATA_FLAG_DISABLED) &&
1534 dev->class != ATA_DEV_UNKNOWN)
1535 classes[dev->devno] = dev->class;
1537 classes[dev->devno] = ATA_DEV_NONE;
1539 dev->class = ATA_DEV_UNKNOWN;
1544 /* after the reset the device state is PIO 0 and the controller
1545 state is undefined. Record the mode */
1547 for (i = 0; i < ATA_MAX_DEVICES; i++)
1548 ap->device[i].pio_mode = XFER_PIO_0;
1550 /* read IDENTIFY page and configure devices */
1551 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1552 dev = &ap->device[i];
1555 dev->class = classes[i];
1557 if (!ata_dev_enabled(dev))
1560 rc = ata_dev_read_id(dev, &dev->class, 1, dev->id);
1564 rc = ata_dev_configure(dev, 1);
1569 /* configure transfer mode */
1570 rc = ata_set_mode(ap, &dev);
1576 for (i = 0; i < ATA_MAX_DEVICES; i++)
1577 if (ata_dev_enabled(&ap->device[i]))
1580 /* no device present, disable port */
1581 ata_port_disable(ap);
1582 ap->ops->port_disable(ap);
1589 tries[dev->devno] = 0;
1592 sata_down_spd_limit(ap);
1595 tries[dev->devno]--;
1596 if (down_xfermask &&
1597 ata_down_xfermask_limit(dev, tries[dev->devno] == 1))
1598 tries[dev->devno] = 0;
1601 if (!tries[dev->devno]) {
1602 ata_down_xfermask_limit(dev, 1);
1603 ata_dev_disable(dev);
1610 * ata_port_probe - Mark port as enabled
1611 * @ap: Port for which we indicate enablement
1613 * Modify @ap data structure such that the system
1614 * thinks that the entire port is enabled.
1616 * LOCKING: host_set lock, or some other form of
1620 void ata_port_probe(struct ata_port *ap)
1622 ap->flags &= ~ATA_FLAG_DISABLED;
1626 * sata_print_link_status - Print SATA link status
1627 * @ap: SATA port to printk link status about
1629 * This function prints link speed and status of a SATA link.
1634 static void sata_print_link_status(struct ata_port *ap)
1636 u32 sstatus, scontrol, tmp;
1638 if (sata_scr_read(ap, SCR_STATUS, &sstatus))
1640 sata_scr_read(ap, SCR_CONTROL, &scontrol);
1642 if (ata_port_online(ap)) {
1643 tmp = (sstatus >> 4) & 0xf;
1644 ata_port_printk(ap, KERN_INFO,
1645 "SATA link up %s (SStatus %X SControl %X)\n",
1646 sata_spd_string(tmp), sstatus, scontrol);
1648 ata_port_printk(ap, KERN_INFO,
1649 "SATA link down (SStatus %X SControl %X)\n",
1655 * __sata_phy_reset - Wake/reset a low-level SATA PHY
1656 * @ap: SATA port associated with target SATA PHY.
1658 * This function issues commands to standard SATA Sxxx
1659 * PHY registers, to wake up the phy (and device), and
1660 * clear any reset condition.
1663 * PCI/etc. bus probe sem.
1666 void __sata_phy_reset(struct ata_port *ap)
1669 unsigned long timeout = jiffies + (HZ * 5);
1671 if (ap->flags & ATA_FLAG_SATA_RESET) {
1672 /* issue phy wake/reset */
1673 sata_scr_write_flush(ap, SCR_CONTROL, 0x301);
1674 /* Couldn't find anything in SATA I/II specs, but
1675 * AHCI-1.1 10.4.2 says at least 1 ms. */
1678 /* phy wake/clear reset */
1679 sata_scr_write_flush(ap, SCR_CONTROL, 0x300);
1681 /* wait for phy to become ready, if necessary */
1684 sata_scr_read(ap, SCR_STATUS, &sstatus);
1685 if ((sstatus & 0xf) != 1)
1687 } while (time_before(jiffies, timeout));
1689 /* print link status */
1690 sata_print_link_status(ap);
1692 /* TODO: phy layer with polling, timeouts, etc. */
1693 if (!ata_port_offline(ap))
1696 ata_port_disable(ap);
1698 if (ap->flags & ATA_FLAG_DISABLED)
1701 if (ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT)) {
1702 ata_port_disable(ap);
1706 ap->cbl = ATA_CBL_SATA;
1710 * sata_phy_reset - Reset SATA bus.
1711 * @ap: SATA port associated with target SATA PHY.
1713 * This function resets the SATA bus, and then probes
1714 * the bus for devices.
1717 * PCI/etc. bus probe sem.
1720 void sata_phy_reset(struct ata_port *ap)
1722 __sata_phy_reset(ap);
1723 if (ap->flags & ATA_FLAG_DISABLED)
1729 * ata_dev_pair - return other device on cable
1732 * Obtain the other device on the same cable, or if none is
1733 * present NULL is returned
1736 struct ata_device *ata_dev_pair(struct ata_device *adev)
1738 struct ata_port *ap = adev->ap;
1739 struct ata_device *pair = &ap->device[1 - adev->devno];
1740 if (!ata_dev_enabled(pair))
1746 * ata_port_disable - Disable port.
1747 * @ap: Port to be disabled.
1749 * Modify @ap data structure such that the system
1750 * thinks that the entire port is disabled, and should
1751 * never attempt to probe or communicate with devices
1754 * LOCKING: host_set lock, or some other form of
1758 void ata_port_disable(struct ata_port *ap)
1760 ap->device[0].class = ATA_DEV_NONE;
1761 ap->device[1].class = ATA_DEV_NONE;
1762 ap->flags |= ATA_FLAG_DISABLED;
1766 * sata_down_spd_limit - adjust SATA spd limit downward
1767 * @ap: Port to adjust SATA spd limit for
1769 * Adjust SATA spd limit of @ap downward. Note that this
1770 * function only adjusts the limit. The change must be applied
1771 * using sata_set_spd().
1774 * Inherited from caller.
1777 * 0 on success, negative errno on failure
1779 int sata_down_spd_limit(struct ata_port *ap)
1781 u32 sstatus, spd, mask;
1784 rc = sata_scr_read(ap, SCR_STATUS, &sstatus);
1788 mask = ap->sata_spd_limit;
1791 highbit = fls(mask) - 1;
1792 mask &= ~(1 << highbit);
1794 spd = (sstatus >> 4) & 0xf;
1798 mask &= (1 << spd) - 1;
1802 ap->sata_spd_limit = mask;
1804 ata_port_printk(ap, KERN_WARNING, "limiting SATA link speed to %s\n",
1805 sata_spd_string(fls(mask)));
1810 static int __sata_set_spd_needed(struct ata_port *ap, u32 *scontrol)
1814 if (ap->sata_spd_limit == UINT_MAX)
1817 limit = fls(ap->sata_spd_limit);
1819 spd = (*scontrol >> 4) & 0xf;
1820 *scontrol = (*scontrol & ~0xf0) | ((limit & 0xf) << 4);
1822 return spd != limit;
1826 * sata_set_spd_needed - is SATA spd configuration needed
1827 * @ap: Port in question
1829 * Test whether the spd limit in SControl matches
1830 * @ap->sata_spd_limit. This function is used to determine
1831 * whether hardreset is necessary to apply SATA spd
1835 * Inherited from caller.
1838 * 1 if SATA spd configuration is needed, 0 otherwise.
1840 int sata_set_spd_needed(struct ata_port *ap)
1844 if (sata_scr_read(ap, SCR_CONTROL, &scontrol))
1847 return __sata_set_spd_needed(ap, &scontrol);
1851 * sata_set_spd - set SATA spd according to spd limit
1852 * @ap: Port to set SATA spd for
1854 * Set SATA spd of @ap according to sata_spd_limit.
1857 * Inherited from caller.
1860 * 0 if spd doesn't need to be changed, 1 if spd has been
1861 * changed. Negative errno if SCR registers are inaccessible.
1863 int sata_set_spd(struct ata_port *ap)
1868 if ((rc = sata_scr_read(ap, SCR_CONTROL, &scontrol)))
1871 if (!__sata_set_spd_needed(ap, &scontrol))
1874 if ((rc = sata_scr_write(ap, SCR_CONTROL, scontrol)))
1881 * This mode timing computation functionality is ported over from
1882 * drivers/ide/ide-timing.h and was originally written by Vojtech Pavlik
1885 * PIO 0-5, MWDMA 0-2 and UDMA 0-6 timings (in nanoseconds).
1886 * These were taken from ATA/ATAPI-6 standard, rev 0a, except
1887 * for PIO 5, which is a nonstandard extension and UDMA6, which
1888 * is currently supported only by Maxtor drives.
1891 static const struct ata_timing ata_timing[] = {
1893 { XFER_UDMA_6, 0, 0, 0, 0, 0, 0, 0, 15 },
1894 { XFER_UDMA_5, 0, 0, 0, 0, 0, 0, 0, 20 },
1895 { XFER_UDMA_4, 0, 0, 0, 0, 0, 0, 0, 30 },
1896 { XFER_UDMA_3, 0, 0, 0, 0, 0, 0, 0, 45 },
1898 { XFER_UDMA_2, 0, 0, 0, 0, 0, 0, 0, 60 },
1899 { XFER_UDMA_1, 0, 0, 0, 0, 0, 0, 0, 80 },
1900 { XFER_UDMA_0, 0, 0, 0, 0, 0, 0, 0, 120 },
1902 /* { XFER_UDMA_SLOW, 0, 0, 0, 0, 0, 0, 0, 150 }, */
1904 { XFER_MW_DMA_2, 25, 0, 0, 0, 70, 25, 120, 0 },
1905 { XFER_MW_DMA_1, 45, 0, 0, 0, 80, 50, 150, 0 },
1906 { XFER_MW_DMA_0, 60, 0, 0, 0, 215, 215, 480, 0 },
1908 { XFER_SW_DMA_2, 60, 0, 0, 0, 120, 120, 240, 0 },
1909 { XFER_SW_DMA_1, 90, 0, 0, 0, 240, 240, 480, 0 },
1910 { XFER_SW_DMA_0, 120, 0, 0, 0, 480, 480, 960, 0 },
1912 /* { XFER_PIO_5, 20, 50, 30, 100, 50, 30, 100, 0 }, */
1913 { XFER_PIO_4, 25, 70, 25, 120, 70, 25, 120, 0 },
1914 { XFER_PIO_3, 30, 80, 70, 180, 80, 70, 180, 0 },
1916 { XFER_PIO_2, 30, 290, 40, 330, 100, 90, 240, 0 },
1917 { XFER_PIO_1, 50, 290, 93, 383, 125, 100, 383, 0 },
1918 { XFER_PIO_0, 70, 290, 240, 600, 165, 150, 600, 0 },
1920 /* { XFER_PIO_SLOW, 120, 290, 240, 960, 290, 240, 960, 0 }, */
1925 #define ENOUGH(v,unit) (((v)-1)/(unit)+1)
1926 #define EZ(v,unit) ((v)?ENOUGH(v,unit):0)
1928 static void ata_timing_quantize(const struct ata_timing *t, struct ata_timing *q, int T, int UT)
1930 q->setup = EZ(t->setup * 1000, T);
1931 q->act8b = EZ(t->act8b * 1000, T);
1932 q->rec8b = EZ(t->rec8b * 1000, T);
1933 q->cyc8b = EZ(t->cyc8b * 1000, T);
1934 q->active = EZ(t->active * 1000, T);
1935 q->recover = EZ(t->recover * 1000, T);
1936 q->cycle = EZ(t->cycle * 1000, T);
1937 q->udma = EZ(t->udma * 1000, UT);
1940 void ata_timing_merge(const struct ata_timing *a, const struct ata_timing *b,
1941 struct ata_timing *m, unsigned int what)
1943 if (what & ATA_TIMING_SETUP ) m->setup = max(a->setup, b->setup);
1944 if (what & ATA_TIMING_ACT8B ) m->act8b = max(a->act8b, b->act8b);
1945 if (what & ATA_TIMING_REC8B ) m->rec8b = max(a->rec8b, b->rec8b);
1946 if (what & ATA_TIMING_CYC8B ) m->cyc8b = max(a->cyc8b, b->cyc8b);
1947 if (what & ATA_TIMING_ACTIVE ) m->active = max(a->active, b->active);
1948 if (what & ATA_TIMING_RECOVER) m->recover = max(a->recover, b->recover);
1949 if (what & ATA_TIMING_CYCLE ) m->cycle = max(a->cycle, b->cycle);
1950 if (what & ATA_TIMING_UDMA ) m->udma = max(a->udma, b->udma);
1953 static const struct ata_timing* ata_timing_find_mode(unsigned short speed)
1955 const struct ata_timing *t;
1957 for (t = ata_timing; t->mode != speed; t++)
1958 if (t->mode == 0xFF)
1963 int ata_timing_compute(struct ata_device *adev, unsigned short speed,
1964 struct ata_timing *t, int T, int UT)
1966 const struct ata_timing *s;
1967 struct ata_timing p;
1973 if (!(s = ata_timing_find_mode(speed)))
1976 memcpy(t, s, sizeof(*s));
1979 * If the drive is an EIDE drive, it can tell us it needs extended
1980 * PIO/MW_DMA cycle timing.
1983 if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE drive */
1984 memset(&p, 0, sizeof(p));
1985 if(speed >= XFER_PIO_0 && speed <= XFER_SW_DMA_0) {
1986 if (speed <= XFER_PIO_2) p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO];
1987 else p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO_IORDY];
1988 } else if(speed >= XFER_MW_DMA_0 && speed <= XFER_MW_DMA_2) {
1989 p.cycle = adev->id[ATA_ID_EIDE_DMA_MIN];
1991 ata_timing_merge(&p, t, t, ATA_TIMING_CYCLE | ATA_TIMING_CYC8B);
1995 * Convert the timing to bus clock counts.
1998 ata_timing_quantize(t, t, T, UT);
2001 * Even in DMA/UDMA modes we still use PIO access for IDENTIFY,
2002 * S.M.A.R.T * and some other commands. We have to ensure that the
2003 * DMA cycle timing is slower/equal than the fastest PIO timing.
2006 if (speed > XFER_PIO_4) {
2007 ata_timing_compute(adev, adev->pio_mode, &p, T, UT);
2008 ata_timing_merge(&p, t, t, ATA_TIMING_ALL);
2012 * Lengthen active & recovery time so that cycle time is correct.
2015 if (t->act8b + t->rec8b < t->cyc8b) {
2016 t->act8b += (t->cyc8b - (t->act8b + t->rec8b)) / 2;
2017 t->rec8b = t->cyc8b - t->act8b;
2020 if (t->active + t->recover < t->cycle) {
2021 t->active += (t->cycle - (t->active + t->recover)) / 2;
2022 t->recover = t->cycle - t->active;
2029 * ata_down_xfermask_limit - adjust dev xfer masks downward
2030 * @dev: Device to adjust xfer masks
2031 * @force_pio0: Force PIO0
2033 * Adjust xfer masks of @dev downward. Note that this function
2034 * does not apply the change. Invoking ata_set_mode() afterwards
2035 * will apply the limit.
2038 * Inherited from caller.
2041 * 0 on success, negative errno on failure
2043 int ata_down_xfermask_limit(struct ata_device *dev, int force_pio0)
2045 unsigned long xfer_mask;
2048 xfer_mask = ata_pack_xfermask(dev->pio_mask, dev->mwdma_mask,
2053 /* don't gear down to MWDMA from UDMA, go directly to PIO */
2054 if (xfer_mask & ATA_MASK_UDMA)
2055 xfer_mask &= ~ATA_MASK_MWDMA;
2057 highbit = fls(xfer_mask) - 1;
2058 xfer_mask &= ~(1 << highbit);
2060 xfer_mask &= 1 << ATA_SHIFT_PIO;
2064 ata_unpack_xfermask(xfer_mask, &dev->pio_mask, &dev->mwdma_mask,
2067 ata_dev_printk(dev, KERN_WARNING, "limiting speed to %s\n",
2068 ata_mode_string(xfer_mask));
2076 static int ata_dev_set_mode(struct ata_device *dev)
2078 unsigned int err_mask;
2081 dev->flags &= ~ATA_DFLAG_PIO;
2082 if (dev->xfer_shift == ATA_SHIFT_PIO)
2083 dev->flags |= ATA_DFLAG_PIO;
2085 err_mask = ata_dev_set_xfermode(dev);
2087 ata_dev_printk(dev, KERN_ERR, "failed to set xfermode "
2088 "(err_mask=0x%x)\n", err_mask);
2092 rc = ata_dev_revalidate(dev, 0);
2096 DPRINTK("xfer_shift=%u, xfer_mode=0x%x\n",
2097 dev->xfer_shift, (int)dev->xfer_mode);
2099 ata_dev_printk(dev, KERN_INFO, "configured for %s\n",
2100 ata_mode_string(ata_xfer_mode2mask(dev->xfer_mode)));
2105 * ata_set_mode - Program timings and issue SET FEATURES - XFER
2106 * @ap: port on which timings will be programmed
2107 * @r_failed_dev: out paramter for failed device
2109 * Set ATA device disk transfer mode (PIO3, UDMA6, etc.). If
2110 * ata_set_mode() fails, pointer to the failing device is
2111 * returned in @r_failed_dev.
2114 * PCI/etc. bus probe sem.
2117 * 0 on success, negative errno otherwise
2119 int ata_set_mode(struct ata_port *ap, struct ata_device **r_failed_dev)
2121 struct ata_device *dev;
2122 int i, rc = 0, used_dma = 0, found = 0;
2124 /* has private set_mode? */
2125 if (ap->ops->set_mode) {
2126 /* FIXME: make ->set_mode handle no device case and
2127 * return error code and failing device on failure.
2129 for (i = 0; i < ATA_MAX_DEVICES; i++) {
2130 if (ata_dev_enabled(&ap->device[i])) {
2131 ap->ops->set_mode(ap);
2138 /* step 1: calculate xfer_mask */
2139 for (i = 0; i < ATA_MAX_DEVICES; i++) {
2140 unsigned int pio_mask, dma_mask;
2142 dev = &ap->device[i];
2144 if (!ata_dev_enabled(dev))
2147 ata_dev_xfermask(dev);
2149 pio_mask = ata_pack_xfermask(dev->pio_mask, 0, 0);
2150 dma_mask = ata_pack_xfermask(0, dev->mwdma_mask, dev->udma_mask);
2151 dev->pio_mode = ata_xfer_mask2mode(pio_mask);
2152 dev->dma_mode = ata_xfer_mask2mode(dma_mask);
2161 /* step 2: always set host PIO timings */
2162 for (i = 0; i < ATA_MAX_DEVICES; i++) {
2163 dev = &ap->device[i];
2164 if (!ata_dev_enabled(dev))
2167 if (!dev->pio_mode) {
2168 ata_dev_printk(dev, KERN_WARNING, "no PIO support\n");
2173 dev->xfer_mode = dev->pio_mode;
2174 dev->xfer_shift = ATA_SHIFT_PIO;
2175 if (ap->ops->set_piomode)
2176 ap->ops->set_piomode(ap, dev);
2179 /* step 3: set host DMA timings */
2180 for (i = 0; i < ATA_MAX_DEVICES; i++) {
2181 dev = &ap->device[i];
2183 if (!ata_dev_enabled(dev) || !dev->dma_mode)
2186 dev->xfer_mode = dev->dma_mode;
2187 dev->xfer_shift = ata_xfer_mode2shift(dev->dma_mode);
2188 if (ap->ops->set_dmamode)
2189 ap->ops->set_dmamode(ap, dev);
2192 /* step 4: update devices' xfer mode */
2193 for (i = 0; i < ATA_MAX_DEVICES; i++) {
2194 dev = &ap->device[i];
2196 if (!ata_dev_enabled(dev))
2199 rc = ata_dev_set_mode(dev);
2204 /* Record simplex status. If we selected DMA then the other
2205 * host channels are not permitted to do so.
2207 if (used_dma && (ap->host_set->flags & ATA_HOST_SIMPLEX))
2208 ap->host_set->simplex_claimed = 1;
2210 /* step5: chip specific finalisation */
2211 if (ap->ops->post_set_mode)
2212 ap->ops->post_set_mode(ap);
2216 *r_failed_dev = dev;
2221 * ata_tf_to_host - issue ATA taskfile to host controller
2222 * @ap: port to which command is being issued
2223 * @tf: ATA taskfile register set
2225 * Issues ATA taskfile register set to ATA host controller,
2226 * with proper synchronization with interrupt handler and
2230 * spin_lock_irqsave(host_set lock)
2233 static inline void ata_tf_to_host(struct ata_port *ap,
2234 const struct ata_taskfile *tf)
2236 ap->ops->tf_load(ap, tf);
2237 ap->ops->exec_command(ap, tf);
2241 * ata_busy_sleep - sleep until BSY clears, or timeout
2242 * @ap: port containing status register to be polled
2243 * @tmout_pat: impatience timeout
2244 * @tmout: overall timeout
2246 * Sleep until ATA Status register bit BSY clears,
2247 * or a timeout occurs.
2252 unsigned int ata_busy_sleep (struct ata_port *ap,
2253 unsigned long tmout_pat, unsigned long tmout)
2255 unsigned long timer_start, timeout;
2258 status = ata_busy_wait(ap, ATA_BUSY, 300);
2259 timer_start = jiffies;
2260 timeout = timer_start + tmout_pat;
2261 while ((status & ATA_BUSY) && (time_before(jiffies, timeout))) {
2263 status = ata_busy_wait(ap, ATA_BUSY, 3);
2266 if (status & ATA_BUSY)
2267 ata_port_printk(ap, KERN_WARNING,
2268 "port is slow to respond, please be patient\n");
2270 timeout = timer_start + tmout;
2271 while ((status & ATA_BUSY) && (time_before(jiffies, timeout))) {
2273 status = ata_chk_status(ap);
2276 if (status & ATA_BUSY) {
2277 ata_port_printk(ap, KERN_ERR, "port failed to respond "
2278 "(%lu secs)\n", tmout / HZ);
2285 static void ata_bus_post_reset(struct ata_port *ap, unsigned int devmask)
2287 struct ata_ioports *ioaddr = &ap->ioaddr;
2288 unsigned int dev0 = devmask & (1 << 0);
2289 unsigned int dev1 = devmask & (1 << 1);
2290 unsigned long timeout;
2292 /* if device 0 was found in ata_devchk, wait for its
2296 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
2298 /* if device 1 was found in ata_devchk, wait for
2299 * register access, then wait for BSY to clear
2301 timeout = jiffies + ATA_TMOUT_BOOT;
2305 ap->ops->dev_select(ap, 1);
2306 if (ap->flags & ATA_FLAG_MMIO) {
2307 nsect = readb((void __iomem *) ioaddr->nsect_addr);
2308 lbal = readb((void __iomem *) ioaddr->lbal_addr);
2310 nsect = inb(ioaddr->nsect_addr);
2311 lbal = inb(ioaddr->lbal_addr);
2313 if ((nsect == 1) && (lbal == 1))
2315 if (time_after(jiffies, timeout)) {
2319 msleep(50); /* give drive a breather */
2322 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
2324 /* is all this really necessary? */
2325 ap->ops->dev_select(ap, 0);
2327 ap->ops->dev_select(ap, 1);
2329 ap->ops->dev_select(ap, 0);
2332 static unsigned int ata_bus_softreset(struct ata_port *ap,
2333 unsigned int devmask)
2335 struct ata_ioports *ioaddr = &ap->ioaddr;
2337 DPRINTK("ata%u: bus reset via SRST\n", ap->id);
2339 /* software reset. causes dev0 to be selected */
2340 if (ap->flags & ATA_FLAG_MMIO) {
2341 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
2342 udelay(20); /* FIXME: flush */
2343 writeb(ap->ctl | ATA_SRST, (void __iomem *) ioaddr->ctl_addr);
2344 udelay(20); /* FIXME: flush */
2345 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
2347 outb(ap->ctl, ioaddr->ctl_addr);
2349 outb(ap->ctl | ATA_SRST, ioaddr->ctl_addr);
2351 outb(ap->ctl, ioaddr->ctl_addr);
2354 /* spec mandates ">= 2ms" before checking status.
2355 * We wait 150ms, because that was the magic delay used for
2356 * ATAPI devices in Hale Landis's ATADRVR, for the period of time
2357 * between when the ATA command register is written, and then
2358 * status is checked. Because waiting for "a while" before
2359 * checking status is fine, post SRST, we perform this magic
2360 * delay here as well.
2362 * Old drivers/ide uses the 2mS rule and then waits for ready
2366 /* Before we perform post reset processing we want to see if
2367 * the bus shows 0xFF because the odd clown forgets the D7
2368 * pulldown resistor.
2370 if (ata_check_status(ap) == 0xFF) {
2371 ata_port_printk(ap, KERN_ERR, "SRST failed (status 0xFF)\n");
2372 return AC_ERR_OTHER;
2375 ata_bus_post_reset(ap, devmask);
2381 * ata_bus_reset - reset host port and associated ATA channel
2382 * @ap: port to reset
2384 * This is typically the first time we actually start issuing
2385 * commands to the ATA channel. We wait for BSY to clear, then
2386 * issue EXECUTE DEVICE DIAGNOSTIC command, polling for its
2387 * result. Determine what devices, if any, are on the channel
2388 * by looking at the device 0/1 error register. Look at the signature
2389 * stored in each device's taskfile registers, to determine if
2390 * the device is ATA or ATAPI.
2393 * PCI/etc. bus probe sem.
2394 * Obtains host_set lock.
2397 * Sets ATA_FLAG_DISABLED if bus reset fails.
2400 void ata_bus_reset(struct ata_port *ap)
2402 struct ata_ioports *ioaddr = &ap->ioaddr;
2403 unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS;
2405 unsigned int dev0, dev1 = 0, devmask = 0;
2407 DPRINTK("ENTER, host %u, port %u\n", ap->id, ap->port_no);
2409 /* determine if device 0/1 are present */
2410 if (ap->flags & ATA_FLAG_SATA_RESET)
2413 dev0 = ata_devchk(ap, 0);
2415 dev1 = ata_devchk(ap, 1);
2419 devmask |= (1 << 0);
2421 devmask |= (1 << 1);
2423 /* select device 0 again */
2424 ap->ops->dev_select(ap, 0);
2426 /* issue bus reset */
2427 if (ap->flags & ATA_FLAG_SRST)
2428 if (ata_bus_softreset(ap, devmask))
2432 * determine by signature whether we have ATA or ATAPI devices
2434 ap->device[0].class = ata_dev_try_classify(ap, 0, &err);
2435 if ((slave_possible) && (err != 0x81))
2436 ap->device[1].class = ata_dev_try_classify(ap, 1, &err);
2438 /* re-enable interrupts */
2439 if (ap->ioaddr.ctl_addr) /* FIXME: hack. create a hook instead */
2442 /* is double-select really necessary? */
2443 if (ap->device[1].class != ATA_DEV_NONE)
2444 ap->ops->dev_select(ap, 1);
2445 if (ap->device[0].class != ATA_DEV_NONE)
2446 ap->ops->dev_select(ap, 0);
2448 /* if no devices were detected, disable this port */
2449 if ((ap->device[0].class == ATA_DEV_NONE) &&
2450 (ap->device[1].class == ATA_DEV_NONE))
2453 if (ap->flags & (ATA_FLAG_SATA_RESET | ATA_FLAG_SRST)) {
2454 /* set up device control for ATA_FLAG_SATA_RESET */
2455 if (ap->flags & ATA_FLAG_MMIO)
2456 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
2458 outb(ap->ctl, ioaddr->ctl_addr);
2465 ata_port_printk(ap, KERN_ERR, "disabling port\n");
2466 ap->ops->port_disable(ap);
2472 * sata_phy_debounce - debounce SATA phy status
2473 * @ap: ATA port to debounce SATA phy status for
2474 * @params: timing parameters { interval, duratinon, timeout } in msec
2476 * Make sure SStatus of @ap reaches stable state, determined by
2477 * holding the same value where DET is not 1 for @duration polled
2478 * every @interval, before @timeout. Timeout constraints the
2479 * beginning of the stable state. Because, after hot unplugging,
2480 * DET gets stuck at 1 on some controllers, this functions waits
2481 * until timeout then returns 0 if DET is stable at 1.
2484 * Kernel thread context (may sleep)
2487 * 0 on success, -errno on failure.
2489 int sata_phy_debounce(struct ata_port *ap, const unsigned long *params)
2491 unsigned long interval_msec = params[0];
2492 unsigned long duration = params[1] * HZ / 1000;
2493 unsigned long timeout = jiffies + params[2] * HZ / 1000;
2494 unsigned long last_jiffies;
2498 if ((rc = sata_scr_read(ap, SCR_STATUS, &cur)))
2503 last_jiffies = jiffies;
2506 msleep(interval_msec);
2507 if ((rc = sata_scr_read(ap, SCR_STATUS, &cur)))
2513 if (cur == 1 && time_before(jiffies, timeout))
2515 if (time_after(jiffies, last_jiffies + duration))
2520 /* unstable, start over */
2522 last_jiffies = jiffies;
2525 if (time_after(jiffies, timeout))
2531 * sata_phy_resume - resume SATA phy
2532 * @ap: ATA port to resume SATA phy for
2533 * @params: timing parameters { interval, duratinon, timeout } in msec
2535 * Resume SATA phy of @ap and debounce it.
2538 * Kernel thread context (may sleep)
2541 * 0 on success, -errno on failure.
2543 int sata_phy_resume(struct ata_port *ap, const unsigned long *params)
2548 if ((rc = sata_scr_read(ap, SCR_CONTROL, &scontrol)))
2551 scontrol = (scontrol & 0x0f0) | 0x300;
2553 if ((rc = sata_scr_write(ap, SCR_CONTROL, scontrol)))
2556 /* Some PHYs react badly if SStatus is pounded immediately
2557 * after resuming. Delay 200ms before debouncing.
2561 return sata_phy_debounce(ap, params);
2564 static void ata_wait_spinup(struct ata_port *ap)
2566 struct ata_eh_context *ehc = &ap->eh_context;
2567 unsigned long end, secs;
2570 /* first, debounce phy if SATA */
2571 if (ap->cbl == ATA_CBL_SATA) {
2572 rc = sata_phy_debounce(ap, sata_deb_timing_eh);
2574 /* if debounced successfully and offline, no need to wait */
2575 if ((rc == 0 || rc == -EOPNOTSUPP) && ata_port_offline(ap))
2579 /* okay, let's give the drive time to spin up */
2580 end = ehc->i.hotplug_timestamp + ATA_SPINUP_WAIT * HZ / 1000;
2581 secs = ((end - jiffies) + HZ - 1) / HZ;
2583 if (time_after(jiffies, end))
2587 ata_port_printk(ap, KERN_INFO, "waiting for device to spin up "
2588 "(%lu secs)\n", secs);
2590 schedule_timeout_uninterruptible(end - jiffies);
2594 * ata_std_prereset - prepare for reset
2595 * @ap: ATA port to be reset
2597 * @ap is about to be reset. Initialize it.
2600 * Kernel thread context (may sleep)
2603 * 0 on success, -errno otherwise.
2605 int ata_std_prereset(struct ata_port *ap)
2607 struct ata_eh_context *ehc = &ap->eh_context;
2608 const unsigned long *timing;
2612 if (ehc->i.flags & ATA_EHI_HOTPLUGGED) {
2613 if (ap->flags & ATA_FLAG_HRST_TO_RESUME)
2614 ehc->i.action |= ATA_EH_HARDRESET;
2615 if (ap->flags & ATA_FLAG_SKIP_D2H_BSY)
2616 ata_wait_spinup(ap);
2619 /* if we're about to do hardreset, nothing more to do */
2620 if (ehc->i.action & ATA_EH_HARDRESET)
2623 /* if SATA, resume phy */
2624 if (ap->cbl == ATA_CBL_SATA) {
2625 if (ap->flags & ATA_FLAG_LOADING)
2626 timing = sata_deb_timing_boot;
2628 timing = sata_deb_timing_eh;
2630 rc = sata_phy_resume(ap, timing);
2631 if (rc && rc != -EOPNOTSUPP) {
2632 /* phy resume failed */
2633 ata_port_printk(ap, KERN_WARNING, "failed to resume "
2634 "link for reset (errno=%d)\n", rc);
2639 /* Wait for !BSY if the controller can wait for the first D2H
2640 * Reg FIS and we don't know that no device is attached.
2642 if (!(ap->flags & ATA_FLAG_SKIP_D2H_BSY) && !ata_port_offline(ap))
2643 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
2649 * ata_std_softreset - reset host port via ATA SRST
2650 * @ap: port to reset
2651 * @classes: resulting classes of attached devices
2653 * Reset host port using ATA SRST.
2656 * Kernel thread context (may sleep)
2659 * 0 on success, -errno otherwise.
2661 int ata_std_softreset(struct ata_port *ap, unsigned int *classes)
2663 unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS;
2664 unsigned int devmask = 0, err_mask;
2669 if (ata_port_offline(ap)) {
2670 classes[0] = ATA_DEV_NONE;
2674 /* determine if device 0/1 are present */
2675 if (ata_devchk(ap, 0))
2676 devmask |= (1 << 0);
2677 if (slave_possible && ata_devchk(ap, 1))
2678 devmask |= (1 << 1);
2680 /* select device 0 again */
2681 ap->ops->dev_select(ap, 0);
2683 /* issue bus reset */
2684 DPRINTK("about to softreset, devmask=%x\n", devmask);
2685 err_mask = ata_bus_softreset(ap, devmask);
2687 ata_port_printk(ap, KERN_ERR, "SRST failed (err_mask=0x%x)\n",
2692 /* determine by signature whether we have ATA or ATAPI devices */
2693 classes[0] = ata_dev_try_classify(ap, 0, &err);
2694 if (slave_possible && err != 0x81)
2695 classes[1] = ata_dev_try_classify(ap, 1, &err);
2698 DPRINTK("EXIT, classes[0]=%u [1]=%u\n", classes[0], classes[1]);
2703 * sata_std_hardreset - reset host port via SATA phy reset
2704 * @ap: port to reset
2705 * @class: resulting class of attached device
2707 * SATA phy-reset host port using DET bits of SControl register.
2710 * Kernel thread context (may sleep)
2713 * 0 on success, -errno otherwise.
2715 int sata_std_hardreset(struct ata_port *ap, unsigned int *class)
2722 if (sata_set_spd_needed(ap)) {
2723 /* SATA spec says nothing about how to reconfigure
2724 * spd. To be on the safe side, turn off phy during
2725 * reconfiguration. This works for at least ICH7 AHCI
2728 if ((rc = sata_scr_read(ap, SCR_CONTROL, &scontrol)))
2731 scontrol = (scontrol & 0x0f0) | 0x302;
2733 if ((rc = sata_scr_write(ap, SCR_CONTROL, scontrol)))
2739 /* issue phy wake/reset */
2740 if ((rc = sata_scr_read(ap, SCR_CONTROL, &scontrol)))
2743 scontrol = (scontrol & 0x0f0) | 0x301;
2745 if ((rc = sata_scr_write_flush(ap, SCR_CONTROL, scontrol)))
2748 /* Couldn't find anything in SATA I/II specs, but AHCI-1.1
2749 * 10.4.2 says at least 1 ms.
2753 /* bring phy back */
2754 sata_phy_resume(ap, sata_deb_timing_eh);
2756 /* TODO: phy layer with polling, timeouts, etc. */
2757 if (ata_port_offline(ap)) {
2758 *class = ATA_DEV_NONE;
2759 DPRINTK("EXIT, link offline\n");
2763 if (ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT)) {
2764 ata_port_printk(ap, KERN_ERR,
2765 "COMRESET failed (device not ready)\n");
2769 ap->ops->dev_select(ap, 0); /* probably unnecessary */
2771 *class = ata_dev_try_classify(ap, 0, NULL);
2773 DPRINTK("EXIT, class=%u\n", *class);
2778 * ata_std_postreset - standard postreset callback
2779 * @ap: the target ata_port
2780 * @classes: classes of attached devices
2782 * This function is invoked after a successful reset. Note that
2783 * the device might have been reset more than once using
2784 * different reset methods before postreset is invoked.
2787 * Kernel thread context (may sleep)
2789 void ata_std_postreset(struct ata_port *ap, unsigned int *classes)
2795 /* print link status */
2796 sata_print_link_status(ap);
2799 if (sata_scr_read(ap, SCR_ERROR, &serror) == 0)
2800 sata_scr_write(ap, SCR_ERROR, serror);
2802 /* re-enable interrupts */
2803 if (!ap->ops->error_handler) {
2804 /* FIXME: hack. create a hook instead */
2805 if (ap->ioaddr.ctl_addr)
2809 /* is double-select really necessary? */
2810 if (classes[0] != ATA_DEV_NONE)
2811 ap->ops->dev_select(ap, 1);
2812 if (classes[1] != ATA_DEV_NONE)
2813 ap->ops->dev_select(ap, 0);
2815 /* bail out if no device is present */
2816 if (classes[0] == ATA_DEV_NONE && classes[1] == ATA_DEV_NONE) {
2817 DPRINTK("EXIT, no device\n");
2821 /* set up device control */
2822 if (ap->ioaddr.ctl_addr) {
2823 if (ap->flags & ATA_FLAG_MMIO)
2824 writeb(ap->ctl, (void __iomem *) ap->ioaddr.ctl_addr);
2826 outb(ap->ctl, ap->ioaddr.ctl_addr);
2833 * ata_dev_same_device - Determine whether new ID matches configured device
2834 * @dev: device to compare against
2835 * @new_class: class of the new device
2836 * @new_id: IDENTIFY page of the new device
2838 * Compare @new_class and @new_id against @dev and determine
2839 * whether @dev is the device indicated by @new_class and
2846 * 1 if @dev matches @new_class and @new_id, 0 otherwise.
2848 static int ata_dev_same_device(struct ata_device *dev, unsigned int new_class,
2851 const u16 *old_id = dev->id;
2852 unsigned char model[2][41], serial[2][21];
2855 if (dev->class != new_class) {
2856 ata_dev_printk(dev, KERN_INFO, "class mismatch %d != %d\n",
2857 dev->class, new_class);
2861 ata_id_c_string(old_id, model[0], ATA_ID_PROD_OFS, sizeof(model[0]));
2862 ata_id_c_string(new_id, model[1], ATA_ID_PROD_OFS, sizeof(model[1]));
2863 ata_id_c_string(old_id, serial[0], ATA_ID_SERNO_OFS, sizeof(serial[0]));
2864 ata_id_c_string(new_id, serial[1], ATA_ID_SERNO_OFS, sizeof(serial[1]));
2865 new_n_sectors = ata_id_n_sectors(new_id);
2867 if (strcmp(model[0], model[1])) {
2868 ata_dev_printk(dev, KERN_INFO, "model number mismatch "
2869 "'%s' != '%s'\n", model[0], model[1]);
2873 if (strcmp(serial[0], serial[1])) {
2874 ata_dev_printk(dev, KERN_INFO, "serial number mismatch "
2875 "'%s' != '%s'\n", serial[0], serial[1]);
2879 if (dev->class == ATA_DEV_ATA && dev->n_sectors != new_n_sectors) {
2880 ata_dev_printk(dev, KERN_INFO, "n_sectors mismatch "
2882 (unsigned long long)dev->n_sectors,
2883 (unsigned long long)new_n_sectors);
2891 * ata_dev_revalidate - Revalidate ATA device
2892 * @dev: device to revalidate
2893 * @post_reset: is this revalidation after reset?
2895 * Re-read IDENTIFY page and make sure @dev is still attached to
2899 * Kernel thread context (may sleep)
2902 * 0 on success, negative errno otherwise
2904 int ata_dev_revalidate(struct ata_device *dev, int post_reset)
2906 unsigned int class = dev->class;
2907 u16 *id = (void *)dev->ap->sector_buf;
2910 if (!ata_dev_enabled(dev)) {
2916 rc = ata_dev_read_id(dev, &class, post_reset, id);
2920 /* is the device still there? */
2921 if (!ata_dev_same_device(dev, class, id)) {
2926 memcpy(dev->id, id, sizeof(id[0]) * ATA_ID_WORDS);
2928 /* configure device according to the new ID */
2929 rc = ata_dev_configure(dev, 0);
2934 ata_dev_printk(dev, KERN_ERR, "revalidation failed (errno=%d)\n", rc);
2938 static const char * const ata_dma_blacklist [] = {
2939 "WDC AC11000H", NULL,
2940 "WDC AC22100H", NULL,
2941 "WDC AC32500H", NULL,
2942 "WDC AC33100H", NULL,
2943 "WDC AC31600H", NULL,
2944 "WDC AC32100H", "24.09P07",
2945 "WDC AC23200L", "21.10N21",
2946 "Compaq CRD-8241B", NULL,
2951 "SanDisk SDP3B", NULL,
2952 "SanDisk SDP3B-64", NULL,
2953 "SANYO CD-ROM CRD", NULL,
2954 "HITACHI CDR-8", NULL,
2955 "HITACHI CDR-8335", NULL,
2956 "HITACHI CDR-8435", NULL,
2957 "Toshiba CD-ROM XM-6202B", NULL,
2958 "TOSHIBA CD-ROM XM-1702BC", NULL,
2960 "E-IDE CD-ROM CR-840", NULL,
2961 "CD-ROM Drive/F5A", NULL,
2962 "WPI CDD-820", NULL,
2963 "SAMSUNG CD-ROM SC-148C", NULL,
2964 "SAMSUNG CD-ROM SC", NULL,
2965 "SanDisk SDP3B-64", NULL,
2966 "ATAPI CD-ROM DRIVE 40X MAXIMUM",NULL,
2967 "_NEC DV5800A", NULL,
2968 "SAMSUNG CD-ROM SN-124", "N001"
2971 static int ata_strim(char *s, size_t len)
2973 len = strnlen(s, len);
2975 /* ATAPI specifies that empty space is blank-filled; remove blanks */
2976 while ((len > 0) && (s[len - 1] == ' ')) {
2983 static int ata_dma_blacklisted(const struct ata_device *dev)
2985 unsigned char model_num[40];
2986 unsigned char model_rev[16];
2987 unsigned int nlen, rlen;
2990 /* We don't support polling DMA.
2991 * DMA blacklist those ATAPI devices with CDB-intr (and use PIO)
2992 * if the LLDD handles only interrupts in the HSM_ST_LAST state.
2994 if ((dev->ap->flags & ATA_FLAG_PIO_POLLING) &&
2995 (dev->flags & ATA_DFLAG_CDB_INTR))
2998 ata_id_string(dev->id, model_num, ATA_ID_PROD_OFS,
3000 ata_id_string(dev->id, model_rev, ATA_ID_FW_REV_OFS,
3002 nlen = ata_strim(model_num, sizeof(model_num));
3003 rlen = ata_strim(model_rev, sizeof(model_rev));
3005 for (i = 0; i < ARRAY_SIZE(ata_dma_blacklist); i += 2) {
3006 if (!strncmp(ata_dma_blacklist[i], model_num, nlen)) {
3007 if (ata_dma_blacklist[i+1] == NULL)
3009 if (!strncmp(ata_dma_blacklist[i], model_rev, rlen))
3017 * ata_dev_xfermask - Compute supported xfermask of the given device
3018 * @dev: Device to compute xfermask for
3020 * Compute supported xfermask of @dev and store it in
3021 * dev->*_mask. This function is responsible for applying all
3022 * known limits including host controller limits, device
3025 * FIXME: The current implementation limits all transfer modes to
3026 * the fastest of the lowested device on the port. This is not
3027 * required on most controllers.
3032 static void ata_dev_xfermask(struct ata_device *dev)
3034 struct ata_port *ap = dev->ap;
3035 struct ata_host_set *hs = ap->host_set;
3036 unsigned long xfer_mask;
3039 xfer_mask = ata_pack_xfermask(ap->pio_mask,
3040 ap->mwdma_mask, ap->udma_mask);
3042 /* Apply cable rule here. Don't apply it early because when
3043 * we handle hot plug the cable type can itself change.
3045 if (ap->cbl == ATA_CBL_PATA40)
3046 xfer_mask &= ~(0xF8 << ATA_SHIFT_UDMA);
3048 /* FIXME: Use port-wide xfermask for now */
3049 for (i = 0; i < ATA_MAX_DEVICES; i++) {
3050 struct ata_device *d = &ap->device[i];
3052 if (ata_dev_absent(d))
3055 if (ata_dev_disabled(d)) {
3056 /* to avoid violating device selection timing */
3057 xfer_mask &= ata_pack_xfermask(d->pio_mask,
3058 UINT_MAX, UINT_MAX);
3062 xfer_mask &= ata_pack_xfermask(d->pio_mask,
3063 d->mwdma_mask, d->udma_mask);
3064 xfer_mask &= ata_id_xfermask(d->id);
3065 if (ata_dma_blacklisted(d))
3066 xfer_mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA);
3069 if (ata_dma_blacklisted(dev))
3070 ata_dev_printk(dev, KERN_WARNING,
3071 "device is on DMA blacklist, disabling DMA\n");
3073 if (hs->flags & ATA_HOST_SIMPLEX) {
3074 if (hs->simplex_claimed)
3075 xfer_mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA);
3078 if (ap->ops->mode_filter)
3079 xfer_mask = ap->ops->mode_filter(ap, dev, xfer_mask);
3081 ata_unpack_xfermask(xfer_mask, &dev->pio_mask,
3082 &dev->mwdma_mask, &dev->udma_mask);
3086 * ata_dev_set_xfermode - Issue SET FEATURES - XFER MODE command
3087 * @dev: Device to which command will be sent
3089 * Issue SET FEATURES - XFER MODE command to device @dev
3093 * PCI/etc. bus probe sem.
3096 * 0 on success, AC_ERR_* mask otherwise.
3099 static unsigned int ata_dev_set_xfermode(struct ata_device *dev)
3101 struct ata_taskfile tf;
3102 unsigned int err_mask;
3104 /* set up set-features taskfile */
3105 DPRINTK("set features - xfer mode\n");
3107 ata_tf_init(dev, &tf);
3108 tf.command = ATA_CMD_SET_FEATURES;
3109 tf.feature = SETFEATURES_XFER;
3110 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
3111 tf.protocol = ATA_PROT_NODATA;
3112 tf.nsect = dev->xfer_mode;
3114 err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0);
3116 DPRINTK("EXIT, err_mask=%x\n", err_mask);
3121 * ata_dev_init_params - Issue INIT DEV PARAMS command
3122 * @dev: Device to which command will be sent
3123 * @heads: Number of heads (taskfile parameter)
3124 * @sectors: Number of sectors (taskfile parameter)
3127 * Kernel thread context (may sleep)
3130 * 0 on success, AC_ERR_* mask otherwise.
3132 static unsigned int ata_dev_init_params(struct ata_device *dev,
3133 u16 heads, u16 sectors)
3135 struct ata_taskfile tf;
3136 unsigned int err_mask;
3138 /* Number of sectors per track 1-255. Number of heads 1-16 */
3139 if (sectors < 1 || sectors > 255 || heads < 1 || heads > 16)
3140 return AC_ERR_INVALID;
3142 /* set up init dev params taskfile */
3143 DPRINTK("init dev params \n");
3145 ata_tf_init(dev, &tf);
3146 tf.command = ATA_CMD_INIT_DEV_PARAMS;
3147 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
3148 tf.protocol = ATA_PROT_NODATA;
3150 tf.device |= (heads - 1) & 0x0f; /* max head = num. of heads - 1 */
3152 err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0);
3154 DPRINTK("EXIT, err_mask=%x\n", err_mask);
3159 * ata_sg_clean - Unmap DMA memory associated with command
3160 * @qc: Command containing DMA memory to be released
3162 * Unmap all mapped DMA memory associated with this command.
3165 * spin_lock_irqsave(host_set lock)
3168 static void ata_sg_clean(struct ata_queued_cmd *qc)
3170 struct ata_port *ap = qc->ap;
3171 struct scatterlist *sg = qc->__sg;
3172 int dir = qc->dma_dir;
3173 void *pad_buf = NULL;
3175 WARN_ON(!(qc->flags & ATA_QCFLAG_DMAMAP));
3176 WARN_ON(sg == NULL);
3178 if (qc->flags & ATA_QCFLAG_SINGLE)
3179 WARN_ON(qc->n_elem > 1);
3181 VPRINTK("unmapping %u sg elements\n", qc->n_elem);
3183 /* if we padded the buffer out to 32-bit bound, and data
3184 * xfer direction is from-device, we must copy from the
3185 * pad buffer back into the supplied buffer
3187 if (qc->pad_len && !(qc->tf.flags & ATA_TFLAG_WRITE))
3188 pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
3190 if (qc->flags & ATA_QCFLAG_SG) {
3192 dma_unmap_sg(ap->dev, sg, qc->n_elem, dir);
3193 /* restore last sg */
3194 sg[qc->orig_n_elem - 1].length += qc->pad_len;
3196 struct scatterlist *psg = &qc->pad_sgent;
3197 void *addr = kmap_atomic(psg->page, KM_IRQ0);
3198 memcpy(addr + psg->offset, pad_buf, qc->pad_len);
3199 kunmap_atomic(addr, KM_IRQ0);
3203 dma_unmap_single(ap->dev,
3204 sg_dma_address(&sg[0]), sg_dma_len(&sg[0]),
3207 sg->length += qc->pad_len;
3209 memcpy(qc->buf_virt + sg->length - qc->pad_len,
3210 pad_buf, qc->pad_len);
3213 qc->flags &= ~ATA_QCFLAG_DMAMAP;
3218 * ata_fill_sg - Fill PCI IDE PRD table
3219 * @qc: Metadata associated with taskfile to be transferred
3221 * Fill PCI IDE PRD (scatter-gather) table with segments
3222 * associated with the current disk command.
3225 * spin_lock_irqsave(host_set lock)
3228 static void ata_fill_sg(struct ata_queued_cmd *qc)
3230 struct ata_port *ap = qc->ap;
3231 struct scatterlist *sg;
3234 WARN_ON(qc->__sg == NULL);
3235 WARN_ON(qc->n_elem == 0 && qc->pad_len == 0);
3238 ata_for_each_sg(sg, qc) {
3242 /* determine if physical DMA addr spans 64K boundary.
3243 * Note h/w doesn't support 64-bit, so we unconditionally
3244 * truncate dma_addr_t to u32.
3246 addr = (u32) sg_dma_address(sg);
3247 sg_len = sg_dma_len(sg);
3250 offset = addr & 0xffff;
3252 if ((offset + sg_len) > 0x10000)
3253 len = 0x10000 - offset;
3255 ap->prd[idx].addr = cpu_to_le32(addr);
3256 ap->prd[idx].flags_len = cpu_to_le32(len & 0xffff);
3257 VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", idx, addr, len);
3266 ap->prd[idx - 1].flags_len |= cpu_to_le32(ATA_PRD_EOT);
3269 * ata_check_atapi_dma - Check whether ATAPI DMA can be supported
3270 * @qc: Metadata associated with taskfile to check
3272 * Allow low-level driver to filter ATA PACKET commands, returning
3273 * a status indicating whether or not it is OK to use DMA for the
3274 * supplied PACKET command.
3277 * spin_lock_irqsave(host_set lock)
3279 * RETURNS: 0 when ATAPI DMA can be used
3282 int ata_check_atapi_dma(struct ata_queued_cmd *qc)
3284 struct ata_port *ap = qc->ap;
3285 int rc = 0; /* Assume ATAPI DMA is OK by default */
3287 if (ap->ops->check_atapi_dma)
3288 rc = ap->ops->check_atapi_dma(qc);
3293 * ata_qc_prep - Prepare taskfile for submission
3294 * @qc: Metadata associated with taskfile to be prepared
3296 * Prepare ATA taskfile for submission.
3299 * spin_lock_irqsave(host_set lock)
3301 void ata_qc_prep(struct ata_queued_cmd *qc)
3303 if (!(qc->flags & ATA_QCFLAG_DMAMAP))
3309 void ata_noop_qc_prep(struct ata_queued_cmd *qc) { }
3312 * ata_sg_init_one - Associate command with memory buffer
3313 * @qc: Command to be associated
3314 * @buf: Memory buffer
3315 * @buflen: Length of memory buffer, in bytes.
3317 * Initialize the data-related elements of queued_cmd @qc
3318 * to point to a single memory buffer, @buf of byte length @buflen.
3321 * spin_lock_irqsave(host_set lock)
3324 void ata_sg_init_one(struct ata_queued_cmd *qc, void *buf, unsigned int buflen)
3326 struct scatterlist *sg;
3328 qc->flags |= ATA_QCFLAG_SINGLE;
3330 memset(&qc->sgent, 0, sizeof(qc->sgent));
3331 qc->__sg = &qc->sgent;
3333 qc->orig_n_elem = 1;
3335 qc->nbytes = buflen;
3338 sg_init_one(sg, buf, buflen);
3342 * ata_sg_init - Associate command with scatter-gather table.
3343 * @qc: Command to be associated
3344 * @sg: Scatter-gather table.
3345 * @n_elem: Number of elements in s/g table.
3347 * Initialize the data-related elements of queued_cmd @qc
3348 * to point to a scatter-gather table @sg, containing @n_elem
3352 * spin_lock_irqsave(host_set lock)
3355 void ata_sg_init(struct ata_queued_cmd *qc, struct scatterlist *sg,
3356 unsigned int n_elem)
3358 qc->flags |= ATA_QCFLAG_SG;
3360 qc->n_elem = n_elem;
3361 qc->orig_n_elem = n_elem;
3365 * ata_sg_setup_one - DMA-map the memory buffer associated with a command.
3366 * @qc: Command with memory buffer to be mapped.
3368 * DMA-map the memory buffer associated with queued_cmd @qc.
3371 * spin_lock_irqsave(host_set lock)
3374 * Zero on success, negative on error.
3377 static int ata_sg_setup_one(struct ata_queued_cmd *qc)
3379 struct ata_port *ap = qc->ap;
3380 int dir = qc->dma_dir;
3381 struct scatterlist *sg = qc->__sg;
3382 dma_addr_t dma_address;
3385 /* we must lengthen transfers to end on a 32-bit boundary */
3386 qc->pad_len = sg->length & 3;
3388 void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
3389 struct scatterlist *psg = &qc->pad_sgent;
3391 WARN_ON(qc->dev->class != ATA_DEV_ATAPI);
3393 memset(pad_buf, 0, ATA_DMA_PAD_SZ);
3395 if (qc->tf.flags & ATA_TFLAG_WRITE)
3396 memcpy(pad_buf, qc->buf_virt + sg->length - qc->pad_len,
3399 sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ);
3400 sg_dma_len(psg) = ATA_DMA_PAD_SZ;
3402 sg->length -= qc->pad_len;
3403 if (sg->length == 0)
3406 DPRINTK("padding done, sg->length=%u pad_len=%u\n",
3407 sg->length, qc->pad_len);
3415 dma_address = dma_map_single(ap->dev, qc->buf_virt,
3417 if (dma_mapping_error(dma_address)) {
3419 sg->length += qc->pad_len;
3423 sg_dma_address(sg) = dma_address;
3424 sg_dma_len(sg) = sg->length;
3427 DPRINTK("mapped buffer of %d bytes for %s\n", sg_dma_len(sg),
3428 qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
3434 * ata_sg_setup - DMA-map the scatter-gather table associated with a command.
3435 * @qc: Command with scatter-gather table to be mapped.
3437 * DMA-map the scatter-gather table associated with queued_cmd @qc.
3440 * spin_lock_irqsave(host_set lock)
3443 * Zero on success, negative on error.
3447 static int ata_sg_setup(struct ata_queued_cmd *qc)
3449 struct ata_port *ap = qc->ap;
3450 struct scatterlist *sg = qc->__sg;
3451 struct scatterlist *lsg = &sg[qc->n_elem - 1];
3452 int n_elem, pre_n_elem, dir, trim_sg = 0;
3454 VPRINTK("ENTER, ata%u\n", ap->id);
3455 WARN_ON(!(qc->flags & ATA_QCFLAG_SG));
3457 /* we must lengthen transfers to end on a 32-bit boundary */
3458 qc->pad_len = lsg->length & 3;
3460 void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
3461 struct scatterlist *psg = &qc->pad_sgent;
3462 unsigned int offset;
3464 WARN_ON(qc->dev->class != ATA_DEV_ATAPI);
3466 memset(pad_buf, 0, ATA_DMA_PAD_SZ);
3469 * psg->page/offset are used to copy to-be-written
3470 * data in this function or read data in ata_sg_clean.
3472 offset = lsg->offset + lsg->length - qc->pad_len;
3473 psg->page = nth_page(lsg->page, offset >> PAGE_SHIFT);
3474 psg->offset = offset_in_page(offset);
3476 if (qc->tf.flags & ATA_TFLAG_WRITE) {
3477 void *addr = kmap_atomic(psg->page, KM_IRQ0);
3478 memcpy(pad_buf, addr + psg->offset, qc->pad_len);
3479 kunmap_atomic(addr, KM_IRQ0);
3482 sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ);
3483 sg_dma_len(psg) = ATA_DMA_PAD_SZ;
3485 lsg->length -= qc->pad_len;
3486 if (lsg->length == 0)
3489 DPRINTK("padding done, sg[%d].length=%u pad_len=%u\n",
3490 qc->n_elem - 1, lsg->length, qc->pad_len);
3493 pre_n_elem = qc->n_elem;
3494 if (trim_sg && pre_n_elem)
3503 n_elem = dma_map_sg(ap->dev, sg, pre_n_elem, dir);
3505 /* restore last sg */
3506 lsg->length += qc->pad_len;
3510 DPRINTK("%d sg elements mapped\n", n_elem);
3513 qc->n_elem = n_elem;
3519 * swap_buf_le16 - swap halves of 16-bit words in place
3520 * @buf: Buffer to swap
3521 * @buf_words: Number of 16-bit words in buffer.
3523 * Swap halves of 16-bit words if needed to convert from
3524 * little-endian byte order to native cpu byte order, or
3528 * Inherited from caller.
3530 void swap_buf_le16(u16 *buf, unsigned int buf_words)
3535 for (i = 0; i < buf_words; i++)
3536 buf[i] = le16_to_cpu(buf[i]);
3537 #endif /* __BIG_ENDIAN */
3541 * ata_mmio_data_xfer - Transfer data by MMIO
3542 * @adev: device for this I/O
3544 * @buflen: buffer length
3545 * @write_data: read/write
3547 * Transfer data from/to the device data register by MMIO.
3550 * Inherited from caller.
3553 void ata_mmio_data_xfer(struct ata_device *adev, unsigned char *buf,
3554 unsigned int buflen, int write_data)
3556 struct ata_port *ap = adev->ap;
3558 unsigned int words = buflen >> 1;
3559 u16 *buf16 = (u16 *) buf;
3560 void __iomem *mmio = (void __iomem *)ap->ioaddr.data_addr;
3562 /* Transfer multiple of 2 bytes */
3564 for (i = 0; i < words; i++)
3565 writew(le16_to_cpu(buf16[i]), mmio);
3567 for (i = 0; i < words; i++)
3568 buf16[i] = cpu_to_le16(readw(mmio));
3571 /* Transfer trailing 1 byte, if any. */
3572 if (unlikely(buflen & 0x01)) {
3573 u16 align_buf[1] = { 0 };
3574 unsigned char *trailing_buf = buf + buflen - 1;
3577 memcpy(align_buf, trailing_buf, 1);
3578 writew(le16_to_cpu(align_buf[0]), mmio);
3580 align_buf[0] = cpu_to_le16(readw(mmio));
3581 memcpy(trailing_buf, align_buf, 1);
3587 * ata_pio_data_xfer - Transfer data by PIO
3588 * @adev: device to target
3590 * @buflen: buffer length
3591 * @write_data: read/write
3593 * Transfer data from/to the device data register by PIO.
3596 * Inherited from caller.
3599 void ata_pio_data_xfer(struct ata_device *adev, unsigned char *buf,
3600 unsigned int buflen, int write_data)
3602 struct ata_port *ap = adev->ap;
3603 unsigned int words = buflen >> 1;
3605 /* Transfer multiple of 2 bytes */
3607 outsw(ap->ioaddr.data_addr, buf, words);
3609 insw(ap->ioaddr.data_addr, buf, words);
3611 /* Transfer trailing 1 byte, if any. */
3612 if (unlikely(buflen & 0x01)) {
3613 u16 align_buf[1] = { 0 };
3614 unsigned char *trailing_buf = buf + buflen - 1;
3617 memcpy(align_buf, trailing_buf, 1);
3618 outw(le16_to_cpu(align_buf[0]), ap->ioaddr.data_addr);
3620 align_buf[0] = cpu_to_le16(inw(ap->ioaddr.data_addr));
3621 memcpy(trailing_buf, align_buf, 1);
3627 * ata_pio_data_xfer_noirq - Transfer data by PIO
3628 * @adev: device to target
3630 * @buflen: buffer length
3631 * @write_data: read/write
3633 * Transfer data from/to the device data register by PIO. Do the
3634 * transfer with interrupts disabled.
3637 * Inherited from caller.
3640 void ata_pio_data_xfer_noirq(struct ata_device *adev, unsigned char *buf,
3641 unsigned int buflen, int write_data)
3643 unsigned long flags;
3644 local_irq_save(flags);
3645 ata_pio_data_xfer(adev, buf, buflen, write_data);
3646 local_irq_restore(flags);
3651 * ata_pio_sector - Transfer ATA_SECT_SIZE (512 bytes) of data.
3652 * @qc: Command on going
3654 * Transfer ATA_SECT_SIZE of data from/to the ATA device.
3657 * Inherited from caller.
3660 static void ata_pio_sector(struct ata_queued_cmd *qc)
3662 int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
3663 struct scatterlist *sg = qc->__sg;
3664 struct ata_port *ap = qc->ap;
3666 unsigned int offset;
3669 if (qc->cursect == (qc->nsect - 1))
3670 ap->hsm_task_state = HSM_ST_LAST;
3672 page = sg[qc->cursg].page;
3673 offset = sg[qc->cursg].offset + qc->cursg_ofs * ATA_SECT_SIZE;
3675 /* get the current page and offset */
3676 page = nth_page(page, (offset >> PAGE_SHIFT));
3677 offset %= PAGE_SIZE;
3679 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
3681 if (PageHighMem(page)) {
3682 unsigned long flags;
3684 /* FIXME: use a bounce buffer */
3685 local_irq_save(flags);
3686 buf = kmap_atomic(page, KM_IRQ0);
3688 /* do the actual data transfer */
3689 ap->ops->data_xfer(qc->dev, buf + offset, ATA_SECT_SIZE, do_write);
3691 kunmap_atomic(buf, KM_IRQ0);
3692 local_irq_restore(flags);
3694 buf = page_address(page);
3695 ap->ops->data_xfer(qc->dev, buf + offset, ATA_SECT_SIZE, do_write);
3701 if ((qc->cursg_ofs * ATA_SECT_SIZE) == (&sg[qc->cursg])->length) {
3708 * ata_pio_sectors - Transfer one or many 512-byte sectors.
3709 * @qc: Command on going
3711 * Transfer one or many ATA_SECT_SIZE of data from/to the
3712 * ATA device for the DRQ request.
3715 * Inherited from caller.
3718 static void ata_pio_sectors(struct ata_queued_cmd *qc)
3720 if (is_multi_taskfile(&qc->tf)) {
3721 /* READ/WRITE MULTIPLE */
3724 WARN_ON(qc->dev->multi_count == 0);
3726 nsect = min(qc->nsect - qc->cursect, qc->dev->multi_count);
3734 * atapi_send_cdb - Write CDB bytes to hardware
3735 * @ap: Port to which ATAPI device is attached.
3736 * @qc: Taskfile currently active
3738 * When device has indicated its readiness to accept
3739 * a CDB, this function is called. Send the CDB.
3745 static void atapi_send_cdb(struct ata_port *ap, struct ata_queued_cmd *qc)
3748 DPRINTK("send cdb\n");
3749 WARN_ON(qc->dev->cdb_len < 12);
3751 ap->ops->data_xfer(qc->dev, qc->cdb, qc->dev->cdb_len, 1);
3752 ata_altstatus(ap); /* flush */
3754 switch (qc->tf.protocol) {
3755 case ATA_PROT_ATAPI:
3756 ap->hsm_task_state = HSM_ST;
3758 case ATA_PROT_ATAPI_NODATA:
3759 ap->hsm_task_state = HSM_ST_LAST;
3761 case ATA_PROT_ATAPI_DMA:
3762 ap->hsm_task_state = HSM_ST_LAST;
3763 /* initiate bmdma */
3764 ap->ops->bmdma_start(qc);
3770 * __atapi_pio_bytes - Transfer data from/to the ATAPI device.
3771 * @qc: Command on going
3772 * @bytes: number of bytes
3774 * Transfer Transfer data from/to the ATAPI device.
3777 * Inherited from caller.
3781 static void __atapi_pio_bytes(struct ata_queued_cmd *qc, unsigned int bytes)
3783 int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
3784 struct scatterlist *sg = qc->__sg;
3785 struct ata_port *ap = qc->ap;
3788 unsigned int offset, count;
3790 if (qc->curbytes + bytes >= qc->nbytes)
3791 ap->hsm_task_state = HSM_ST_LAST;
3794 if (unlikely(qc->cursg >= qc->n_elem)) {
3796 * The end of qc->sg is reached and the device expects
3797 * more data to transfer. In order not to overrun qc->sg
3798 * and fulfill length specified in the byte count register,
3799 * - for read case, discard trailing data from the device
3800 * - for write case, padding zero data to the device
3802 u16 pad_buf[1] = { 0 };
3803 unsigned int words = bytes >> 1;
3806 if (words) /* warning if bytes > 1 */
3807 ata_dev_printk(qc->dev, KERN_WARNING,
3808 "%u bytes trailing data\n", bytes);
3810 for (i = 0; i < words; i++)
3811 ap->ops->data_xfer(qc->dev, (unsigned char*)pad_buf, 2, do_write);
3813 ap->hsm_task_state = HSM_ST_LAST;
3817 sg = &qc->__sg[qc->cursg];
3820 offset = sg->offset + qc->cursg_ofs;
3822 /* get the current page and offset */
3823 page = nth_page(page, (offset >> PAGE_SHIFT));
3824 offset %= PAGE_SIZE;
3826 /* don't overrun current sg */
3827 count = min(sg->length - qc->cursg_ofs, bytes);
3829 /* don't cross page boundaries */
3830 count = min(count, (unsigned int)PAGE_SIZE - offset);
3832 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
3834 if (PageHighMem(page)) {
3835 unsigned long flags;
3837 /* FIXME: use bounce buffer */
3838 local_irq_save(flags);
3839 buf = kmap_atomic(page, KM_IRQ0);
3841 /* do the actual data transfer */
3842 ap->ops->data_xfer(qc->dev, buf + offset, count, do_write);
3844 kunmap_atomic(buf, KM_IRQ0);
3845 local_irq_restore(flags);
3847 buf = page_address(page);
3848 ap->ops->data_xfer(qc->dev, buf + offset, count, do_write);
3852 qc->curbytes += count;
3853 qc->cursg_ofs += count;
3855 if (qc->cursg_ofs == sg->length) {
3865 * atapi_pio_bytes - Transfer data from/to the ATAPI device.
3866 * @qc: Command on going
3868 * Transfer Transfer data from/to the ATAPI device.
3871 * Inherited from caller.
3874 static void atapi_pio_bytes(struct ata_queued_cmd *qc)
3876 struct ata_port *ap = qc->ap;
3877 struct ata_device *dev = qc->dev;
3878 unsigned int ireason, bc_lo, bc_hi, bytes;
3879 int i_write, do_write = (qc->tf.flags & ATA_TFLAG_WRITE) ? 1 : 0;
3881 /* Abuse qc->result_tf for temp storage of intermediate TF
3882 * here to save some kernel stack usage.
3883 * For normal completion, qc->result_tf is not relevant. For
3884 * error, qc->result_tf is later overwritten by ata_qc_complete().
3885 * So, the correctness of qc->result_tf is not affected.
3887 ap->ops->tf_read(ap, &qc->result_tf);
3888 ireason = qc->result_tf.nsect;
3889 bc_lo = qc->result_tf.lbam;
3890 bc_hi = qc->result_tf.lbah;
3891 bytes = (bc_hi << 8) | bc_lo;
3893 /* shall be cleared to zero, indicating xfer of data */
3894 if (ireason & (1 << 0))
3897 /* make sure transfer direction matches expected */
3898 i_write = ((ireason & (1 << 1)) == 0) ? 1 : 0;
3899 if (do_write != i_write)
3902 VPRINTK("ata%u: xfering %d bytes\n", ap->id, bytes);
3904 __atapi_pio_bytes(qc, bytes);
3909 ata_dev_printk(dev, KERN_INFO, "ATAPI check failed\n");
3910 qc->err_mask |= AC_ERR_HSM;
3911 ap->hsm_task_state = HSM_ST_ERR;
3915 * ata_hsm_ok_in_wq - Check if the qc can be handled in the workqueue.
3916 * @ap: the target ata_port
3920 * 1 if ok in workqueue, 0 otherwise.
3923 static inline int ata_hsm_ok_in_wq(struct ata_port *ap, struct ata_queued_cmd *qc)
3925 if (qc->tf.flags & ATA_TFLAG_POLLING)
3928 if (ap->hsm_task_state == HSM_ST_FIRST) {
3929 if (qc->tf.protocol == ATA_PROT_PIO &&
3930 (qc->tf.flags & ATA_TFLAG_WRITE))
3933 if (is_atapi_taskfile(&qc->tf) &&
3934 !(qc->dev->flags & ATA_DFLAG_CDB_INTR))
3942 * ata_hsm_qc_complete - finish a qc running on standard HSM
3943 * @qc: Command to complete
3944 * @in_wq: 1 if called from workqueue, 0 otherwise
3946 * Finish @qc which is running on standard HSM.
3949 * If @in_wq is zero, spin_lock_irqsave(host_set lock).
3950 * Otherwise, none on entry and grabs host lock.
3952 static void ata_hsm_qc_complete(struct ata_queued_cmd *qc, int in_wq)
3954 struct ata_port *ap = qc->ap;
3955 unsigned long flags;
3957 if (ap->ops->error_handler) {
3959 spin_lock_irqsave(ap->lock, flags);
3961 /* EH might have kicked in while host_set lock
3964 qc = ata_qc_from_tag(ap, qc->tag);
3966 if (likely(!(qc->err_mask & AC_ERR_HSM))) {
3968 ata_qc_complete(qc);
3970 ata_port_freeze(ap);
3973 spin_unlock_irqrestore(ap->lock, flags);
3975 if (likely(!(qc->err_mask & AC_ERR_HSM)))
3976 ata_qc_complete(qc);
3978 ata_port_freeze(ap);
3982 spin_lock_irqsave(ap->lock, flags);
3984 ata_qc_complete(qc);
3985 spin_unlock_irqrestore(ap->lock, flags);
3987 ata_qc_complete(qc);
3990 ata_altstatus(ap); /* flush */
3994 * ata_hsm_move - move the HSM to the next state.
3995 * @ap: the target ata_port
3997 * @status: current device status
3998 * @in_wq: 1 if called from workqueue, 0 otherwise
4001 * 1 when poll next status needed, 0 otherwise.
4003 int ata_hsm_move(struct ata_port *ap, struct ata_queued_cmd *qc,
4004 u8 status, int in_wq)
4006 unsigned long flags = 0;
4009 WARN_ON((qc->flags & ATA_QCFLAG_ACTIVE) == 0);
4011 /* Make sure ata_qc_issue_prot() does not throw things
4012 * like DMA polling into the workqueue. Notice that
4013 * in_wq is not equivalent to (qc->tf.flags & ATA_TFLAG_POLLING).
4015 WARN_ON(in_wq != ata_hsm_ok_in_wq(ap, qc));
4018 DPRINTK("ata%u: protocol %d task_state %d (dev_stat 0x%X)\n",
4019 ap->id, qc->tf.protocol, ap->hsm_task_state, status);
4021 switch (ap->hsm_task_state) {
4023 /* Send first data block or PACKET CDB */
4025 /* If polling, we will stay in the work queue after
4026 * sending the data. Otherwise, interrupt handler
4027 * takes over after sending the data.
4029 poll_next = (qc->tf.flags & ATA_TFLAG_POLLING);
4031 /* check device status */
4032 if (unlikely((status & ATA_DRQ) == 0)) {
4033 /* handle BSY=0, DRQ=0 as error */
4034 if (likely(status & (ATA_ERR | ATA_DF)))
4035 /* device stops HSM for abort/error */
4036 qc->err_mask |= AC_ERR_DEV;
4038 /* HSM violation. Let EH handle this */
4039 qc->err_mask |= AC_ERR_HSM;
4041 ap->hsm_task_state = HSM_ST_ERR;
4045 /* Device should not ask for data transfer (DRQ=1)
4046 * when it finds something wrong.
4047 * We ignore DRQ here and stop the HSM by
4048 * changing hsm_task_state to HSM_ST_ERR and
4049 * let the EH abort the command or reset the device.
4051 if (unlikely(status & (ATA_ERR | ATA_DF))) {
4052 printk(KERN_WARNING "ata%d: DRQ=1 with device error, dev_stat 0x%X\n",
4054 qc->err_mask |= AC_ERR_HSM;
4055 ap->hsm_task_state = HSM_ST_ERR;
4059 /* Send the CDB (atapi) or the first data block (ata pio out).
4060 * During the state transition, interrupt handler shouldn't
4061 * be invoked before the data transfer is complete and
4062 * hsm_task_state is changed. Hence, the following locking.
4065 spin_lock_irqsave(ap->lock, flags);
4067 if (qc->tf.protocol == ATA_PROT_PIO) {
4068 /* PIO data out protocol.
4069 * send first data block.
4072 /* ata_pio_sectors() might change the state
4073 * to HSM_ST_LAST. so, the state is changed here
4074 * before ata_pio_sectors().
4076 ap->hsm_task_state = HSM_ST;
4077 ata_pio_sectors(qc);
4078 ata_altstatus(ap); /* flush */
4081 atapi_send_cdb(ap, qc);
4084 spin_unlock_irqrestore(ap->lock, flags);
4086 /* if polling, ata_pio_task() handles the rest.
4087 * otherwise, interrupt handler takes over from here.
4092 /* complete command or read/write the data register */
4093 if (qc->tf.protocol == ATA_PROT_ATAPI) {
4094 /* ATAPI PIO protocol */
4095 if ((status & ATA_DRQ) == 0) {
4096 /* No more data to transfer or device error.
4097 * Device error will be tagged in HSM_ST_LAST.
4099 ap->hsm_task_state = HSM_ST_LAST;
4103 /* Device should not ask for data transfer (DRQ=1)
4104 * when it finds something wrong.
4105 * We ignore DRQ here and stop the HSM by
4106 * changing hsm_task_state to HSM_ST_ERR and
4107 * let the EH abort the command or reset the device.
4109 if (unlikely(status & (ATA_ERR | ATA_DF))) {
4110 printk(KERN_WARNING "ata%d: DRQ=1 with device error, dev_stat 0x%X\n",
4112 qc->err_mask |= AC_ERR_HSM;
4113 ap->hsm_task_state = HSM_ST_ERR;
4117 atapi_pio_bytes(qc);
4119 if (unlikely(ap->hsm_task_state == HSM_ST_ERR))
4120 /* bad ireason reported by device */
4124 /* ATA PIO protocol */
4125 if (unlikely((status & ATA_DRQ) == 0)) {
4126 /* handle BSY=0, DRQ=0 as error */
4127 if (likely(status & (ATA_ERR | ATA_DF)))
4128 /* device stops HSM for abort/error */
4129 qc->err_mask |= AC_ERR_DEV;
4131 /* HSM violation. Let EH handle this */
4132 qc->err_mask |= AC_ERR_HSM;
4134 ap->hsm_task_state = HSM_ST_ERR;
4138 /* For PIO reads, some devices may ask for
4139 * data transfer (DRQ=1) alone with ERR=1.
4140 * We respect DRQ here and transfer one
4141 * block of junk data before changing the
4142 * hsm_task_state to HSM_ST_ERR.
4144 * For PIO writes, ERR=1 DRQ=1 doesn't make
4145 * sense since the data block has been
4146 * transferred to the device.
4148 if (unlikely(status & (ATA_ERR | ATA_DF))) {
4149 /* data might be corrputed */
4150 qc->err_mask |= AC_ERR_DEV;
4152 if (!(qc->tf.flags & ATA_TFLAG_WRITE)) {
4153 ata_pio_sectors(qc);
4155 status = ata_wait_idle(ap);
4158 if (status & (ATA_BUSY | ATA_DRQ))
4159 qc->err_mask |= AC_ERR_HSM;
4161 /* ata_pio_sectors() might change the
4162 * state to HSM_ST_LAST. so, the state
4163 * is changed after ata_pio_sectors().
4165 ap->hsm_task_state = HSM_ST_ERR;
4169 ata_pio_sectors(qc);
4171 if (ap->hsm_task_state == HSM_ST_LAST &&
4172 (!(qc->tf.flags & ATA_TFLAG_WRITE))) {
4175 status = ata_wait_idle(ap);
4180 ata_altstatus(ap); /* flush */
4185 if (unlikely(!ata_ok(status))) {
4186 qc->err_mask |= __ac_err_mask(status);
4187 ap->hsm_task_state = HSM_ST_ERR;
4191 /* no more data to transfer */
4192 DPRINTK("ata%u: dev %u command complete, drv_stat 0x%x\n",
4193 ap->id, qc->dev->devno, status);
4195 WARN_ON(qc->err_mask);
4197 ap->hsm_task_state = HSM_ST_IDLE;
4199 /* complete taskfile transaction */
4200 ata_hsm_qc_complete(qc, in_wq);
4206 /* make sure qc->err_mask is available to
4207 * know what's wrong and recover
4209 WARN_ON(qc->err_mask == 0);
4211 ap->hsm_task_state = HSM_ST_IDLE;
4213 /* complete taskfile transaction */
4214 ata_hsm_qc_complete(qc, in_wq);
4226 static void ata_pio_task(void *_data)
4228 struct ata_queued_cmd *qc = _data;
4229 struct ata_port *ap = qc->ap;
4234 WARN_ON(ap->hsm_task_state == HSM_ST_IDLE);
4237 * This is purely heuristic. This is a fast path.
4238 * Sometimes when we enter, BSY will be cleared in
4239 * a chk-status or two. If not, the drive is probably seeking
4240 * or something. Snooze for a couple msecs, then
4241 * chk-status again. If still busy, queue delayed work.
4243 status = ata_busy_wait(ap, ATA_BUSY, 5);
4244 if (status & ATA_BUSY) {
4246 status = ata_busy_wait(ap, ATA_BUSY, 10);
4247 if (status & ATA_BUSY) {
4248 ata_port_queue_task(ap, ata_pio_task, qc, ATA_SHORT_PAUSE);
4254 poll_next = ata_hsm_move(ap, qc, status, 1);
4256 /* another command or interrupt handler
4257 * may be running at this point.
4264 * ata_qc_new - Request an available ATA command, for queueing
4265 * @ap: Port associated with device @dev
4266 * @dev: Device from whom we request an available command structure
4272 static struct ata_queued_cmd *ata_qc_new(struct ata_port *ap)
4274 struct ata_queued_cmd *qc = NULL;
4277 /* no command while frozen */
4278 if (unlikely(ap->flags & ATA_FLAG_FROZEN))
4281 /* the last tag is reserved for internal command. */
4282 for (i = 0; i < ATA_MAX_QUEUE - 1; i++)
4283 if (!test_and_set_bit(i, &ap->qc_allocated)) {
4284 qc = __ata_qc_from_tag(ap, i);
4295 * ata_qc_new_init - Request an available ATA command, and initialize it
4296 * @dev: Device from whom we request an available command structure
4302 struct ata_queued_cmd *ata_qc_new_init(struct ata_device *dev)
4304 struct ata_port *ap = dev->ap;
4305 struct ata_queued_cmd *qc;
4307 qc = ata_qc_new(ap);
4320 * ata_qc_free - free unused ata_queued_cmd
4321 * @qc: Command to complete
4323 * Designed to free unused ata_queued_cmd object
4324 * in case something prevents using it.
4327 * spin_lock_irqsave(host_set lock)
4329 void ata_qc_free(struct ata_queued_cmd *qc)
4331 struct ata_port *ap = qc->ap;
4334 WARN_ON(qc == NULL); /* ata_qc_from_tag _might_ return NULL */
4338 if (likely(ata_tag_valid(tag))) {
4339 qc->tag = ATA_TAG_POISON;
4340 clear_bit(tag, &ap->qc_allocated);
4344 void __ata_qc_complete(struct ata_queued_cmd *qc)
4346 struct ata_port *ap = qc->ap;
4348 WARN_ON(qc == NULL); /* ata_qc_from_tag _might_ return NULL */
4349 WARN_ON(!(qc->flags & ATA_QCFLAG_ACTIVE));
4351 if (likely(qc->flags & ATA_QCFLAG_DMAMAP))
4354 /* command should be marked inactive atomically with qc completion */
4355 if (qc->tf.protocol == ATA_PROT_NCQ)
4356 ap->sactive &= ~(1 << qc->tag);
4358 ap->active_tag = ATA_TAG_POISON;
4360 /* atapi: mark qc as inactive to prevent the interrupt handler
4361 * from completing the command twice later, before the error handler
4362 * is called. (when rc != 0 and atapi request sense is needed)
4364 qc->flags &= ~ATA_QCFLAG_ACTIVE;
4365 ap->qc_active &= ~(1 << qc->tag);
4367 /* call completion callback */
4368 qc->complete_fn(qc);
4372 * ata_qc_complete - Complete an active ATA command
4373 * @qc: Command to complete
4374 * @err_mask: ATA Status register contents
4376 * Indicate to the mid and upper layers that an ATA
4377 * command has completed, with either an ok or not-ok status.
4380 * spin_lock_irqsave(host_set lock)
4382 void ata_qc_complete(struct ata_queued_cmd *qc)
4384 struct ata_port *ap = qc->ap;
4386 /* XXX: New EH and old EH use different mechanisms to
4387 * synchronize EH with regular execution path.
4389 * In new EH, a failed qc is marked with ATA_QCFLAG_FAILED.
4390 * Normal execution path is responsible for not accessing a
4391 * failed qc. libata core enforces the rule by returning NULL
4392 * from ata_qc_from_tag() for failed qcs.
4394 * Old EH depends on ata_qc_complete() nullifying completion
4395 * requests if ATA_QCFLAG_EH_SCHEDULED is set. Old EH does
4396 * not synchronize with interrupt handler. Only PIO task is
4399 if (ap->ops->error_handler) {
4400 WARN_ON(ap->flags & ATA_FLAG_FROZEN);
4402 if (unlikely(qc->err_mask))
4403 qc->flags |= ATA_QCFLAG_FAILED;
4405 if (unlikely(qc->flags & ATA_QCFLAG_FAILED)) {
4406 if (!ata_tag_internal(qc->tag)) {
4407 /* always fill result TF for failed qc */
4408 ap->ops->tf_read(ap, &qc->result_tf);
4409 ata_qc_schedule_eh(qc);
4414 /* read result TF if requested */
4415 if (qc->flags & ATA_QCFLAG_RESULT_TF)
4416 ap->ops->tf_read(ap, &qc->result_tf);
4418 __ata_qc_complete(qc);
4420 if (qc->flags & ATA_QCFLAG_EH_SCHEDULED)
4423 /* read result TF if failed or requested */
4424 if (qc->err_mask || qc->flags & ATA_QCFLAG_RESULT_TF)
4425 ap->ops->tf_read(ap, &qc->result_tf);
4427 __ata_qc_complete(qc);
4432 * ata_qc_complete_multiple - Complete multiple qcs successfully
4433 * @ap: port in question
4434 * @qc_active: new qc_active mask
4435 * @finish_qc: LLDD callback invoked before completing a qc
4437 * Complete in-flight commands. This functions is meant to be
4438 * called from low-level driver's interrupt routine to complete
4439 * requests normally. ap->qc_active and @qc_active is compared
4440 * and commands are completed accordingly.
4443 * spin_lock_irqsave(host_set lock)
4446 * Number of completed commands on success, -errno otherwise.
4448 int ata_qc_complete_multiple(struct ata_port *ap, u32 qc_active,
4449 void (*finish_qc)(struct ata_queued_cmd *))
4455 done_mask = ap->qc_active ^ qc_active;
4457 if (unlikely(done_mask & qc_active)) {
4458 ata_port_printk(ap, KERN_ERR, "illegal qc_active transition "
4459 "(%08x->%08x)\n", ap->qc_active, qc_active);
4463 for (i = 0; i < ATA_MAX_QUEUE; i++) {
4464 struct ata_queued_cmd *qc;
4466 if (!(done_mask & (1 << i)))
4469 if ((qc = ata_qc_from_tag(ap, i))) {
4472 ata_qc_complete(qc);
4480 static inline int ata_should_dma_map(struct ata_queued_cmd *qc)
4482 struct ata_port *ap = qc->ap;
4484 switch (qc->tf.protocol) {
4487 case ATA_PROT_ATAPI_DMA:
4490 case ATA_PROT_ATAPI:
4492 if (ap->flags & ATA_FLAG_PIO_DMA)
4505 * ata_qc_issue - issue taskfile to device
4506 * @qc: command to issue to device
4508 * Prepare an ATA command to submission to device.
4509 * This includes mapping the data into a DMA-able
4510 * area, filling in the S/G table, and finally
4511 * writing the taskfile to hardware, starting the command.
4514 * spin_lock_irqsave(host_set lock)
4516 void ata_qc_issue(struct ata_queued_cmd *qc)
4518 struct ata_port *ap = qc->ap;
4520 /* Make sure only one non-NCQ command is outstanding. The
4521 * check is skipped for old EH because it reuses active qc to
4522 * request ATAPI sense.
4524 WARN_ON(ap->ops->error_handler && ata_tag_valid(ap->active_tag));
4526 if (qc->tf.protocol == ATA_PROT_NCQ) {
4527 WARN_ON(ap->sactive & (1 << qc->tag));
4528 ap->sactive |= 1 << qc->tag;
4530 WARN_ON(ap->sactive);
4531 ap->active_tag = qc->tag;
4534 qc->flags |= ATA_QCFLAG_ACTIVE;
4535 ap->qc_active |= 1 << qc->tag;
4537 if (ata_should_dma_map(qc)) {
4538 if (qc->flags & ATA_QCFLAG_SG) {
4539 if (ata_sg_setup(qc))
4541 } else if (qc->flags & ATA_QCFLAG_SINGLE) {
4542 if (ata_sg_setup_one(qc))
4546 qc->flags &= ~ATA_QCFLAG_DMAMAP;
4549 ap->ops->qc_prep(qc);
4551 qc->err_mask |= ap->ops->qc_issue(qc);
4552 if (unlikely(qc->err_mask))
4557 qc->flags &= ~ATA_QCFLAG_DMAMAP;
4558 qc->err_mask |= AC_ERR_SYSTEM;
4560 ata_qc_complete(qc);
4564 * ata_qc_issue_prot - issue taskfile to device in proto-dependent manner
4565 * @qc: command to issue to device
4567 * Using various libata functions and hooks, this function
4568 * starts an ATA command. ATA commands are grouped into
4569 * classes called "protocols", and issuing each type of protocol
4570 * is slightly different.
4572 * May be used as the qc_issue() entry in ata_port_operations.
4575 * spin_lock_irqsave(host_set lock)
4578 * Zero on success, AC_ERR_* mask on failure
4581 unsigned int ata_qc_issue_prot(struct ata_queued_cmd *qc)
4583 struct ata_port *ap = qc->ap;
4585 /* Use polling pio if the LLD doesn't handle
4586 * interrupt driven pio and atapi CDB interrupt.
4588 if (ap->flags & ATA_FLAG_PIO_POLLING) {
4589 switch (qc->tf.protocol) {
4591 case ATA_PROT_ATAPI:
4592 case ATA_PROT_ATAPI_NODATA:
4593 qc->tf.flags |= ATA_TFLAG_POLLING;
4595 case ATA_PROT_ATAPI_DMA:
4596 if (qc->dev->flags & ATA_DFLAG_CDB_INTR)
4597 /* see ata_dma_blacklisted() */
4605 /* select the device */
4606 ata_dev_select(ap, qc->dev->devno, 1, 0);
4608 /* start the command */
4609 switch (qc->tf.protocol) {
4610 case ATA_PROT_NODATA:
4611 if (qc->tf.flags & ATA_TFLAG_POLLING)
4612 ata_qc_set_polling(qc);
4614 ata_tf_to_host(ap, &qc->tf);
4615 ap->hsm_task_state = HSM_ST_LAST;
4617 if (qc->tf.flags & ATA_TFLAG_POLLING)
4618 ata_port_queue_task(ap, ata_pio_task, qc, 0);
4623 WARN_ON(qc->tf.flags & ATA_TFLAG_POLLING);
4625 ap->ops->tf_load(ap, &qc->tf); /* load tf registers */
4626 ap->ops->bmdma_setup(qc); /* set up bmdma */
4627 ap->ops->bmdma_start(qc); /* initiate bmdma */
4628 ap->hsm_task_state = HSM_ST_LAST;
4632 if (qc->tf.flags & ATA_TFLAG_POLLING)
4633 ata_qc_set_polling(qc);
4635 ata_tf_to_host(ap, &qc->tf);
4637 if (qc->tf.flags & ATA_TFLAG_WRITE) {
4638 /* PIO data out protocol */
4639 ap->hsm_task_state = HSM_ST_FIRST;
4640 ata_port_queue_task(ap, ata_pio_task, qc, 0);
4642 /* always send first data block using
4643 * the ata_pio_task() codepath.
4646 /* PIO data in protocol */
4647 ap->hsm_task_state = HSM_ST;
4649 if (qc->tf.flags & ATA_TFLAG_POLLING)
4650 ata_port_queue_task(ap, ata_pio_task, qc, 0);
4652 /* if polling, ata_pio_task() handles the rest.
4653 * otherwise, interrupt handler takes over from here.
4659 case ATA_PROT_ATAPI:
4660 case ATA_PROT_ATAPI_NODATA:
4661 if (qc->tf.flags & ATA_TFLAG_POLLING)
4662 ata_qc_set_polling(qc);
4664 ata_tf_to_host(ap, &qc->tf);
4666 ap->hsm_task_state = HSM_ST_FIRST;
4668 /* send cdb by polling if no cdb interrupt */
4669 if ((!(qc->dev->flags & ATA_DFLAG_CDB_INTR)) ||
4670 (qc->tf.flags & ATA_TFLAG_POLLING))
4671 ata_port_queue_task(ap, ata_pio_task, qc, 0);
4674 case ATA_PROT_ATAPI_DMA:
4675 WARN_ON(qc->tf.flags & ATA_TFLAG_POLLING);
4677 ap->ops->tf_load(ap, &qc->tf); /* load tf registers */
4678 ap->ops->bmdma_setup(qc); /* set up bmdma */
4679 ap->hsm_task_state = HSM_ST_FIRST;
4681 /* send cdb by polling if no cdb interrupt */
4682 if (!(qc->dev->flags & ATA_DFLAG_CDB_INTR))
4683 ata_port_queue_task(ap, ata_pio_task, qc, 0);
4688 return AC_ERR_SYSTEM;
4695 * ata_host_intr - Handle host interrupt for given (port, task)
4696 * @ap: Port on which interrupt arrived (possibly...)
4697 * @qc: Taskfile currently active in engine
4699 * Handle host interrupt for given queued command. Currently,
4700 * only DMA interrupts are handled. All other commands are
4701 * handled via polling with interrupts disabled (nIEN bit).
4704 * spin_lock_irqsave(host_set lock)
4707 * One if interrupt was handled, zero if not (shared irq).
4710 inline unsigned int ata_host_intr (struct ata_port *ap,
4711 struct ata_queued_cmd *qc)
4713 u8 status, host_stat = 0;
4715 VPRINTK("ata%u: protocol %d task_state %d\n",
4716 ap->id, qc->tf.protocol, ap->hsm_task_state);
4718 /* Check whether we are expecting interrupt in this state */
4719 switch (ap->hsm_task_state) {
4721 /* Some pre-ATAPI-4 devices assert INTRQ
4722 * at this state when ready to receive CDB.
4725 /* Check the ATA_DFLAG_CDB_INTR flag is enough here.
4726 * The flag was turned on only for atapi devices.
4727 * No need to check is_atapi_taskfile(&qc->tf) again.
4729 if (!(qc->dev->flags & ATA_DFLAG_CDB_INTR))
4733 if (qc->tf.protocol == ATA_PROT_DMA ||
4734 qc->tf.protocol == ATA_PROT_ATAPI_DMA) {
4735 /* check status of DMA engine */
4736 host_stat = ap->ops->bmdma_status(ap);
4737 VPRINTK("ata%u: host_stat 0x%X\n", ap->id, host_stat);
4739 /* if it's not our irq... */
4740 if (!(host_stat & ATA_DMA_INTR))
4743 /* before we do anything else, clear DMA-Start bit */
4744 ap->ops->bmdma_stop(qc);
4746 if (unlikely(host_stat & ATA_DMA_ERR)) {
4747 /* error when transfering data to/from memory */
4748 qc->err_mask |= AC_ERR_HOST_BUS;
4749 ap->hsm_task_state = HSM_ST_ERR;
4759 /* check altstatus */
4760 status = ata_altstatus(ap);
4761 if (status & ATA_BUSY)
4764 /* check main status, clearing INTRQ */
4765 status = ata_chk_status(ap);
4766 if (unlikely(status & ATA_BUSY))
4769 /* ack bmdma irq events */
4770 ap->ops->irq_clear(ap);
4772 ata_hsm_move(ap, qc, status, 0);
4773 return 1; /* irq handled */
4776 ap->stats.idle_irq++;
4779 if ((ap->stats.idle_irq % 1000) == 0) {
4780 ata_irq_ack(ap, 0); /* debug trap */
4781 ata_port_printk(ap, KERN_WARNING, "irq trap\n");
4785 return 0; /* irq not handled */
4789 * ata_interrupt - Default ATA host interrupt handler
4790 * @irq: irq line (unused)
4791 * @dev_instance: pointer to our ata_host_set information structure
4794 * Default interrupt handler for PCI IDE devices. Calls
4795 * ata_host_intr() for each port that is not disabled.
4798 * Obtains host_set lock during operation.
4801 * IRQ_NONE or IRQ_HANDLED.
4804 irqreturn_t ata_interrupt (int irq, void *dev_instance, struct pt_regs *regs)
4806 struct ata_host_set *host_set = dev_instance;
4808 unsigned int handled = 0;
4809 unsigned long flags;
4811 /* TODO: make _irqsave conditional on x86 PCI IDE legacy mode */
4812 spin_lock_irqsave(&host_set->lock, flags);
4814 for (i = 0; i < host_set->n_ports; i++) {
4815 struct ata_port *ap;
4817 ap = host_set->ports[i];
4819 !(ap->flags & ATA_FLAG_DISABLED)) {
4820 struct ata_queued_cmd *qc;
4822 qc = ata_qc_from_tag(ap, ap->active_tag);
4823 if (qc && (!(qc->tf.flags & ATA_TFLAG_POLLING)) &&
4824 (qc->flags & ATA_QCFLAG_ACTIVE))
4825 handled |= ata_host_intr(ap, qc);
4829 spin_unlock_irqrestore(&host_set->lock, flags);
4831 return IRQ_RETVAL(handled);
4835 * sata_scr_valid - test whether SCRs are accessible
4836 * @ap: ATA port to test SCR accessibility for
4838 * Test whether SCRs are accessible for @ap.
4844 * 1 if SCRs are accessible, 0 otherwise.
4846 int sata_scr_valid(struct ata_port *ap)
4848 return ap->cbl == ATA_CBL_SATA && ap->ops->scr_read;
4852 * sata_scr_read - read SCR register of the specified port
4853 * @ap: ATA port to read SCR for
4855 * @val: Place to store read value
4857 * Read SCR register @reg of @ap into *@val. This function is
4858 * guaranteed to succeed if the cable type of the port is SATA
4859 * and the port implements ->scr_read.
4865 * 0 on success, negative errno on failure.
4867 int sata_scr_read(struct ata_port *ap, int reg, u32 *val)
4869 if (sata_scr_valid(ap)) {
4870 *val = ap->ops->scr_read(ap, reg);
4877 * sata_scr_write - write SCR register of the specified port
4878 * @ap: ATA port to write SCR for
4879 * @reg: SCR to write
4880 * @val: value to write
4882 * Write @val to SCR register @reg of @ap. This function is
4883 * guaranteed to succeed if the cable type of the port is SATA
4884 * and the port implements ->scr_read.
4890 * 0 on success, negative errno on failure.
4892 int sata_scr_write(struct ata_port *ap, int reg, u32 val)
4894 if (sata_scr_valid(ap)) {
4895 ap->ops->scr_write(ap, reg, val);
4902 * sata_scr_write_flush - write SCR register of the specified port and flush
4903 * @ap: ATA port to write SCR for
4904 * @reg: SCR to write
4905 * @val: value to write
4907 * This function is identical to sata_scr_write() except that this
4908 * function performs flush after writing to the register.
4914 * 0 on success, negative errno on failure.
4916 int sata_scr_write_flush(struct ata_port *ap, int reg, u32 val)
4918 if (sata_scr_valid(ap)) {
4919 ap->ops->scr_write(ap, reg, val);
4920 ap->ops->scr_read(ap, reg);
4927 * ata_port_online - test whether the given port is online
4928 * @ap: ATA port to test
4930 * Test whether @ap is online. Note that this function returns 0
4931 * if online status of @ap cannot be obtained, so
4932 * ata_port_online(ap) != !ata_port_offline(ap).
4938 * 1 if the port online status is available and online.
4940 int ata_port_online(struct ata_port *ap)
4944 if (!sata_scr_read(ap, SCR_STATUS, &sstatus) && (sstatus & 0xf) == 0x3)
4950 * ata_port_offline - test whether the given port is offline
4951 * @ap: ATA port to test
4953 * Test whether @ap is offline. Note that this function returns
4954 * 0 if offline status of @ap cannot be obtained, so
4955 * ata_port_online(ap) != !ata_port_offline(ap).
4961 * 1 if the port offline status is available and offline.
4963 int ata_port_offline(struct ata_port *ap)
4967 if (!sata_scr_read(ap, SCR_STATUS, &sstatus) && (sstatus & 0xf) != 0x3)
4972 static int ata_flush_cache(struct ata_device *dev)
4976 if (!ata_try_flush_cache(dev))
4979 if (ata_id_has_flush_ext(dev->id))
4980 cmd = ATA_CMD_FLUSH_EXT;
4982 cmd = ATA_CMD_FLUSH;
4984 return ata_do_simple_cmd(dev, cmd);
4987 static int ata_standby_drive(struct ata_device *dev)
4989 return ata_do_simple_cmd(dev, ATA_CMD_STANDBYNOW1);
4992 static int ata_start_drive(struct ata_device *dev)
4994 return ata_do_simple_cmd(dev, ATA_CMD_IDLEIMMEDIATE);
4998 * ata_device_resume - wakeup a previously suspended devices
4999 * @dev: the device to resume
5001 * Kick the drive back into action, by sending it an idle immediate
5002 * command and making sure its transfer mode matches between drive
5006 int ata_device_resume(struct ata_device *dev)
5008 struct ata_port *ap = dev->ap;
5010 if (ap->flags & ATA_FLAG_SUSPENDED) {
5011 struct ata_device *failed_dev;
5013 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
5014 ata_busy_wait(ap, ATA_BUSY | ATA_DRQ, 200000);
5016 ap->flags &= ~ATA_FLAG_SUSPENDED;
5017 while (ata_set_mode(ap, &failed_dev))
5018 ata_dev_disable(failed_dev);
5020 if (!ata_dev_enabled(dev))
5022 if (dev->class == ATA_DEV_ATA)
5023 ata_start_drive(dev);
5029 * ata_device_suspend - prepare a device for suspend
5030 * @dev: the device to suspend
5031 * @state: target power management state
5033 * Flush the cache on the drive, if appropriate, then issue a
5034 * standbynow command.
5036 int ata_device_suspend(struct ata_device *dev, pm_message_t state)
5038 struct ata_port *ap = dev->ap;
5040 if (!ata_dev_enabled(dev))
5042 if (dev->class == ATA_DEV_ATA)
5043 ata_flush_cache(dev);
5045 if (state.event != PM_EVENT_FREEZE)
5046 ata_standby_drive(dev);
5047 ap->flags |= ATA_FLAG_SUSPENDED;
5052 * ata_port_start - Set port up for dma.
5053 * @ap: Port to initialize
5055 * Called just after data structures for each port are
5056 * initialized. Allocates space for PRD table.
5058 * May be used as the port_start() entry in ata_port_operations.
5061 * Inherited from caller.
5064 int ata_port_start (struct ata_port *ap)
5066 struct device *dev = ap->dev;
5069 ap->prd = dma_alloc_coherent(dev, ATA_PRD_TBL_SZ, &ap->prd_dma, GFP_KERNEL);
5073 rc = ata_pad_alloc(ap, dev);
5075 dma_free_coherent(dev, ATA_PRD_TBL_SZ, ap->prd, ap->prd_dma);
5079 DPRINTK("prd alloc, virt %p, dma %llx\n", ap->prd, (unsigned long long) ap->prd_dma);
5086 * ata_port_stop - Undo ata_port_start()
5087 * @ap: Port to shut down
5089 * Frees the PRD table.
5091 * May be used as the port_stop() entry in ata_port_operations.
5094 * Inherited from caller.
5097 void ata_port_stop (struct ata_port *ap)
5099 struct device *dev = ap->dev;
5101 dma_free_coherent(dev, ATA_PRD_TBL_SZ, ap->prd, ap->prd_dma);
5102 ata_pad_free(ap, dev);
5105 void ata_host_stop (struct ata_host_set *host_set)
5107 if (host_set->mmio_base)
5108 iounmap(host_set->mmio_base);
5113 * ata_host_remove - Unregister SCSI host structure with upper layers
5114 * @ap: Port to unregister
5115 * @do_unregister: 1 if we fully unregister, 0 to just stop the port
5118 * Inherited from caller.
5121 static void ata_host_remove(struct ata_port *ap, unsigned int do_unregister)
5123 struct Scsi_Host *sh = ap->host;
5128 scsi_remove_host(sh);
5130 ap->ops->port_stop(ap);
5134 * ata_dev_init - Initialize an ata_device structure
5135 * @dev: Device structure to initialize
5137 * Initialize @dev in preparation for probing.
5140 * Inherited from caller.
5142 void ata_dev_init(struct ata_device *dev)
5144 struct ata_port *ap = dev->ap;
5145 unsigned long flags;
5147 /* SATA spd limit is bound to the first device */
5148 ap->sata_spd_limit = ap->hw_sata_spd_limit;
5150 /* High bits of dev->flags are used to record warm plug
5151 * requests which occur asynchronously. Synchronize using
5154 spin_lock_irqsave(ap->lock, flags);
5155 dev->flags &= ~ATA_DFLAG_INIT_MASK;
5156 spin_unlock_irqrestore(ap->lock, flags);
5158 memset((void *)dev + ATA_DEVICE_CLEAR_OFFSET, 0,
5159 sizeof(*dev) - ATA_DEVICE_CLEAR_OFFSET);
5160 dev->pio_mask = UINT_MAX;
5161 dev->mwdma_mask = UINT_MAX;
5162 dev->udma_mask = UINT_MAX;
5166 * ata_host_init - Initialize an ata_port structure
5167 * @ap: Structure to initialize
5168 * @host: associated SCSI mid-layer structure
5169 * @host_set: Collection of hosts to which @ap belongs
5170 * @ent: Probe information provided by low-level driver
5171 * @port_no: Port number associated with this ata_port
5173 * Initialize a new ata_port structure, and its associated
5177 * Inherited from caller.
5179 static void ata_host_init(struct ata_port *ap, struct Scsi_Host *host,
5180 struct ata_host_set *host_set,
5181 const struct ata_probe_ent *ent, unsigned int port_no)
5187 host->max_channel = 1;
5188 host->unique_id = ata_unique_id++;
5189 host->max_cmd_len = 12;
5191 ap->lock = &host_set->lock;
5192 ap->flags = ATA_FLAG_DISABLED;
5193 ap->id = host->unique_id;
5195 ap->ctl = ATA_DEVCTL_OBS;
5196 ap->host_set = host_set;
5198 ap->port_no = port_no;
5200 ent->legacy_mode ? ent->hard_port_no : port_no;
5201 ap->pio_mask = ent->pio_mask;
5202 ap->mwdma_mask = ent->mwdma_mask;
5203 ap->udma_mask = ent->udma_mask;
5204 ap->flags |= ent->host_flags;
5205 ap->ops = ent->port_ops;
5206 ap->hw_sata_spd_limit = UINT_MAX;
5207 ap->active_tag = ATA_TAG_POISON;
5208 ap->last_ctl = 0xFF;
5210 #if defined(ATA_VERBOSE_DEBUG)
5211 /* turn on all debugging levels */
5212 ap->msg_enable = 0x00FF;
5213 #elif defined(ATA_DEBUG)
5214 ap->msg_enable = ATA_MSG_DRV | ATA_MSG_INFO | ATA_MSG_CTL | ATA_MSG_WARN | ATA_MSG_ERR;
5216 ap->msg_enable = ATA_MSG_DRV | ATA_MSG_ERR | ATA_MSG_WARN;
5219 INIT_WORK(&ap->port_task, NULL, NULL);
5220 INIT_WORK(&ap->hotplug_task, ata_scsi_hotplug, ap);
5221 INIT_WORK(&ap->scsi_rescan_task, ata_scsi_dev_rescan, ap);
5222 INIT_LIST_HEAD(&ap->eh_done_q);
5223 init_waitqueue_head(&ap->eh_wait_q);
5225 /* set cable type */
5226 ap->cbl = ATA_CBL_NONE;
5227 if (ap->flags & ATA_FLAG_SATA)
5228 ap->cbl = ATA_CBL_SATA;
5230 for (i = 0; i < ATA_MAX_DEVICES; i++) {
5231 struct ata_device *dev = &ap->device[i];
5238 ap->stats.unhandled_irq = 1;
5239 ap->stats.idle_irq = 1;
5242 memcpy(&ap->ioaddr, &ent->port[port_no], sizeof(struct ata_ioports));
5246 * ata_host_add - Attach low-level ATA driver to system
5247 * @ent: Information provided by low-level driver
5248 * @host_set: Collections of ports to which we add
5249 * @port_no: Port number associated with this host
5251 * Attach low-level ATA driver to system.
5254 * PCI/etc. bus probe sem.
5257 * New ata_port on success, for NULL on error.
5260 static struct ata_port * ata_host_add(const struct ata_probe_ent *ent,
5261 struct ata_host_set *host_set,
5262 unsigned int port_no)
5264 struct Scsi_Host *host;
5265 struct ata_port *ap;
5270 if (!ent->port_ops->error_handler &&
5271 !(ent->host_flags & (ATA_FLAG_SATA_RESET | ATA_FLAG_SRST))) {
5272 printk(KERN_ERR "ata%u: no reset mechanism available\n",
5277 host = scsi_host_alloc(ent->sht, sizeof(struct ata_port));
5281 host->transportt = &ata_scsi_transport_template;
5283 ap = ata_shost_to_port(host);
5285 ata_host_init(ap, host, host_set, ent, port_no);
5287 rc = ap->ops->port_start(ap);
5294 scsi_host_put(host);
5299 * ata_device_add - Register hardware device with ATA and SCSI layers
5300 * @ent: Probe information describing hardware device to be registered
5302 * This function processes the information provided in the probe
5303 * information struct @ent, allocates the necessary ATA and SCSI
5304 * host information structures, initializes them, and registers
5305 * everything with requisite kernel subsystems.
5307 * This function requests irqs, probes the ATA bus, and probes
5311 * PCI/etc. bus probe sem.
5314 * Number of ports registered. Zero on error (no ports registered).
5316 int ata_device_add(const struct ata_probe_ent *ent)
5318 unsigned int count = 0, i;
5319 struct device *dev = ent->dev;
5320 struct ata_host_set *host_set;
5324 /* alloc a container for our list of ATA ports (buses) */
5325 host_set = kzalloc(sizeof(struct ata_host_set) +
5326 (ent->n_ports * sizeof(void *)), GFP_KERNEL);
5329 spin_lock_init(&host_set->lock);
5331 host_set->dev = dev;
5332 host_set->n_ports = ent->n_ports;
5333 host_set->irq = ent->irq;
5334 host_set->mmio_base = ent->mmio_base;
5335 host_set->private_data = ent->private_data;
5336 host_set->ops = ent->port_ops;
5337 host_set->flags = ent->host_set_flags;
5339 /* register each port bound to this device */
5340 for (i = 0; i < ent->n_ports; i++) {
5341 struct ata_port *ap;
5342 unsigned long xfer_mode_mask;
5344 ap = ata_host_add(ent, host_set, i);
5348 host_set->ports[i] = ap;
5349 xfer_mode_mask =(ap->udma_mask << ATA_SHIFT_UDMA) |
5350 (ap->mwdma_mask << ATA_SHIFT_MWDMA) |
5351 (ap->pio_mask << ATA_SHIFT_PIO);
5353 /* print per-port info to dmesg */
5354 ata_port_printk(ap, KERN_INFO, "%cATA max %s cmd 0x%lX "
5355 "ctl 0x%lX bmdma 0x%lX irq %lu\n",
5356 ap->flags & ATA_FLAG_SATA ? 'S' : 'P',
5357 ata_mode_string(xfer_mode_mask),
5358 ap->ioaddr.cmd_addr,
5359 ap->ioaddr.ctl_addr,
5360 ap->ioaddr.bmdma_addr,
5364 host_set->ops->irq_clear(ap);
5365 ata_eh_freeze_port(ap); /* freeze port before requesting IRQ */
5372 /* obtain irq, that is shared between channels */
5373 rc = request_irq(ent->irq, ent->port_ops->irq_handler, ent->irq_flags,
5374 DRV_NAME, host_set);
5376 dev_printk(KERN_ERR, dev, "irq %lu request failed: %d\n",
5381 /* perform each probe synchronously */
5382 DPRINTK("probe begin\n");
5383 for (i = 0; i < count; i++) {
5384 struct ata_port *ap;
5388 ap = host_set->ports[i];
5390 /* init sata_spd_limit to the current value */
5391 if (sata_scr_read(ap, SCR_CONTROL, &scontrol) == 0) {
5392 int spd = (scontrol >> 4) & 0xf;
5393 ap->hw_sata_spd_limit &= (1 << spd) - 1;
5395 ap->sata_spd_limit = ap->hw_sata_spd_limit;
5397 rc = scsi_add_host(ap->host, dev);
5399 ata_port_printk(ap, KERN_ERR, "scsi_add_host failed\n");
5400 /* FIXME: do something useful here */
5401 /* FIXME: handle unconditional calls to
5402 * scsi_scan_host and ata_host_remove, below,
5407 if (ap->ops->error_handler) {
5408 unsigned long flags;
5412 /* kick EH for boot probing */
5413 spin_lock_irqsave(ap->lock, flags);
5415 ap->eh_info.probe_mask = (1 << ATA_MAX_DEVICES) - 1;
5416 ap->eh_info.action |= ATA_EH_SOFTRESET;
5418 ap->flags |= ATA_FLAG_LOADING;
5419 ata_port_schedule_eh(ap);
5421 spin_unlock_irqrestore(ap->lock, flags);
5423 /* wait for EH to finish */
5424 ata_port_wait_eh(ap);
5426 DPRINTK("ata%u: bus probe begin\n", ap->id);
5427 rc = ata_bus_probe(ap);
5428 DPRINTK("ata%u: bus probe end\n", ap->id);
5431 /* FIXME: do something useful here?
5432 * Current libata behavior will
5433 * tear down everything when
5434 * the module is removed
5435 * or the h/w is unplugged.
5441 /* probes are done, now scan each port's disk(s) */
5442 DPRINTK("host probe begin\n");
5443 for (i = 0; i < count; i++) {
5444 struct ata_port *ap = host_set->ports[i];
5446 ata_scsi_scan_host(ap);
5449 dev_set_drvdata(dev, host_set);
5451 VPRINTK("EXIT, returning %u\n", ent->n_ports);
5452 return ent->n_ports; /* success */
5455 for (i = 0; i < count; i++) {
5456 ata_host_remove(host_set->ports[i], 1);
5457 scsi_host_put(host_set->ports[i]->host);
5461 VPRINTK("EXIT, returning 0\n");
5466 * ata_port_detach - Detach ATA port in prepration of device removal
5467 * @ap: ATA port to be detached
5469 * Detach all ATA devices and the associated SCSI devices of @ap;
5470 * then, remove the associated SCSI host. @ap is guaranteed to
5471 * be quiescent on return from this function.
5474 * Kernel thread context (may sleep).
5476 void ata_port_detach(struct ata_port *ap)
5478 unsigned long flags;
5481 if (!ap->ops->error_handler)
5484 /* tell EH we're leaving & flush EH */
5485 spin_lock_irqsave(ap->lock, flags);
5486 ap->flags |= ATA_FLAG_UNLOADING;
5487 spin_unlock_irqrestore(ap->lock, flags);
5489 ata_port_wait_eh(ap);
5491 /* EH is now guaranteed to see UNLOADING, so no new device
5492 * will be attached. Disable all existing devices.
5494 spin_lock_irqsave(ap->lock, flags);
5496 for (i = 0; i < ATA_MAX_DEVICES; i++)
5497 ata_dev_disable(&ap->device[i]);
5499 spin_unlock_irqrestore(ap->lock, flags);
5501 /* Final freeze & EH. All in-flight commands are aborted. EH
5502 * will be skipped and retrials will be terminated with bad
5505 spin_lock_irqsave(ap->lock, flags);
5506 ata_port_freeze(ap); /* won't be thawed */
5507 spin_unlock_irqrestore(ap->lock, flags);
5509 ata_port_wait_eh(ap);
5511 /* Flush hotplug task. The sequence is similar to
5512 * ata_port_flush_task().
5514 flush_workqueue(ata_aux_wq);
5515 cancel_delayed_work(&ap->hotplug_task);
5516 flush_workqueue(ata_aux_wq);
5518 /* remove the associated SCSI host */
5519 scsi_remove_host(ap->host);
5523 * ata_host_set_remove - PCI layer callback for device removal
5524 * @host_set: ATA host set that was removed
5526 * Unregister all objects associated with this host set. Free those
5530 * Inherited from calling layer (may sleep).
5533 void ata_host_set_remove(struct ata_host_set *host_set)
5537 for (i = 0; i < host_set->n_ports; i++)
5538 ata_port_detach(host_set->ports[i]);
5540 free_irq(host_set->irq, host_set);
5542 for (i = 0; i < host_set->n_ports; i++) {
5543 struct ata_port *ap = host_set->ports[i];
5545 ata_scsi_release(ap->host);
5547 if ((ap->flags & ATA_FLAG_NO_LEGACY) == 0) {
5548 struct ata_ioports *ioaddr = &ap->ioaddr;
5550 if (ioaddr->cmd_addr == 0x1f0)
5551 release_region(0x1f0, 8);
5552 else if (ioaddr->cmd_addr == 0x170)
5553 release_region(0x170, 8);
5556 scsi_host_put(ap->host);
5559 if (host_set->ops->host_stop)
5560 host_set->ops->host_stop(host_set);
5566 * ata_scsi_release - SCSI layer callback hook for host unload
5567 * @host: libata host to be unloaded
5569 * Performs all duties necessary to shut down a libata port...
5570 * Kill port kthread, disable port, and release resources.
5573 * Inherited from SCSI layer.
5579 int ata_scsi_release(struct Scsi_Host *host)
5581 struct ata_port *ap = ata_shost_to_port(host);
5585 ap->ops->port_disable(ap);
5586 ata_host_remove(ap, 0);
5593 * ata_std_ports - initialize ioaddr with standard port offsets.
5594 * @ioaddr: IO address structure to be initialized
5596 * Utility function which initializes data_addr, error_addr,
5597 * feature_addr, nsect_addr, lbal_addr, lbam_addr, lbah_addr,
5598 * device_addr, status_addr, and command_addr to standard offsets
5599 * relative to cmd_addr.
5601 * Does not set ctl_addr, altstatus_addr, bmdma_addr, or scr_addr.
5604 void ata_std_ports(struct ata_ioports *ioaddr)
5606 ioaddr->data_addr = ioaddr->cmd_addr + ATA_REG_DATA;
5607 ioaddr->error_addr = ioaddr->cmd_addr + ATA_REG_ERR;
5608 ioaddr->feature_addr = ioaddr->cmd_addr + ATA_REG_FEATURE;
5609 ioaddr->nsect_addr = ioaddr->cmd_addr + ATA_REG_NSECT;
5610 ioaddr->lbal_addr = ioaddr->cmd_addr + ATA_REG_LBAL;
5611 ioaddr->lbam_addr = ioaddr->cmd_addr + ATA_REG_LBAM;
5612 ioaddr->lbah_addr = ioaddr->cmd_addr + ATA_REG_LBAH;
5613 ioaddr->device_addr = ioaddr->cmd_addr + ATA_REG_DEVICE;
5614 ioaddr->status_addr = ioaddr->cmd_addr + ATA_REG_STATUS;
5615 ioaddr->command_addr = ioaddr->cmd_addr + ATA_REG_CMD;
5621 void ata_pci_host_stop (struct ata_host_set *host_set)
5623 struct pci_dev *pdev = to_pci_dev(host_set->dev);
5625 pci_iounmap(pdev, host_set->mmio_base);
5629 * ata_pci_remove_one - PCI layer callback for device removal
5630 * @pdev: PCI device that was removed
5632 * PCI layer indicates to libata via this hook that
5633 * hot-unplug or module unload event has occurred.
5634 * Handle this by unregistering all objects associated
5635 * with this PCI device. Free those objects. Then finally
5636 * release PCI resources and disable device.
5639 * Inherited from PCI layer (may sleep).
5642 void ata_pci_remove_one (struct pci_dev *pdev)
5644 struct device *dev = pci_dev_to_dev(pdev);
5645 struct ata_host_set *host_set = dev_get_drvdata(dev);
5646 struct ata_host_set *host_set2 = host_set->next;
5648 ata_host_set_remove(host_set);
5650 ata_host_set_remove(host_set2);
5652 pci_release_regions(pdev);
5653 pci_disable_device(pdev);
5654 dev_set_drvdata(dev, NULL);
5657 /* move to PCI subsystem */
5658 int pci_test_config_bits(struct pci_dev *pdev, const struct pci_bits *bits)
5660 unsigned long tmp = 0;
5662 switch (bits->width) {
5665 pci_read_config_byte(pdev, bits->reg, &tmp8);
5671 pci_read_config_word(pdev, bits->reg, &tmp16);
5677 pci_read_config_dword(pdev, bits->reg, &tmp32);
5688 return (tmp == bits->val) ? 1 : 0;
5691 int ata_pci_device_suspend(struct pci_dev *pdev, pm_message_t state)
5693 pci_save_state(pdev);
5694 pci_disable_device(pdev);
5695 pci_set_power_state(pdev, PCI_D3hot);
5699 int ata_pci_device_resume(struct pci_dev *pdev)
5701 pci_set_power_state(pdev, PCI_D0);
5702 pci_restore_state(pdev);
5703 pci_enable_device(pdev);
5704 pci_set_master(pdev);
5707 #endif /* CONFIG_PCI */
5710 static int __init ata_init(void)
5712 ata_wq = create_workqueue("ata");
5716 ata_aux_wq = create_singlethread_workqueue("ata_aux");
5718 destroy_workqueue(ata_wq);
5722 printk(KERN_DEBUG "libata version " DRV_VERSION " loaded.\n");
5726 static void __exit ata_exit(void)
5728 destroy_workqueue(ata_wq);
5729 destroy_workqueue(ata_aux_wq);
5732 module_init(ata_init);
5733 module_exit(ata_exit);
5735 static unsigned long ratelimit_time;
5736 static spinlock_t ata_ratelimit_lock = SPIN_LOCK_UNLOCKED;
5738 int ata_ratelimit(void)
5741 unsigned long flags;
5743 spin_lock_irqsave(&ata_ratelimit_lock, flags);
5745 if (time_after(jiffies, ratelimit_time)) {
5747 ratelimit_time = jiffies + (HZ/5);
5751 spin_unlock_irqrestore(&ata_ratelimit_lock, flags);
5757 * ata_wait_register - wait until register value changes
5758 * @reg: IO-mapped register
5759 * @mask: Mask to apply to read register value
5760 * @val: Wait condition
5761 * @interval_msec: polling interval in milliseconds
5762 * @timeout_msec: timeout in milliseconds
5764 * Waiting for some bits of register to change is a common
5765 * operation for ATA controllers. This function reads 32bit LE
5766 * IO-mapped register @reg and tests for the following condition.
5768 * (*@reg & mask) != val
5770 * If the condition is met, it returns; otherwise, the process is
5771 * repeated after @interval_msec until timeout.
5774 * Kernel thread context (may sleep)
5777 * The final register value.
5779 u32 ata_wait_register(void __iomem *reg, u32 mask, u32 val,
5780 unsigned long interval_msec,
5781 unsigned long timeout_msec)
5783 unsigned long timeout;
5786 tmp = ioread32(reg);
5788 /* Calculate timeout _after_ the first read to make sure
5789 * preceding writes reach the controller before starting to
5790 * eat away the timeout.
5792 timeout = jiffies + (timeout_msec * HZ) / 1000;
5794 while ((tmp & mask) == val && time_before(jiffies, timeout)) {
5795 msleep(interval_msec);
5796 tmp = ioread32(reg);
5803 * libata is essentially a library of internal helper functions for
5804 * low-level ATA host controller drivers. As such, the API/ABI is
5805 * likely to change as new drivers are added and updated.
5806 * Do not depend on ABI/API stability.
5809 EXPORT_SYMBOL_GPL(sata_deb_timing_boot);
5810 EXPORT_SYMBOL_GPL(sata_deb_timing_eh);
5811 EXPORT_SYMBOL_GPL(sata_deb_timing_before_fsrst);
5812 EXPORT_SYMBOL_GPL(ata_std_bios_param);
5813 EXPORT_SYMBOL_GPL(ata_std_ports);
5814 EXPORT_SYMBOL_GPL(ata_device_add);
5815 EXPORT_SYMBOL_GPL(ata_port_detach);
5816 EXPORT_SYMBOL_GPL(ata_host_set_remove);
5817 EXPORT_SYMBOL_GPL(ata_sg_init);
5818 EXPORT_SYMBOL_GPL(ata_sg_init_one);
5819 EXPORT_SYMBOL_GPL(ata_hsm_move);
5820 EXPORT_SYMBOL_GPL(ata_qc_complete);
5821 EXPORT_SYMBOL_GPL(ata_qc_complete_multiple);
5822 EXPORT_SYMBOL_GPL(ata_qc_issue_prot);
5823 EXPORT_SYMBOL_GPL(ata_tf_load);
5824 EXPORT_SYMBOL_GPL(ata_tf_read);
5825 EXPORT_SYMBOL_GPL(ata_noop_dev_select);
5826 EXPORT_SYMBOL_GPL(ata_std_dev_select);
5827 EXPORT_SYMBOL_GPL(ata_tf_to_fis);
5828 EXPORT_SYMBOL_GPL(ata_tf_from_fis);
5829 EXPORT_SYMBOL_GPL(ata_check_status);
5830 EXPORT_SYMBOL_GPL(ata_altstatus);
5831 EXPORT_SYMBOL_GPL(ata_exec_command);
5832 EXPORT_SYMBOL_GPL(ata_port_start);
5833 EXPORT_SYMBOL_GPL(ata_port_stop);
5834 EXPORT_SYMBOL_GPL(ata_host_stop);
5835 EXPORT_SYMBOL_GPL(ata_interrupt);
5836 EXPORT_SYMBOL_GPL(ata_mmio_data_xfer);
5837 EXPORT_SYMBOL_GPL(ata_pio_data_xfer);
5838 EXPORT_SYMBOL_GPL(ata_pio_data_xfer_noirq);
5839 EXPORT_SYMBOL_GPL(ata_qc_prep);
5840 EXPORT_SYMBOL_GPL(ata_noop_qc_prep);
5841 EXPORT_SYMBOL_GPL(ata_bmdma_setup);
5842 EXPORT_SYMBOL_GPL(ata_bmdma_start);
5843 EXPORT_SYMBOL_GPL(ata_bmdma_irq_clear);
5844 EXPORT_SYMBOL_GPL(ata_bmdma_status);
5845 EXPORT_SYMBOL_GPL(ata_bmdma_stop);
5846 EXPORT_SYMBOL_GPL(ata_bmdma_freeze);
5847 EXPORT_SYMBOL_GPL(ata_bmdma_thaw);
5848 EXPORT_SYMBOL_GPL(ata_bmdma_drive_eh);
5849 EXPORT_SYMBOL_GPL(ata_bmdma_error_handler);
5850 EXPORT_SYMBOL_GPL(ata_bmdma_post_internal_cmd);
5851 EXPORT_SYMBOL_GPL(ata_port_probe);
5852 EXPORT_SYMBOL_GPL(sata_set_spd);
5853 EXPORT_SYMBOL_GPL(sata_phy_debounce);
5854 EXPORT_SYMBOL_GPL(sata_phy_resume);
5855 EXPORT_SYMBOL_GPL(sata_phy_reset);
5856 EXPORT_SYMBOL_GPL(__sata_phy_reset);
5857 EXPORT_SYMBOL_GPL(ata_bus_reset);
5858 EXPORT_SYMBOL_GPL(ata_std_prereset);
5859 EXPORT_SYMBOL_GPL(ata_std_softreset);
5860 EXPORT_SYMBOL_GPL(sata_std_hardreset);
5861 EXPORT_SYMBOL_GPL(ata_std_postreset);
5862 EXPORT_SYMBOL_GPL(ata_dev_revalidate);
5863 EXPORT_SYMBOL_GPL(ata_dev_classify);
5864 EXPORT_SYMBOL_GPL(ata_dev_pair);
5865 EXPORT_SYMBOL_GPL(ata_port_disable);
5866 EXPORT_SYMBOL_GPL(ata_ratelimit);
5867 EXPORT_SYMBOL_GPL(ata_wait_register);
5868 EXPORT_SYMBOL_GPL(ata_busy_sleep);
5869 EXPORT_SYMBOL_GPL(ata_port_queue_task);
5870 EXPORT_SYMBOL_GPL(ata_scsi_ioctl);
5871 EXPORT_SYMBOL_GPL(ata_scsi_queuecmd);
5872 EXPORT_SYMBOL_GPL(ata_scsi_slave_config);
5873 EXPORT_SYMBOL_GPL(ata_scsi_slave_destroy);
5874 EXPORT_SYMBOL_GPL(ata_scsi_change_queue_depth);
5875 EXPORT_SYMBOL_GPL(ata_scsi_release);
5876 EXPORT_SYMBOL_GPL(ata_host_intr);
5877 EXPORT_SYMBOL_GPL(sata_scr_valid);
5878 EXPORT_SYMBOL_GPL(sata_scr_read);
5879 EXPORT_SYMBOL_GPL(sata_scr_write);
5880 EXPORT_SYMBOL_GPL(sata_scr_write_flush);
5881 EXPORT_SYMBOL_GPL(ata_port_online);
5882 EXPORT_SYMBOL_GPL(ata_port_offline);
5883 EXPORT_SYMBOL_GPL(ata_id_string);
5884 EXPORT_SYMBOL_GPL(ata_id_c_string);
5885 EXPORT_SYMBOL_GPL(ata_scsi_simulate);
5887 EXPORT_SYMBOL_GPL(ata_pio_need_iordy);
5888 EXPORT_SYMBOL_GPL(ata_timing_compute);
5889 EXPORT_SYMBOL_GPL(ata_timing_merge);
5892 EXPORT_SYMBOL_GPL(pci_test_config_bits);
5893 EXPORT_SYMBOL_GPL(ata_pci_host_stop);
5894 EXPORT_SYMBOL_GPL(ata_pci_init_native_mode);
5895 EXPORT_SYMBOL_GPL(ata_pci_init_one);
5896 EXPORT_SYMBOL_GPL(ata_pci_remove_one);
5897 EXPORT_SYMBOL_GPL(ata_pci_device_suspend);
5898 EXPORT_SYMBOL_GPL(ata_pci_device_resume);
5899 EXPORT_SYMBOL_GPL(ata_pci_default_filter);
5900 EXPORT_SYMBOL_GPL(ata_pci_clear_simplex);
5901 #endif /* CONFIG_PCI */
5903 EXPORT_SYMBOL_GPL(ata_device_suspend);
5904 EXPORT_SYMBOL_GPL(ata_device_resume);
5905 EXPORT_SYMBOL_GPL(ata_scsi_device_suspend);
5906 EXPORT_SYMBOL_GPL(ata_scsi_device_resume);
5908 EXPORT_SYMBOL_GPL(ata_eng_timeout);
5909 EXPORT_SYMBOL_GPL(ata_port_schedule_eh);
5910 EXPORT_SYMBOL_GPL(ata_port_abort);
5911 EXPORT_SYMBOL_GPL(ata_port_freeze);
5912 EXPORT_SYMBOL_GPL(ata_eh_freeze_port);
5913 EXPORT_SYMBOL_GPL(ata_eh_thaw_port);
5914 EXPORT_SYMBOL_GPL(ata_eh_qc_complete);
5915 EXPORT_SYMBOL_GPL(ata_eh_qc_retry);
5916 EXPORT_SYMBOL_GPL(ata_do_eh);