2 * libata-core.c - helper library for ATA
4 * Maintained by: Jeff Garzik <jgarzik@pobox.com>
5 * Please ALWAYS copy linux-ide@vger.kernel.org
8 * Copyright 2003-2004 Red Hat, Inc. All rights reserved.
9 * Copyright 2003-2004 Jeff Garzik
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2, or (at your option)
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
22 * You should have received a copy of the GNU General Public License
23 * along with this program; see the file COPYING. If not, write to
24 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
27 * libata documentation is available via 'make {ps|pdf}docs',
28 * as Documentation/DocBook/libata.*
30 * Hardware documentation available from http://www.t13.org/ and
31 * http://www.sata-io.org/
35 #include <linux/config.h>
36 #include <linux/kernel.h>
37 #include <linux/module.h>
38 #include <linux/pci.h>
39 #include <linux/init.h>
40 #include <linux/list.h>
42 #include <linux/highmem.h>
43 #include <linux/spinlock.h>
44 #include <linux/blkdev.h>
45 #include <linux/delay.h>
46 #include <linux/timer.h>
47 #include <linux/interrupt.h>
48 #include <linux/completion.h>
49 #include <linux/suspend.h>
50 #include <linux/workqueue.h>
51 #include <linux/jiffies.h>
52 #include <linux/scatterlist.h>
53 #include <scsi/scsi.h>
54 #include "scsi_priv.h"
55 #include <scsi/scsi_cmnd.h>
56 #include <scsi/scsi_host.h>
57 #include <linux/libata.h>
59 #include <asm/semaphore.h>
60 #include <asm/byteorder.h>
64 static unsigned int ata_busy_sleep (struct ata_port *ap,
65 unsigned long tmout_pat,
67 static void ata_dev_reread_id(struct ata_port *ap, struct ata_device *dev);
68 static void ata_dev_init_params(struct ata_port *ap, struct ata_device *dev);
69 static void ata_set_mode(struct ata_port *ap);
70 static void ata_dev_set_xfermode(struct ata_port *ap, struct ata_device *dev);
71 static unsigned int ata_get_mode_mask(const struct ata_port *ap, int shift);
72 static int fgb(u32 bitmap);
73 static int ata_choose_xfer_mode(const struct ata_port *ap,
75 unsigned int *xfer_shift_out);
76 static void __ata_qc_complete(struct ata_queued_cmd *qc);
78 static unsigned int ata_unique_id = 1;
79 static struct workqueue_struct *ata_wq;
81 int atapi_enabled = 0;
82 module_param(atapi_enabled, int, 0444);
83 MODULE_PARM_DESC(atapi_enabled, "Enable discovery of ATAPI devices (0=off, 1=on)");
85 MODULE_AUTHOR("Jeff Garzik");
86 MODULE_DESCRIPTION("Library module for ATA devices");
87 MODULE_LICENSE("GPL");
88 MODULE_VERSION(DRV_VERSION);
91 * ata_tf_load_pio - send taskfile registers to host controller
92 * @ap: Port to which output is sent
93 * @tf: ATA taskfile register set
95 * Outputs ATA taskfile to standard ATA host controller.
98 * Inherited from caller.
101 static void ata_tf_load_pio(struct ata_port *ap, const struct ata_taskfile *tf)
103 struct ata_ioports *ioaddr = &ap->ioaddr;
104 unsigned int is_addr = tf->flags & ATA_TFLAG_ISADDR;
106 if (tf->ctl != ap->last_ctl) {
107 outb(tf->ctl, ioaddr->ctl_addr);
108 ap->last_ctl = tf->ctl;
112 if (is_addr && (tf->flags & ATA_TFLAG_LBA48)) {
113 outb(tf->hob_feature, ioaddr->feature_addr);
114 outb(tf->hob_nsect, ioaddr->nsect_addr);
115 outb(tf->hob_lbal, ioaddr->lbal_addr);
116 outb(tf->hob_lbam, ioaddr->lbam_addr);
117 outb(tf->hob_lbah, ioaddr->lbah_addr);
118 VPRINTK("hob: feat 0x%X nsect 0x%X, lba 0x%X 0x%X 0x%X\n",
127 outb(tf->feature, ioaddr->feature_addr);
128 outb(tf->nsect, ioaddr->nsect_addr);
129 outb(tf->lbal, ioaddr->lbal_addr);
130 outb(tf->lbam, ioaddr->lbam_addr);
131 outb(tf->lbah, ioaddr->lbah_addr);
132 VPRINTK("feat 0x%X nsect 0x%X lba 0x%X 0x%X 0x%X\n",
140 if (tf->flags & ATA_TFLAG_DEVICE) {
141 outb(tf->device, ioaddr->device_addr);
142 VPRINTK("device 0x%X\n", tf->device);
149 * ata_tf_load_mmio - send taskfile registers to host controller
150 * @ap: Port to which output is sent
151 * @tf: ATA taskfile register set
153 * Outputs ATA taskfile to standard ATA host controller using MMIO.
156 * Inherited from caller.
159 static void ata_tf_load_mmio(struct ata_port *ap, const struct ata_taskfile *tf)
161 struct ata_ioports *ioaddr = &ap->ioaddr;
162 unsigned int is_addr = tf->flags & ATA_TFLAG_ISADDR;
164 if (tf->ctl != ap->last_ctl) {
165 writeb(tf->ctl, (void __iomem *) ap->ioaddr.ctl_addr);
166 ap->last_ctl = tf->ctl;
170 if (is_addr && (tf->flags & ATA_TFLAG_LBA48)) {
171 writeb(tf->hob_feature, (void __iomem *) ioaddr->feature_addr);
172 writeb(tf->hob_nsect, (void __iomem *) ioaddr->nsect_addr);
173 writeb(tf->hob_lbal, (void __iomem *) ioaddr->lbal_addr);
174 writeb(tf->hob_lbam, (void __iomem *) ioaddr->lbam_addr);
175 writeb(tf->hob_lbah, (void __iomem *) ioaddr->lbah_addr);
176 VPRINTK("hob: feat 0x%X nsect 0x%X, lba 0x%X 0x%X 0x%X\n",
185 writeb(tf->feature, (void __iomem *) ioaddr->feature_addr);
186 writeb(tf->nsect, (void __iomem *) ioaddr->nsect_addr);
187 writeb(tf->lbal, (void __iomem *) ioaddr->lbal_addr);
188 writeb(tf->lbam, (void __iomem *) ioaddr->lbam_addr);
189 writeb(tf->lbah, (void __iomem *) ioaddr->lbah_addr);
190 VPRINTK("feat 0x%X nsect 0x%X lba 0x%X 0x%X 0x%X\n",
198 if (tf->flags & ATA_TFLAG_DEVICE) {
199 writeb(tf->device, (void __iomem *) ioaddr->device_addr);
200 VPRINTK("device 0x%X\n", tf->device);
208 * ata_tf_load - send taskfile registers to host controller
209 * @ap: Port to which output is sent
210 * @tf: ATA taskfile register set
212 * Outputs ATA taskfile to standard ATA host controller using MMIO
213 * or PIO as indicated by the ATA_FLAG_MMIO flag.
214 * Writes the control, feature, nsect, lbal, lbam, and lbah registers.
215 * Optionally (ATA_TFLAG_LBA48) writes hob_feature, hob_nsect,
216 * hob_lbal, hob_lbam, and hob_lbah.
218 * This function waits for idle (!BUSY and !DRQ) after writing
219 * registers. If the control register has a new value, this
220 * function also waits for idle after writing control and before
221 * writing the remaining registers.
223 * May be used as the tf_load() entry in ata_port_operations.
226 * Inherited from caller.
228 void ata_tf_load(struct ata_port *ap, const struct ata_taskfile *tf)
230 if (ap->flags & ATA_FLAG_MMIO)
231 ata_tf_load_mmio(ap, tf);
233 ata_tf_load_pio(ap, tf);
237 * ata_exec_command_pio - issue ATA command to host controller
238 * @ap: port to which command is being issued
239 * @tf: ATA taskfile register set
241 * Issues PIO write to ATA command register, with proper
242 * synchronization with interrupt handler / other threads.
245 * spin_lock_irqsave(host_set lock)
248 static void ata_exec_command_pio(struct ata_port *ap, const struct ata_taskfile *tf)
250 DPRINTK("ata%u: cmd 0x%X\n", ap->id, tf->command);
252 outb(tf->command, ap->ioaddr.command_addr);
258 * ata_exec_command_mmio - issue ATA command to host controller
259 * @ap: port to which command is being issued
260 * @tf: ATA taskfile register set
262 * Issues MMIO write to ATA command register, with proper
263 * synchronization with interrupt handler / other threads.
266 * spin_lock_irqsave(host_set lock)
269 static void ata_exec_command_mmio(struct ata_port *ap, const struct ata_taskfile *tf)
271 DPRINTK("ata%u: cmd 0x%X\n", ap->id, tf->command);
273 writeb(tf->command, (void __iomem *) ap->ioaddr.command_addr);
279 * ata_exec_command - issue ATA command to host controller
280 * @ap: port to which command is being issued
281 * @tf: ATA taskfile register set
283 * Issues PIO/MMIO write to ATA command register, with proper
284 * synchronization with interrupt handler / other threads.
287 * spin_lock_irqsave(host_set lock)
289 void ata_exec_command(struct ata_port *ap, const struct ata_taskfile *tf)
291 if (ap->flags & ATA_FLAG_MMIO)
292 ata_exec_command_mmio(ap, tf);
294 ata_exec_command_pio(ap, tf);
298 * ata_tf_to_host - issue ATA taskfile to host controller
299 * @ap: port to which command is being issued
300 * @tf: ATA taskfile register set
302 * Issues ATA taskfile register set to ATA host controller,
303 * with proper synchronization with interrupt handler and
307 * spin_lock_irqsave(host_set lock)
310 static inline void ata_tf_to_host(struct ata_port *ap,
311 const struct ata_taskfile *tf)
313 ap->ops->tf_load(ap, tf);
314 ap->ops->exec_command(ap, tf);
318 * ata_tf_read_pio - input device's ATA taskfile shadow registers
319 * @ap: Port from which input is read
320 * @tf: ATA taskfile register set for storing input
322 * Reads ATA taskfile registers for currently-selected device
326 * Inherited from caller.
329 static void ata_tf_read_pio(struct ata_port *ap, struct ata_taskfile *tf)
331 struct ata_ioports *ioaddr = &ap->ioaddr;
333 tf->command = ata_check_status(ap);
334 tf->feature = inb(ioaddr->error_addr);
335 tf->nsect = inb(ioaddr->nsect_addr);
336 tf->lbal = inb(ioaddr->lbal_addr);
337 tf->lbam = inb(ioaddr->lbam_addr);
338 tf->lbah = inb(ioaddr->lbah_addr);
339 tf->device = inb(ioaddr->device_addr);
341 if (tf->flags & ATA_TFLAG_LBA48) {
342 outb(tf->ctl | ATA_HOB, ioaddr->ctl_addr);
343 tf->hob_feature = inb(ioaddr->error_addr);
344 tf->hob_nsect = inb(ioaddr->nsect_addr);
345 tf->hob_lbal = inb(ioaddr->lbal_addr);
346 tf->hob_lbam = inb(ioaddr->lbam_addr);
347 tf->hob_lbah = inb(ioaddr->lbah_addr);
352 * ata_tf_read_mmio - input device's ATA taskfile shadow registers
353 * @ap: Port from which input is read
354 * @tf: ATA taskfile register set for storing input
356 * Reads ATA taskfile registers for currently-selected device
360 * Inherited from caller.
363 static void ata_tf_read_mmio(struct ata_port *ap, struct ata_taskfile *tf)
365 struct ata_ioports *ioaddr = &ap->ioaddr;
367 tf->command = ata_check_status(ap);
368 tf->feature = readb((void __iomem *)ioaddr->error_addr);
369 tf->nsect = readb((void __iomem *)ioaddr->nsect_addr);
370 tf->lbal = readb((void __iomem *)ioaddr->lbal_addr);
371 tf->lbam = readb((void __iomem *)ioaddr->lbam_addr);
372 tf->lbah = readb((void __iomem *)ioaddr->lbah_addr);
373 tf->device = readb((void __iomem *)ioaddr->device_addr);
375 if (tf->flags & ATA_TFLAG_LBA48) {
376 writeb(tf->ctl | ATA_HOB, (void __iomem *) ap->ioaddr.ctl_addr);
377 tf->hob_feature = readb((void __iomem *)ioaddr->error_addr);
378 tf->hob_nsect = readb((void __iomem *)ioaddr->nsect_addr);
379 tf->hob_lbal = readb((void __iomem *)ioaddr->lbal_addr);
380 tf->hob_lbam = readb((void __iomem *)ioaddr->lbam_addr);
381 tf->hob_lbah = readb((void __iomem *)ioaddr->lbah_addr);
387 * ata_tf_read - input device's ATA taskfile shadow registers
388 * @ap: Port from which input is read
389 * @tf: ATA taskfile register set for storing input
391 * Reads ATA taskfile registers for currently-selected device
394 * Reads nsect, lbal, lbam, lbah, and device. If ATA_TFLAG_LBA48
395 * is set, also reads the hob registers.
397 * May be used as the tf_read() entry in ata_port_operations.
400 * Inherited from caller.
402 void ata_tf_read(struct ata_port *ap, struct ata_taskfile *tf)
404 if (ap->flags & ATA_FLAG_MMIO)
405 ata_tf_read_mmio(ap, tf);
407 ata_tf_read_pio(ap, tf);
411 * ata_check_status_pio - Read device status reg & clear interrupt
412 * @ap: port where the device is
414 * Reads ATA taskfile status register for currently-selected device
415 * and return its value. This also clears pending interrupts
419 * Inherited from caller.
421 static u8 ata_check_status_pio(struct ata_port *ap)
423 return inb(ap->ioaddr.status_addr);
427 * ata_check_status_mmio - Read device status reg & clear interrupt
428 * @ap: port where the device is
430 * Reads ATA taskfile status register for currently-selected device
431 * via MMIO and return its value. This also clears pending interrupts
435 * Inherited from caller.
437 static u8 ata_check_status_mmio(struct ata_port *ap)
439 return readb((void __iomem *) ap->ioaddr.status_addr);
444 * ata_check_status - Read device status reg & clear interrupt
445 * @ap: port where the device is
447 * Reads ATA taskfile status register for currently-selected device
448 * and return its value. This also clears pending interrupts
451 * May be used as the check_status() entry in ata_port_operations.
454 * Inherited from caller.
456 u8 ata_check_status(struct ata_port *ap)
458 if (ap->flags & ATA_FLAG_MMIO)
459 return ata_check_status_mmio(ap);
460 return ata_check_status_pio(ap);
465 * ata_altstatus - Read device alternate status reg
466 * @ap: port where the device is
468 * Reads ATA taskfile alternate status register for
469 * currently-selected device and return its value.
471 * Note: may NOT be used as the check_altstatus() entry in
472 * ata_port_operations.
475 * Inherited from caller.
477 u8 ata_altstatus(struct ata_port *ap)
479 if (ap->ops->check_altstatus)
480 return ap->ops->check_altstatus(ap);
482 if (ap->flags & ATA_FLAG_MMIO)
483 return readb((void __iomem *)ap->ioaddr.altstatus_addr);
484 return inb(ap->ioaddr.altstatus_addr);
489 * ata_tf_to_fis - Convert ATA taskfile to SATA FIS structure
490 * @tf: Taskfile to convert
491 * @fis: Buffer into which data will output
492 * @pmp: Port multiplier port
494 * Converts a standard ATA taskfile to a Serial ATA
495 * FIS structure (Register - Host to Device).
498 * Inherited from caller.
501 void ata_tf_to_fis(const struct ata_taskfile *tf, u8 *fis, u8 pmp)
503 fis[0] = 0x27; /* Register - Host to Device FIS */
504 fis[1] = (pmp & 0xf) | (1 << 7); /* Port multiplier number,
505 bit 7 indicates Command FIS */
506 fis[2] = tf->command;
507 fis[3] = tf->feature;
514 fis[8] = tf->hob_lbal;
515 fis[9] = tf->hob_lbam;
516 fis[10] = tf->hob_lbah;
517 fis[11] = tf->hob_feature;
520 fis[13] = tf->hob_nsect;
531 * ata_tf_from_fis - Convert SATA FIS to ATA taskfile
532 * @fis: Buffer from which data will be input
533 * @tf: Taskfile to output
535 * Converts a serial ATA FIS structure to a standard ATA taskfile.
538 * Inherited from caller.
541 void ata_tf_from_fis(const u8 *fis, struct ata_taskfile *tf)
543 tf->command = fis[2]; /* status */
544 tf->feature = fis[3]; /* error */
551 tf->hob_lbal = fis[8];
552 tf->hob_lbam = fis[9];
553 tf->hob_lbah = fis[10];
556 tf->hob_nsect = fis[13];
559 static const u8 ata_rw_cmds[] = {
563 ATA_CMD_READ_MULTI_EXT,
564 ATA_CMD_WRITE_MULTI_EXT,
568 ATA_CMD_PIO_READ_EXT,
569 ATA_CMD_PIO_WRITE_EXT,
578 * ata_rwcmd_protocol - set taskfile r/w commands and protocol
579 * @qc: command to examine and configure
581 * Examine the device configuration and tf->flags to calculate
582 * the proper read/write commands and protocol to use.
587 void ata_rwcmd_protocol(struct ata_queued_cmd *qc)
589 struct ata_taskfile *tf = &qc->tf;
590 struct ata_device *dev = qc->dev;
592 int index, lba48, write;
594 lba48 = (tf->flags & ATA_TFLAG_LBA48) ? 2 : 0;
595 write = (tf->flags & ATA_TFLAG_WRITE) ? 1 : 0;
597 if (dev->flags & ATA_DFLAG_PIO) {
598 tf->protocol = ATA_PROT_PIO;
599 index = dev->multi_count ? 0 : 4;
601 tf->protocol = ATA_PROT_DMA;
605 tf->command = ata_rw_cmds[index + lba48 + write];
608 static const char * xfer_mode_str[] = {
628 * ata_udma_string - convert UDMA bit offset to string
629 * @mask: mask of bits supported; only highest bit counts.
631 * Determine string which represents the highest speed
632 * (highest bit in @udma_mask).
638 * Constant C string representing highest speed listed in
639 * @udma_mask, or the constant C string "<n/a>".
642 static const char *ata_mode_string(unsigned int mask)
646 for (i = 7; i >= 0; i--)
649 for (i = ATA_SHIFT_MWDMA + 2; i >= ATA_SHIFT_MWDMA; i--)
652 for (i = ATA_SHIFT_PIO + 4; i >= ATA_SHIFT_PIO; i--)
659 return xfer_mode_str[i];
663 * ata_pio_devchk - PATA device presence detection
664 * @ap: ATA channel to examine
665 * @device: Device to examine (starting at zero)
667 * This technique was originally described in
668 * Hale Landis's ATADRVR (www.ata-atapi.com), and
669 * later found its way into the ATA/ATAPI spec.
671 * Write a pattern to the ATA shadow registers,
672 * and if a device is present, it will respond by
673 * correctly storing and echoing back the
674 * ATA shadow register contents.
680 static unsigned int ata_pio_devchk(struct ata_port *ap,
683 struct ata_ioports *ioaddr = &ap->ioaddr;
686 ap->ops->dev_select(ap, device);
688 outb(0x55, ioaddr->nsect_addr);
689 outb(0xaa, ioaddr->lbal_addr);
691 outb(0xaa, ioaddr->nsect_addr);
692 outb(0x55, ioaddr->lbal_addr);
694 outb(0x55, ioaddr->nsect_addr);
695 outb(0xaa, ioaddr->lbal_addr);
697 nsect = inb(ioaddr->nsect_addr);
698 lbal = inb(ioaddr->lbal_addr);
700 if ((nsect == 0x55) && (lbal == 0xaa))
701 return 1; /* we found a device */
703 return 0; /* nothing found */
707 * ata_mmio_devchk - PATA device presence detection
708 * @ap: ATA channel to examine
709 * @device: Device to examine (starting at zero)
711 * This technique was originally described in
712 * Hale Landis's ATADRVR (www.ata-atapi.com), and
713 * later found its way into the ATA/ATAPI spec.
715 * Write a pattern to the ATA shadow registers,
716 * and if a device is present, it will respond by
717 * correctly storing and echoing back the
718 * ATA shadow register contents.
724 static unsigned int ata_mmio_devchk(struct ata_port *ap,
727 struct ata_ioports *ioaddr = &ap->ioaddr;
730 ap->ops->dev_select(ap, device);
732 writeb(0x55, (void __iomem *) ioaddr->nsect_addr);
733 writeb(0xaa, (void __iomem *) ioaddr->lbal_addr);
735 writeb(0xaa, (void __iomem *) ioaddr->nsect_addr);
736 writeb(0x55, (void __iomem *) ioaddr->lbal_addr);
738 writeb(0x55, (void __iomem *) ioaddr->nsect_addr);
739 writeb(0xaa, (void __iomem *) ioaddr->lbal_addr);
741 nsect = readb((void __iomem *) ioaddr->nsect_addr);
742 lbal = readb((void __iomem *) ioaddr->lbal_addr);
744 if ((nsect == 0x55) && (lbal == 0xaa))
745 return 1; /* we found a device */
747 return 0; /* nothing found */
751 * ata_devchk - PATA device presence detection
752 * @ap: ATA channel to examine
753 * @device: Device to examine (starting at zero)
755 * Dispatch ATA device presence detection, depending
756 * on whether we are using PIO or MMIO to talk to the
757 * ATA shadow registers.
763 static unsigned int ata_devchk(struct ata_port *ap,
766 if (ap->flags & ATA_FLAG_MMIO)
767 return ata_mmio_devchk(ap, device);
768 return ata_pio_devchk(ap, device);
772 * ata_dev_classify - determine device type based on ATA-spec signature
773 * @tf: ATA taskfile register set for device to be identified
775 * Determine from taskfile register contents whether a device is
776 * ATA or ATAPI, as per "Signature and persistence" section
777 * of ATA/PI spec (volume 1, sect 5.14).
783 * Device type, %ATA_DEV_ATA, %ATA_DEV_ATAPI, or %ATA_DEV_UNKNOWN
784 * the event of failure.
787 unsigned int ata_dev_classify(const struct ata_taskfile *tf)
789 /* Apple's open source Darwin code hints that some devices only
790 * put a proper signature into the LBA mid/high registers,
791 * So, we only check those. It's sufficient for uniqueness.
794 if (((tf->lbam == 0) && (tf->lbah == 0)) ||
795 ((tf->lbam == 0x3c) && (tf->lbah == 0xc3))) {
796 DPRINTK("found ATA device by sig\n");
800 if (((tf->lbam == 0x14) && (tf->lbah == 0xeb)) ||
801 ((tf->lbam == 0x69) && (tf->lbah == 0x96))) {
802 DPRINTK("found ATAPI device by sig\n");
803 return ATA_DEV_ATAPI;
806 DPRINTK("unknown device\n");
807 return ATA_DEV_UNKNOWN;
811 * ata_dev_try_classify - Parse returned ATA device signature
812 * @ap: ATA channel to examine
813 * @device: Device to examine (starting at zero)
815 * After an event -- SRST, E.D.D., or SATA COMRESET -- occurs,
816 * an ATA/ATAPI-defined set of values is placed in the ATA
817 * shadow registers, indicating the results of device detection
820 * Select the ATA device, and read the values from the ATA shadow
821 * registers. Then parse according to the Error register value,
822 * and the spec-defined values examined by ata_dev_classify().
828 static u8 ata_dev_try_classify(struct ata_port *ap, unsigned int device)
830 struct ata_device *dev = &ap->device[device];
831 struct ata_taskfile tf;
835 ap->ops->dev_select(ap, device);
837 memset(&tf, 0, sizeof(tf));
839 ap->ops->tf_read(ap, &tf);
842 dev->class = ATA_DEV_NONE;
844 /* see if device passed diags */
847 else if ((device == 0) && (err == 0x81))
852 /* determine if device if ATA or ATAPI */
853 class = ata_dev_classify(&tf);
854 if (class == ATA_DEV_UNKNOWN)
856 if ((class == ATA_DEV_ATA) && (ata_chk_status(ap) == 0))
865 * ata_dev_id_string - Convert IDENTIFY DEVICE page into string
866 * @id: IDENTIFY DEVICE results we will examine
867 * @s: string into which data is output
868 * @ofs: offset into identify device page
869 * @len: length of string to return. must be an even number.
871 * The strings in the IDENTIFY DEVICE page are broken up into
872 * 16-bit chunks. Run through the string, and output each
873 * 8-bit chunk linearly, regardless of platform.
879 void ata_dev_id_string(const u16 *id, unsigned char *s,
880 unsigned int ofs, unsigned int len)
900 * ata_noop_dev_select - Select device 0/1 on ATA bus
901 * @ap: ATA channel to manipulate
902 * @device: ATA device (numbered from zero) to select
904 * This function performs no actual function.
906 * May be used as the dev_select() entry in ata_port_operations.
911 void ata_noop_dev_select (struct ata_port *ap, unsigned int device)
917 * ata_std_dev_select - Select device 0/1 on ATA bus
918 * @ap: ATA channel to manipulate
919 * @device: ATA device (numbered from zero) to select
921 * Use the method defined in the ATA specification to
922 * make either device 0, or device 1, active on the
923 * ATA channel. Works with both PIO and MMIO.
925 * May be used as the dev_select() entry in ata_port_operations.
931 void ata_std_dev_select (struct ata_port *ap, unsigned int device)
936 tmp = ATA_DEVICE_OBS;
938 tmp = ATA_DEVICE_OBS | ATA_DEV1;
940 if (ap->flags & ATA_FLAG_MMIO) {
941 writeb(tmp, (void __iomem *) ap->ioaddr.device_addr);
943 outb(tmp, ap->ioaddr.device_addr);
945 ata_pause(ap); /* needed; also flushes, for mmio */
949 * ata_dev_select - Select device 0/1 on ATA bus
950 * @ap: ATA channel to manipulate
951 * @device: ATA device (numbered from zero) to select
952 * @wait: non-zero to wait for Status register BSY bit to clear
953 * @can_sleep: non-zero if context allows sleeping
955 * Use the method defined in the ATA specification to
956 * make either device 0, or device 1, active on the
959 * This is a high-level version of ata_std_dev_select(),
960 * which additionally provides the services of inserting
961 * the proper pauses and status polling, where needed.
967 void ata_dev_select(struct ata_port *ap, unsigned int device,
968 unsigned int wait, unsigned int can_sleep)
970 VPRINTK("ENTER, ata%u: device %u, wait %u\n",
971 ap->id, device, wait);
976 ap->ops->dev_select(ap, device);
979 if (can_sleep && ap->device[device].class == ATA_DEV_ATAPI)
986 * ata_dump_id - IDENTIFY DEVICE info debugging output
987 * @dev: Device whose IDENTIFY DEVICE page we will dump
989 * Dump selected 16-bit words from a detected device's
990 * IDENTIFY PAGE page.
996 static inline void ata_dump_id(const struct ata_device *dev)
998 DPRINTK("49==0x%04x "
1008 DPRINTK("80==0x%04x "
1018 DPRINTK("88==0x%04x "
1025 * Compute the PIO modes available for this device. This is not as
1026 * trivial as it seems if we must consider early devices correctly.
1028 * FIXME: pre IDE drive timing (do we care ?).
1031 static unsigned int ata_pio_modes(const struct ata_device *adev)
1035 /* Usual case. Word 53 indicates word 88 is valid */
1036 if (adev->id[ATA_ID_FIELD_VALID] & (1 << 2)) {
1037 modes = adev->id[ATA_ID_PIO_MODES] & 0x03;
1043 /* If word 88 isn't valid then Word 51 holds the PIO timing number
1044 for the maximum. Turn it into a mask and return it */
1045 modes = (2 << (adev->id[ATA_ID_OLD_PIO_MODES] & 0xFF)) - 1 ;
1050 * ata_dev_identify - obtain IDENTIFY x DEVICE page
1051 * @ap: port on which device we wish to probe resides
1052 * @device: device bus address, starting at zero
1054 * Following bus reset, we issue the IDENTIFY [PACKET] DEVICE
1055 * command, and read back the 512-byte device information page.
1056 * The device information page is fed to us via the standard
1057 * PIO-IN protocol, but we hand-code it here. (TODO: investigate
1058 * using standard PIO-IN paths)
1060 * After reading the device information page, we use several
1061 * bits of information from it to initialize data structures
1062 * that will be used during the lifetime of the ata_device.
1063 * Other data from the info page is used to disqualify certain
1064 * older ATA devices we do not wish to support.
1067 * Inherited from caller. Some functions called by this function
1068 * obtain the host_set lock.
1071 static void ata_dev_identify(struct ata_port *ap, unsigned int device)
1073 struct ata_device *dev = &ap->device[device];
1074 unsigned int major_version;
1076 unsigned long xfer_modes;
1077 unsigned int using_edd;
1078 DECLARE_COMPLETION(wait);
1079 struct ata_queued_cmd *qc;
1080 unsigned long flags;
1083 if (!ata_dev_present(dev)) {
1084 DPRINTK("ENTER/EXIT (host %u, dev %u) -- nodev\n",
1089 if (ap->flags & (ATA_FLAG_SRST | ATA_FLAG_SATA_RESET))
1094 DPRINTK("ENTER, host %u, dev %u\n", ap->id, device);
1096 assert (dev->class == ATA_DEV_ATA || dev->class == ATA_DEV_ATAPI ||
1097 dev->class == ATA_DEV_NONE);
1099 ata_dev_select(ap, device, 1, 1); /* select device 0/1 */
1101 qc = ata_qc_new_init(ap, dev);
1104 ata_sg_init_one(qc, dev->id, sizeof(dev->id));
1105 qc->dma_dir = DMA_FROM_DEVICE;
1106 qc->tf.protocol = ATA_PROT_PIO;
1110 if (dev->class == ATA_DEV_ATA) {
1111 qc->tf.command = ATA_CMD_ID_ATA;
1112 DPRINTK("do ATA identify\n");
1114 qc->tf.command = ATA_CMD_ID_ATAPI;
1115 DPRINTK("do ATAPI identify\n");
1118 qc->waiting = &wait;
1119 qc->complete_fn = ata_qc_complete_noop;
1121 spin_lock_irqsave(&ap->host_set->lock, flags);
1122 rc = ata_qc_issue(qc);
1123 spin_unlock_irqrestore(&ap->host_set->lock, flags);
1128 wait_for_completion(&wait);
1130 spin_lock_irqsave(&ap->host_set->lock, flags);
1131 ap->ops->tf_read(ap, &qc->tf);
1132 spin_unlock_irqrestore(&ap->host_set->lock, flags);
1134 if (qc->tf.command & ATA_ERR) {
1136 * arg! EDD works for all test cases, but seems to return
1137 * the ATA signature for some ATAPI devices. Until the
1138 * reason for this is found and fixed, we fix up the mess
1139 * here. If IDENTIFY DEVICE returns command aborted
1140 * (as ATAPI devices do), then we issue an
1141 * IDENTIFY PACKET DEVICE.
1143 * ATA software reset (SRST, the default) does not appear
1144 * to have this problem.
1146 if ((using_edd) && (dev->class == ATA_DEV_ATA)) {
1147 u8 err = qc->tf.feature;
1148 if (err & ATA_ABORTED) {
1149 dev->class = ATA_DEV_ATAPI;
1160 swap_buf_le16(dev->id, ATA_ID_WORDS);
1162 /* print device capabilities */
1163 printk(KERN_DEBUG "ata%u: dev %u cfg "
1164 "49:%04x 82:%04x 83:%04x 84:%04x 85:%04x 86:%04x 87:%04x 88:%04x\n",
1165 ap->id, device, dev->id[49],
1166 dev->id[82], dev->id[83], dev->id[84],
1167 dev->id[85], dev->id[86], dev->id[87],
1171 * common ATA, ATAPI feature tests
1174 /* we require DMA support (bits 8 of word 49) */
1175 if (!ata_id_has_dma(dev->id)) {
1176 printk(KERN_DEBUG "ata%u: no dma\n", ap->id);
1180 /* quick-n-dirty find max transfer mode; for printk only */
1181 xfer_modes = dev->id[ATA_ID_UDMA_MODES];
1183 xfer_modes = (dev->id[ATA_ID_MWDMA_MODES]) << ATA_SHIFT_MWDMA;
1185 xfer_modes = ata_pio_modes(dev);
1189 /* ATA-specific feature tests */
1190 if (dev->class == ATA_DEV_ATA) {
1191 if (!ata_id_is_ata(dev->id)) /* sanity check */
1194 /* get major version */
1195 tmp = dev->id[ATA_ID_MAJOR_VER];
1196 for (major_version = 14; major_version >= 1; major_version--)
1197 if (tmp & (1 << major_version))
1201 * The exact sequence expected by certain pre-ATA4 drives is:
1204 * INITIALIZE DEVICE PARAMETERS
1206 * Some drives were very specific about that exact sequence.
1208 if (major_version < 4 || (!ata_id_has_lba(dev->id))) {
1209 ata_dev_init_params(ap, dev);
1211 /* current CHS translation info (id[53-58]) might be
1212 * changed. reread the identify device info.
1214 ata_dev_reread_id(ap, dev);
1217 if (ata_id_has_lba(dev->id)) {
1218 dev->flags |= ATA_DFLAG_LBA;
1220 if (ata_id_has_lba48(dev->id)) {
1221 dev->flags |= ATA_DFLAG_LBA48;
1222 dev->n_sectors = ata_id_u64(dev->id, 100);
1224 dev->n_sectors = ata_id_u32(dev->id, 60);
1227 /* print device info to dmesg */
1228 printk(KERN_INFO "ata%u: dev %u ATA-%d, max %s, %Lu sectors:%s\n",
1231 ata_mode_string(xfer_modes),
1232 (unsigned long long)dev->n_sectors,
1233 dev->flags & ATA_DFLAG_LBA48 ? " LBA48" : " LBA");
1237 /* Default translation */
1238 dev->cylinders = dev->id[1];
1239 dev->heads = dev->id[3];
1240 dev->sectors = dev->id[6];
1241 dev->n_sectors = dev->cylinders * dev->heads * dev->sectors;
1243 if (ata_id_current_chs_valid(dev->id)) {
1244 /* Current CHS translation is valid. */
1245 dev->cylinders = dev->id[54];
1246 dev->heads = dev->id[55];
1247 dev->sectors = dev->id[56];
1249 dev->n_sectors = ata_id_u32(dev->id, 57);
1252 /* print device info to dmesg */
1253 printk(KERN_INFO "ata%u: dev %u ATA-%d, max %s, %Lu sectors: CHS %d/%d/%d\n",
1256 ata_mode_string(xfer_modes),
1257 (unsigned long long)dev->n_sectors,
1258 (int)dev->cylinders, (int)dev->heads, (int)dev->sectors);
1262 ap->host->max_cmd_len = 16;
1265 /* ATAPI-specific feature tests */
1267 if (ata_id_is_ata(dev->id)) /* sanity check */
1270 rc = atapi_cdb_len(dev->id);
1271 if ((rc < 12) || (rc > ATAPI_CDB_LEN)) {
1272 printk(KERN_WARNING "ata%u: unsupported CDB len\n", ap->id);
1275 ap->cdb_len = (unsigned int) rc;
1276 ap->host->max_cmd_len = (unsigned char) ap->cdb_len;
1278 /* print device info to dmesg */
1279 printk(KERN_INFO "ata%u: dev %u ATAPI, max %s\n",
1281 ata_mode_string(xfer_modes));
1284 DPRINTK("EXIT, drv_stat = 0x%x\n", ata_chk_status(ap));
1288 printk(KERN_WARNING "ata%u: dev %u not supported, ignoring\n",
1291 dev->class++; /* converts ATA_DEV_xxx into ATA_DEV_xxx_UNSUP */
1292 DPRINTK("EXIT, err\n");
1296 static inline u8 ata_dev_knobble(const struct ata_port *ap)
1298 return ((ap->cbl == ATA_CBL_SATA) && (!ata_id_is_sata(ap->device->id)));
1302 * ata_dev_config - Run device specific handlers and check for
1303 * SATA->PATA bridges
1310 void ata_dev_config(struct ata_port *ap, unsigned int i)
1312 /* limit bridge transfers to udma5, 200 sectors */
1313 if (ata_dev_knobble(ap)) {
1314 printk(KERN_INFO "ata%u(%u): applying bridge limits\n",
1315 ap->id, ap->device->devno);
1316 ap->udma_mask &= ATA_UDMA5;
1317 ap->host->max_sectors = ATA_MAX_SECTORS;
1318 ap->host->hostt->max_sectors = ATA_MAX_SECTORS;
1319 ap->device->flags |= ATA_DFLAG_LOCK_SECTORS;
1322 if (ap->ops->dev_config)
1323 ap->ops->dev_config(ap, &ap->device[i]);
1327 * ata_bus_probe - Reset and probe ATA bus
1330 * Master ATA bus probing function. Initiates a hardware-dependent
1331 * bus reset, then attempts to identify any devices found on
1335 * PCI/etc. bus probe sem.
1338 * Zero on success, non-zero on error.
1341 static int ata_bus_probe(struct ata_port *ap)
1343 unsigned int i, found = 0;
1345 ap->ops->phy_reset(ap);
1346 if (ap->flags & ATA_FLAG_PORT_DISABLED)
1349 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1350 ata_dev_identify(ap, i);
1351 if (ata_dev_present(&ap->device[i])) {
1353 ata_dev_config(ap,i);
1357 if ((!found) || (ap->flags & ATA_FLAG_PORT_DISABLED))
1358 goto err_out_disable;
1361 if (ap->flags & ATA_FLAG_PORT_DISABLED)
1362 goto err_out_disable;
1367 ap->ops->port_disable(ap);
1373 * ata_port_probe - Mark port as enabled
1374 * @ap: Port for which we indicate enablement
1376 * Modify @ap data structure such that the system
1377 * thinks that the entire port is enabled.
1379 * LOCKING: host_set lock, or some other form of
1383 void ata_port_probe(struct ata_port *ap)
1385 ap->flags &= ~ATA_FLAG_PORT_DISABLED;
1389 * __sata_phy_reset - Wake/reset a low-level SATA PHY
1390 * @ap: SATA port associated with target SATA PHY.
1392 * This function issues commands to standard SATA Sxxx
1393 * PHY registers, to wake up the phy (and device), and
1394 * clear any reset condition.
1397 * PCI/etc. bus probe sem.
1400 void __sata_phy_reset(struct ata_port *ap)
1403 unsigned long timeout = jiffies + (HZ * 5);
1405 if (ap->flags & ATA_FLAG_SATA_RESET) {
1406 /* issue phy wake/reset */
1407 scr_write_flush(ap, SCR_CONTROL, 0x301);
1408 /* Couldn't find anything in SATA I/II specs, but
1409 * AHCI-1.1 10.4.2 says at least 1 ms. */
1412 scr_write_flush(ap, SCR_CONTROL, 0x300); /* phy wake/clear reset */
1414 /* wait for phy to become ready, if necessary */
1417 sstatus = scr_read(ap, SCR_STATUS);
1418 if ((sstatus & 0xf) != 1)
1420 } while (time_before(jiffies, timeout));
1422 /* TODO: phy layer with polling, timeouts, etc. */
1423 if (sata_dev_present(ap))
1426 sstatus = scr_read(ap, SCR_STATUS);
1427 printk(KERN_INFO "ata%u: no device found (phy stat %08x)\n",
1429 ata_port_disable(ap);
1432 if (ap->flags & ATA_FLAG_PORT_DISABLED)
1435 if (ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT)) {
1436 ata_port_disable(ap);
1440 ap->cbl = ATA_CBL_SATA;
1444 * sata_phy_reset - Reset SATA bus.
1445 * @ap: SATA port associated with target SATA PHY.
1447 * This function resets the SATA bus, and then probes
1448 * the bus for devices.
1451 * PCI/etc. bus probe sem.
1454 void sata_phy_reset(struct ata_port *ap)
1456 __sata_phy_reset(ap);
1457 if (ap->flags & ATA_FLAG_PORT_DISABLED)
1463 * ata_port_disable - Disable port.
1464 * @ap: Port to be disabled.
1466 * Modify @ap data structure such that the system
1467 * thinks that the entire port is disabled, and should
1468 * never attempt to probe or communicate with devices
1471 * LOCKING: host_set lock, or some other form of
1475 void ata_port_disable(struct ata_port *ap)
1477 ap->device[0].class = ATA_DEV_NONE;
1478 ap->device[1].class = ATA_DEV_NONE;
1479 ap->flags |= ATA_FLAG_PORT_DISABLED;
1483 * This mode timing computation functionality is ported over from
1484 * drivers/ide/ide-timing.h and was originally written by Vojtech Pavlik
1487 * PIO 0-5, MWDMA 0-2 and UDMA 0-6 timings (in nanoseconds).
1488 * These were taken from ATA/ATAPI-6 standard, rev 0a, except
1489 * for PIO 5, which is a nonstandard extension and UDMA6, which
1490 * is currently supported only by Maxtor drives.
1493 static const struct ata_timing ata_timing[] = {
1495 { XFER_UDMA_6, 0, 0, 0, 0, 0, 0, 0, 15 },
1496 { XFER_UDMA_5, 0, 0, 0, 0, 0, 0, 0, 20 },
1497 { XFER_UDMA_4, 0, 0, 0, 0, 0, 0, 0, 30 },
1498 { XFER_UDMA_3, 0, 0, 0, 0, 0, 0, 0, 45 },
1500 { XFER_UDMA_2, 0, 0, 0, 0, 0, 0, 0, 60 },
1501 { XFER_UDMA_1, 0, 0, 0, 0, 0, 0, 0, 80 },
1502 { XFER_UDMA_0, 0, 0, 0, 0, 0, 0, 0, 120 },
1504 /* { XFER_UDMA_SLOW, 0, 0, 0, 0, 0, 0, 0, 150 }, */
1506 { XFER_MW_DMA_2, 25, 0, 0, 0, 70, 25, 120, 0 },
1507 { XFER_MW_DMA_1, 45, 0, 0, 0, 80, 50, 150, 0 },
1508 { XFER_MW_DMA_0, 60, 0, 0, 0, 215, 215, 480, 0 },
1510 { XFER_SW_DMA_2, 60, 0, 0, 0, 120, 120, 240, 0 },
1511 { XFER_SW_DMA_1, 90, 0, 0, 0, 240, 240, 480, 0 },
1512 { XFER_SW_DMA_0, 120, 0, 0, 0, 480, 480, 960, 0 },
1514 /* { XFER_PIO_5, 20, 50, 30, 100, 50, 30, 100, 0 }, */
1515 { XFER_PIO_4, 25, 70, 25, 120, 70, 25, 120, 0 },
1516 { XFER_PIO_3, 30, 80, 70, 180, 80, 70, 180, 0 },
1518 { XFER_PIO_2, 30, 290, 40, 330, 100, 90, 240, 0 },
1519 { XFER_PIO_1, 50, 290, 93, 383, 125, 100, 383, 0 },
1520 { XFER_PIO_0, 70, 290, 240, 600, 165, 150, 600, 0 },
1522 /* { XFER_PIO_SLOW, 120, 290, 240, 960, 290, 240, 960, 0 }, */
1527 #define ENOUGH(v,unit) (((v)-1)/(unit)+1)
1528 #define EZ(v,unit) ((v)?ENOUGH(v,unit):0)
1530 static void ata_timing_quantize(const struct ata_timing *t, struct ata_timing *q, int T, int UT)
1532 q->setup = EZ(t->setup * 1000, T);
1533 q->act8b = EZ(t->act8b * 1000, T);
1534 q->rec8b = EZ(t->rec8b * 1000, T);
1535 q->cyc8b = EZ(t->cyc8b * 1000, T);
1536 q->active = EZ(t->active * 1000, T);
1537 q->recover = EZ(t->recover * 1000, T);
1538 q->cycle = EZ(t->cycle * 1000, T);
1539 q->udma = EZ(t->udma * 1000, UT);
1542 void ata_timing_merge(const struct ata_timing *a, const struct ata_timing *b,
1543 struct ata_timing *m, unsigned int what)
1545 if (what & ATA_TIMING_SETUP ) m->setup = max(a->setup, b->setup);
1546 if (what & ATA_TIMING_ACT8B ) m->act8b = max(a->act8b, b->act8b);
1547 if (what & ATA_TIMING_REC8B ) m->rec8b = max(a->rec8b, b->rec8b);
1548 if (what & ATA_TIMING_CYC8B ) m->cyc8b = max(a->cyc8b, b->cyc8b);
1549 if (what & ATA_TIMING_ACTIVE ) m->active = max(a->active, b->active);
1550 if (what & ATA_TIMING_RECOVER) m->recover = max(a->recover, b->recover);
1551 if (what & ATA_TIMING_CYCLE ) m->cycle = max(a->cycle, b->cycle);
1552 if (what & ATA_TIMING_UDMA ) m->udma = max(a->udma, b->udma);
1555 static const struct ata_timing* ata_timing_find_mode(unsigned short speed)
1557 const struct ata_timing *t;
1559 for (t = ata_timing; t->mode != speed; t++)
1560 if (t->mode == 0xFF)
1565 int ata_timing_compute(struct ata_device *adev, unsigned short speed,
1566 struct ata_timing *t, int T, int UT)
1568 const struct ata_timing *s;
1569 struct ata_timing p;
1575 if (!(s = ata_timing_find_mode(speed)))
1579 * If the drive is an EIDE drive, it can tell us it needs extended
1580 * PIO/MW_DMA cycle timing.
1583 if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE drive */
1584 memset(&p, 0, sizeof(p));
1585 if(speed >= XFER_PIO_0 && speed <= XFER_SW_DMA_0) {
1586 if (speed <= XFER_PIO_2) p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO];
1587 else p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO_IORDY];
1588 } else if(speed >= XFER_MW_DMA_0 && speed <= XFER_MW_DMA_2) {
1589 p.cycle = adev->id[ATA_ID_EIDE_DMA_MIN];
1591 ata_timing_merge(&p, t, t, ATA_TIMING_CYCLE | ATA_TIMING_CYC8B);
1595 * Convert the timing to bus clock counts.
1598 ata_timing_quantize(s, t, T, UT);
1601 * Even in DMA/UDMA modes we still use PIO access for IDENTIFY, S.M.A.R.T
1602 * and some other commands. We have to ensure that the DMA cycle timing is
1603 * slower/equal than the fastest PIO timing.
1606 if (speed > XFER_PIO_4) {
1607 ata_timing_compute(adev, adev->pio_mode, &p, T, UT);
1608 ata_timing_merge(&p, t, t, ATA_TIMING_ALL);
1612 * Lenghten active & recovery time so that cycle time is correct.
1615 if (t->act8b + t->rec8b < t->cyc8b) {
1616 t->act8b += (t->cyc8b - (t->act8b + t->rec8b)) / 2;
1617 t->rec8b = t->cyc8b - t->act8b;
1620 if (t->active + t->recover < t->cycle) {
1621 t->active += (t->cycle - (t->active + t->recover)) / 2;
1622 t->recover = t->cycle - t->active;
1628 static const struct {
1631 } xfer_mode_classes[] = {
1632 { ATA_SHIFT_UDMA, XFER_UDMA_0 },
1633 { ATA_SHIFT_MWDMA, XFER_MW_DMA_0 },
1634 { ATA_SHIFT_PIO, XFER_PIO_0 },
1637 static inline u8 base_from_shift(unsigned int shift)
1641 for (i = 0; i < ARRAY_SIZE(xfer_mode_classes); i++)
1642 if (xfer_mode_classes[i].shift == shift)
1643 return xfer_mode_classes[i].base;
1648 static void ata_dev_set_mode(struct ata_port *ap, struct ata_device *dev)
1653 if (!ata_dev_present(dev) || (ap->flags & ATA_FLAG_PORT_DISABLED))
1656 if (dev->xfer_shift == ATA_SHIFT_PIO)
1657 dev->flags |= ATA_DFLAG_PIO;
1659 ata_dev_set_xfermode(ap, dev);
1661 base = base_from_shift(dev->xfer_shift);
1662 ofs = dev->xfer_mode - base;
1663 idx = ofs + dev->xfer_shift;
1664 WARN_ON(idx >= ARRAY_SIZE(xfer_mode_str));
1666 DPRINTK("idx=%d xfer_shift=%u, xfer_mode=0x%x, base=0x%x, offset=%d\n",
1667 idx, dev->xfer_shift, (int)dev->xfer_mode, (int)base, ofs);
1669 printk(KERN_INFO "ata%u: dev %u configured for %s\n",
1670 ap->id, dev->devno, xfer_mode_str[idx]);
1673 static int ata_host_set_pio(struct ata_port *ap)
1679 mask = ata_get_mode_mask(ap, ATA_SHIFT_PIO);
1682 printk(KERN_WARNING "ata%u: no PIO support\n", ap->id);
1686 base = base_from_shift(ATA_SHIFT_PIO);
1687 xfer_mode = base + x;
1689 DPRINTK("base 0x%x xfer_mode 0x%x mask 0x%x x %d\n",
1690 (int)base, (int)xfer_mode, mask, x);
1692 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1693 struct ata_device *dev = &ap->device[i];
1694 if (ata_dev_present(dev)) {
1695 dev->pio_mode = xfer_mode;
1696 dev->xfer_mode = xfer_mode;
1697 dev->xfer_shift = ATA_SHIFT_PIO;
1698 if (ap->ops->set_piomode)
1699 ap->ops->set_piomode(ap, dev);
1706 static void ata_host_set_dma(struct ata_port *ap, u8 xfer_mode,
1707 unsigned int xfer_shift)
1711 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1712 struct ata_device *dev = &ap->device[i];
1713 if (ata_dev_present(dev)) {
1714 dev->dma_mode = xfer_mode;
1715 dev->xfer_mode = xfer_mode;
1716 dev->xfer_shift = xfer_shift;
1717 if (ap->ops->set_dmamode)
1718 ap->ops->set_dmamode(ap, dev);
1724 * ata_set_mode - Program timings and issue SET FEATURES - XFER
1725 * @ap: port on which timings will be programmed
1727 * Set ATA device disk transfer mode (PIO3, UDMA6, etc.).
1730 * PCI/etc. bus probe sem.
1733 static void ata_set_mode(struct ata_port *ap)
1735 unsigned int xfer_shift;
1739 /* step 1: always set host PIO timings */
1740 rc = ata_host_set_pio(ap);
1744 /* step 2: choose the best data xfer mode */
1745 xfer_mode = xfer_shift = 0;
1746 rc = ata_choose_xfer_mode(ap, &xfer_mode, &xfer_shift);
1750 /* step 3: if that xfer mode isn't PIO, set host DMA timings */
1751 if (xfer_shift != ATA_SHIFT_PIO)
1752 ata_host_set_dma(ap, xfer_mode, xfer_shift);
1754 /* step 4: update devices' xfer mode */
1755 ata_dev_set_mode(ap, &ap->device[0]);
1756 ata_dev_set_mode(ap, &ap->device[1]);
1758 if (ap->flags & ATA_FLAG_PORT_DISABLED)
1761 if (ap->ops->post_set_mode)
1762 ap->ops->post_set_mode(ap);
1767 ata_port_disable(ap);
1771 * ata_busy_sleep - sleep until BSY clears, or timeout
1772 * @ap: port containing status register to be polled
1773 * @tmout_pat: impatience timeout
1774 * @tmout: overall timeout
1776 * Sleep until ATA Status register bit BSY clears,
1777 * or a timeout occurs.
1783 static unsigned int ata_busy_sleep (struct ata_port *ap,
1784 unsigned long tmout_pat,
1785 unsigned long tmout)
1787 unsigned long timer_start, timeout;
1790 status = ata_busy_wait(ap, ATA_BUSY, 300);
1791 timer_start = jiffies;
1792 timeout = timer_start + tmout_pat;
1793 while ((status & ATA_BUSY) && (time_before(jiffies, timeout))) {
1795 status = ata_busy_wait(ap, ATA_BUSY, 3);
1798 if (status & ATA_BUSY)
1799 printk(KERN_WARNING "ata%u is slow to respond, "
1800 "please be patient\n", ap->id);
1802 timeout = timer_start + tmout;
1803 while ((status & ATA_BUSY) && (time_before(jiffies, timeout))) {
1805 status = ata_chk_status(ap);
1808 if (status & ATA_BUSY) {
1809 printk(KERN_ERR "ata%u failed to respond (%lu secs)\n",
1810 ap->id, tmout / HZ);
1817 static void ata_bus_post_reset(struct ata_port *ap, unsigned int devmask)
1819 struct ata_ioports *ioaddr = &ap->ioaddr;
1820 unsigned int dev0 = devmask & (1 << 0);
1821 unsigned int dev1 = devmask & (1 << 1);
1822 unsigned long timeout;
1824 /* if device 0 was found in ata_devchk, wait for its
1828 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
1830 /* if device 1 was found in ata_devchk, wait for
1831 * register access, then wait for BSY to clear
1833 timeout = jiffies + ATA_TMOUT_BOOT;
1837 ap->ops->dev_select(ap, 1);
1838 if (ap->flags & ATA_FLAG_MMIO) {
1839 nsect = readb((void __iomem *) ioaddr->nsect_addr);
1840 lbal = readb((void __iomem *) ioaddr->lbal_addr);
1842 nsect = inb(ioaddr->nsect_addr);
1843 lbal = inb(ioaddr->lbal_addr);
1845 if ((nsect == 1) && (lbal == 1))
1847 if (time_after(jiffies, timeout)) {
1851 msleep(50); /* give drive a breather */
1854 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
1856 /* is all this really necessary? */
1857 ap->ops->dev_select(ap, 0);
1859 ap->ops->dev_select(ap, 1);
1861 ap->ops->dev_select(ap, 0);
1865 * ata_bus_edd - Issue EXECUTE DEVICE DIAGNOSTIC command.
1866 * @ap: Port to reset and probe
1868 * Use the EXECUTE DEVICE DIAGNOSTIC command to reset and
1869 * probe the bus. Not often used these days.
1872 * PCI/etc. bus probe sem.
1873 * Obtains host_set lock.
1877 static unsigned int ata_bus_edd(struct ata_port *ap)
1879 struct ata_taskfile tf;
1880 unsigned long flags;
1882 /* set up execute-device-diag (bus reset) taskfile */
1883 /* also, take interrupts to a known state (disabled) */
1884 DPRINTK("execute-device-diag\n");
1885 ata_tf_init(ap, &tf, 0);
1887 tf.command = ATA_CMD_EDD;
1888 tf.protocol = ATA_PROT_NODATA;
1891 spin_lock_irqsave(&ap->host_set->lock, flags);
1892 ata_tf_to_host(ap, &tf);
1893 spin_unlock_irqrestore(&ap->host_set->lock, flags);
1895 /* spec says at least 2ms. but who knows with those
1896 * crazy ATAPI devices...
1900 return ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
1903 static unsigned int ata_bus_softreset(struct ata_port *ap,
1904 unsigned int devmask)
1906 struct ata_ioports *ioaddr = &ap->ioaddr;
1908 DPRINTK("ata%u: bus reset via SRST\n", ap->id);
1910 /* software reset. causes dev0 to be selected */
1911 if (ap->flags & ATA_FLAG_MMIO) {
1912 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
1913 udelay(20); /* FIXME: flush */
1914 writeb(ap->ctl | ATA_SRST, (void __iomem *) ioaddr->ctl_addr);
1915 udelay(20); /* FIXME: flush */
1916 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
1918 outb(ap->ctl, ioaddr->ctl_addr);
1920 outb(ap->ctl | ATA_SRST, ioaddr->ctl_addr);
1922 outb(ap->ctl, ioaddr->ctl_addr);
1925 /* spec mandates ">= 2ms" before checking status.
1926 * We wait 150ms, because that was the magic delay used for
1927 * ATAPI devices in Hale Landis's ATADRVR, for the period of time
1928 * between when the ATA command register is written, and then
1929 * status is checked. Because waiting for "a while" before
1930 * checking status is fine, post SRST, we perform this magic
1931 * delay here as well.
1935 ata_bus_post_reset(ap, devmask);
1941 * ata_bus_reset - reset host port and associated ATA channel
1942 * @ap: port to reset
1944 * This is typically the first time we actually start issuing
1945 * commands to the ATA channel. We wait for BSY to clear, then
1946 * issue EXECUTE DEVICE DIAGNOSTIC command, polling for its
1947 * result. Determine what devices, if any, are on the channel
1948 * by looking at the device 0/1 error register. Look at the signature
1949 * stored in each device's taskfile registers, to determine if
1950 * the device is ATA or ATAPI.
1953 * PCI/etc. bus probe sem.
1954 * Obtains host_set lock.
1957 * Sets ATA_FLAG_PORT_DISABLED if bus reset fails.
1960 void ata_bus_reset(struct ata_port *ap)
1962 struct ata_ioports *ioaddr = &ap->ioaddr;
1963 unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS;
1965 unsigned int dev0, dev1 = 0, rc = 0, devmask = 0;
1967 DPRINTK("ENTER, host %u, port %u\n", ap->id, ap->port_no);
1969 /* determine if device 0/1 are present */
1970 if (ap->flags & ATA_FLAG_SATA_RESET)
1973 dev0 = ata_devchk(ap, 0);
1975 dev1 = ata_devchk(ap, 1);
1979 devmask |= (1 << 0);
1981 devmask |= (1 << 1);
1983 /* select device 0 again */
1984 ap->ops->dev_select(ap, 0);
1986 /* issue bus reset */
1987 if (ap->flags & ATA_FLAG_SRST)
1988 rc = ata_bus_softreset(ap, devmask);
1989 else if ((ap->flags & ATA_FLAG_SATA_RESET) == 0) {
1990 /* set up device control */
1991 if (ap->flags & ATA_FLAG_MMIO)
1992 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
1994 outb(ap->ctl, ioaddr->ctl_addr);
1995 rc = ata_bus_edd(ap);
2002 * determine by signature whether we have ATA or ATAPI devices
2004 err = ata_dev_try_classify(ap, 0);
2005 if ((slave_possible) && (err != 0x81))
2006 ata_dev_try_classify(ap, 1);
2008 /* re-enable interrupts */
2009 if (ap->ioaddr.ctl_addr) /* FIXME: hack. create a hook instead */
2012 /* is double-select really necessary? */
2013 if (ap->device[1].class != ATA_DEV_NONE)
2014 ap->ops->dev_select(ap, 1);
2015 if (ap->device[0].class != ATA_DEV_NONE)
2016 ap->ops->dev_select(ap, 0);
2018 /* if no devices were detected, disable this port */
2019 if ((ap->device[0].class == ATA_DEV_NONE) &&
2020 (ap->device[1].class == ATA_DEV_NONE))
2023 if (ap->flags & (ATA_FLAG_SATA_RESET | ATA_FLAG_SRST)) {
2024 /* set up device control for ATA_FLAG_SATA_RESET */
2025 if (ap->flags & ATA_FLAG_MMIO)
2026 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
2028 outb(ap->ctl, ioaddr->ctl_addr);
2035 printk(KERN_ERR "ata%u: disabling port\n", ap->id);
2036 ap->ops->port_disable(ap);
2041 static void ata_pr_blacklisted(const struct ata_port *ap,
2042 const struct ata_device *dev)
2044 printk(KERN_WARNING "ata%u: dev %u is on DMA blacklist, disabling DMA\n",
2045 ap->id, dev->devno);
2048 static const char * ata_dma_blacklist [] = {
2067 "Toshiba CD-ROM XM-6202B",
2068 "TOSHIBA CD-ROM XM-1702BC",
2070 "E-IDE CD-ROM CR-840",
2073 "SAMSUNG CD-ROM SC-148C",
2074 "SAMSUNG CD-ROM SC",
2076 "ATAPI CD-ROM DRIVE 40X MAXIMUM",
2080 static int ata_dma_blacklisted(const struct ata_device *dev)
2082 unsigned char model_num[40];
2087 ata_dev_id_string(dev->id, model_num, ATA_ID_PROD_OFS,
2090 len = strnlen(s, sizeof(model_num));
2092 /* ATAPI specifies that empty space is blank-filled; remove blanks */
2093 while ((len > 0) && (s[len - 1] == ' ')) {
2098 for (i = 0; i < ARRAY_SIZE(ata_dma_blacklist); i++)
2099 if (!strncmp(ata_dma_blacklist[i], s, len))
2105 static unsigned int ata_get_mode_mask(const struct ata_port *ap, int shift)
2107 const struct ata_device *master, *slave;
2110 master = &ap->device[0];
2111 slave = &ap->device[1];
2113 assert (ata_dev_present(master) || ata_dev_present(slave));
2115 if (shift == ATA_SHIFT_UDMA) {
2116 mask = ap->udma_mask;
2117 if (ata_dev_present(master)) {
2118 mask &= (master->id[ATA_ID_UDMA_MODES] & 0xff);
2119 if (ata_dma_blacklisted(master)) {
2121 ata_pr_blacklisted(ap, master);
2124 if (ata_dev_present(slave)) {
2125 mask &= (slave->id[ATA_ID_UDMA_MODES] & 0xff);
2126 if (ata_dma_blacklisted(slave)) {
2128 ata_pr_blacklisted(ap, slave);
2132 else if (shift == ATA_SHIFT_MWDMA) {
2133 mask = ap->mwdma_mask;
2134 if (ata_dev_present(master)) {
2135 mask &= (master->id[ATA_ID_MWDMA_MODES] & 0x07);
2136 if (ata_dma_blacklisted(master)) {
2138 ata_pr_blacklisted(ap, master);
2141 if (ata_dev_present(slave)) {
2142 mask &= (slave->id[ATA_ID_MWDMA_MODES] & 0x07);
2143 if (ata_dma_blacklisted(slave)) {
2145 ata_pr_blacklisted(ap, slave);
2149 else if (shift == ATA_SHIFT_PIO) {
2150 mask = ap->pio_mask;
2151 if (ata_dev_present(master)) {
2152 /* spec doesn't return explicit support for
2153 * PIO0-2, so we fake it
2155 u16 tmp_mode = master->id[ATA_ID_PIO_MODES] & 0x03;
2160 if (ata_dev_present(slave)) {
2161 /* spec doesn't return explicit support for
2162 * PIO0-2, so we fake it
2164 u16 tmp_mode = slave->id[ATA_ID_PIO_MODES] & 0x03;
2171 mask = 0xffffffff; /* shut up compiler warning */
2178 /* find greatest bit */
2179 static int fgb(u32 bitmap)
2184 for (i = 0; i < 32; i++)
2185 if (bitmap & (1 << i))
2192 * ata_choose_xfer_mode - attempt to find best transfer mode
2193 * @ap: Port for which an xfer mode will be selected
2194 * @xfer_mode_out: (output) SET FEATURES - XFER MODE code
2195 * @xfer_shift_out: (output) bit shift that selects this mode
2197 * Based on host and device capabilities, determine the
2198 * maximum transfer mode that is amenable to all.
2201 * PCI/etc. bus probe sem.
2204 * Zero on success, negative on error.
2207 static int ata_choose_xfer_mode(const struct ata_port *ap,
2209 unsigned int *xfer_shift_out)
2211 unsigned int mask, shift;
2214 for (i = 0; i < ARRAY_SIZE(xfer_mode_classes); i++) {
2215 shift = xfer_mode_classes[i].shift;
2216 mask = ata_get_mode_mask(ap, shift);
2220 *xfer_mode_out = xfer_mode_classes[i].base + x;
2221 *xfer_shift_out = shift;
2230 * ata_dev_set_xfermode - Issue SET FEATURES - XFER MODE command
2231 * @ap: Port associated with device @dev
2232 * @dev: Device to which command will be sent
2234 * Issue SET FEATURES - XFER MODE command to device @dev
2238 * PCI/etc. bus probe sem.
2241 static void ata_dev_set_xfermode(struct ata_port *ap, struct ata_device *dev)
2243 DECLARE_COMPLETION(wait);
2244 struct ata_queued_cmd *qc;
2246 unsigned long flags;
2248 /* set up set-features taskfile */
2249 DPRINTK("set features - xfer mode\n");
2251 qc = ata_qc_new_init(ap, dev);
2254 qc->tf.command = ATA_CMD_SET_FEATURES;
2255 qc->tf.feature = SETFEATURES_XFER;
2256 qc->tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
2257 qc->tf.protocol = ATA_PROT_NODATA;
2258 qc->tf.nsect = dev->xfer_mode;
2260 qc->waiting = &wait;
2261 qc->complete_fn = ata_qc_complete_noop;
2263 spin_lock_irqsave(&ap->host_set->lock, flags);
2264 rc = ata_qc_issue(qc);
2265 spin_unlock_irqrestore(&ap->host_set->lock, flags);
2268 ata_port_disable(ap);
2270 wait_for_completion(&wait);
2276 * ata_dev_reread_id - Reread the device identify device info
2277 * @ap: port where the device is
2278 * @dev: device to reread the identify device info
2283 static void ata_dev_reread_id(struct ata_port *ap, struct ata_device *dev)
2285 DECLARE_COMPLETION(wait);
2286 struct ata_queued_cmd *qc;
2287 unsigned long flags;
2290 qc = ata_qc_new_init(ap, dev);
2293 ata_sg_init_one(qc, dev->id, sizeof(dev->id));
2294 qc->dma_dir = DMA_FROM_DEVICE;
2296 if (dev->class == ATA_DEV_ATA) {
2297 qc->tf.command = ATA_CMD_ID_ATA;
2298 DPRINTK("do ATA identify\n");
2300 qc->tf.command = ATA_CMD_ID_ATAPI;
2301 DPRINTK("do ATAPI identify\n");
2304 qc->tf.flags |= ATA_TFLAG_DEVICE;
2305 qc->tf.protocol = ATA_PROT_PIO;
2308 qc->waiting = &wait;
2309 qc->complete_fn = ata_qc_complete_noop;
2311 spin_lock_irqsave(&ap->host_set->lock, flags);
2312 rc = ata_qc_issue(qc);
2313 spin_unlock_irqrestore(&ap->host_set->lock, flags);
2318 wait_for_completion(&wait);
2320 swap_buf_le16(dev->id, ATA_ID_WORDS);
2328 ata_port_disable(ap);
2332 * ata_dev_init_params - Issue INIT DEV PARAMS command
2333 * @ap: Port associated with device @dev
2334 * @dev: Device to which command will be sent
2339 static void ata_dev_init_params(struct ata_port *ap, struct ata_device *dev)
2341 DECLARE_COMPLETION(wait);
2342 struct ata_queued_cmd *qc;
2344 unsigned long flags;
2345 u16 sectors = dev->id[6];
2346 u16 heads = dev->id[3];
2348 /* Number of sectors per track 1-255. Number of heads 1-16 */
2349 if (sectors < 1 || sectors > 255 || heads < 1 || heads > 16)
2352 /* set up init dev params taskfile */
2353 DPRINTK("init dev params \n");
2355 qc = ata_qc_new_init(ap, dev);
2358 qc->tf.command = ATA_CMD_INIT_DEV_PARAMS;
2359 qc->tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
2360 qc->tf.protocol = ATA_PROT_NODATA;
2361 qc->tf.nsect = sectors;
2362 qc->tf.device |= (heads - 1) & 0x0f; /* max head = num. of heads - 1 */
2364 qc->waiting = &wait;
2365 qc->complete_fn = ata_qc_complete_noop;
2367 spin_lock_irqsave(&ap->host_set->lock, flags);
2368 rc = ata_qc_issue(qc);
2369 spin_unlock_irqrestore(&ap->host_set->lock, flags);
2372 ata_port_disable(ap);
2374 wait_for_completion(&wait);
2380 * ata_sg_clean - Unmap DMA memory associated with command
2381 * @qc: Command containing DMA memory to be released
2383 * Unmap all mapped DMA memory associated with this command.
2386 * spin_lock_irqsave(host_set lock)
2389 static void ata_sg_clean(struct ata_queued_cmd *qc)
2391 struct ata_port *ap = qc->ap;
2392 struct scatterlist *sg = qc->__sg;
2393 int dir = qc->dma_dir;
2394 void *pad_buf = NULL;
2396 assert(qc->flags & ATA_QCFLAG_DMAMAP);
2399 if (qc->flags & ATA_QCFLAG_SINGLE)
2400 assert(qc->n_elem == 1);
2402 DPRINTK("unmapping %u sg elements\n", qc->n_elem);
2404 /* if we padded the buffer out to 32-bit bound, and data
2405 * xfer direction is from-device, we must copy from the
2406 * pad buffer back into the supplied buffer
2408 if (qc->pad_len && !(qc->tf.flags & ATA_TFLAG_WRITE))
2409 pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
2411 if (qc->flags & ATA_QCFLAG_SG) {
2413 dma_unmap_sg(ap->host_set->dev, sg, qc->n_elem, dir);
2414 /* restore last sg */
2415 sg[qc->orig_n_elem - 1].length += qc->pad_len;
2417 struct scatterlist *psg = &qc->pad_sgent;
2418 void *addr = kmap_atomic(psg->page, KM_IRQ0);
2419 memcpy(addr + psg->offset, pad_buf, qc->pad_len);
2420 kunmap_atomic(psg->page, KM_IRQ0);
2423 if (sg_dma_len(&sg[0]) > 0)
2424 dma_unmap_single(ap->host_set->dev,
2425 sg_dma_address(&sg[0]), sg_dma_len(&sg[0]),
2428 sg->length += qc->pad_len;
2430 memcpy(qc->buf_virt + sg->length - qc->pad_len,
2431 pad_buf, qc->pad_len);
2434 qc->flags &= ~ATA_QCFLAG_DMAMAP;
2439 * ata_fill_sg - Fill PCI IDE PRD table
2440 * @qc: Metadata associated with taskfile to be transferred
2442 * Fill PCI IDE PRD (scatter-gather) table with segments
2443 * associated with the current disk command.
2446 * spin_lock_irqsave(host_set lock)
2449 static void ata_fill_sg(struct ata_queued_cmd *qc)
2451 struct ata_port *ap = qc->ap;
2452 struct scatterlist *sg;
2455 assert(qc->__sg != NULL);
2456 assert(qc->n_elem > 0);
2459 ata_for_each_sg(sg, qc) {
2463 /* determine if physical DMA addr spans 64K boundary.
2464 * Note h/w doesn't support 64-bit, so we unconditionally
2465 * truncate dma_addr_t to u32.
2467 addr = (u32) sg_dma_address(sg);
2468 sg_len = sg_dma_len(sg);
2471 offset = addr & 0xffff;
2473 if ((offset + sg_len) > 0x10000)
2474 len = 0x10000 - offset;
2476 ap->prd[idx].addr = cpu_to_le32(addr);
2477 ap->prd[idx].flags_len = cpu_to_le32(len & 0xffff);
2478 VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", idx, addr, len);
2487 ap->prd[idx - 1].flags_len |= cpu_to_le32(ATA_PRD_EOT);
2490 * ata_check_atapi_dma - Check whether ATAPI DMA can be supported
2491 * @qc: Metadata associated with taskfile to check
2493 * Allow low-level driver to filter ATA PACKET commands, returning
2494 * a status indicating whether or not it is OK to use DMA for the
2495 * supplied PACKET command.
2498 * spin_lock_irqsave(host_set lock)
2500 * RETURNS: 0 when ATAPI DMA can be used
2503 int ata_check_atapi_dma(struct ata_queued_cmd *qc)
2505 struct ata_port *ap = qc->ap;
2506 int rc = 0; /* Assume ATAPI DMA is OK by default */
2508 if (ap->ops->check_atapi_dma)
2509 rc = ap->ops->check_atapi_dma(qc);
2514 * ata_qc_prep - Prepare taskfile for submission
2515 * @qc: Metadata associated with taskfile to be prepared
2517 * Prepare ATA taskfile for submission.
2520 * spin_lock_irqsave(host_set lock)
2522 void ata_qc_prep(struct ata_queued_cmd *qc)
2524 if (!(qc->flags & ATA_QCFLAG_DMAMAP))
2531 * ata_sg_init_one - Associate command with memory buffer
2532 * @qc: Command to be associated
2533 * @buf: Memory buffer
2534 * @buflen: Length of memory buffer, in bytes.
2536 * Initialize the data-related elements of queued_cmd @qc
2537 * to point to a single memory buffer, @buf of byte length @buflen.
2540 * spin_lock_irqsave(host_set lock)
2543 void ata_sg_init_one(struct ata_queued_cmd *qc, void *buf, unsigned int buflen)
2545 struct scatterlist *sg;
2547 qc->flags |= ATA_QCFLAG_SINGLE;
2549 memset(&qc->sgent, 0, sizeof(qc->sgent));
2550 qc->__sg = &qc->sgent;
2552 qc->orig_n_elem = 1;
2556 sg_init_one(sg, buf, buflen);
2560 * ata_sg_init - Associate command with scatter-gather table.
2561 * @qc: Command to be associated
2562 * @sg: Scatter-gather table.
2563 * @n_elem: Number of elements in s/g table.
2565 * Initialize the data-related elements of queued_cmd @qc
2566 * to point to a scatter-gather table @sg, containing @n_elem
2570 * spin_lock_irqsave(host_set lock)
2573 void ata_sg_init(struct ata_queued_cmd *qc, struct scatterlist *sg,
2574 unsigned int n_elem)
2576 qc->flags |= ATA_QCFLAG_SG;
2578 qc->n_elem = n_elem;
2579 qc->orig_n_elem = n_elem;
2583 * ata_sg_setup_one - DMA-map the memory buffer associated with a command.
2584 * @qc: Command with memory buffer to be mapped.
2586 * DMA-map the memory buffer associated with queued_cmd @qc.
2589 * spin_lock_irqsave(host_set lock)
2592 * Zero on success, negative on error.
2595 static int ata_sg_setup_one(struct ata_queued_cmd *qc)
2597 struct ata_port *ap = qc->ap;
2598 int dir = qc->dma_dir;
2599 struct scatterlist *sg = qc->__sg;
2600 dma_addr_t dma_address;
2602 /* we must lengthen transfers to end on a 32-bit boundary */
2603 qc->pad_len = sg->length & 3;
2605 void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
2606 struct scatterlist *psg = &qc->pad_sgent;
2608 assert(qc->dev->class == ATA_DEV_ATAPI);
2610 memset(pad_buf, 0, ATA_DMA_PAD_SZ);
2612 if (qc->tf.flags & ATA_TFLAG_WRITE)
2613 memcpy(pad_buf, qc->buf_virt + sg->length - qc->pad_len,
2616 sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ);
2617 sg_dma_len(psg) = ATA_DMA_PAD_SZ;
2619 sg->length -= qc->pad_len;
2621 DPRINTK("padding done, sg->length=%u pad_len=%u\n",
2622 sg->length, qc->pad_len);
2626 sg_dma_address(sg) = 0;
2630 dma_address = dma_map_single(ap->host_set->dev, qc->buf_virt,
2632 if (dma_mapping_error(dma_address)) {
2634 sg->length += qc->pad_len;
2638 sg_dma_address(sg) = dma_address;
2640 sg_dma_len(sg) = sg->length;
2642 DPRINTK("mapped buffer of %d bytes for %s\n", sg_dma_len(sg),
2643 qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
2649 * ata_sg_setup - DMA-map the scatter-gather table associated with a command.
2650 * @qc: Command with scatter-gather table to be mapped.
2652 * DMA-map the scatter-gather table associated with queued_cmd @qc.
2655 * spin_lock_irqsave(host_set lock)
2658 * Zero on success, negative on error.
2662 static int ata_sg_setup(struct ata_queued_cmd *qc)
2664 struct ata_port *ap = qc->ap;
2665 struct scatterlist *sg = qc->__sg;
2666 struct scatterlist *lsg = &sg[qc->n_elem - 1];
2667 int n_elem, pre_n_elem, dir, trim_sg = 0;
2669 VPRINTK("ENTER, ata%u\n", ap->id);
2670 assert(qc->flags & ATA_QCFLAG_SG);
2672 /* we must lengthen transfers to end on a 32-bit boundary */
2673 qc->pad_len = lsg->length & 3;
2675 void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
2676 struct scatterlist *psg = &qc->pad_sgent;
2677 unsigned int offset;
2679 assert(qc->dev->class == ATA_DEV_ATAPI);
2681 memset(pad_buf, 0, ATA_DMA_PAD_SZ);
2684 * psg->page/offset are used to copy to-be-written
2685 * data in this function or read data in ata_sg_clean.
2687 offset = lsg->offset + lsg->length - qc->pad_len;
2688 psg->page = nth_page(lsg->page, offset >> PAGE_SHIFT);
2689 psg->offset = offset_in_page(offset);
2691 if (qc->tf.flags & ATA_TFLAG_WRITE) {
2692 void *addr = kmap_atomic(psg->page, KM_IRQ0);
2693 memcpy(pad_buf, addr + psg->offset, qc->pad_len);
2694 kunmap_atomic(psg->page, KM_IRQ0);
2697 sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ);
2698 sg_dma_len(psg) = ATA_DMA_PAD_SZ;
2700 lsg->length -= qc->pad_len;
2701 if (lsg->length == 0)
2704 DPRINTK("padding done, sg[%d].length=%u pad_len=%u\n",
2705 qc->n_elem - 1, lsg->length, qc->pad_len);
2708 pre_n_elem = qc->n_elem;
2709 if (trim_sg && pre_n_elem)
2718 n_elem = dma_map_sg(ap->host_set->dev, sg, pre_n_elem, dir);
2720 /* restore last sg */
2721 lsg->length += qc->pad_len;
2725 DPRINTK("%d sg elements mapped\n", n_elem);
2728 qc->n_elem = n_elem;
2734 * ata_poll_qc_complete - turn irq back on and finish qc
2735 * @qc: Command to complete
2736 * @err_mask: ATA status register content
2739 * None. (grabs host lock)
2742 void ata_poll_qc_complete(struct ata_queued_cmd *qc, unsigned int err_mask)
2744 struct ata_port *ap = qc->ap;
2745 unsigned long flags;
2747 spin_lock_irqsave(&ap->host_set->lock, flags);
2748 ap->flags &= ~ATA_FLAG_NOINTR;
2750 ata_qc_complete(qc, err_mask);
2751 spin_unlock_irqrestore(&ap->host_set->lock, flags);
2756 * @ap: the target ata_port
2759 * None. (executing in kernel thread context)
2762 * timeout value to use
2765 static unsigned long ata_pio_poll(struct ata_port *ap)
2768 unsigned int poll_state = HSM_ST_UNKNOWN;
2769 unsigned int reg_state = HSM_ST_UNKNOWN;
2771 switch (ap->hsm_task_state) {
2774 poll_state = HSM_ST_POLL;
2778 case HSM_ST_LAST_POLL:
2779 poll_state = HSM_ST_LAST_POLL;
2780 reg_state = HSM_ST_LAST;
2787 status = ata_chk_status(ap);
2788 if (status & ATA_BUSY) {
2789 if (time_after(jiffies, ap->pio_task_timeout)) {
2790 ap->hsm_task_state = HSM_ST_TMOUT;
2793 ap->hsm_task_state = poll_state;
2794 return ATA_SHORT_PAUSE;
2797 ap->hsm_task_state = reg_state;
2802 * ata_pio_complete - check if drive is busy or idle
2803 * @ap: the target ata_port
2806 * None. (executing in kernel thread context)
2809 * Non-zero if qc completed, zero otherwise.
2812 static int ata_pio_complete (struct ata_port *ap)
2814 struct ata_queued_cmd *qc;
2818 * This is purely heuristic. This is a fast path. Sometimes when
2819 * we enter, BSY will be cleared in a chk-status or two. If not,
2820 * the drive is probably seeking or something. Snooze for a couple
2821 * msecs, then chk-status again. If still busy, fall back to
2822 * HSM_ST_POLL state.
2824 drv_stat = ata_busy_wait(ap, ATA_BUSY | ATA_DRQ, 10);
2825 if (drv_stat & (ATA_BUSY | ATA_DRQ)) {
2827 drv_stat = ata_busy_wait(ap, ATA_BUSY | ATA_DRQ, 10);
2828 if (drv_stat & (ATA_BUSY | ATA_DRQ)) {
2829 ap->hsm_task_state = HSM_ST_LAST_POLL;
2830 ap->pio_task_timeout = jiffies + ATA_TMOUT_PIO;
2835 drv_stat = ata_wait_idle(ap);
2836 if (!ata_ok(drv_stat)) {
2837 ap->hsm_task_state = HSM_ST_ERR;
2841 qc = ata_qc_from_tag(ap, ap->active_tag);
2844 ap->hsm_task_state = HSM_ST_IDLE;
2846 ata_poll_qc_complete(qc, 0);
2848 /* another command may start at this point */
2855 * swap_buf_le16 - swap halves of 16-words in place
2856 * @buf: Buffer to swap
2857 * @buf_words: Number of 16-bit words in buffer.
2859 * Swap halves of 16-bit words if needed to convert from
2860 * little-endian byte order to native cpu byte order, or
2864 * Inherited from caller.
2866 void swap_buf_le16(u16 *buf, unsigned int buf_words)
2871 for (i = 0; i < buf_words; i++)
2872 buf[i] = le16_to_cpu(buf[i]);
2873 #endif /* __BIG_ENDIAN */
2877 * ata_mmio_data_xfer - Transfer data by MMIO
2878 * @ap: port to read/write
2880 * @buflen: buffer length
2881 * @write_data: read/write
2883 * Transfer data from/to the device data register by MMIO.
2886 * Inherited from caller.
2889 static void ata_mmio_data_xfer(struct ata_port *ap, unsigned char *buf,
2890 unsigned int buflen, int write_data)
2893 unsigned int words = buflen >> 1;
2894 u16 *buf16 = (u16 *) buf;
2895 void __iomem *mmio = (void __iomem *)ap->ioaddr.data_addr;
2897 /* Transfer multiple of 2 bytes */
2899 for (i = 0; i < words; i++)
2900 writew(le16_to_cpu(buf16[i]), mmio);
2902 for (i = 0; i < words; i++)
2903 buf16[i] = cpu_to_le16(readw(mmio));
2906 /* Transfer trailing 1 byte, if any. */
2907 if (unlikely(buflen & 0x01)) {
2908 u16 align_buf[1] = { 0 };
2909 unsigned char *trailing_buf = buf + buflen - 1;
2912 memcpy(align_buf, trailing_buf, 1);
2913 writew(le16_to_cpu(align_buf[0]), mmio);
2915 align_buf[0] = cpu_to_le16(readw(mmio));
2916 memcpy(trailing_buf, align_buf, 1);
2922 * ata_pio_data_xfer - Transfer data by PIO
2923 * @ap: port to read/write
2925 * @buflen: buffer length
2926 * @write_data: read/write
2928 * Transfer data from/to the device data register by PIO.
2931 * Inherited from caller.
2934 static void ata_pio_data_xfer(struct ata_port *ap, unsigned char *buf,
2935 unsigned int buflen, int write_data)
2937 unsigned int words = buflen >> 1;
2939 /* Transfer multiple of 2 bytes */
2941 outsw(ap->ioaddr.data_addr, buf, words);
2943 insw(ap->ioaddr.data_addr, buf, words);
2945 /* Transfer trailing 1 byte, if any. */
2946 if (unlikely(buflen & 0x01)) {
2947 u16 align_buf[1] = { 0 };
2948 unsigned char *trailing_buf = buf + buflen - 1;
2951 memcpy(align_buf, trailing_buf, 1);
2952 outw(le16_to_cpu(align_buf[0]), ap->ioaddr.data_addr);
2954 align_buf[0] = cpu_to_le16(inw(ap->ioaddr.data_addr));
2955 memcpy(trailing_buf, align_buf, 1);
2961 * ata_data_xfer - Transfer data from/to the data register.
2962 * @ap: port to read/write
2964 * @buflen: buffer length
2965 * @do_write: read/write
2967 * Transfer data from/to the device data register.
2970 * Inherited from caller.
2973 static void ata_data_xfer(struct ata_port *ap, unsigned char *buf,
2974 unsigned int buflen, int do_write)
2976 if (ap->flags & ATA_FLAG_MMIO)
2977 ata_mmio_data_xfer(ap, buf, buflen, do_write);
2979 ata_pio_data_xfer(ap, buf, buflen, do_write);
2983 * ata_pio_sector - Transfer ATA_SECT_SIZE (512 bytes) of data.
2984 * @qc: Command on going
2986 * Transfer ATA_SECT_SIZE of data from/to the ATA device.
2989 * Inherited from caller.
2992 static void ata_pio_sector(struct ata_queued_cmd *qc)
2994 int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
2995 struct scatterlist *sg = qc->__sg;
2996 struct ata_port *ap = qc->ap;
2998 unsigned int offset;
3001 if (qc->cursect == (qc->nsect - 1))
3002 ap->hsm_task_state = HSM_ST_LAST;
3004 page = sg[qc->cursg].page;
3005 offset = sg[qc->cursg].offset + qc->cursg_ofs * ATA_SECT_SIZE;
3007 /* get the current page and offset */
3008 page = nth_page(page, (offset >> PAGE_SHIFT));
3009 offset %= PAGE_SIZE;
3011 buf = kmap(page) + offset;
3016 if ((qc->cursg_ofs * ATA_SECT_SIZE) == (&sg[qc->cursg])->length) {
3021 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
3023 /* do the actual data transfer */
3024 do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
3025 ata_data_xfer(ap, buf, ATA_SECT_SIZE, do_write);
3031 * __atapi_pio_bytes - Transfer data from/to the ATAPI device.
3032 * @qc: Command on going
3033 * @bytes: number of bytes
3035 * Transfer Transfer data from/to the ATAPI device.
3038 * Inherited from caller.
3042 static void __atapi_pio_bytes(struct ata_queued_cmd *qc, unsigned int bytes)
3044 int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
3045 struct scatterlist *sg = qc->__sg;
3046 struct ata_port *ap = qc->ap;
3049 unsigned int offset, count;
3051 if (qc->curbytes + bytes >= qc->nbytes)
3052 ap->hsm_task_state = HSM_ST_LAST;
3055 if (unlikely(qc->cursg >= qc->n_elem)) {
3057 * The end of qc->sg is reached and the device expects
3058 * more data to transfer. In order not to overrun qc->sg
3059 * and fulfill length specified in the byte count register,
3060 * - for read case, discard trailing data from the device
3061 * - for write case, padding zero data to the device
3063 u16 pad_buf[1] = { 0 };
3064 unsigned int words = bytes >> 1;
3067 if (words) /* warning if bytes > 1 */
3068 printk(KERN_WARNING "ata%u: %u bytes trailing data\n",
3071 for (i = 0; i < words; i++)
3072 ata_data_xfer(ap, (unsigned char*)pad_buf, 2, do_write);
3074 ap->hsm_task_state = HSM_ST_LAST;
3078 sg = &qc->__sg[qc->cursg];
3081 offset = sg->offset + qc->cursg_ofs;
3083 /* get the current page and offset */
3084 page = nth_page(page, (offset >> PAGE_SHIFT));
3085 offset %= PAGE_SIZE;
3087 /* don't overrun current sg */
3088 count = min(sg->length - qc->cursg_ofs, bytes);
3090 /* don't cross page boundaries */
3091 count = min(count, (unsigned int)PAGE_SIZE - offset);
3093 buf = kmap(page) + offset;
3096 qc->curbytes += count;
3097 qc->cursg_ofs += count;
3099 if (qc->cursg_ofs == sg->length) {
3104 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
3106 /* do the actual data transfer */
3107 ata_data_xfer(ap, buf, count, do_write);
3116 * atapi_pio_bytes - Transfer data from/to the ATAPI device.
3117 * @qc: Command on going
3119 * Transfer Transfer data from/to the ATAPI device.
3122 * Inherited from caller.
3125 static void atapi_pio_bytes(struct ata_queued_cmd *qc)
3127 struct ata_port *ap = qc->ap;
3128 struct ata_device *dev = qc->dev;
3129 unsigned int ireason, bc_lo, bc_hi, bytes;
3130 int i_write, do_write = (qc->tf.flags & ATA_TFLAG_WRITE) ? 1 : 0;
3132 ap->ops->tf_read(ap, &qc->tf);
3133 ireason = qc->tf.nsect;
3134 bc_lo = qc->tf.lbam;
3135 bc_hi = qc->tf.lbah;
3136 bytes = (bc_hi << 8) | bc_lo;
3138 /* shall be cleared to zero, indicating xfer of data */
3139 if (ireason & (1 << 0))
3142 /* make sure transfer direction matches expected */
3143 i_write = ((ireason & (1 << 1)) == 0) ? 1 : 0;
3144 if (do_write != i_write)
3147 __atapi_pio_bytes(qc, bytes);
3152 printk(KERN_INFO "ata%u: dev %u: ATAPI check failed\n",
3153 ap->id, dev->devno);
3154 ap->hsm_task_state = HSM_ST_ERR;
3158 * ata_pio_block - start PIO on a block
3159 * @ap: the target ata_port
3162 * None. (executing in kernel thread context)
3165 static void ata_pio_block(struct ata_port *ap)
3167 struct ata_queued_cmd *qc;
3171 * This is purely heuristic. This is a fast path.
3172 * Sometimes when we enter, BSY will be cleared in
3173 * a chk-status or two. If not, the drive is probably seeking
3174 * or something. Snooze for a couple msecs, then
3175 * chk-status again. If still busy, fall back to
3176 * HSM_ST_POLL state.
3178 status = ata_busy_wait(ap, ATA_BUSY, 5);
3179 if (status & ATA_BUSY) {
3181 status = ata_busy_wait(ap, ATA_BUSY, 10);
3182 if (status & ATA_BUSY) {
3183 ap->hsm_task_state = HSM_ST_POLL;
3184 ap->pio_task_timeout = jiffies + ATA_TMOUT_PIO;
3189 qc = ata_qc_from_tag(ap, ap->active_tag);
3192 if (is_atapi_taskfile(&qc->tf)) {
3193 /* no more data to transfer or unsupported ATAPI command */
3194 if ((status & ATA_DRQ) == 0) {
3195 ap->hsm_task_state = HSM_ST_LAST;
3199 atapi_pio_bytes(qc);
3201 /* handle BSY=0, DRQ=0 as error */
3202 if ((status & ATA_DRQ) == 0) {
3203 ap->hsm_task_state = HSM_ST_ERR;
3211 static void ata_pio_error(struct ata_port *ap)
3213 struct ata_queued_cmd *qc;
3215 printk(KERN_WARNING "ata%u: PIO error\n", ap->id);
3217 qc = ata_qc_from_tag(ap, ap->active_tag);
3220 ap->hsm_task_state = HSM_ST_IDLE;
3222 ata_poll_qc_complete(qc, AC_ERR_ATA_BUS);
3225 static void ata_pio_task(void *_data)
3227 struct ata_port *ap = _data;
3228 unsigned long timeout;
3235 switch (ap->hsm_task_state) {
3244 qc_completed = ata_pio_complete(ap);
3248 case HSM_ST_LAST_POLL:
3249 timeout = ata_pio_poll(ap);
3259 queue_delayed_work(ata_wq, &ap->pio_task, timeout);
3260 else if (!qc_completed)
3265 * ata_qc_timeout - Handle timeout of queued command
3266 * @qc: Command that timed out
3268 * Some part of the kernel (currently, only the SCSI layer)
3269 * has noticed that the active command on port @ap has not
3270 * completed after a specified length of time. Handle this
3271 * condition by disabling DMA (if necessary) and completing
3272 * transactions, with error if necessary.
3274 * This also handles the case of the "lost interrupt", where
3275 * for some reason (possibly hardware bug, possibly driver bug)
3276 * an interrupt was not delivered to the driver, even though the
3277 * transaction completed successfully.
3280 * Inherited from SCSI layer (none, can sleep)
3283 static void ata_qc_timeout(struct ata_queued_cmd *qc)
3285 struct ata_port *ap = qc->ap;
3286 struct ata_host_set *host_set = ap->host_set;
3287 struct ata_device *dev = qc->dev;
3288 u8 host_stat = 0, drv_stat;
3289 unsigned long flags;
3293 /* FIXME: doesn't this conflict with timeout handling? */
3294 if (qc->dev->class == ATA_DEV_ATAPI && qc->scsicmd) {
3295 struct scsi_cmnd *cmd = qc->scsicmd;
3297 if (!(cmd->eh_eflags & SCSI_EH_CANCEL_CMD)) {
3299 /* finish completing original command */
3300 spin_lock_irqsave(&host_set->lock, flags);
3301 __ata_qc_complete(qc);
3302 spin_unlock_irqrestore(&host_set->lock, flags);
3304 atapi_request_sense(ap, dev, cmd);
3306 cmd->result = (CHECK_CONDITION << 1) | (DID_OK << 16);
3307 scsi_finish_command(cmd);
3313 spin_lock_irqsave(&host_set->lock, flags);
3315 /* hack alert! We cannot use the supplied completion
3316 * function from inside the ->eh_strategy_handler() thread.
3317 * libata is the only user of ->eh_strategy_handler() in
3318 * any kernel, so the default scsi_done() assumes it is
3319 * not being called from the SCSI EH.
3321 qc->scsidone = scsi_finish_command;
3323 switch (qc->tf.protocol) {
3326 case ATA_PROT_ATAPI_DMA:
3327 host_stat = ap->ops->bmdma_status(ap);
3329 /* before we do anything else, clear DMA-Start bit */
3330 ap->ops->bmdma_stop(qc);
3336 drv_stat = ata_chk_status(ap);
3338 /* ack bmdma irq events */
3339 ap->ops->irq_clear(ap);
3341 printk(KERN_ERR "ata%u: command 0x%x timeout, stat 0x%x host_stat 0x%x\n",
3342 ap->id, qc->tf.command, drv_stat, host_stat);
3344 /* complete taskfile transaction */
3345 ata_qc_complete(qc, ac_err_mask(drv_stat));
3349 spin_unlock_irqrestore(&host_set->lock, flags);
3356 * ata_eng_timeout - Handle timeout of queued command
3357 * @ap: Port on which timed-out command is active
3359 * Some part of the kernel (currently, only the SCSI layer)
3360 * has noticed that the active command on port @ap has not
3361 * completed after a specified length of time. Handle this
3362 * condition by disabling DMA (if necessary) and completing
3363 * transactions, with error if necessary.
3365 * This also handles the case of the "lost interrupt", where
3366 * for some reason (possibly hardware bug, possibly driver bug)
3367 * an interrupt was not delivered to the driver, even though the
3368 * transaction completed successfully.
3371 * Inherited from SCSI layer (none, can sleep)
3374 void ata_eng_timeout(struct ata_port *ap)
3376 struct ata_queued_cmd *qc;
3380 qc = ata_qc_from_tag(ap, ap->active_tag);
3384 printk(KERN_ERR "ata%u: BUG: timeout without command\n",
3394 * ata_qc_new - Request an available ATA command, for queueing
3395 * @ap: Port associated with device @dev
3396 * @dev: Device from whom we request an available command structure
3402 static struct ata_queued_cmd *ata_qc_new(struct ata_port *ap)
3404 struct ata_queued_cmd *qc = NULL;
3407 for (i = 0; i < ATA_MAX_QUEUE; i++)
3408 if (!test_and_set_bit(i, &ap->qactive)) {
3409 qc = ata_qc_from_tag(ap, i);
3420 * ata_qc_new_init - Request an available ATA command, and initialize it
3421 * @ap: Port associated with device @dev
3422 * @dev: Device from whom we request an available command structure
3428 struct ata_queued_cmd *ata_qc_new_init(struct ata_port *ap,
3429 struct ata_device *dev)
3431 struct ata_queued_cmd *qc;
3433 qc = ata_qc_new(ap);
3440 qc->cursect = qc->cursg = qc->cursg_ofs = 0;
3442 qc->nbytes = qc->curbytes = 0;
3444 ata_tf_init(ap, &qc->tf, dev->devno);
3450 int ata_qc_complete_noop(struct ata_queued_cmd *qc, unsigned int err_mask)
3455 static void __ata_qc_complete(struct ata_queued_cmd *qc)
3457 struct ata_port *ap = qc->ap;
3458 unsigned int tag, do_clear = 0;
3462 if (likely(ata_tag_valid(tag))) {
3463 if (tag == ap->active_tag)
3464 ap->active_tag = ATA_TAG_POISON;
3465 qc->tag = ATA_TAG_POISON;
3470 struct completion *waiting = qc->waiting;
3475 if (likely(do_clear))
3476 clear_bit(tag, &ap->qactive);
3480 * ata_qc_free - free unused ata_queued_cmd
3481 * @qc: Command to complete
3483 * Designed to free unused ata_queued_cmd object
3484 * in case something prevents using it.
3487 * spin_lock_irqsave(host_set lock)
3489 void ata_qc_free(struct ata_queued_cmd *qc)
3491 assert(qc != NULL); /* ata_qc_from_tag _might_ return NULL */
3492 assert(qc->waiting == NULL); /* nothing should be waiting */
3494 __ata_qc_complete(qc);
3498 * ata_qc_complete - Complete an active ATA command
3499 * @qc: Command to complete
3500 * @err_mask: ATA Status register contents
3502 * Indicate to the mid and upper layers that an ATA
3503 * command has completed, with either an ok or not-ok status.
3506 * spin_lock_irqsave(host_set lock)
3509 void ata_qc_complete(struct ata_queued_cmd *qc, unsigned int err_mask)
3513 assert(qc != NULL); /* ata_qc_from_tag _might_ return NULL */
3514 assert(qc->flags & ATA_QCFLAG_ACTIVE);
3516 if (likely(qc->flags & ATA_QCFLAG_DMAMAP))
3519 /* atapi: mark qc as inactive to prevent the interrupt handler
3520 * from completing the command twice later, before the error handler
3521 * is called. (when rc != 0 and atapi request sense is needed)
3523 qc->flags &= ~ATA_QCFLAG_ACTIVE;
3525 /* call completion callback */
3526 rc = qc->complete_fn(qc, err_mask);
3528 /* if callback indicates not to complete command (non-zero),
3529 * return immediately
3534 __ata_qc_complete(qc);
3539 static inline int ata_should_dma_map(struct ata_queued_cmd *qc)
3541 struct ata_port *ap = qc->ap;
3543 switch (qc->tf.protocol) {
3545 case ATA_PROT_ATAPI_DMA:
3548 case ATA_PROT_ATAPI:
3550 case ATA_PROT_PIO_MULT:
3551 if (ap->flags & ATA_FLAG_PIO_DMA)
3564 * ata_qc_issue - issue taskfile to device
3565 * @qc: command to issue to device
3567 * Prepare an ATA command to submission to device.
3568 * This includes mapping the data into a DMA-able
3569 * area, filling in the S/G table, and finally
3570 * writing the taskfile to hardware, starting the command.
3573 * spin_lock_irqsave(host_set lock)
3576 * Zero on success, negative on error.
3579 int ata_qc_issue(struct ata_queued_cmd *qc)
3581 struct ata_port *ap = qc->ap;
3583 if (ata_should_dma_map(qc)) {
3584 if (qc->flags & ATA_QCFLAG_SG) {
3585 if (ata_sg_setup(qc))
3587 } else if (qc->flags & ATA_QCFLAG_SINGLE) {
3588 if (ata_sg_setup_one(qc))
3592 qc->flags &= ~ATA_QCFLAG_DMAMAP;
3595 ap->ops->qc_prep(qc);
3597 qc->ap->active_tag = qc->tag;
3598 qc->flags |= ATA_QCFLAG_ACTIVE;
3600 return ap->ops->qc_issue(qc);
3608 * ata_qc_issue_prot - issue taskfile to device in proto-dependent manner
3609 * @qc: command to issue to device
3611 * Using various libata functions and hooks, this function
3612 * starts an ATA command. ATA commands are grouped into
3613 * classes called "protocols", and issuing each type of protocol
3614 * is slightly different.
3616 * May be used as the qc_issue() entry in ata_port_operations.
3619 * spin_lock_irqsave(host_set lock)
3622 * Zero on success, negative on error.
3625 int ata_qc_issue_prot(struct ata_queued_cmd *qc)
3627 struct ata_port *ap = qc->ap;
3629 ata_dev_select(ap, qc->dev->devno, 1, 0);
3631 switch (qc->tf.protocol) {
3632 case ATA_PROT_NODATA:
3633 ata_tf_to_host(ap, &qc->tf);
3637 ap->ops->tf_load(ap, &qc->tf); /* load tf registers */
3638 ap->ops->bmdma_setup(qc); /* set up bmdma */
3639 ap->ops->bmdma_start(qc); /* initiate bmdma */
3642 case ATA_PROT_PIO: /* load tf registers, initiate polling pio */
3643 ata_qc_set_polling(qc);
3644 ata_tf_to_host(ap, &qc->tf);
3645 ap->hsm_task_state = HSM_ST;
3646 queue_work(ata_wq, &ap->pio_task);
3649 case ATA_PROT_ATAPI:
3650 ata_qc_set_polling(qc);
3651 ata_tf_to_host(ap, &qc->tf);
3652 queue_work(ata_wq, &ap->packet_task);
3655 case ATA_PROT_ATAPI_NODATA:
3656 ap->flags |= ATA_FLAG_NOINTR;
3657 ata_tf_to_host(ap, &qc->tf);
3658 queue_work(ata_wq, &ap->packet_task);
3661 case ATA_PROT_ATAPI_DMA:
3662 ap->flags |= ATA_FLAG_NOINTR;
3663 ap->ops->tf_load(ap, &qc->tf); /* load tf registers */
3664 ap->ops->bmdma_setup(qc); /* set up bmdma */
3665 queue_work(ata_wq, &ap->packet_task);
3677 * ata_bmdma_setup_mmio - Set up PCI IDE BMDMA transaction
3678 * @qc: Info associated with this ATA transaction.
3681 * spin_lock_irqsave(host_set lock)
3684 static void ata_bmdma_setup_mmio (struct ata_queued_cmd *qc)
3686 struct ata_port *ap = qc->ap;
3687 unsigned int rw = (qc->tf.flags & ATA_TFLAG_WRITE);
3689 void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr;
3691 /* load PRD table addr. */
3692 mb(); /* make sure PRD table writes are visible to controller */
3693 writel(ap->prd_dma, mmio + ATA_DMA_TABLE_OFS);
3695 /* specify data direction, triple-check start bit is clear */
3696 dmactl = readb(mmio + ATA_DMA_CMD);
3697 dmactl &= ~(ATA_DMA_WR | ATA_DMA_START);
3699 dmactl |= ATA_DMA_WR;
3700 writeb(dmactl, mmio + ATA_DMA_CMD);
3702 /* issue r/w command */
3703 ap->ops->exec_command(ap, &qc->tf);
3707 * ata_bmdma_start_mmio - Start a PCI IDE BMDMA transaction
3708 * @qc: Info associated with this ATA transaction.
3711 * spin_lock_irqsave(host_set lock)
3714 static void ata_bmdma_start_mmio (struct ata_queued_cmd *qc)
3716 struct ata_port *ap = qc->ap;
3717 void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr;
3720 /* start host DMA transaction */
3721 dmactl = readb(mmio + ATA_DMA_CMD);
3722 writeb(dmactl | ATA_DMA_START, mmio + ATA_DMA_CMD);
3724 /* Strictly, one may wish to issue a readb() here, to
3725 * flush the mmio write. However, control also passes
3726 * to the hardware at this point, and it will interrupt
3727 * us when we are to resume control. So, in effect,
3728 * we don't care when the mmio write flushes.
3729 * Further, a read of the DMA status register _immediately_
3730 * following the write may not be what certain flaky hardware
3731 * is expected, so I think it is best to not add a readb()
3732 * without first all the MMIO ATA cards/mobos.
3733 * Or maybe I'm just being paranoid.
3738 * ata_bmdma_setup_pio - Set up PCI IDE BMDMA transaction (PIO)
3739 * @qc: Info associated with this ATA transaction.
3742 * spin_lock_irqsave(host_set lock)
3745 static void ata_bmdma_setup_pio (struct ata_queued_cmd *qc)
3747 struct ata_port *ap = qc->ap;
3748 unsigned int rw = (qc->tf.flags & ATA_TFLAG_WRITE);
3751 /* load PRD table addr. */
3752 outl(ap->prd_dma, ap->ioaddr.bmdma_addr + ATA_DMA_TABLE_OFS);
3754 /* specify data direction, triple-check start bit is clear */
3755 dmactl = inb(ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
3756 dmactl &= ~(ATA_DMA_WR | ATA_DMA_START);
3758 dmactl |= ATA_DMA_WR;
3759 outb(dmactl, ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
3761 /* issue r/w command */
3762 ap->ops->exec_command(ap, &qc->tf);
3766 * ata_bmdma_start_pio - Start a PCI IDE BMDMA transaction (PIO)
3767 * @qc: Info associated with this ATA transaction.
3770 * spin_lock_irqsave(host_set lock)
3773 static void ata_bmdma_start_pio (struct ata_queued_cmd *qc)
3775 struct ata_port *ap = qc->ap;
3778 /* start host DMA transaction */
3779 dmactl = inb(ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
3780 outb(dmactl | ATA_DMA_START,
3781 ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
3786 * ata_bmdma_start - Start a PCI IDE BMDMA transaction
3787 * @qc: Info associated with this ATA transaction.
3789 * Writes the ATA_DMA_START flag to the DMA command register.
3791 * May be used as the bmdma_start() entry in ata_port_operations.
3794 * spin_lock_irqsave(host_set lock)
3796 void ata_bmdma_start(struct ata_queued_cmd *qc)
3798 if (qc->ap->flags & ATA_FLAG_MMIO)
3799 ata_bmdma_start_mmio(qc);
3801 ata_bmdma_start_pio(qc);
3806 * ata_bmdma_setup - Set up PCI IDE BMDMA transaction
3807 * @qc: Info associated with this ATA transaction.
3809 * Writes address of PRD table to device's PRD Table Address
3810 * register, sets the DMA control register, and calls
3811 * ops->exec_command() to start the transfer.
3813 * May be used as the bmdma_setup() entry in ata_port_operations.
3816 * spin_lock_irqsave(host_set lock)
3818 void ata_bmdma_setup(struct ata_queued_cmd *qc)
3820 if (qc->ap->flags & ATA_FLAG_MMIO)
3821 ata_bmdma_setup_mmio(qc);
3823 ata_bmdma_setup_pio(qc);
3828 * ata_bmdma_irq_clear - Clear PCI IDE BMDMA interrupt.
3829 * @ap: Port associated with this ATA transaction.
3831 * Clear interrupt and error flags in DMA status register.
3833 * May be used as the irq_clear() entry in ata_port_operations.
3836 * spin_lock_irqsave(host_set lock)
3839 void ata_bmdma_irq_clear(struct ata_port *ap)
3841 if (ap->flags & ATA_FLAG_MMIO) {
3842 void __iomem *mmio = ((void __iomem *) ap->ioaddr.bmdma_addr) + ATA_DMA_STATUS;
3843 writeb(readb(mmio), mmio);
3845 unsigned long addr = ap->ioaddr.bmdma_addr + ATA_DMA_STATUS;
3846 outb(inb(addr), addr);
3853 * ata_bmdma_status - Read PCI IDE BMDMA status
3854 * @ap: Port associated with this ATA transaction.
3856 * Read and return BMDMA status register.
3858 * May be used as the bmdma_status() entry in ata_port_operations.
3861 * spin_lock_irqsave(host_set lock)
3864 u8 ata_bmdma_status(struct ata_port *ap)
3867 if (ap->flags & ATA_FLAG_MMIO) {
3868 void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr;
3869 host_stat = readb(mmio + ATA_DMA_STATUS);
3871 host_stat = inb(ap->ioaddr.bmdma_addr + ATA_DMA_STATUS);
3877 * ata_bmdma_stop - Stop PCI IDE BMDMA transfer
3878 * @qc: Command we are ending DMA for
3880 * Clears the ATA_DMA_START flag in the dma control register
3882 * May be used as the bmdma_stop() entry in ata_port_operations.
3885 * spin_lock_irqsave(host_set lock)
3888 void ata_bmdma_stop(struct ata_queued_cmd *qc)
3890 struct ata_port *ap = qc->ap;
3891 if (ap->flags & ATA_FLAG_MMIO) {
3892 void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr;
3894 /* clear start/stop bit */
3895 writeb(readb(mmio + ATA_DMA_CMD) & ~ATA_DMA_START,
3896 mmio + ATA_DMA_CMD);
3898 /* clear start/stop bit */
3899 outb(inb(ap->ioaddr.bmdma_addr + ATA_DMA_CMD) & ~ATA_DMA_START,
3900 ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
3903 /* one-PIO-cycle guaranteed wait, per spec, for HDMA1:0 transition */
3904 ata_altstatus(ap); /* dummy read */
3908 * ata_host_intr - Handle host interrupt for given (port, task)
3909 * @ap: Port on which interrupt arrived (possibly...)
3910 * @qc: Taskfile currently active in engine
3912 * Handle host interrupt for given queued command. Currently,
3913 * only DMA interrupts are handled. All other commands are
3914 * handled via polling with interrupts disabled (nIEN bit).
3917 * spin_lock_irqsave(host_set lock)
3920 * One if interrupt was handled, zero if not (shared irq).
3923 inline unsigned int ata_host_intr (struct ata_port *ap,
3924 struct ata_queued_cmd *qc)
3926 u8 status, host_stat;
3928 switch (qc->tf.protocol) {
3931 case ATA_PROT_ATAPI_DMA:
3932 case ATA_PROT_ATAPI:
3933 /* check status of DMA engine */
3934 host_stat = ap->ops->bmdma_status(ap);
3935 VPRINTK("ata%u: host_stat 0x%X\n", ap->id, host_stat);
3937 /* if it's not our irq... */
3938 if (!(host_stat & ATA_DMA_INTR))
3941 /* before we do anything else, clear DMA-Start bit */
3942 ap->ops->bmdma_stop(qc);
3946 case ATA_PROT_ATAPI_NODATA:
3947 case ATA_PROT_NODATA:
3948 /* check altstatus */
3949 status = ata_altstatus(ap);
3950 if (status & ATA_BUSY)
3953 /* check main status, clearing INTRQ */
3954 status = ata_chk_status(ap);
3955 if (unlikely(status & ATA_BUSY))
3957 DPRINTK("ata%u: protocol %d (dev_stat 0x%X)\n",
3958 ap->id, qc->tf.protocol, status);
3960 /* ack bmdma irq events */
3961 ap->ops->irq_clear(ap);
3963 /* complete taskfile transaction */
3964 ata_qc_complete(qc, ac_err_mask(status));
3971 return 1; /* irq handled */
3974 ap->stats.idle_irq++;
3977 if ((ap->stats.idle_irq % 1000) == 0) {
3979 ata_irq_ack(ap, 0); /* debug trap */
3980 printk(KERN_WARNING "ata%d: irq trap\n", ap->id);
3983 return 0; /* irq not handled */
3987 * ata_interrupt - Default ATA host interrupt handler
3988 * @irq: irq line (unused)
3989 * @dev_instance: pointer to our ata_host_set information structure
3992 * Default interrupt handler for PCI IDE devices. Calls
3993 * ata_host_intr() for each port that is not disabled.
3996 * Obtains host_set lock during operation.
3999 * IRQ_NONE or IRQ_HANDLED.
4002 irqreturn_t ata_interrupt (int irq, void *dev_instance, struct pt_regs *regs)
4004 struct ata_host_set *host_set = dev_instance;
4006 unsigned int handled = 0;
4007 unsigned long flags;
4009 /* TODO: make _irqsave conditional on x86 PCI IDE legacy mode */
4010 spin_lock_irqsave(&host_set->lock, flags);
4012 for (i = 0; i < host_set->n_ports; i++) {
4013 struct ata_port *ap;
4015 ap = host_set->ports[i];
4017 !(ap->flags & (ATA_FLAG_PORT_DISABLED | ATA_FLAG_NOINTR))) {
4018 struct ata_queued_cmd *qc;
4020 qc = ata_qc_from_tag(ap, ap->active_tag);
4021 if (qc && (!(qc->tf.ctl & ATA_NIEN)) &&
4022 (qc->flags & ATA_QCFLAG_ACTIVE))
4023 handled |= ata_host_intr(ap, qc);
4027 spin_unlock_irqrestore(&host_set->lock, flags);
4029 return IRQ_RETVAL(handled);
4033 * atapi_packet_task - Write CDB bytes to hardware
4034 * @_data: Port to which ATAPI device is attached.
4036 * When device has indicated its readiness to accept
4037 * a CDB, this function is called. Send the CDB.
4038 * If DMA is to be performed, exit immediately.
4039 * Otherwise, we are in polling mode, so poll
4040 * status under operation succeeds or fails.
4043 * Kernel thread context (may sleep)
4046 static void atapi_packet_task(void *_data)
4048 struct ata_port *ap = _data;
4049 struct ata_queued_cmd *qc;
4052 qc = ata_qc_from_tag(ap, ap->active_tag);
4054 assert(qc->flags & ATA_QCFLAG_ACTIVE);
4056 /* sleep-wait for BSY to clear */
4057 DPRINTK("busy wait\n");
4058 if (ata_busy_sleep(ap, ATA_TMOUT_CDB_QUICK, ATA_TMOUT_CDB))
4059 goto err_out_status;
4061 /* make sure DRQ is set */
4062 status = ata_chk_status(ap);
4063 if ((status & (ATA_BUSY | ATA_DRQ)) != ATA_DRQ)
4067 DPRINTK("send cdb\n");
4068 assert(ap->cdb_len >= 12);
4070 if (qc->tf.protocol == ATA_PROT_ATAPI_DMA ||
4071 qc->tf.protocol == ATA_PROT_ATAPI_NODATA) {
4072 unsigned long flags;
4074 /* Once we're done issuing command and kicking bmdma,
4075 * irq handler takes over. To not lose irq, we need
4076 * to clear NOINTR flag before sending cdb, but
4077 * interrupt handler shouldn't be invoked before we're
4078 * finished. Hence, the following locking.
4080 spin_lock_irqsave(&ap->host_set->lock, flags);
4081 ap->flags &= ~ATA_FLAG_NOINTR;
4082 ata_data_xfer(ap, qc->cdb, ap->cdb_len, 1);
4083 if (qc->tf.protocol == ATA_PROT_ATAPI_DMA)
4084 ap->ops->bmdma_start(qc); /* initiate bmdma */
4085 spin_unlock_irqrestore(&ap->host_set->lock, flags);
4087 ata_data_xfer(ap, qc->cdb, ap->cdb_len, 1);
4089 /* PIO commands are handled by polling */
4090 ap->hsm_task_state = HSM_ST;
4091 queue_work(ata_wq, &ap->pio_task);
4097 status = ata_chk_status(ap);
4099 ata_poll_qc_complete(qc, __ac_err_mask(status));
4104 * ata_port_start - Set port up for dma.
4105 * @ap: Port to initialize
4107 * Called just after data structures for each port are
4108 * initialized. Allocates space for PRD table.
4110 * May be used as the port_start() entry in ata_port_operations.
4113 * Inherited from caller.
4116 int ata_port_start (struct ata_port *ap)
4118 struct device *dev = ap->host_set->dev;
4121 ap->prd = dma_alloc_coherent(dev, ATA_PRD_TBL_SZ, &ap->prd_dma, GFP_KERNEL);
4125 rc = ata_pad_alloc(ap, dev);
4127 dma_free_coherent(dev, ATA_PRD_TBL_SZ, ap->prd, ap->prd_dma);
4131 DPRINTK("prd alloc, virt %p, dma %llx\n", ap->prd, (unsigned long long) ap->prd_dma);
4138 * ata_port_stop - Undo ata_port_start()
4139 * @ap: Port to shut down
4141 * Frees the PRD table.
4143 * May be used as the port_stop() entry in ata_port_operations.
4146 * Inherited from caller.
4149 void ata_port_stop (struct ata_port *ap)
4151 struct device *dev = ap->host_set->dev;
4153 dma_free_coherent(dev, ATA_PRD_TBL_SZ, ap->prd, ap->prd_dma);
4154 ata_pad_free(ap, dev);
4157 void ata_host_stop (struct ata_host_set *host_set)
4159 if (host_set->mmio_base)
4160 iounmap(host_set->mmio_base);
4165 * ata_host_remove - Unregister SCSI host structure with upper layers
4166 * @ap: Port to unregister
4167 * @do_unregister: 1 if we fully unregister, 0 to just stop the port
4170 * Inherited from caller.
4173 static void ata_host_remove(struct ata_port *ap, unsigned int do_unregister)
4175 struct Scsi_Host *sh = ap->host;
4180 scsi_remove_host(sh);
4182 ap->ops->port_stop(ap);
4186 * ata_host_init - Initialize an ata_port structure
4187 * @ap: Structure to initialize
4188 * @host: associated SCSI mid-layer structure
4189 * @host_set: Collection of hosts to which @ap belongs
4190 * @ent: Probe information provided by low-level driver
4191 * @port_no: Port number associated with this ata_port
4193 * Initialize a new ata_port structure, and its associated
4197 * Inherited from caller.
4200 static void ata_host_init(struct ata_port *ap, struct Scsi_Host *host,
4201 struct ata_host_set *host_set,
4202 const struct ata_probe_ent *ent, unsigned int port_no)
4208 host->max_channel = 1;
4209 host->unique_id = ata_unique_id++;
4210 host->max_cmd_len = 12;
4212 ap->flags = ATA_FLAG_PORT_DISABLED;
4213 ap->id = host->unique_id;
4215 ap->ctl = ATA_DEVCTL_OBS;
4216 ap->host_set = host_set;
4217 ap->port_no = port_no;
4219 ent->legacy_mode ? ent->hard_port_no : port_no;
4220 ap->pio_mask = ent->pio_mask;
4221 ap->mwdma_mask = ent->mwdma_mask;
4222 ap->udma_mask = ent->udma_mask;
4223 ap->flags |= ent->host_flags;
4224 ap->ops = ent->port_ops;
4225 ap->cbl = ATA_CBL_NONE;
4226 ap->active_tag = ATA_TAG_POISON;
4227 ap->last_ctl = 0xFF;
4229 INIT_WORK(&ap->packet_task, atapi_packet_task, ap);
4230 INIT_WORK(&ap->pio_task, ata_pio_task, ap);
4232 for (i = 0; i < ATA_MAX_DEVICES; i++)
4233 ap->device[i].devno = i;
4236 ap->stats.unhandled_irq = 1;
4237 ap->stats.idle_irq = 1;
4240 memcpy(&ap->ioaddr, &ent->port[port_no], sizeof(struct ata_ioports));
4244 * ata_host_add - Attach low-level ATA driver to system
4245 * @ent: Information provided by low-level driver
4246 * @host_set: Collections of ports to which we add
4247 * @port_no: Port number associated with this host
4249 * Attach low-level ATA driver to system.
4252 * PCI/etc. bus probe sem.
4255 * New ata_port on success, for NULL on error.
4258 static struct ata_port * ata_host_add(const struct ata_probe_ent *ent,
4259 struct ata_host_set *host_set,
4260 unsigned int port_no)
4262 struct Scsi_Host *host;
4263 struct ata_port *ap;
4267 host = scsi_host_alloc(ent->sht, sizeof(struct ata_port));
4271 ap = (struct ata_port *) &host->hostdata[0];
4273 ata_host_init(ap, host, host_set, ent, port_no);
4275 rc = ap->ops->port_start(ap);
4282 scsi_host_put(host);
4287 * ata_device_add - Register hardware device with ATA and SCSI layers
4288 * @ent: Probe information describing hardware device to be registered
4290 * This function processes the information provided in the probe
4291 * information struct @ent, allocates the necessary ATA and SCSI
4292 * host information structures, initializes them, and registers
4293 * everything with requisite kernel subsystems.
4295 * This function requests irqs, probes the ATA bus, and probes
4299 * PCI/etc. bus probe sem.
4302 * Number of ports registered. Zero on error (no ports registered).
4305 int ata_device_add(const struct ata_probe_ent *ent)
4307 unsigned int count = 0, i;
4308 struct device *dev = ent->dev;
4309 struct ata_host_set *host_set;
4312 /* alloc a container for our list of ATA ports (buses) */
4313 host_set = kzalloc(sizeof(struct ata_host_set) +
4314 (ent->n_ports * sizeof(void *)), GFP_KERNEL);
4317 spin_lock_init(&host_set->lock);
4319 host_set->dev = dev;
4320 host_set->n_ports = ent->n_ports;
4321 host_set->irq = ent->irq;
4322 host_set->mmio_base = ent->mmio_base;
4323 host_set->private_data = ent->private_data;
4324 host_set->ops = ent->port_ops;
4326 /* register each port bound to this device */
4327 for (i = 0; i < ent->n_ports; i++) {
4328 struct ata_port *ap;
4329 unsigned long xfer_mode_mask;
4331 ap = ata_host_add(ent, host_set, i);
4335 host_set->ports[i] = ap;
4336 xfer_mode_mask =(ap->udma_mask << ATA_SHIFT_UDMA) |
4337 (ap->mwdma_mask << ATA_SHIFT_MWDMA) |
4338 (ap->pio_mask << ATA_SHIFT_PIO);
4340 /* print per-port info to dmesg */
4341 printk(KERN_INFO "ata%u: %cATA max %s cmd 0x%lX ctl 0x%lX "
4342 "bmdma 0x%lX irq %lu\n",
4344 ap->flags & ATA_FLAG_SATA ? 'S' : 'P',
4345 ata_mode_string(xfer_mode_mask),
4346 ap->ioaddr.cmd_addr,
4347 ap->ioaddr.ctl_addr,
4348 ap->ioaddr.bmdma_addr,
4352 host_set->ops->irq_clear(ap);
4359 /* obtain irq, that is shared between channels */
4360 if (request_irq(ent->irq, ent->port_ops->irq_handler, ent->irq_flags,
4361 DRV_NAME, host_set))
4364 /* perform each probe synchronously */
4365 DPRINTK("probe begin\n");
4366 for (i = 0; i < count; i++) {
4367 struct ata_port *ap;
4370 ap = host_set->ports[i];
4372 DPRINTK("ata%u: probe begin\n", ap->id);
4373 rc = ata_bus_probe(ap);
4374 DPRINTK("ata%u: probe end\n", ap->id);
4377 /* FIXME: do something useful here?
4378 * Current libata behavior will
4379 * tear down everything when
4380 * the module is removed
4381 * or the h/w is unplugged.
4385 rc = scsi_add_host(ap->host, dev);
4387 printk(KERN_ERR "ata%u: scsi_add_host failed\n",
4389 /* FIXME: do something useful here */
4390 /* FIXME: handle unconditional calls to
4391 * scsi_scan_host and ata_host_remove, below,
4397 /* probes are done, now scan each port's disk(s) */
4398 DPRINTK("probe begin\n");
4399 for (i = 0; i < count; i++) {
4400 struct ata_port *ap = host_set->ports[i];
4402 ata_scsi_scan_host(ap);
4405 dev_set_drvdata(dev, host_set);
4407 VPRINTK("EXIT, returning %u\n", ent->n_ports);
4408 return ent->n_ports; /* success */
4411 for (i = 0; i < count; i++) {
4412 ata_host_remove(host_set->ports[i], 1);
4413 scsi_host_put(host_set->ports[i]->host);
4417 VPRINTK("EXIT, returning 0\n");
4422 * ata_host_set_remove - PCI layer callback for device removal
4423 * @host_set: ATA host set that was removed
4425 * Unregister all objects associated with this host set. Free those
4429 * Inherited from calling layer (may sleep).
4432 void ata_host_set_remove(struct ata_host_set *host_set)
4434 struct ata_port *ap;
4437 for (i = 0; i < host_set->n_ports; i++) {
4438 ap = host_set->ports[i];
4439 scsi_remove_host(ap->host);
4442 free_irq(host_set->irq, host_set);
4444 for (i = 0; i < host_set->n_ports; i++) {
4445 ap = host_set->ports[i];
4447 ata_scsi_release(ap->host);
4449 if ((ap->flags & ATA_FLAG_NO_LEGACY) == 0) {
4450 struct ata_ioports *ioaddr = &ap->ioaddr;
4452 if (ioaddr->cmd_addr == 0x1f0)
4453 release_region(0x1f0, 8);
4454 else if (ioaddr->cmd_addr == 0x170)
4455 release_region(0x170, 8);
4458 scsi_host_put(ap->host);
4461 if (host_set->ops->host_stop)
4462 host_set->ops->host_stop(host_set);
4468 * ata_scsi_release - SCSI layer callback hook for host unload
4469 * @host: libata host to be unloaded
4471 * Performs all duties necessary to shut down a libata port...
4472 * Kill port kthread, disable port, and release resources.
4475 * Inherited from SCSI layer.
4481 int ata_scsi_release(struct Scsi_Host *host)
4483 struct ata_port *ap = (struct ata_port *) &host->hostdata[0];
4487 ap->ops->port_disable(ap);
4488 ata_host_remove(ap, 0);
4495 * ata_std_ports - initialize ioaddr with standard port offsets.
4496 * @ioaddr: IO address structure to be initialized
4498 * Utility function which initializes data_addr, error_addr,
4499 * feature_addr, nsect_addr, lbal_addr, lbam_addr, lbah_addr,
4500 * device_addr, status_addr, and command_addr to standard offsets
4501 * relative to cmd_addr.
4503 * Does not set ctl_addr, altstatus_addr, bmdma_addr, or scr_addr.
4506 void ata_std_ports(struct ata_ioports *ioaddr)
4508 ioaddr->data_addr = ioaddr->cmd_addr + ATA_REG_DATA;
4509 ioaddr->error_addr = ioaddr->cmd_addr + ATA_REG_ERR;
4510 ioaddr->feature_addr = ioaddr->cmd_addr + ATA_REG_FEATURE;
4511 ioaddr->nsect_addr = ioaddr->cmd_addr + ATA_REG_NSECT;
4512 ioaddr->lbal_addr = ioaddr->cmd_addr + ATA_REG_LBAL;
4513 ioaddr->lbam_addr = ioaddr->cmd_addr + ATA_REG_LBAM;
4514 ioaddr->lbah_addr = ioaddr->cmd_addr + ATA_REG_LBAH;
4515 ioaddr->device_addr = ioaddr->cmd_addr + ATA_REG_DEVICE;
4516 ioaddr->status_addr = ioaddr->cmd_addr + ATA_REG_STATUS;
4517 ioaddr->command_addr = ioaddr->cmd_addr + ATA_REG_CMD;
4520 static struct ata_probe_ent *
4521 ata_probe_ent_alloc(struct device *dev, const struct ata_port_info *port)
4523 struct ata_probe_ent *probe_ent;
4525 probe_ent = kzalloc(sizeof(*probe_ent), GFP_KERNEL);
4527 printk(KERN_ERR DRV_NAME "(%s): out of memory\n",
4528 kobject_name(&(dev->kobj)));
4532 INIT_LIST_HEAD(&probe_ent->node);
4533 probe_ent->dev = dev;
4535 probe_ent->sht = port->sht;
4536 probe_ent->host_flags = port->host_flags;
4537 probe_ent->pio_mask = port->pio_mask;
4538 probe_ent->mwdma_mask = port->mwdma_mask;
4539 probe_ent->udma_mask = port->udma_mask;
4540 probe_ent->port_ops = port->port_ops;
4549 void ata_pci_host_stop (struct ata_host_set *host_set)
4551 struct pci_dev *pdev = to_pci_dev(host_set->dev);
4553 pci_iounmap(pdev, host_set->mmio_base);
4557 * ata_pci_init_native_mode - Initialize native-mode driver
4558 * @pdev: pci device to be initialized
4559 * @port: array[2] of pointers to port info structures.
4560 * @ports: bitmap of ports present
4562 * Utility function which allocates and initializes an
4563 * ata_probe_ent structure for a standard dual-port
4564 * PIO-based IDE controller. The returned ata_probe_ent
4565 * structure can be passed to ata_device_add(). The returned
4566 * ata_probe_ent structure should then be freed with kfree().
4568 * The caller need only pass the address of the primary port, the
4569 * secondary will be deduced automatically. If the device has non
4570 * standard secondary port mappings this function can be called twice,
4571 * once for each interface.
4574 struct ata_probe_ent *
4575 ata_pci_init_native_mode(struct pci_dev *pdev, struct ata_port_info **port, int ports)
4577 struct ata_probe_ent *probe_ent =
4578 ata_probe_ent_alloc(pci_dev_to_dev(pdev), port[0]);
4584 probe_ent->irq = pdev->irq;
4585 probe_ent->irq_flags = SA_SHIRQ;
4586 probe_ent->private_data = port[0]->private_data;
4588 if (ports & ATA_PORT_PRIMARY) {
4589 probe_ent->port[p].cmd_addr = pci_resource_start(pdev, 0);
4590 probe_ent->port[p].altstatus_addr =
4591 probe_ent->port[p].ctl_addr =
4592 pci_resource_start(pdev, 1) | ATA_PCI_CTL_OFS;
4593 probe_ent->port[p].bmdma_addr = pci_resource_start(pdev, 4);
4594 ata_std_ports(&probe_ent->port[p]);
4598 if (ports & ATA_PORT_SECONDARY) {
4599 probe_ent->port[p].cmd_addr = pci_resource_start(pdev, 2);
4600 probe_ent->port[p].altstatus_addr =
4601 probe_ent->port[p].ctl_addr =
4602 pci_resource_start(pdev, 3) | ATA_PCI_CTL_OFS;
4603 probe_ent->port[p].bmdma_addr = pci_resource_start(pdev, 4) + 8;
4604 ata_std_ports(&probe_ent->port[p]);
4608 probe_ent->n_ports = p;
4612 static struct ata_probe_ent *ata_pci_init_legacy_port(struct pci_dev *pdev, struct ata_port_info *port, int port_num)
4614 struct ata_probe_ent *probe_ent;
4616 probe_ent = ata_probe_ent_alloc(pci_dev_to_dev(pdev), port);
4620 probe_ent->legacy_mode = 1;
4621 probe_ent->n_ports = 1;
4622 probe_ent->hard_port_no = port_num;
4623 probe_ent->private_data = port->private_data;
4628 probe_ent->irq = 14;
4629 probe_ent->port[0].cmd_addr = 0x1f0;
4630 probe_ent->port[0].altstatus_addr =
4631 probe_ent->port[0].ctl_addr = 0x3f6;
4634 probe_ent->irq = 15;
4635 probe_ent->port[0].cmd_addr = 0x170;
4636 probe_ent->port[0].altstatus_addr =
4637 probe_ent->port[0].ctl_addr = 0x376;
4640 probe_ent->port[0].bmdma_addr = pci_resource_start(pdev, 4) + 8 * port_num;
4641 ata_std_ports(&probe_ent->port[0]);
4646 * ata_pci_init_one - Initialize/register PCI IDE host controller
4647 * @pdev: Controller to be initialized
4648 * @port_info: Information from low-level host driver
4649 * @n_ports: Number of ports attached to host controller
4651 * This is a helper function which can be called from a driver's
4652 * xxx_init_one() probe function if the hardware uses traditional
4653 * IDE taskfile registers.
4655 * This function calls pci_enable_device(), reserves its register
4656 * regions, sets the dma mask, enables bus master mode, and calls
4660 * Inherited from PCI layer (may sleep).
4663 * Zero on success, negative on errno-based value on error.
4666 int ata_pci_init_one (struct pci_dev *pdev, struct ata_port_info **port_info,
4667 unsigned int n_ports)
4669 struct ata_probe_ent *probe_ent = NULL, *probe_ent2 = NULL;
4670 struct ata_port_info *port[2];
4672 unsigned int legacy_mode = 0;
4673 int disable_dev_on_err = 1;
4678 port[0] = port_info[0];
4680 port[1] = port_info[1];
4684 if ((port[0]->host_flags & ATA_FLAG_NO_LEGACY) == 0
4685 && (pdev->class >> 8) == PCI_CLASS_STORAGE_IDE) {
4686 /* TODO: What if one channel is in native mode ... */
4687 pci_read_config_byte(pdev, PCI_CLASS_PROG, &tmp8);
4688 mask = (1 << 2) | (1 << 0);
4689 if ((tmp8 & mask) != mask)
4690 legacy_mode = (1 << 3);
4694 if ((!legacy_mode) && (n_ports > 2)) {
4695 printk(KERN_ERR "ata: BUG: native mode, n_ports > 2\n");
4700 /* FIXME: Really for ATA it isn't safe because the device may be
4701 multi-purpose and we want to leave it alone if it was already
4702 enabled. Secondly for shared use as Arjan says we want refcounting
4704 Checking dev->is_enabled is insufficient as this is not set at
4705 boot for the primary video which is BIOS enabled
4708 rc = pci_enable_device(pdev);
4712 rc = pci_request_regions(pdev, DRV_NAME);
4714 disable_dev_on_err = 0;
4718 /* FIXME: Should use platform specific mappers for legacy port ranges */
4720 if (!request_region(0x1f0, 8, "libata")) {
4721 struct resource *conflict, res;
4723 res.end = 0x1f0 + 8 - 1;
4724 conflict = ____request_resource(&ioport_resource, &res);
4725 if (!strcmp(conflict->name, "libata"))
4726 legacy_mode |= (1 << 0);
4728 disable_dev_on_err = 0;
4729 printk(KERN_WARNING "ata: 0x1f0 IDE port busy\n");
4732 legacy_mode |= (1 << 0);
4734 if (!request_region(0x170, 8, "libata")) {
4735 struct resource *conflict, res;
4737 res.end = 0x170 + 8 - 1;
4738 conflict = ____request_resource(&ioport_resource, &res);
4739 if (!strcmp(conflict->name, "libata"))
4740 legacy_mode |= (1 << 1);
4742 disable_dev_on_err = 0;
4743 printk(KERN_WARNING "ata: 0x170 IDE port busy\n");
4746 legacy_mode |= (1 << 1);
4749 /* we have legacy mode, but all ports are unavailable */
4750 if (legacy_mode == (1 << 3)) {
4752 goto err_out_regions;
4755 rc = pci_set_dma_mask(pdev, ATA_DMA_MASK);
4757 goto err_out_regions;
4758 rc = pci_set_consistent_dma_mask(pdev, ATA_DMA_MASK);
4760 goto err_out_regions;
4763 if (legacy_mode & (1 << 0))
4764 probe_ent = ata_pci_init_legacy_port(pdev, port[0], 0);
4765 if (legacy_mode & (1 << 1))
4766 probe_ent2 = ata_pci_init_legacy_port(pdev, port[1], 1);
4769 probe_ent = ata_pci_init_native_mode(pdev, port, ATA_PORT_PRIMARY | ATA_PORT_SECONDARY);
4771 probe_ent = ata_pci_init_native_mode(pdev, port, ATA_PORT_PRIMARY);
4773 if (!probe_ent && !probe_ent2) {
4775 goto err_out_regions;
4778 pci_set_master(pdev);
4780 /* FIXME: check ata_device_add return */
4782 if (legacy_mode & (1 << 0))
4783 ata_device_add(probe_ent);
4784 if (legacy_mode & (1 << 1))
4785 ata_device_add(probe_ent2);
4787 ata_device_add(probe_ent);
4795 if (legacy_mode & (1 << 0))
4796 release_region(0x1f0, 8);
4797 if (legacy_mode & (1 << 1))
4798 release_region(0x170, 8);
4799 pci_release_regions(pdev);
4801 if (disable_dev_on_err)
4802 pci_disable_device(pdev);
4807 * ata_pci_remove_one - PCI layer callback for device removal
4808 * @pdev: PCI device that was removed
4810 * PCI layer indicates to libata via this hook that
4811 * hot-unplug or module unload event has occurred.
4812 * Handle this by unregistering all objects associated
4813 * with this PCI device. Free those objects. Then finally
4814 * release PCI resources and disable device.
4817 * Inherited from PCI layer (may sleep).
4820 void ata_pci_remove_one (struct pci_dev *pdev)
4822 struct device *dev = pci_dev_to_dev(pdev);
4823 struct ata_host_set *host_set = dev_get_drvdata(dev);
4825 ata_host_set_remove(host_set);
4826 pci_release_regions(pdev);
4827 pci_disable_device(pdev);
4828 dev_set_drvdata(dev, NULL);
4831 /* move to PCI subsystem */
4832 int pci_test_config_bits(struct pci_dev *pdev, const struct pci_bits *bits)
4834 unsigned long tmp = 0;
4836 switch (bits->width) {
4839 pci_read_config_byte(pdev, bits->reg, &tmp8);
4845 pci_read_config_word(pdev, bits->reg, &tmp16);
4851 pci_read_config_dword(pdev, bits->reg, &tmp32);
4862 return (tmp == bits->val) ? 1 : 0;
4864 #endif /* CONFIG_PCI */
4867 static int __init ata_init(void)
4869 ata_wq = create_workqueue("ata");
4873 printk(KERN_DEBUG "libata version " DRV_VERSION " loaded.\n");
4877 static void __exit ata_exit(void)
4879 destroy_workqueue(ata_wq);
4882 module_init(ata_init);
4883 module_exit(ata_exit);
4885 static unsigned long ratelimit_time;
4886 static spinlock_t ata_ratelimit_lock = SPIN_LOCK_UNLOCKED;
4888 int ata_ratelimit(void)
4891 unsigned long flags;
4893 spin_lock_irqsave(&ata_ratelimit_lock, flags);
4895 if (time_after(jiffies, ratelimit_time)) {
4897 ratelimit_time = jiffies + (HZ/5);
4901 spin_unlock_irqrestore(&ata_ratelimit_lock, flags);
4907 * libata is essentially a library of internal helper functions for
4908 * low-level ATA host controller drivers. As such, the API/ABI is
4909 * likely to change as new drivers are added and updated.
4910 * Do not depend on ABI/API stability.
4913 EXPORT_SYMBOL_GPL(ata_std_bios_param);
4914 EXPORT_SYMBOL_GPL(ata_std_ports);
4915 EXPORT_SYMBOL_GPL(ata_device_add);
4916 EXPORT_SYMBOL_GPL(ata_host_set_remove);
4917 EXPORT_SYMBOL_GPL(ata_sg_init);
4918 EXPORT_SYMBOL_GPL(ata_sg_init_one);
4919 EXPORT_SYMBOL_GPL(ata_qc_complete);
4920 EXPORT_SYMBOL_GPL(ata_qc_issue_prot);
4921 EXPORT_SYMBOL_GPL(ata_eng_timeout);
4922 EXPORT_SYMBOL_GPL(ata_tf_load);
4923 EXPORT_SYMBOL_GPL(ata_tf_read);
4924 EXPORT_SYMBOL_GPL(ata_noop_dev_select);
4925 EXPORT_SYMBOL_GPL(ata_std_dev_select);
4926 EXPORT_SYMBOL_GPL(ata_tf_to_fis);
4927 EXPORT_SYMBOL_GPL(ata_tf_from_fis);
4928 EXPORT_SYMBOL_GPL(ata_check_status);
4929 EXPORT_SYMBOL_GPL(ata_altstatus);
4930 EXPORT_SYMBOL_GPL(ata_exec_command);
4931 EXPORT_SYMBOL_GPL(ata_port_start);
4932 EXPORT_SYMBOL_GPL(ata_port_stop);
4933 EXPORT_SYMBOL_GPL(ata_host_stop);
4934 EXPORT_SYMBOL_GPL(ata_interrupt);
4935 EXPORT_SYMBOL_GPL(ata_qc_prep);
4936 EXPORT_SYMBOL_GPL(ata_bmdma_setup);
4937 EXPORT_SYMBOL_GPL(ata_bmdma_start);
4938 EXPORT_SYMBOL_GPL(ata_bmdma_irq_clear);
4939 EXPORT_SYMBOL_GPL(ata_bmdma_status);
4940 EXPORT_SYMBOL_GPL(ata_bmdma_stop);
4941 EXPORT_SYMBOL_GPL(ata_port_probe);
4942 EXPORT_SYMBOL_GPL(sata_phy_reset);
4943 EXPORT_SYMBOL_GPL(__sata_phy_reset);
4944 EXPORT_SYMBOL_GPL(ata_bus_reset);
4945 EXPORT_SYMBOL_GPL(ata_port_disable);
4946 EXPORT_SYMBOL_GPL(ata_ratelimit);
4947 EXPORT_SYMBOL_GPL(ata_scsi_ioctl);
4948 EXPORT_SYMBOL_GPL(ata_scsi_queuecmd);
4949 EXPORT_SYMBOL_GPL(ata_scsi_error);
4950 EXPORT_SYMBOL_GPL(ata_scsi_slave_config);
4951 EXPORT_SYMBOL_GPL(ata_scsi_release);
4952 EXPORT_SYMBOL_GPL(ata_host_intr);
4953 EXPORT_SYMBOL_GPL(ata_dev_classify);
4954 EXPORT_SYMBOL_GPL(ata_dev_id_string);
4955 EXPORT_SYMBOL_GPL(ata_dev_config);
4956 EXPORT_SYMBOL_GPL(ata_scsi_simulate);
4958 EXPORT_SYMBOL_GPL(ata_timing_compute);
4959 EXPORT_SYMBOL_GPL(ata_timing_merge);
4962 EXPORT_SYMBOL_GPL(pci_test_config_bits);
4963 EXPORT_SYMBOL_GPL(ata_pci_host_stop);
4964 EXPORT_SYMBOL_GPL(ata_pci_init_native_mode);
4965 EXPORT_SYMBOL_GPL(ata_pci_init_one);
4966 EXPORT_SYMBOL_GPL(ata_pci_remove_one);
4967 #endif /* CONFIG_PCI */