2 * libata-core.c - helper library for ATA
4 * Maintained by: Jeff Garzik <jgarzik@pobox.com>
5 * Please ALWAYS copy linux-ide@vger.kernel.org
8 * Copyright 2003-2004 Red Hat, Inc. All rights reserved.
9 * Copyright 2003-2004 Jeff Garzik
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2, or (at your option)
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
22 * You should have received a copy of the GNU General Public License
23 * along with this program; see the file COPYING. If not, write to
24 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
27 * libata documentation is available via 'make {ps|pdf}docs',
28 * as Documentation/DocBook/libata.*
30 * Hardware documentation available from http://www.t13.org/ and
31 * http://www.sata-io.org/
35 #include <linux/config.h>
36 #include <linux/kernel.h>
37 #include <linux/module.h>
38 #include <linux/pci.h>
39 #include <linux/init.h>
40 #include <linux/list.h>
42 #include <linux/highmem.h>
43 #include <linux/spinlock.h>
44 #include <linux/blkdev.h>
45 #include <linux/delay.h>
46 #include <linux/timer.h>
47 #include <linux/interrupt.h>
48 #include <linux/completion.h>
49 #include <linux/suspend.h>
50 #include <linux/workqueue.h>
51 #include <linux/jiffies.h>
52 #include <scsi/scsi.h>
54 #include "scsi_priv.h"
55 #include <scsi/scsi_host.h>
56 #include <linux/libata.h>
58 #include <asm/semaphore.h>
59 #include <asm/byteorder.h>
63 static unsigned int ata_busy_sleep (struct ata_port *ap,
64 unsigned long tmout_pat,
66 static void ata_dev_reread_id(struct ata_port *ap, struct ata_device *dev);
67 static void ata_dev_init_params(struct ata_port *ap, struct ata_device *dev);
68 static void ata_set_mode(struct ata_port *ap);
69 static void ata_dev_set_xfermode(struct ata_port *ap, struct ata_device *dev);
70 static unsigned int ata_get_mode_mask(const struct ata_port *ap, int shift);
71 static int fgb(u32 bitmap);
72 static int ata_choose_xfer_mode(const struct ata_port *ap,
74 unsigned int *xfer_shift_out);
75 static void __ata_qc_complete(struct ata_queued_cmd *qc);
77 static unsigned int ata_unique_id = 1;
78 static struct workqueue_struct *ata_wq;
80 int atapi_enabled = 0;
81 module_param(atapi_enabled, int, 0444);
82 MODULE_PARM_DESC(atapi_enabled, "Enable discovery of ATAPI devices (0=off, 1=on)");
84 MODULE_AUTHOR("Jeff Garzik");
85 MODULE_DESCRIPTION("Library module for ATA devices");
86 MODULE_LICENSE("GPL");
87 MODULE_VERSION(DRV_VERSION);
90 * ata_tf_load_pio - send taskfile registers to host controller
91 * @ap: Port to which output is sent
92 * @tf: ATA taskfile register set
94 * Outputs ATA taskfile to standard ATA host controller.
97 * Inherited from caller.
100 static void ata_tf_load_pio(struct ata_port *ap, const struct ata_taskfile *tf)
102 struct ata_ioports *ioaddr = &ap->ioaddr;
103 unsigned int is_addr = tf->flags & ATA_TFLAG_ISADDR;
105 if (tf->ctl != ap->last_ctl) {
106 outb(tf->ctl, ioaddr->ctl_addr);
107 ap->last_ctl = tf->ctl;
111 if (is_addr && (tf->flags & ATA_TFLAG_LBA48)) {
112 outb(tf->hob_feature, ioaddr->feature_addr);
113 outb(tf->hob_nsect, ioaddr->nsect_addr);
114 outb(tf->hob_lbal, ioaddr->lbal_addr);
115 outb(tf->hob_lbam, ioaddr->lbam_addr);
116 outb(tf->hob_lbah, ioaddr->lbah_addr);
117 VPRINTK("hob: feat 0x%X nsect 0x%X, lba 0x%X 0x%X 0x%X\n",
126 outb(tf->feature, ioaddr->feature_addr);
127 outb(tf->nsect, ioaddr->nsect_addr);
128 outb(tf->lbal, ioaddr->lbal_addr);
129 outb(tf->lbam, ioaddr->lbam_addr);
130 outb(tf->lbah, ioaddr->lbah_addr);
131 VPRINTK("feat 0x%X nsect 0x%X lba 0x%X 0x%X 0x%X\n",
139 if (tf->flags & ATA_TFLAG_DEVICE) {
140 outb(tf->device, ioaddr->device_addr);
141 VPRINTK("device 0x%X\n", tf->device);
148 * ata_tf_load_mmio - send taskfile registers to host controller
149 * @ap: Port to which output is sent
150 * @tf: ATA taskfile register set
152 * Outputs ATA taskfile to standard ATA host controller using MMIO.
155 * Inherited from caller.
158 static void ata_tf_load_mmio(struct ata_port *ap, const struct ata_taskfile *tf)
160 struct ata_ioports *ioaddr = &ap->ioaddr;
161 unsigned int is_addr = tf->flags & ATA_TFLAG_ISADDR;
163 if (tf->ctl != ap->last_ctl) {
164 writeb(tf->ctl, (void __iomem *) ap->ioaddr.ctl_addr);
165 ap->last_ctl = tf->ctl;
169 if (is_addr && (tf->flags & ATA_TFLAG_LBA48)) {
170 writeb(tf->hob_feature, (void __iomem *) ioaddr->feature_addr);
171 writeb(tf->hob_nsect, (void __iomem *) ioaddr->nsect_addr);
172 writeb(tf->hob_lbal, (void __iomem *) ioaddr->lbal_addr);
173 writeb(tf->hob_lbam, (void __iomem *) ioaddr->lbam_addr);
174 writeb(tf->hob_lbah, (void __iomem *) ioaddr->lbah_addr);
175 VPRINTK("hob: feat 0x%X nsect 0x%X, lba 0x%X 0x%X 0x%X\n",
184 writeb(tf->feature, (void __iomem *) ioaddr->feature_addr);
185 writeb(tf->nsect, (void __iomem *) ioaddr->nsect_addr);
186 writeb(tf->lbal, (void __iomem *) ioaddr->lbal_addr);
187 writeb(tf->lbam, (void __iomem *) ioaddr->lbam_addr);
188 writeb(tf->lbah, (void __iomem *) ioaddr->lbah_addr);
189 VPRINTK("feat 0x%X nsect 0x%X lba 0x%X 0x%X 0x%X\n",
197 if (tf->flags & ATA_TFLAG_DEVICE) {
198 writeb(tf->device, (void __iomem *) ioaddr->device_addr);
199 VPRINTK("device 0x%X\n", tf->device);
207 * ata_tf_load - send taskfile registers to host controller
208 * @ap: Port to which output is sent
209 * @tf: ATA taskfile register set
211 * Outputs ATA taskfile to standard ATA host controller using MMIO
212 * or PIO as indicated by the ATA_FLAG_MMIO flag.
213 * Writes the control, feature, nsect, lbal, lbam, and lbah registers.
214 * Optionally (ATA_TFLAG_LBA48) writes hob_feature, hob_nsect,
215 * hob_lbal, hob_lbam, and hob_lbah.
217 * This function waits for idle (!BUSY and !DRQ) after writing
218 * registers. If the control register has a new value, this
219 * function also waits for idle after writing control and before
220 * writing the remaining registers.
222 * May be used as the tf_load() entry in ata_port_operations.
225 * Inherited from caller.
227 void ata_tf_load(struct ata_port *ap, const struct ata_taskfile *tf)
229 if (ap->flags & ATA_FLAG_MMIO)
230 ata_tf_load_mmio(ap, tf);
232 ata_tf_load_pio(ap, tf);
236 * ata_exec_command_pio - issue ATA command to host controller
237 * @ap: port to which command is being issued
238 * @tf: ATA taskfile register set
240 * Issues PIO write to ATA command register, with proper
241 * synchronization with interrupt handler / other threads.
244 * spin_lock_irqsave(host_set lock)
247 static void ata_exec_command_pio(struct ata_port *ap, const struct ata_taskfile *tf)
249 DPRINTK("ata%u: cmd 0x%X\n", ap->id, tf->command);
251 outb(tf->command, ap->ioaddr.command_addr);
257 * ata_exec_command_mmio - issue ATA command to host controller
258 * @ap: port to which command is being issued
259 * @tf: ATA taskfile register set
261 * Issues MMIO write to ATA command register, with proper
262 * synchronization with interrupt handler / other threads.
265 * spin_lock_irqsave(host_set lock)
268 static void ata_exec_command_mmio(struct ata_port *ap, const struct ata_taskfile *tf)
270 DPRINTK("ata%u: cmd 0x%X\n", ap->id, tf->command);
272 writeb(tf->command, (void __iomem *) ap->ioaddr.command_addr);
278 * ata_exec_command - issue ATA command to host controller
279 * @ap: port to which command is being issued
280 * @tf: ATA taskfile register set
282 * Issues PIO/MMIO write to ATA command register, with proper
283 * synchronization with interrupt handler / other threads.
286 * spin_lock_irqsave(host_set lock)
288 void ata_exec_command(struct ata_port *ap, const struct ata_taskfile *tf)
290 if (ap->flags & ATA_FLAG_MMIO)
291 ata_exec_command_mmio(ap, tf);
293 ata_exec_command_pio(ap, tf);
297 * ata_exec - issue ATA command to host controller
298 * @ap: port to which command is being issued
299 * @tf: ATA taskfile register set
301 * Issues PIO/MMIO write to ATA command register, with proper
302 * synchronization with interrupt handler / other threads.
305 * Obtains host_set lock.
308 static inline void ata_exec(struct ata_port *ap, const struct ata_taskfile *tf)
312 DPRINTK("ata%u: cmd 0x%X\n", ap->id, tf->command);
313 spin_lock_irqsave(&ap->host_set->lock, flags);
314 ap->ops->exec_command(ap, tf);
315 spin_unlock_irqrestore(&ap->host_set->lock, flags);
319 * ata_tf_to_host - issue ATA taskfile to host controller
320 * @ap: port to which command is being issued
321 * @tf: ATA taskfile register set
323 * Issues ATA taskfile register set to ATA host controller,
324 * with proper synchronization with interrupt handler and
328 * Obtains host_set lock.
331 static void ata_tf_to_host(struct ata_port *ap, const struct ata_taskfile *tf)
333 ap->ops->tf_load(ap, tf);
339 * ata_tf_to_host_nolock - issue ATA taskfile to host controller
340 * @ap: port to which command is being issued
341 * @tf: ATA taskfile register set
343 * Issues ATA taskfile register set to ATA host controller,
344 * with proper synchronization with interrupt handler and
348 * spin_lock_irqsave(host_set lock)
351 void ata_tf_to_host_nolock(struct ata_port *ap, const struct ata_taskfile *tf)
353 ap->ops->tf_load(ap, tf);
354 ap->ops->exec_command(ap, tf);
358 * ata_tf_read_pio - input device's ATA taskfile shadow registers
359 * @ap: Port from which input is read
360 * @tf: ATA taskfile register set for storing input
362 * Reads ATA taskfile registers for currently-selected device
366 * Inherited from caller.
369 static void ata_tf_read_pio(struct ata_port *ap, struct ata_taskfile *tf)
371 struct ata_ioports *ioaddr = &ap->ioaddr;
373 tf->command = ata_check_status(ap);
374 tf->feature = ata_chk_err(ap);
375 tf->nsect = inb(ioaddr->nsect_addr);
376 tf->lbal = inb(ioaddr->lbal_addr);
377 tf->lbam = inb(ioaddr->lbam_addr);
378 tf->lbah = inb(ioaddr->lbah_addr);
379 tf->device = inb(ioaddr->device_addr);
381 if (tf->flags & ATA_TFLAG_LBA48) {
382 outb(tf->ctl | ATA_HOB, ioaddr->ctl_addr);
383 tf->hob_feature = inb(ioaddr->error_addr);
384 tf->hob_nsect = inb(ioaddr->nsect_addr);
385 tf->hob_lbal = inb(ioaddr->lbal_addr);
386 tf->hob_lbam = inb(ioaddr->lbam_addr);
387 tf->hob_lbah = inb(ioaddr->lbah_addr);
392 * ata_tf_read_mmio - input device's ATA taskfile shadow registers
393 * @ap: Port from which input is read
394 * @tf: ATA taskfile register set for storing input
396 * Reads ATA taskfile registers for currently-selected device
400 * Inherited from caller.
403 static void ata_tf_read_mmio(struct ata_port *ap, struct ata_taskfile *tf)
405 struct ata_ioports *ioaddr = &ap->ioaddr;
407 tf->command = ata_check_status(ap);
408 tf->feature = ata_chk_err(ap);
409 tf->nsect = readb((void __iomem *)ioaddr->nsect_addr);
410 tf->lbal = readb((void __iomem *)ioaddr->lbal_addr);
411 tf->lbam = readb((void __iomem *)ioaddr->lbam_addr);
412 tf->lbah = readb((void __iomem *)ioaddr->lbah_addr);
413 tf->device = readb((void __iomem *)ioaddr->device_addr);
415 if (tf->flags & ATA_TFLAG_LBA48) {
416 writeb(tf->ctl | ATA_HOB, (void __iomem *) ap->ioaddr.ctl_addr);
417 tf->hob_feature = readb((void __iomem *)ioaddr->error_addr);
418 tf->hob_nsect = readb((void __iomem *)ioaddr->nsect_addr);
419 tf->hob_lbal = readb((void __iomem *)ioaddr->lbal_addr);
420 tf->hob_lbam = readb((void __iomem *)ioaddr->lbam_addr);
421 tf->hob_lbah = readb((void __iomem *)ioaddr->lbah_addr);
427 * ata_tf_read - input device's ATA taskfile shadow registers
428 * @ap: Port from which input is read
429 * @tf: ATA taskfile register set for storing input
431 * Reads ATA taskfile registers for currently-selected device
434 * Reads nsect, lbal, lbam, lbah, and device. If ATA_TFLAG_LBA48
435 * is set, also reads the hob registers.
437 * May be used as the tf_read() entry in ata_port_operations.
440 * Inherited from caller.
442 void ata_tf_read(struct ata_port *ap, struct ata_taskfile *tf)
444 if (ap->flags & ATA_FLAG_MMIO)
445 ata_tf_read_mmio(ap, tf);
447 ata_tf_read_pio(ap, tf);
451 * ata_check_status_pio - Read device status reg & clear interrupt
452 * @ap: port where the device is
454 * Reads ATA taskfile status register for currently-selected device
455 * and return its value. This also clears pending interrupts
459 * Inherited from caller.
461 static u8 ata_check_status_pio(struct ata_port *ap)
463 return inb(ap->ioaddr.status_addr);
467 * ata_check_status_mmio - Read device status reg & clear interrupt
468 * @ap: port where the device is
470 * Reads ATA taskfile status register for currently-selected device
471 * via MMIO and return its value. This also clears pending interrupts
475 * Inherited from caller.
477 static u8 ata_check_status_mmio(struct ata_port *ap)
479 return readb((void __iomem *) ap->ioaddr.status_addr);
484 * ata_check_status - Read device status reg & clear interrupt
485 * @ap: port where the device is
487 * Reads ATA taskfile status register for currently-selected device
488 * and return its value. This also clears pending interrupts
491 * May be used as the check_status() entry in ata_port_operations.
494 * Inherited from caller.
496 u8 ata_check_status(struct ata_port *ap)
498 if (ap->flags & ATA_FLAG_MMIO)
499 return ata_check_status_mmio(ap);
500 return ata_check_status_pio(ap);
505 * ata_altstatus - Read device alternate status reg
506 * @ap: port where the device is
508 * Reads ATA taskfile alternate status register for
509 * currently-selected device and return its value.
511 * Note: may NOT be used as the check_altstatus() entry in
512 * ata_port_operations.
515 * Inherited from caller.
517 u8 ata_altstatus(struct ata_port *ap)
519 if (ap->ops->check_altstatus)
520 return ap->ops->check_altstatus(ap);
522 if (ap->flags & ATA_FLAG_MMIO)
523 return readb((void __iomem *)ap->ioaddr.altstatus_addr);
524 return inb(ap->ioaddr.altstatus_addr);
529 * ata_chk_err - Read device error reg
530 * @ap: port where the device is
532 * Reads ATA taskfile error register for
533 * currently-selected device and return its value.
535 * Note: may NOT be used as the check_err() entry in
536 * ata_port_operations.
539 * Inherited from caller.
541 u8 ata_chk_err(struct ata_port *ap)
543 if (ap->ops->check_err)
544 return ap->ops->check_err(ap);
546 if (ap->flags & ATA_FLAG_MMIO) {
547 return readb((void __iomem *) ap->ioaddr.error_addr);
549 return inb(ap->ioaddr.error_addr);
553 * ata_tf_to_fis - Convert ATA taskfile to SATA FIS structure
554 * @tf: Taskfile to convert
555 * @fis: Buffer into which data will output
556 * @pmp: Port multiplier port
558 * Converts a standard ATA taskfile to a Serial ATA
559 * FIS structure (Register - Host to Device).
562 * Inherited from caller.
565 void ata_tf_to_fis(const struct ata_taskfile *tf, u8 *fis, u8 pmp)
567 fis[0] = 0x27; /* Register - Host to Device FIS */
568 fis[1] = (pmp & 0xf) | (1 << 7); /* Port multiplier number,
569 bit 7 indicates Command FIS */
570 fis[2] = tf->command;
571 fis[3] = tf->feature;
578 fis[8] = tf->hob_lbal;
579 fis[9] = tf->hob_lbam;
580 fis[10] = tf->hob_lbah;
581 fis[11] = tf->hob_feature;
584 fis[13] = tf->hob_nsect;
595 * ata_tf_from_fis - Convert SATA FIS to ATA taskfile
596 * @fis: Buffer from which data will be input
597 * @tf: Taskfile to output
599 * Converts a standard ATA taskfile to a Serial ATA
600 * FIS structure (Register - Host to Device).
603 * Inherited from caller.
606 void ata_tf_from_fis(const u8 *fis, struct ata_taskfile *tf)
608 tf->command = fis[2]; /* status */
609 tf->feature = fis[3]; /* error */
616 tf->hob_lbal = fis[8];
617 tf->hob_lbam = fis[9];
618 tf->hob_lbah = fis[10];
621 tf->hob_nsect = fis[13];
624 static const u8 ata_rw_cmds[] = {
628 ATA_CMD_READ_MULTI_EXT,
629 ATA_CMD_WRITE_MULTI_EXT,
633 ATA_CMD_PIO_READ_EXT,
634 ATA_CMD_PIO_WRITE_EXT,
643 * ata_rwcmd_protocol - set taskfile r/w commands and protocol
644 * @qc: command to examine and configure
646 * Examine the device configuration and tf->flags to calculate
647 * the proper read/write commands and protocol to use.
652 void ata_rwcmd_protocol(struct ata_queued_cmd *qc)
654 struct ata_taskfile *tf = &qc->tf;
655 struct ata_device *dev = qc->dev;
657 int index, lba48, write;
659 lba48 = (tf->flags & ATA_TFLAG_LBA48) ? 2 : 0;
660 write = (tf->flags & ATA_TFLAG_WRITE) ? 1 : 0;
662 if (dev->flags & ATA_DFLAG_PIO) {
663 tf->protocol = ATA_PROT_PIO;
664 index = dev->multi_count ? 0 : 4;
666 tf->protocol = ATA_PROT_DMA;
670 tf->command = ata_rw_cmds[index + lba48 + write];
673 static const char * xfer_mode_str[] = {
693 * ata_udma_string - convert UDMA bit offset to string
694 * @mask: mask of bits supported; only highest bit counts.
696 * Determine string which represents the highest speed
697 * (highest bit in @udma_mask).
703 * Constant C string representing highest speed listed in
704 * @udma_mask, or the constant C string "<n/a>".
707 static const char *ata_mode_string(unsigned int mask)
711 for (i = 7; i >= 0; i--)
714 for (i = ATA_SHIFT_MWDMA + 2; i >= ATA_SHIFT_MWDMA; i--)
717 for (i = ATA_SHIFT_PIO + 4; i >= ATA_SHIFT_PIO; i--)
724 return xfer_mode_str[i];
728 * ata_pio_devchk - PATA device presence detection
729 * @ap: ATA channel to examine
730 * @device: Device to examine (starting at zero)
732 * This technique was originally described in
733 * Hale Landis's ATADRVR (www.ata-atapi.com), and
734 * later found its way into the ATA/ATAPI spec.
736 * Write a pattern to the ATA shadow registers,
737 * and if a device is present, it will respond by
738 * correctly storing and echoing back the
739 * ATA shadow register contents.
745 static unsigned int ata_pio_devchk(struct ata_port *ap,
748 struct ata_ioports *ioaddr = &ap->ioaddr;
751 ap->ops->dev_select(ap, device);
753 outb(0x55, ioaddr->nsect_addr);
754 outb(0xaa, ioaddr->lbal_addr);
756 outb(0xaa, ioaddr->nsect_addr);
757 outb(0x55, ioaddr->lbal_addr);
759 outb(0x55, ioaddr->nsect_addr);
760 outb(0xaa, ioaddr->lbal_addr);
762 nsect = inb(ioaddr->nsect_addr);
763 lbal = inb(ioaddr->lbal_addr);
765 if ((nsect == 0x55) && (lbal == 0xaa))
766 return 1; /* we found a device */
768 return 0; /* nothing found */
772 * ata_mmio_devchk - PATA device presence detection
773 * @ap: ATA channel to examine
774 * @device: Device to examine (starting at zero)
776 * This technique was originally described in
777 * Hale Landis's ATADRVR (www.ata-atapi.com), and
778 * later found its way into the ATA/ATAPI spec.
780 * Write a pattern to the ATA shadow registers,
781 * and if a device is present, it will respond by
782 * correctly storing and echoing back the
783 * ATA shadow register contents.
789 static unsigned int ata_mmio_devchk(struct ata_port *ap,
792 struct ata_ioports *ioaddr = &ap->ioaddr;
795 ap->ops->dev_select(ap, device);
797 writeb(0x55, (void __iomem *) ioaddr->nsect_addr);
798 writeb(0xaa, (void __iomem *) ioaddr->lbal_addr);
800 writeb(0xaa, (void __iomem *) ioaddr->nsect_addr);
801 writeb(0x55, (void __iomem *) ioaddr->lbal_addr);
803 writeb(0x55, (void __iomem *) ioaddr->nsect_addr);
804 writeb(0xaa, (void __iomem *) ioaddr->lbal_addr);
806 nsect = readb((void __iomem *) ioaddr->nsect_addr);
807 lbal = readb((void __iomem *) ioaddr->lbal_addr);
809 if ((nsect == 0x55) && (lbal == 0xaa))
810 return 1; /* we found a device */
812 return 0; /* nothing found */
816 * ata_devchk - PATA device presence detection
817 * @ap: ATA channel to examine
818 * @device: Device to examine (starting at zero)
820 * Dispatch ATA device presence detection, depending
821 * on whether we are using PIO or MMIO to talk to the
822 * ATA shadow registers.
828 static unsigned int ata_devchk(struct ata_port *ap,
831 if (ap->flags & ATA_FLAG_MMIO)
832 return ata_mmio_devchk(ap, device);
833 return ata_pio_devchk(ap, device);
837 * ata_dev_classify - determine device type based on ATA-spec signature
838 * @tf: ATA taskfile register set for device to be identified
840 * Determine from taskfile register contents whether a device is
841 * ATA or ATAPI, as per "Signature and persistence" section
842 * of ATA/PI spec (volume 1, sect 5.14).
848 * Device type, %ATA_DEV_ATA, %ATA_DEV_ATAPI, or %ATA_DEV_UNKNOWN
849 * the event of failure.
852 unsigned int ata_dev_classify(const struct ata_taskfile *tf)
854 /* Apple's open source Darwin code hints that some devices only
855 * put a proper signature into the LBA mid/high registers,
856 * So, we only check those. It's sufficient for uniqueness.
859 if (((tf->lbam == 0) && (tf->lbah == 0)) ||
860 ((tf->lbam == 0x3c) && (tf->lbah == 0xc3))) {
861 DPRINTK("found ATA device by sig\n");
865 if (((tf->lbam == 0x14) && (tf->lbah == 0xeb)) ||
866 ((tf->lbam == 0x69) && (tf->lbah == 0x96))) {
867 DPRINTK("found ATAPI device by sig\n");
868 return ATA_DEV_ATAPI;
871 DPRINTK("unknown device\n");
872 return ATA_DEV_UNKNOWN;
876 * ata_dev_try_classify - Parse returned ATA device signature
877 * @ap: ATA channel to examine
878 * @device: Device to examine (starting at zero)
880 * After an event -- SRST, E.D.D., or SATA COMRESET -- occurs,
881 * an ATA/ATAPI-defined set of values is placed in the ATA
882 * shadow registers, indicating the results of device detection
885 * Select the ATA device, and read the values from the ATA shadow
886 * registers. Then parse according to the Error register value,
887 * and the spec-defined values examined by ata_dev_classify().
893 static u8 ata_dev_try_classify(struct ata_port *ap, unsigned int device)
895 struct ata_device *dev = &ap->device[device];
896 struct ata_taskfile tf;
900 ap->ops->dev_select(ap, device);
902 memset(&tf, 0, sizeof(tf));
904 err = ata_chk_err(ap);
905 ap->ops->tf_read(ap, &tf);
907 dev->class = ATA_DEV_NONE;
909 /* see if device passed diags */
912 else if ((device == 0) && (err == 0x81))
917 /* determine if device if ATA or ATAPI */
918 class = ata_dev_classify(&tf);
919 if (class == ATA_DEV_UNKNOWN)
921 if ((class == ATA_DEV_ATA) && (ata_chk_status(ap) == 0))
930 * ata_dev_id_string - Convert IDENTIFY DEVICE page into string
931 * @id: IDENTIFY DEVICE results we will examine
932 * @s: string into which data is output
933 * @ofs: offset into identify device page
934 * @len: length of string to return. must be an even number.
936 * The strings in the IDENTIFY DEVICE page are broken up into
937 * 16-bit chunks. Run through the string, and output each
938 * 8-bit chunk linearly, regardless of platform.
944 void ata_dev_id_string(const u16 *id, unsigned char *s,
945 unsigned int ofs, unsigned int len)
965 * ata_noop_dev_select - Select device 0/1 on ATA bus
966 * @ap: ATA channel to manipulate
967 * @device: ATA device (numbered from zero) to select
969 * This function performs no actual function.
971 * May be used as the dev_select() entry in ata_port_operations.
976 void ata_noop_dev_select (struct ata_port *ap, unsigned int device)
982 * ata_std_dev_select - Select device 0/1 on ATA bus
983 * @ap: ATA channel to manipulate
984 * @device: ATA device (numbered from zero) to select
986 * Use the method defined in the ATA specification to
987 * make either device 0, or device 1, active on the
988 * ATA channel. Works with both PIO and MMIO.
990 * May be used as the dev_select() entry in ata_port_operations.
996 void ata_std_dev_select (struct ata_port *ap, unsigned int device)
1001 tmp = ATA_DEVICE_OBS;
1003 tmp = ATA_DEVICE_OBS | ATA_DEV1;
1005 if (ap->flags & ATA_FLAG_MMIO) {
1006 writeb(tmp, (void __iomem *) ap->ioaddr.device_addr);
1008 outb(tmp, ap->ioaddr.device_addr);
1010 ata_pause(ap); /* needed; also flushes, for mmio */
1014 * ata_dev_select - Select device 0/1 on ATA bus
1015 * @ap: ATA channel to manipulate
1016 * @device: ATA device (numbered from zero) to select
1017 * @wait: non-zero to wait for Status register BSY bit to clear
1018 * @can_sleep: non-zero if context allows sleeping
1020 * Use the method defined in the ATA specification to
1021 * make either device 0, or device 1, active on the
1024 * This is a high-level version of ata_std_dev_select(),
1025 * which additionally provides the services of inserting
1026 * the proper pauses and status polling, where needed.
1032 void ata_dev_select(struct ata_port *ap, unsigned int device,
1033 unsigned int wait, unsigned int can_sleep)
1035 VPRINTK("ENTER, ata%u: device %u, wait %u\n",
1036 ap->id, device, wait);
1041 ap->ops->dev_select(ap, device);
1044 if (can_sleep && ap->device[device].class == ATA_DEV_ATAPI)
1051 * ata_dump_id - IDENTIFY DEVICE info debugging output
1052 * @dev: Device whose IDENTIFY DEVICE page we will dump
1054 * Dump selected 16-bit words from a detected device's
1055 * IDENTIFY PAGE page.
1061 static inline void ata_dump_id(const struct ata_device *dev)
1063 DPRINTK("49==0x%04x "
1073 DPRINTK("80==0x%04x "
1083 DPRINTK("88==0x%04x "
1090 * Compute the PIO modes available for this device. This is not as
1091 * trivial as it seems if we must consider early devices correctly.
1093 * FIXME: pre IDE drive timing (do we care ?).
1096 static unsigned int ata_pio_modes(const struct ata_device *adev)
1100 /* Usual case. Word 53 indicates word 88 is valid */
1101 if (adev->id[ATA_ID_FIELD_VALID] & (1 << 2)) {
1102 modes = adev->id[ATA_ID_PIO_MODES] & 0x03;
1108 /* If word 88 isn't valid then Word 51 holds the PIO timing number
1109 for the maximum. Turn it into a mask and return it */
1110 modes = (2 << (adev->id[ATA_ID_OLD_PIO_MODES] & 0xFF)) - 1 ;
1115 * ata_dev_identify - obtain IDENTIFY x DEVICE page
1116 * @ap: port on which device we wish to probe resides
1117 * @device: device bus address, starting at zero
1119 * Following bus reset, we issue the IDENTIFY [PACKET] DEVICE
1120 * command, and read back the 512-byte device information page.
1121 * The device information page is fed to us via the standard
1122 * PIO-IN protocol, but we hand-code it here. (TODO: investigate
1123 * using standard PIO-IN paths)
1125 * After reading the device information page, we use several
1126 * bits of information from it to initialize data structures
1127 * that will be used during the lifetime of the ata_device.
1128 * Other data from the info page is used to disqualify certain
1129 * older ATA devices we do not wish to support.
1132 * Inherited from caller. Some functions called by this function
1133 * obtain the host_set lock.
1136 static void ata_dev_identify(struct ata_port *ap, unsigned int device)
1138 struct ata_device *dev = &ap->device[device];
1139 unsigned int major_version;
1141 unsigned long xfer_modes;
1143 unsigned int using_edd;
1144 DECLARE_COMPLETION(wait);
1145 struct ata_queued_cmd *qc;
1146 unsigned long flags;
1149 if (!ata_dev_present(dev)) {
1150 DPRINTK("ENTER/EXIT (host %u, dev %u) -- nodev\n",
1155 if (ap->flags & (ATA_FLAG_SRST | ATA_FLAG_SATA_RESET))
1160 DPRINTK("ENTER, host %u, dev %u\n", ap->id, device);
1162 assert (dev->class == ATA_DEV_ATA || dev->class == ATA_DEV_ATAPI ||
1163 dev->class == ATA_DEV_NONE);
1165 ata_dev_select(ap, device, 1, 1); /* select device 0/1 */
1167 qc = ata_qc_new_init(ap, dev);
1170 ata_sg_init_one(qc, dev->id, sizeof(dev->id));
1171 qc->dma_dir = DMA_FROM_DEVICE;
1172 qc->tf.protocol = ATA_PROT_PIO;
1176 if (dev->class == ATA_DEV_ATA) {
1177 qc->tf.command = ATA_CMD_ID_ATA;
1178 DPRINTK("do ATA identify\n");
1180 qc->tf.command = ATA_CMD_ID_ATAPI;
1181 DPRINTK("do ATAPI identify\n");
1184 qc->waiting = &wait;
1185 qc->complete_fn = ata_qc_complete_noop;
1187 spin_lock_irqsave(&ap->host_set->lock, flags);
1188 rc = ata_qc_issue(qc);
1189 spin_unlock_irqrestore(&ap->host_set->lock, flags);
1194 wait_for_completion(&wait);
1196 status = ata_chk_status(ap);
1197 if (status & ATA_ERR) {
1199 * arg! EDD works for all test cases, but seems to return
1200 * the ATA signature for some ATAPI devices. Until the
1201 * reason for this is found and fixed, we fix up the mess
1202 * here. If IDENTIFY DEVICE returns command aborted
1203 * (as ATAPI devices do), then we issue an
1204 * IDENTIFY PACKET DEVICE.
1206 * ATA software reset (SRST, the default) does not appear
1207 * to have this problem.
1209 if ((using_edd) && (qc->tf.command == ATA_CMD_ID_ATA)) {
1210 u8 err = ata_chk_err(ap);
1211 if (err & ATA_ABORTED) {
1212 dev->class = ATA_DEV_ATAPI;
1223 swap_buf_le16(dev->id, ATA_ID_WORDS);
1225 /* print device capabilities */
1226 printk(KERN_DEBUG "ata%u: dev %u cfg "
1227 "49:%04x 82:%04x 83:%04x 84:%04x 85:%04x 86:%04x 87:%04x 88:%04x\n",
1228 ap->id, device, dev->id[49],
1229 dev->id[82], dev->id[83], dev->id[84],
1230 dev->id[85], dev->id[86], dev->id[87],
1234 * common ATA, ATAPI feature tests
1237 /* we require DMA support (bits 8 of word 49) */
1238 if (!ata_id_has_dma(dev->id)) {
1239 printk(KERN_DEBUG "ata%u: no dma\n", ap->id);
1243 /* quick-n-dirty find max transfer mode; for printk only */
1244 xfer_modes = dev->id[ATA_ID_UDMA_MODES];
1246 xfer_modes = (dev->id[ATA_ID_MWDMA_MODES]) << ATA_SHIFT_MWDMA;
1248 xfer_modes = ata_pio_modes(dev);
1252 /* ATA-specific feature tests */
1253 if (dev->class == ATA_DEV_ATA) {
1254 if (!ata_id_is_ata(dev->id)) /* sanity check */
1257 /* get major version */
1258 tmp = dev->id[ATA_ID_MAJOR_VER];
1259 for (major_version = 14; major_version >= 1; major_version--)
1260 if (tmp & (1 << major_version))
1264 * The exact sequence expected by certain pre-ATA4 drives is:
1267 * INITIALIZE DEVICE PARAMETERS
1269 * Some drives were very specific about that exact sequence.
1271 if (major_version < 4 || (!ata_id_has_lba(dev->id))) {
1272 ata_dev_init_params(ap, dev);
1274 /* current CHS translation info (id[53-58]) might be
1275 * changed. reread the identify device info.
1277 ata_dev_reread_id(ap, dev);
1280 if (ata_id_has_lba(dev->id)) {
1281 dev->flags |= ATA_DFLAG_LBA;
1283 if (ata_id_has_lba48(dev->id)) {
1284 dev->flags |= ATA_DFLAG_LBA48;
1285 dev->n_sectors = ata_id_u64(dev->id, 100);
1287 dev->n_sectors = ata_id_u32(dev->id, 60);
1290 /* print device info to dmesg */
1291 printk(KERN_INFO "ata%u: dev %u ATA-%d, max %s, %Lu sectors:%s\n",
1294 ata_mode_string(xfer_modes),
1295 (unsigned long long)dev->n_sectors,
1296 dev->flags & ATA_DFLAG_LBA48 ? " LBA48" : " LBA");
1300 /* Default translation */
1301 dev->cylinders = dev->id[1];
1302 dev->heads = dev->id[3];
1303 dev->sectors = dev->id[6];
1304 dev->n_sectors = dev->cylinders * dev->heads * dev->sectors;
1306 if (ata_id_current_chs_valid(dev->id)) {
1307 /* Current CHS translation is valid. */
1308 dev->cylinders = dev->id[54];
1309 dev->heads = dev->id[55];
1310 dev->sectors = dev->id[56];
1312 dev->n_sectors = ata_id_u32(dev->id, 57);
1315 /* print device info to dmesg */
1316 printk(KERN_INFO "ata%u: dev %u ATA-%d, max %s, %Lu sectors: CHS %d/%d/%d\n",
1319 ata_mode_string(xfer_modes),
1320 (unsigned long long)dev->n_sectors,
1321 (int)dev->cylinders, (int)dev->heads, (int)dev->sectors);
1325 ap->host->max_cmd_len = 16;
1328 /* ATAPI-specific feature tests */
1330 if (ata_id_is_ata(dev->id)) /* sanity check */
1333 rc = atapi_cdb_len(dev->id);
1334 if ((rc < 12) || (rc > ATAPI_CDB_LEN)) {
1335 printk(KERN_WARNING "ata%u: unsupported CDB len\n", ap->id);
1338 ap->cdb_len = (unsigned int) rc;
1339 ap->host->max_cmd_len = (unsigned char) ap->cdb_len;
1341 /* print device info to dmesg */
1342 printk(KERN_INFO "ata%u: dev %u ATAPI, max %s\n",
1344 ata_mode_string(xfer_modes));
1347 DPRINTK("EXIT, drv_stat = 0x%x\n", ata_chk_status(ap));
1351 printk(KERN_WARNING "ata%u: dev %u not supported, ignoring\n",
1354 dev->class++; /* converts ATA_DEV_xxx into ATA_DEV_xxx_UNSUP */
1355 DPRINTK("EXIT, err\n");
1359 static inline u8 ata_dev_knobble(const struct ata_port *ap)
1361 return ((ap->cbl == ATA_CBL_SATA) && (!ata_id_is_sata(ap->device->id)));
1365 * ata_dev_config - Run device specific handlers and check for
1366 * SATA->PATA bridges
1373 void ata_dev_config(struct ata_port *ap, unsigned int i)
1375 /* limit bridge transfers to udma5, 200 sectors */
1376 if (ata_dev_knobble(ap)) {
1377 printk(KERN_INFO "ata%u(%u): applying bridge limits\n",
1378 ap->id, ap->device->devno);
1379 ap->udma_mask &= ATA_UDMA5;
1380 ap->host->max_sectors = ATA_MAX_SECTORS;
1381 ap->host->hostt->max_sectors = ATA_MAX_SECTORS;
1382 ap->device->flags |= ATA_DFLAG_LOCK_SECTORS;
1385 if (ap->ops->dev_config)
1386 ap->ops->dev_config(ap, &ap->device[i]);
1390 * ata_bus_probe - Reset and probe ATA bus
1393 * Master ATA bus probing function. Initiates a hardware-dependent
1394 * bus reset, then attempts to identify any devices found on
1398 * PCI/etc. bus probe sem.
1401 * Zero on success, non-zero on error.
1404 static int ata_bus_probe(struct ata_port *ap)
1406 unsigned int i, found = 0;
1408 ap->ops->phy_reset(ap);
1409 if (ap->flags & ATA_FLAG_PORT_DISABLED)
1412 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1413 ata_dev_identify(ap, i);
1414 if (ata_dev_present(&ap->device[i])) {
1416 ata_dev_config(ap,i);
1420 if ((!found) || (ap->flags & ATA_FLAG_PORT_DISABLED))
1421 goto err_out_disable;
1424 if (ap->flags & ATA_FLAG_PORT_DISABLED)
1425 goto err_out_disable;
1430 ap->ops->port_disable(ap);
1436 * ata_port_probe - Mark port as enabled
1437 * @ap: Port for which we indicate enablement
1439 * Modify @ap data structure such that the system
1440 * thinks that the entire port is enabled.
1442 * LOCKING: host_set lock, or some other form of
1446 void ata_port_probe(struct ata_port *ap)
1448 ap->flags &= ~ATA_FLAG_PORT_DISABLED;
1452 * __sata_phy_reset - Wake/reset a low-level SATA PHY
1453 * @ap: SATA port associated with target SATA PHY.
1455 * This function issues commands to standard SATA Sxxx
1456 * PHY registers, to wake up the phy (and device), and
1457 * clear any reset condition.
1460 * PCI/etc. bus probe sem.
1463 void __sata_phy_reset(struct ata_port *ap)
1466 unsigned long timeout = jiffies + (HZ * 5);
1468 if (ap->flags & ATA_FLAG_SATA_RESET) {
1469 /* issue phy wake/reset */
1470 scr_write_flush(ap, SCR_CONTROL, 0x301);
1471 /* Couldn't find anything in SATA I/II specs, but
1472 * AHCI-1.1 10.4.2 says at least 1 ms. */
1475 scr_write_flush(ap, SCR_CONTROL, 0x300); /* phy wake/clear reset */
1477 /* wait for phy to become ready, if necessary */
1480 sstatus = scr_read(ap, SCR_STATUS);
1481 if ((sstatus & 0xf) != 1)
1483 } while (time_before(jiffies, timeout));
1485 /* TODO: phy layer with polling, timeouts, etc. */
1486 if (sata_dev_present(ap))
1489 sstatus = scr_read(ap, SCR_STATUS);
1490 printk(KERN_INFO "ata%u: no device found (phy stat %08x)\n",
1492 ata_port_disable(ap);
1495 if (ap->flags & ATA_FLAG_PORT_DISABLED)
1498 if (ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT)) {
1499 ata_port_disable(ap);
1503 ap->cbl = ATA_CBL_SATA;
1507 * sata_phy_reset - Reset SATA bus.
1508 * @ap: SATA port associated with target SATA PHY.
1510 * This function resets the SATA bus, and then probes
1511 * the bus for devices.
1514 * PCI/etc. bus probe sem.
1517 void sata_phy_reset(struct ata_port *ap)
1519 __sata_phy_reset(ap);
1520 if (ap->flags & ATA_FLAG_PORT_DISABLED)
1526 * ata_port_disable - Disable port.
1527 * @ap: Port to be disabled.
1529 * Modify @ap data structure such that the system
1530 * thinks that the entire port is disabled, and should
1531 * never attempt to probe or communicate with devices
1534 * LOCKING: host_set lock, or some other form of
1538 void ata_port_disable(struct ata_port *ap)
1540 ap->device[0].class = ATA_DEV_NONE;
1541 ap->device[1].class = ATA_DEV_NONE;
1542 ap->flags |= ATA_FLAG_PORT_DISABLED;
1546 * This mode timing computation functionality is ported over from
1547 * drivers/ide/ide-timing.h and was originally written by Vojtech Pavlik
1550 * PIO 0-5, MWDMA 0-2 and UDMA 0-6 timings (in nanoseconds).
1551 * These were taken from ATA/ATAPI-6 standard, rev 0a, except
1552 * for PIO 5, which is a nonstandard extension and UDMA6, which
1553 * is currently supported only by Maxtor drives.
1556 static const struct ata_timing ata_timing[] = {
1558 { XFER_UDMA_6, 0, 0, 0, 0, 0, 0, 0, 15 },
1559 { XFER_UDMA_5, 0, 0, 0, 0, 0, 0, 0, 20 },
1560 { XFER_UDMA_4, 0, 0, 0, 0, 0, 0, 0, 30 },
1561 { XFER_UDMA_3, 0, 0, 0, 0, 0, 0, 0, 45 },
1563 { XFER_UDMA_2, 0, 0, 0, 0, 0, 0, 0, 60 },
1564 { XFER_UDMA_1, 0, 0, 0, 0, 0, 0, 0, 80 },
1565 { XFER_UDMA_0, 0, 0, 0, 0, 0, 0, 0, 120 },
1567 /* { XFER_UDMA_SLOW, 0, 0, 0, 0, 0, 0, 0, 150 }, */
1569 { XFER_MW_DMA_2, 25, 0, 0, 0, 70, 25, 120, 0 },
1570 { XFER_MW_DMA_1, 45, 0, 0, 0, 80, 50, 150, 0 },
1571 { XFER_MW_DMA_0, 60, 0, 0, 0, 215, 215, 480, 0 },
1573 { XFER_SW_DMA_2, 60, 0, 0, 0, 120, 120, 240, 0 },
1574 { XFER_SW_DMA_1, 90, 0, 0, 0, 240, 240, 480, 0 },
1575 { XFER_SW_DMA_0, 120, 0, 0, 0, 480, 480, 960, 0 },
1577 /* { XFER_PIO_5, 20, 50, 30, 100, 50, 30, 100, 0 }, */
1578 { XFER_PIO_4, 25, 70, 25, 120, 70, 25, 120, 0 },
1579 { XFER_PIO_3, 30, 80, 70, 180, 80, 70, 180, 0 },
1581 { XFER_PIO_2, 30, 290, 40, 330, 100, 90, 240, 0 },
1582 { XFER_PIO_1, 50, 290, 93, 383, 125, 100, 383, 0 },
1583 { XFER_PIO_0, 70, 290, 240, 600, 165, 150, 600, 0 },
1585 /* { XFER_PIO_SLOW, 120, 290, 240, 960, 290, 240, 960, 0 }, */
1590 #define ENOUGH(v,unit) (((v)-1)/(unit)+1)
1591 #define EZ(v,unit) ((v)?ENOUGH(v,unit):0)
1593 static void ata_timing_quantize(const struct ata_timing *t, struct ata_timing *q, int T, int UT)
1595 q->setup = EZ(t->setup * 1000, T);
1596 q->act8b = EZ(t->act8b * 1000, T);
1597 q->rec8b = EZ(t->rec8b * 1000, T);
1598 q->cyc8b = EZ(t->cyc8b * 1000, T);
1599 q->active = EZ(t->active * 1000, T);
1600 q->recover = EZ(t->recover * 1000, T);
1601 q->cycle = EZ(t->cycle * 1000, T);
1602 q->udma = EZ(t->udma * 1000, UT);
1605 void ata_timing_merge(const struct ata_timing *a, const struct ata_timing *b,
1606 struct ata_timing *m, unsigned int what)
1608 if (what & ATA_TIMING_SETUP ) m->setup = max(a->setup, b->setup);
1609 if (what & ATA_TIMING_ACT8B ) m->act8b = max(a->act8b, b->act8b);
1610 if (what & ATA_TIMING_REC8B ) m->rec8b = max(a->rec8b, b->rec8b);
1611 if (what & ATA_TIMING_CYC8B ) m->cyc8b = max(a->cyc8b, b->cyc8b);
1612 if (what & ATA_TIMING_ACTIVE ) m->active = max(a->active, b->active);
1613 if (what & ATA_TIMING_RECOVER) m->recover = max(a->recover, b->recover);
1614 if (what & ATA_TIMING_CYCLE ) m->cycle = max(a->cycle, b->cycle);
1615 if (what & ATA_TIMING_UDMA ) m->udma = max(a->udma, b->udma);
1618 static const struct ata_timing* ata_timing_find_mode(unsigned short speed)
1620 const struct ata_timing *t;
1622 for (t = ata_timing; t->mode != speed; t++)
1623 if (t->mode == 0xFF)
1628 int ata_timing_compute(struct ata_device *adev, unsigned short speed,
1629 struct ata_timing *t, int T, int UT)
1631 const struct ata_timing *s;
1632 struct ata_timing p;
1638 if (!(s = ata_timing_find_mode(speed)))
1642 * If the drive is an EIDE drive, it can tell us it needs extended
1643 * PIO/MW_DMA cycle timing.
1646 if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE drive */
1647 memset(&p, 0, sizeof(p));
1648 if(speed >= XFER_PIO_0 && speed <= XFER_SW_DMA_0) {
1649 if (speed <= XFER_PIO_2) p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO];
1650 else p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO_IORDY];
1651 } else if(speed >= XFER_MW_DMA_0 && speed <= XFER_MW_DMA_2) {
1652 p.cycle = adev->id[ATA_ID_EIDE_DMA_MIN];
1654 ata_timing_merge(&p, t, t, ATA_TIMING_CYCLE | ATA_TIMING_CYC8B);
1658 * Convert the timing to bus clock counts.
1661 ata_timing_quantize(s, t, T, UT);
1664 * Even in DMA/UDMA modes we still use PIO access for IDENTIFY, S.M.A.R.T
1665 * and some other commands. We have to ensure that the DMA cycle timing is
1666 * slower/equal than the fastest PIO timing.
1669 if (speed > XFER_PIO_4) {
1670 ata_timing_compute(adev, adev->pio_mode, &p, T, UT);
1671 ata_timing_merge(&p, t, t, ATA_TIMING_ALL);
1675 * Lenghten active & recovery time so that cycle time is correct.
1678 if (t->act8b + t->rec8b < t->cyc8b) {
1679 t->act8b += (t->cyc8b - (t->act8b + t->rec8b)) / 2;
1680 t->rec8b = t->cyc8b - t->act8b;
1683 if (t->active + t->recover < t->cycle) {
1684 t->active += (t->cycle - (t->active + t->recover)) / 2;
1685 t->recover = t->cycle - t->active;
1691 static const struct {
1694 } xfer_mode_classes[] = {
1695 { ATA_SHIFT_UDMA, XFER_UDMA_0 },
1696 { ATA_SHIFT_MWDMA, XFER_MW_DMA_0 },
1697 { ATA_SHIFT_PIO, XFER_PIO_0 },
1700 static inline u8 base_from_shift(unsigned int shift)
1704 for (i = 0; i < ARRAY_SIZE(xfer_mode_classes); i++)
1705 if (xfer_mode_classes[i].shift == shift)
1706 return xfer_mode_classes[i].base;
1711 static void ata_dev_set_mode(struct ata_port *ap, struct ata_device *dev)
1716 if (!ata_dev_present(dev) || (ap->flags & ATA_FLAG_PORT_DISABLED))
1719 if (dev->xfer_shift == ATA_SHIFT_PIO)
1720 dev->flags |= ATA_DFLAG_PIO;
1722 ata_dev_set_xfermode(ap, dev);
1724 base = base_from_shift(dev->xfer_shift);
1725 ofs = dev->xfer_mode - base;
1726 idx = ofs + dev->xfer_shift;
1727 WARN_ON(idx >= ARRAY_SIZE(xfer_mode_str));
1729 DPRINTK("idx=%d xfer_shift=%u, xfer_mode=0x%x, base=0x%x, offset=%d\n",
1730 idx, dev->xfer_shift, (int)dev->xfer_mode, (int)base, ofs);
1732 printk(KERN_INFO "ata%u: dev %u configured for %s\n",
1733 ap->id, dev->devno, xfer_mode_str[idx]);
1736 static int ata_host_set_pio(struct ata_port *ap)
1742 mask = ata_get_mode_mask(ap, ATA_SHIFT_PIO);
1745 printk(KERN_WARNING "ata%u: no PIO support\n", ap->id);
1749 base = base_from_shift(ATA_SHIFT_PIO);
1750 xfer_mode = base + x;
1752 DPRINTK("base 0x%x xfer_mode 0x%x mask 0x%x x %d\n",
1753 (int)base, (int)xfer_mode, mask, x);
1755 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1756 struct ata_device *dev = &ap->device[i];
1757 if (ata_dev_present(dev)) {
1758 dev->pio_mode = xfer_mode;
1759 dev->xfer_mode = xfer_mode;
1760 dev->xfer_shift = ATA_SHIFT_PIO;
1761 if (ap->ops->set_piomode)
1762 ap->ops->set_piomode(ap, dev);
1769 static void ata_host_set_dma(struct ata_port *ap, u8 xfer_mode,
1770 unsigned int xfer_shift)
1774 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1775 struct ata_device *dev = &ap->device[i];
1776 if (ata_dev_present(dev)) {
1777 dev->dma_mode = xfer_mode;
1778 dev->xfer_mode = xfer_mode;
1779 dev->xfer_shift = xfer_shift;
1780 if (ap->ops->set_dmamode)
1781 ap->ops->set_dmamode(ap, dev);
1787 * ata_set_mode - Program timings and issue SET FEATURES - XFER
1788 * @ap: port on which timings will be programmed
1790 * Set ATA device disk transfer mode (PIO3, UDMA6, etc.).
1793 * PCI/etc. bus probe sem.
1796 static void ata_set_mode(struct ata_port *ap)
1798 unsigned int xfer_shift;
1802 /* step 1: always set host PIO timings */
1803 rc = ata_host_set_pio(ap);
1807 /* step 2: choose the best data xfer mode */
1808 xfer_mode = xfer_shift = 0;
1809 rc = ata_choose_xfer_mode(ap, &xfer_mode, &xfer_shift);
1813 /* step 3: if that xfer mode isn't PIO, set host DMA timings */
1814 if (xfer_shift != ATA_SHIFT_PIO)
1815 ata_host_set_dma(ap, xfer_mode, xfer_shift);
1817 /* step 4: update devices' xfer mode */
1818 ata_dev_set_mode(ap, &ap->device[0]);
1819 ata_dev_set_mode(ap, &ap->device[1]);
1821 if (ap->flags & ATA_FLAG_PORT_DISABLED)
1824 if (ap->ops->post_set_mode)
1825 ap->ops->post_set_mode(ap);
1830 ata_port_disable(ap);
1834 * ata_busy_sleep - sleep until BSY clears, or timeout
1835 * @ap: port containing status register to be polled
1836 * @tmout_pat: impatience timeout
1837 * @tmout: overall timeout
1839 * Sleep until ATA Status register bit BSY clears,
1840 * or a timeout occurs.
1846 static unsigned int ata_busy_sleep (struct ata_port *ap,
1847 unsigned long tmout_pat,
1848 unsigned long tmout)
1850 unsigned long timer_start, timeout;
1853 status = ata_busy_wait(ap, ATA_BUSY, 300);
1854 timer_start = jiffies;
1855 timeout = timer_start + tmout_pat;
1856 while ((status & ATA_BUSY) && (time_before(jiffies, timeout))) {
1858 status = ata_busy_wait(ap, ATA_BUSY, 3);
1861 if (status & ATA_BUSY)
1862 printk(KERN_WARNING "ata%u is slow to respond, "
1863 "please be patient\n", ap->id);
1865 timeout = timer_start + tmout;
1866 while ((status & ATA_BUSY) && (time_before(jiffies, timeout))) {
1868 status = ata_chk_status(ap);
1871 if (status & ATA_BUSY) {
1872 printk(KERN_ERR "ata%u failed to respond (%lu secs)\n",
1873 ap->id, tmout / HZ);
1880 static void ata_bus_post_reset(struct ata_port *ap, unsigned int devmask)
1882 struct ata_ioports *ioaddr = &ap->ioaddr;
1883 unsigned int dev0 = devmask & (1 << 0);
1884 unsigned int dev1 = devmask & (1 << 1);
1885 unsigned long timeout;
1887 /* if device 0 was found in ata_devchk, wait for its
1891 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
1893 /* if device 1 was found in ata_devchk, wait for
1894 * register access, then wait for BSY to clear
1896 timeout = jiffies + ATA_TMOUT_BOOT;
1900 ap->ops->dev_select(ap, 1);
1901 if (ap->flags & ATA_FLAG_MMIO) {
1902 nsect = readb((void __iomem *) ioaddr->nsect_addr);
1903 lbal = readb((void __iomem *) ioaddr->lbal_addr);
1905 nsect = inb(ioaddr->nsect_addr);
1906 lbal = inb(ioaddr->lbal_addr);
1908 if ((nsect == 1) && (lbal == 1))
1910 if (time_after(jiffies, timeout)) {
1914 msleep(50); /* give drive a breather */
1917 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
1919 /* is all this really necessary? */
1920 ap->ops->dev_select(ap, 0);
1922 ap->ops->dev_select(ap, 1);
1924 ap->ops->dev_select(ap, 0);
1928 * ata_bus_edd - Issue EXECUTE DEVICE DIAGNOSTIC command.
1929 * @ap: Port to reset and probe
1931 * Use the EXECUTE DEVICE DIAGNOSTIC command to reset and
1932 * probe the bus. Not often used these days.
1935 * PCI/etc. bus probe sem.
1939 static unsigned int ata_bus_edd(struct ata_port *ap)
1941 struct ata_taskfile tf;
1943 /* set up execute-device-diag (bus reset) taskfile */
1944 /* also, take interrupts to a known state (disabled) */
1945 DPRINTK("execute-device-diag\n");
1946 ata_tf_init(ap, &tf, 0);
1948 tf.command = ATA_CMD_EDD;
1949 tf.protocol = ATA_PROT_NODATA;
1952 ata_tf_to_host(ap, &tf);
1954 /* spec says at least 2ms. but who knows with those
1955 * crazy ATAPI devices...
1959 return ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
1962 static unsigned int ata_bus_softreset(struct ata_port *ap,
1963 unsigned int devmask)
1965 struct ata_ioports *ioaddr = &ap->ioaddr;
1967 DPRINTK("ata%u: bus reset via SRST\n", ap->id);
1969 /* software reset. causes dev0 to be selected */
1970 if (ap->flags & ATA_FLAG_MMIO) {
1971 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
1972 udelay(20); /* FIXME: flush */
1973 writeb(ap->ctl | ATA_SRST, (void __iomem *) ioaddr->ctl_addr);
1974 udelay(20); /* FIXME: flush */
1975 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
1977 outb(ap->ctl, ioaddr->ctl_addr);
1979 outb(ap->ctl | ATA_SRST, ioaddr->ctl_addr);
1981 outb(ap->ctl, ioaddr->ctl_addr);
1984 /* spec mandates ">= 2ms" before checking status.
1985 * We wait 150ms, because that was the magic delay used for
1986 * ATAPI devices in Hale Landis's ATADRVR, for the period of time
1987 * between when the ATA command register is written, and then
1988 * status is checked. Because waiting for "a while" before
1989 * checking status is fine, post SRST, we perform this magic
1990 * delay here as well.
1994 ata_bus_post_reset(ap, devmask);
2000 * ata_bus_reset - reset host port and associated ATA channel
2001 * @ap: port to reset
2003 * This is typically the first time we actually start issuing
2004 * commands to the ATA channel. We wait for BSY to clear, then
2005 * issue EXECUTE DEVICE DIAGNOSTIC command, polling for its
2006 * result. Determine what devices, if any, are on the channel
2007 * by looking at the device 0/1 error register. Look at the signature
2008 * stored in each device's taskfile registers, to determine if
2009 * the device is ATA or ATAPI.
2012 * PCI/etc. bus probe sem.
2013 * Obtains host_set lock.
2016 * Sets ATA_FLAG_PORT_DISABLED if bus reset fails.
2019 void ata_bus_reset(struct ata_port *ap)
2021 struct ata_ioports *ioaddr = &ap->ioaddr;
2022 unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS;
2024 unsigned int dev0, dev1 = 0, rc = 0, devmask = 0;
2026 DPRINTK("ENTER, host %u, port %u\n", ap->id, ap->port_no);
2028 /* determine if device 0/1 are present */
2029 if (ap->flags & ATA_FLAG_SATA_RESET)
2032 dev0 = ata_devchk(ap, 0);
2034 dev1 = ata_devchk(ap, 1);
2038 devmask |= (1 << 0);
2040 devmask |= (1 << 1);
2042 /* select device 0 again */
2043 ap->ops->dev_select(ap, 0);
2045 /* issue bus reset */
2046 if (ap->flags & ATA_FLAG_SRST)
2047 rc = ata_bus_softreset(ap, devmask);
2048 else if ((ap->flags & ATA_FLAG_SATA_RESET) == 0) {
2049 /* set up device control */
2050 if (ap->flags & ATA_FLAG_MMIO)
2051 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
2053 outb(ap->ctl, ioaddr->ctl_addr);
2054 rc = ata_bus_edd(ap);
2061 * determine by signature whether we have ATA or ATAPI devices
2063 err = ata_dev_try_classify(ap, 0);
2064 if ((slave_possible) && (err != 0x81))
2065 ata_dev_try_classify(ap, 1);
2067 /* re-enable interrupts */
2068 if (ap->ioaddr.ctl_addr) /* FIXME: hack. create a hook instead */
2071 /* is double-select really necessary? */
2072 if (ap->device[1].class != ATA_DEV_NONE)
2073 ap->ops->dev_select(ap, 1);
2074 if (ap->device[0].class != ATA_DEV_NONE)
2075 ap->ops->dev_select(ap, 0);
2077 /* if no devices were detected, disable this port */
2078 if ((ap->device[0].class == ATA_DEV_NONE) &&
2079 (ap->device[1].class == ATA_DEV_NONE))
2082 if (ap->flags & (ATA_FLAG_SATA_RESET | ATA_FLAG_SRST)) {
2083 /* set up device control for ATA_FLAG_SATA_RESET */
2084 if (ap->flags & ATA_FLAG_MMIO)
2085 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
2087 outb(ap->ctl, ioaddr->ctl_addr);
2094 printk(KERN_ERR "ata%u: disabling port\n", ap->id);
2095 ap->ops->port_disable(ap);
2100 static void ata_pr_blacklisted(const struct ata_port *ap,
2101 const struct ata_device *dev)
2103 printk(KERN_WARNING "ata%u: dev %u is on DMA blacklist, disabling DMA\n",
2104 ap->id, dev->devno);
2107 static const char * ata_dma_blacklist [] = {
2126 "Toshiba CD-ROM XM-6202B",
2127 "TOSHIBA CD-ROM XM-1702BC",
2129 "E-IDE CD-ROM CR-840",
2132 "SAMSUNG CD-ROM SC-148C",
2133 "SAMSUNG CD-ROM SC",
2135 "ATAPI CD-ROM DRIVE 40X MAXIMUM",
2139 static int ata_dma_blacklisted(const struct ata_device *dev)
2141 unsigned char model_num[40];
2146 ata_dev_id_string(dev->id, model_num, ATA_ID_PROD_OFS,
2149 len = strnlen(s, sizeof(model_num));
2151 /* ATAPI specifies that empty space is blank-filled; remove blanks */
2152 while ((len > 0) && (s[len - 1] == ' ')) {
2157 for (i = 0; i < ARRAY_SIZE(ata_dma_blacklist); i++)
2158 if (!strncmp(ata_dma_blacklist[i], s, len))
2164 static unsigned int ata_get_mode_mask(const struct ata_port *ap, int shift)
2166 const struct ata_device *master, *slave;
2169 master = &ap->device[0];
2170 slave = &ap->device[1];
2172 assert (ata_dev_present(master) || ata_dev_present(slave));
2174 if (shift == ATA_SHIFT_UDMA) {
2175 mask = ap->udma_mask;
2176 if (ata_dev_present(master)) {
2177 mask &= (master->id[ATA_ID_UDMA_MODES] & 0xff);
2178 if (ata_dma_blacklisted(master)) {
2180 ata_pr_blacklisted(ap, master);
2183 if (ata_dev_present(slave)) {
2184 mask &= (slave->id[ATA_ID_UDMA_MODES] & 0xff);
2185 if (ata_dma_blacklisted(slave)) {
2187 ata_pr_blacklisted(ap, slave);
2191 else if (shift == ATA_SHIFT_MWDMA) {
2192 mask = ap->mwdma_mask;
2193 if (ata_dev_present(master)) {
2194 mask &= (master->id[ATA_ID_MWDMA_MODES] & 0x07);
2195 if (ata_dma_blacklisted(master)) {
2197 ata_pr_blacklisted(ap, master);
2200 if (ata_dev_present(slave)) {
2201 mask &= (slave->id[ATA_ID_MWDMA_MODES] & 0x07);
2202 if (ata_dma_blacklisted(slave)) {
2204 ata_pr_blacklisted(ap, slave);
2208 else if (shift == ATA_SHIFT_PIO) {
2209 mask = ap->pio_mask;
2210 if (ata_dev_present(master)) {
2211 /* spec doesn't return explicit support for
2212 * PIO0-2, so we fake it
2214 u16 tmp_mode = master->id[ATA_ID_PIO_MODES] & 0x03;
2219 if (ata_dev_present(slave)) {
2220 /* spec doesn't return explicit support for
2221 * PIO0-2, so we fake it
2223 u16 tmp_mode = slave->id[ATA_ID_PIO_MODES] & 0x03;
2230 mask = 0xffffffff; /* shut up compiler warning */
2237 /* find greatest bit */
2238 static int fgb(u32 bitmap)
2243 for (i = 0; i < 32; i++)
2244 if (bitmap & (1 << i))
2251 * ata_choose_xfer_mode - attempt to find best transfer mode
2252 * @ap: Port for which an xfer mode will be selected
2253 * @xfer_mode_out: (output) SET FEATURES - XFER MODE code
2254 * @xfer_shift_out: (output) bit shift that selects this mode
2256 * Based on host and device capabilities, determine the
2257 * maximum transfer mode that is amenable to all.
2260 * PCI/etc. bus probe sem.
2263 * Zero on success, negative on error.
2266 static int ata_choose_xfer_mode(const struct ata_port *ap,
2268 unsigned int *xfer_shift_out)
2270 unsigned int mask, shift;
2273 for (i = 0; i < ARRAY_SIZE(xfer_mode_classes); i++) {
2274 shift = xfer_mode_classes[i].shift;
2275 mask = ata_get_mode_mask(ap, shift);
2279 *xfer_mode_out = xfer_mode_classes[i].base + x;
2280 *xfer_shift_out = shift;
2289 * ata_dev_set_xfermode - Issue SET FEATURES - XFER MODE command
2290 * @ap: Port associated with device @dev
2291 * @dev: Device to which command will be sent
2293 * Issue SET FEATURES - XFER MODE command to device @dev
2297 * PCI/etc. bus probe sem.
2300 static void ata_dev_set_xfermode(struct ata_port *ap, struct ata_device *dev)
2302 DECLARE_COMPLETION(wait);
2303 struct ata_queued_cmd *qc;
2305 unsigned long flags;
2307 /* set up set-features taskfile */
2308 DPRINTK("set features - xfer mode\n");
2310 qc = ata_qc_new_init(ap, dev);
2313 qc->tf.command = ATA_CMD_SET_FEATURES;
2314 qc->tf.feature = SETFEATURES_XFER;
2315 qc->tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
2316 qc->tf.protocol = ATA_PROT_NODATA;
2317 qc->tf.nsect = dev->xfer_mode;
2319 qc->waiting = &wait;
2320 qc->complete_fn = ata_qc_complete_noop;
2322 spin_lock_irqsave(&ap->host_set->lock, flags);
2323 rc = ata_qc_issue(qc);
2324 spin_unlock_irqrestore(&ap->host_set->lock, flags);
2327 ata_port_disable(ap);
2329 wait_for_completion(&wait);
2335 * ata_dev_reread_id - Reread the device identify device info
2336 * @ap: port where the device is
2337 * @dev: device to reread the identify device info
2342 static void ata_dev_reread_id(struct ata_port *ap, struct ata_device *dev)
2344 DECLARE_COMPLETION(wait);
2345 struct ata_queued_cmd *qc;
2346 unsigned long flags;
2349 qc = ata_qc_new_init(ap, dev);
2352 ata_sg_init_one(qc, dev->id, sizeof(dev->id));
2353 qc->dma_dir = DMA_FROM_DEVICE;
2355 if (dev->class == ATA_DEV_ATA) {
2356 qc->tf.command = ATA_CMD_ID_ATA;
2357 DPRINTK("do ATA identify\n");
2359 qc->tf.command = ATA_CMD_ID_ATAPI;
2360 DPRINTK("do ATAPI identify\n");
2363 qc->tf.flags |= ATA_TFLAG_DEVICE;
2364 qc->tf.protocol = ATA_PROT_PIO;
2367 qc->waiting = &wait;
2368 qc->complete_fn = ata_qc_complete_noop;
2370 spin_lock_irqsave(&ap->host_set->lock, flags);
2371 rc = ata_qc_issue(qc);
2372 spin_unlock_irqrestore(&ap->host_set->lock, flags);
2377 wait_for_completion(&wait);
2379 swap_buf_le16(dev->id, ATA_ID_WORDS);
2387 ata_port_disable(ap);
2391 * ata_dev_init_params - Issue INIT DEV PARAMS command
2392 * @ap: Port associated with device @dev
2393 * @dev: Device to which command will be sent
2398 static void ata_dev_init_params(struct ata_port *ap, struct ata_device *dev)
2400 DECLARE_COMPLETION(wait);
2401 struct ata_queued_cmd *qc;
2403 unsigned long flags;
2404 u16 sectors = dev->id[6];
2405 u16 heads = dev->id[3];
2407 /* Number of sectors per track 1-255. Number of heads 1-16 */
2408 if (sectors < 1 || sectors > 255 || heads < 1 || heads > 16)
2411 /* set up init dev params taskfile */
2412 DPRINTK("init dev params \n");
2414 qc = ata_qc_new_init(ap, dev);
2417 qc->tf.command = ATA_CMD_INIT_DEV_PARAMS;
2418 qc->tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
2419 qc->tf.protocol = ATA_PROT_NODATA;
2420 qc->tf.nsect = sectors;
2421 qc->tf.device |= (heads - 1) & 0x0f; /* max head = num. of heads - 1 */
2423 qc->waiting = &wait;
2424 qc->complete_fn = ata_qc_complete_noop;
2426 spin_lock_irqsave(&ap->host_set->lock, flags);
2427 rc = ata_qc_issue(qc);
2428 spin_unlock_irqrestore(&ap->host_set->lock, flags);
2431 ata_port_disable(ap);
2433 wait_for_completion(&wait);
2439 * ata_sg_clean - Unmap DMA memory associated with command
2440 * @qc: Command containing DMA memory to be released
2442 * Unmap all mapped DMA memory associated with this command.
2445 * spin_lock_irqsave(host_set lock)
2448 static void ata_sg_clean(struct ata_queued_cmd *qc)
2450 struct ata_port *ap = qc->ap;
2451 struct scatterlist *sg = qc->__sg;
2452 int dir = qc->dma_dir;
2453 void *pad_buf = NULL;
2455 assert(qc->flags & ATA_QCFLAG_DMAMAP);
2458 if (qc->flags & ATA_QCFLAG_SINGLE)
2459 assert(qc->n_elem == 1);
2461 DPRINTK("unmapping %u sg elements\n", qc->n_elem);
2463 /* if we padded the buffer out to 32-bit bound, and data
2464 * xfer direction is from-device, we must copy from the
2465 * pad buffer back into the supplied buffer
2467 if (qc->pad_len && !(qc->tf.flags & ATA_TFLAG_WRITE))
2468 pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
2470 if (qc->flags & ATA_QCFLAG_SG) {
2471 dma_unmap_sg(ap->host_set->dev, sg, qc->n_elem, dir);
2472 /* restore last sg */
2473 sg[qc->orig_n_elem - 1].length += qc->pad_len;
2475 struct scatterlist *psg = &qc->pad_sgent;
2476 void *addr = kmap_atomic(psg->page, KM_IRQ0);
2477 memcpy(addr + psg->offset, pad_buf, qc->pad_len);
2478 kunmap_atomic(psg->page, KM_IRQ0);
2481 dma_unmap_single(ap->host_set->dev, sg_dma_address(&sg[0]),
2482 sg_dma_len(&sg[0]), dir);
2484 sg->length += qc->pad_len;
2486 memcpy(qc->buf_virt + sg->length - qc->pad_len,
2487 pad_buf, qc->pad_len);
2490 qc->flags &= ~ATA_QCFLAG_DMAMAP;
2495 * ata_fill_sg - Fill PCI IDE PRD table
2496 * @qc: Metadata associated with taskfile to be transferred
2498 * Fill PCI IDE PRD (scatter-gather) table with segments
2499 * associated with the current disk command.
2502 * spin_lock_irqsave(host_set lock)
2505 static void ata_fill_sg(struct ata_queued_cmd *qc)
2507 struct ata_port *ap = qc->ap;
2508 struct scatterlist *sg;
2511 assert(qc->__sg != NULL);
2512 assert(qc->n_elem > 0);
2515 ata_for_each_sg(sg, qc) {
2519 /* determine if physical DMA addr spans 64K boundary.
2520 * Note h/w doesn't support 64-bit, so we unconditionally
2521 * truncate dma_addr_t to u32.
2523 addr = (u32) sg_dma_address(sg);
2524 sg_len = sg_dma_len(sg);
2527 offset = addr & 0xffff;
2529 if ((offset + sg_len) > 0x10000)
2530 len = 0x10000 - offset;
2532 ap->prd[idx].addr = cpu_to_le32(addr);
2533 ap->prd[idx].flags_len = cpu_to_le32(len & 0xffff);
2534 VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", idx, addr, len);
2543 ap->prd[idx - 1].flags_len |= cpu_to_le32(ATA_PRD_EOT);
2546 * ata_check_atapi_dma - Check whether ATAPI DMA can be supported
2547 * @qc: Metadata associated with taskfile to check
2549 * Allow low-level driver to filter ATA PACKET commands, returning
2550 * a status indicating whether or not it is OK to use DMA for the
2551 * supplied PACKET command.
2554 * spin_lock_irqsave(host_set lock)
2556 * RETURNS: 0 when ATAPI DMA can be used
2559 int ata_check_atapi_dma(struct ata_queued_cmd *qc)
2561 struct ata_port *ap = qc->ap;
2562 int rc = 0; /* Assume ATAPI DMA is OK by default */
2564 if (ap->ops->check_atapi_dma)
2565 rc = ap->ops->check_atapi_dma(qc);
2570 * ata_qc_prep - Prepare taskfile for submission
2571 * @qc: Metadata associated with taskfile to be prepared
2573 * Prepare ATA taskfile for submission.
2576 * spin_lock_irqsave(host_set lock)
2578 void ata_qc_prep(struct ata_queued_cmd *qc)
2580 if (!(qc->flags & ATA_QCFLAG_DMAMAP))
2587 * ata_sg_init_one - Associate command with memory buffer
2588 * @qc: Command to be associated
2589 * @buf: Memory buffer
2590 * @buflen: Length of memory buffer, in bytes.
2592 * Initialize the data-related elements of queued_cmd @qc
2593 * to point to a single memory buffer, @buf of byte length @buflen.
2596 * spin_lock_irqsave(host_set lock)
2599 void ata_sg_init_one(struct ata_queued_cmd *qc, void *buf, unsigned int buflen)
2601 struct scatterlist *sg;
2603 qc->flags |= ATA_QCFLAG_SINGLE;
2605 memset(&qc->sgent, 0, sizeof(qc->sgent));
2606 qc->__sg = &qc->sgent;
2608 qc->orig_n_elem = 1;
2612 sg->page = virt_to_page(buf);
2613 sg->offset = (unsigned long) buf & ~PAGE_MASK;
2614 sg->length = buflen;
2618 * ata_sg_init - Associate command with scatter-gather table.
2619 * @qc: Command to be associated
2620 * @sg: Scatter-gather table.
2621 * @n_elem: Number of elements in s/g table.
2623 * Initialize the data-related elements of queued_cmd @qc
2624 * to point to a scatter-gather table @sg, containing @n_elem
2628 * spin_lock_irqsave(host_set lock)
2631 void ata_sg_init(struct ata_queued_cmd *qc, struct scatterlist *sg,
2632 unsigned int n_elem)
2634 qc->flags |= ATA_QCFLAG_SG;
2636 qc->n_elem = n_elem;
2637 qc->orig_n_elem = n_elem;
2641 * ata_sg_setup_one - DMA-map the memory buffer associated with a command.
2642 * @qc: Command with memory buffer to be mapped.
2644 * DMA-map the memory buffer associated with queued_cmd @qc.
2647 * spin_lock_irqsave(host_set lock)
2650 * Zero on success, negative on error.
2653 static int ata_sg_setup_one(struct ata_queued_cmd *qc)
2655 struct ata_port *ap = qc->ap;
2656 int dir = qc->dma_dir;
2657 struct scatterlist *sg = qc->__sg;
2658 dma_addr_t dma_address;
2660 /* we must lengthen transfers to end on a 32-bit boundary */
2661 qc->pad_len = sg->length & 3;
2663 void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
2664 struct scatterlist *psg = &qc->pad_sgent;
2666 assert(qc->dev->class == ATA_DEV_ATAPI);
2668 memset(pad_buf, 0, ATA_DMA_PAD_SZ);
2670 if (qc->tf.flags & ATA_TFLAG_WRITE)
2671 memcpy(pad_buf, qc->buf_virt + sg->length - qc->pad_len,
2674 sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ);
2675 sg_dma_len(psg) = ATA_DMA_PAD_SZ;
2677 sg->length -= qc->pad_len;
2679 DPRINTK("padding done, sg->length=%u pad_len=%u\n",
2680 sg->length, qc->pad_len);
2683 dma_address = dma_map_single(ap->host_set->dev, qc->buf_virt,
2685 if (dma_mapping_error(dma_address))
2688 sg_dma_address(sg) = dma_address;
2689 sg_dma_len(sg) = sg->length;
2691 DPRINTK("mapped buffer of %d bytes for %s\n", sg_dma_len(sg),
2692 qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
2698 * ata_sg_setup - DMA-map the scatter-gather table associated with a command.
2699 * @qc: Command with scatter-gather table to be mapped.
2701 * DMA-map the scatter-gather table associated with queued_cmd @qc.
2704 * spin_lock_irqsave(host_set lock)
2707 * Zero on success, negative on error.
2711 static int ata_sg_setup(struct ata_queued_cmd *qc)
2713 struct ata_port *ap = qc->ap;
2714 struct scatterlist *sg = qc->__sg;
2715 struct scatterlist *lsg = &sg[qc->n_elem - 1];
2718 VPRINTK("ENTER, ata%u\n", ap->id);
2719 assert(qc->flags & ATA_QCFLAG_SG);
2721 /* we must lengthen transfers to end on a 32-bit boundary */
2722 qc->pad_len = lsg->length & 3;
2724 void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
2725 struct scatterlist *psg = &qc->pad_sgent;
2726 unsigned int offset;
2728 assert(qc->dev->class == ATA_DEV_ATAPI);
2730 memset(pad_buf, 0, ATA_DMA_PAD_SZ);
2733 * psg->page/offset are used to copy to-be-written
2734 * data in this function or read data in ata_sg_clean.
2736 offset = lsg->offset + lsg->length - qc->pad_len;
2737 psg->page = nth_page(lsg->page, offset >> PAGE_SHIFT);
2738 psg->offset = offset_in_page(offset);
2740 if (qc->tf.flags & ATA_TFLAG_WRITE) {
2741 void *addr = kmap_atomic(psg->page, KM_IRQ0);
2742 memcpy(pad_buf, addr + psg->offset, qc->pad_len);
2743 kunmap_atomic(psg->page, KM_IRQ0);
2746 sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ);
2747 sg_dma_len(psg) = ATA_DMA_PAD_SZ;
2749 lsg->length -= qc->pad_len;
2751 DPRINTK("padding done, sg[%d].length=%u pad_len=%u\n",
2752 qc->n_elem - 1, lsg->length, qc->pad_len);
2756 n_elem = dma_map_sg(ap->host_set->dev, sg, qc->n_elem, dir);
2760 DPRINTK("%d sg elements mapped\n", n_elem);
2762 qc->n_elem = n_elem;
2768 * ata_poll_qc_complete - turn irq back on and finish qc
2769 * @qc: Command to complete
2770 * @drv_stat: ATA status register content
2773 * None. (grabs host lock)
2776 void ata_poll_qc_complete(struct ata_queued_cmd *qc, u8 drv_stat)
2778 struct ata_port *ap = qc->ap;
2779 unsigned long flags;
2781 spin_lock_irqsave(&ap->host_set->lock, flags);
2782 ap->flags &= ~ATA_FLAG_NOINTR;
2784 ata_qc_complete(qc, drv_stat);
2785 spin_unlock_irqrestore(&ap->host_set->lock, flags);
2790 * @ap: the target ata_port
2793 * None. (executing in kernel thread context)
2796 * timeout value to use
2799 static unsigned long ata_pio_poll(struct ata_port *ap)
2802 unsigned int poll_state = HSM_ST_UNKNOWN;
2803 unsigned int reg_state = HSM_ST_UNKNOWN;
2804 const unsigned int tmout_state = HSM_ST_TMOUT;
2806 switch (ap->hsm_task_state) {
2809 poll_state = HSM_ST_POLL;
2813 case HSM_ST_LAST_POLL:
2814 poll_state = HSM_ST_LAST_POLL;
2815 reg_state = HSM_ST_LAST;
2822 status = ata_chk_status(ap);
2823 if (status & ATA_BUSY) {
2824 if (time_after(jiffies, ap->pio_task_timeout)) {
2825 ap->hsm_task_state = tmout_state;
2828 ap->hsm_task_state = poll_state;
2829 return ATA_SHORT_PAUSE;
2832 ap->hsm_task_state = reg_state;
2837 * ata_pio_complete - check if drive is busy or idle
2838 * @ap: the target ata_port
2841 * None. (executing in kernel thread context)
2844 * Non-zero if qc completed, zero otherwise.
2847 static int ata_pio_complete (struct ata_port *ap)
2849 struct ata_queued_cmd *qc;
2853 * This is purely heuristic. This is a fast path. Sometimes when
2854 * we enter, BSY will be cleared in a chk-status or two. If not,
2855 * the drive is probably seeking or something. Snooze for a couple
2856 * msecs, then chk-status again. If still busy, fall back to
2857 * HSM_ST_POLL state.
2859 drv_stat = ata_busy_wait(ap, ATA_BUSY | ATA_DRQ, 10);
2860 if (drv_stat & (ATA_BUSY | ATA_DRQ)) {
2862 drv_stat = ata_busy_wait(ap, ATA_BUSY | ATA_DRQ, 10);
2863 if (drv_stat & (ATA_BUSY | ATA_DRQ)) {
2864 ap->hsm_task_state = HSM_ST_LAST_POLL;
2865 ap->pio_task_timeout = jiffies + ATA_TMOUT_PIO;
2870 drv_stat = ata_wait_idle(ap);
2871 if (!ata_ok(drv_stat)) {
2872 ap->hsm_task_state = HSM_ST_ERR;
2876 qc = ata_qc_from_tag(ap, ap->active_tag);
2879 ap->hsm_task_state = HSM_ST_IDLE;
2881 ata_poll_qc_complete(qc, drv_stat);
2883 /* another command may start at this point */
2890 * swap_buf_le16 - swap halves of 16-words in place
2891 * @buf: Buffer to swap
2892 * @buf_words: Number of 16-bit words in buffer.
2894 * Swap halves of 16-bit words if needed to convert from
2895 * little-endian byte order to native cpu byte order, or
2899 * Inherited from caller.
2901 void swap_buf_le16(u16 *buf, unsigned int buf_words)
2906 for (i = 0; i < buf_words; i++)
2907 buf[i] = le16_to_cpu(buf[i]);
2908 #endif /* __BIG_ENDIAN */
2912 * ata_mmio_data_xfer - Transfer data by MMIO
2913 * @ap: port to read/write
2915 * @buflen: buffer length
2916 * @write_data: read/write
2918 * Transfer data from/to the device data register by MMIO.
2921 * Inherited from caller.
2924 static void ata_mmio_data_xfer(struct ata_port *ap, unsigned char *buf,
2925 unsigned int buflen, int write_data)
2928 unsigned int words = buflen >> 1;
2929 u16 *buf16 = (u16 *) buf;
2930 void __iomem *mmio = (void __iomem *)ap->ioaddr.data_addr;
2932 /* Transfer multiple of 2 bytes */
2934 for (i = 0; i < words; i++)
2935 writew(le16_to_cpu(buf16[i]), mmio);
2937 for (i = 0; i < words; i++)
2938 buf16[i] = cpu_to_le16(readw(mmio));
2941 /* Transfer trailing 1 byte, if any. */
2942 if (unlikely(buflen & 0x01)) {
2943 u16 align_buf[1] = { 0 };
2944 unsigned char *trailing_buf = buf + buflen - 1;
2947 memcpy(align_buf, trailing_buf, 1);
2948 writew(le16_to_cpu(align_buf[0]), mmio);
2950 align_buf[0] = cpu_to_le16(readw(mmio));
2951 memcpy(trailing_buf, align_buf, 1);
2957 * ata_pio_data_xfer - Transfer data by PIO
2958 * @ap: port to read/write
2960 * @buflen: buffer length
2961 * @write_data: read/write
2963 * Transfer data from/to the device data register by PIO.
2966 * Inherited from caller.
2969 static void ata_pio_data_xfer(struct ata_port *ap, unsigned char *buf,
2970 unsigned int buflen, int write_data)
2972 unsigned int words = buflen >> 1;
2974 /* Transfer multiple of 2 bytes */
2976 outsw(ap->ioaddr.data_addr, buf, words);
2978 insw(ap->ioaddr.data_addr, buf, words);
2980 /* Transfer trailing 1 byte, if any. */
2981 if (unlikely(buflen & 0x01)) {
2982 u16 align_buf[1] = { 0 };
2983 unsigned char *trailing_buf = buf + buflen - 1;
2986 memcpy(align_buf, trailing_buf, 1);
2987 outw(le16_to_cpu(align_buf[0]), ap->ioaddr.data_addr);
2989 align_buf[0] = cpu_to_le16(inw(ap->ioaddr.data_addr));
2990 memcpy(trailing_buf, align_buf, 1);
2996 * ata_data_xfer - Transfer data from/to the data register.
2997 * @ap: port to read/write
2999 * @buflen: buffer length
3000 * @do_write: read/write
3002 * Transfer data from/to the device data register.
3005 * Inherited from caller.
3008 static void ata_data_xfer(struct ata_port *ap, unsigned char *buf,
3009 unsigned int buflen, int do_write)
3011 if (ap->flags & ATA_FLAG_MMIO)
3012 ata_mmio_data_xfer(ap, buf, buflen, do_write);
3014 ata_pio_data_xfer(ap, buf, buflen, do_write);
3018 * ata_pio_sector - Transfer ATA_SECT_SIZE (512 bytes) of data.
3019 * @qc: Command on going
3021 * Transfer ATA_SECT_SIZE of data from/to the ATA device.
3024 * Inherited from caller.
3027 static void ata_pio_sector(struct ata_queued_cmd *qc)
3029 int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
3030 struct scatterlist *sg = qc->__sg;
3031 struct ata_port *ap = qc->ap;
3033 unsigned int offset;
3036 if (qc->cursect == (qc->nsect - 1))
3037 ap->hsm_task_state = HSM_ST_LAST;
3039 page = sg[qc->cursg].page;
3040 offset = sg[qc->cursg].offset + qc->cursg_ofs * ATA_SECT_SIZE;
3042 /* get the current page and offset */
3043 page = nth_page(page, (offset >> PAGE_SHIFT));
3044 offset %= PAGE_SIZE;
3046 buf = kmap(page) + offset;
3051 if ((qc->cursg_ofs * ATA_SECT_SIZE) == (&sg[qc->cursg])->length) {
3056 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
3058 /* do the actual data transfer */
3059 do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
3060 ata_data_xfer(ap, buf, ATA_SECT_SIZE, do_write);
3066 * __atapi_pio_bytes - Transfer data from/to the ATAPI device.
3067 * @qc: Command on going
3068 * @bytes: number of bytes
3070 * Transfer Transfer data from/to the ATAPI device.
3073 * Inherited from caller.
3077 static void __atapi_pio_bytes(struct ata_queued_cmd *qc, unsigned int bytes)
3079 int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
3080 struct scatterlist *sg = qc->__sg;
3081 struct ata_port *ap = qc->ap;
3084 unsigned int offset, count;
3086 if (qc->curbytes + bytes >= qc->nbytes)
3087 ap->hsm_task_state = HSM_ST_LAST;
3090 if (unlikely(qc->cursg >= qc->n_elem)) {
3092 * The end of qc->sg is reached and the device expects
3093 * more data to transfer. In order not to overrun qc->sg
3094 * and fulfill length specified in the byte count register,
3095 * - for read case, discard trailing data from the device
3096 * - for write case, padding zero data to the device
3098 u16 pad_buf[1] = { 0 };
3099 unsigned int words = bytes >> 1;
3102 if (words) /* warning if bytes > 1 */
3103 printk(KERN_WARNING "ata%u: %u bytes trailing data\n",
3106 for (i = 0; i < words; i++)
3107 ata_data_xfer(ap, (unsigned char*)pad_buf, 2, do_write);
3109 ap->hsm_task_state = HSM_ST_LAST;
3113 sg = &qc->__sg[qc->cursg];
3116 offset = sg->offset + qc->cursg_ofs;
3118 /* get the current page and offset */
3119 page = nth_page(page, (offset >> PAGE_SHIFT));
3120 offset %= PAGE_SIZE;
3122 /* don't overrun current sg */
3123 count = min(sg->length - qc->cursg_ofs, bytes);
3125 /* don't cross page boundaries */
3126 count = min(count, (unsigned int)PAGE_SIZE - offset);
3128 buf = kmap(page) + offset;
3131 qc->curbytes += count;
3132 qc->cursg_ofs += count;
3134 if (qc->cursg_ofs == sg->length) {
3139 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
3141 /* do the actual data transfer */
3142 ata_data_xfer(ap, buf, count, do_write);
3151 * atapi_pio_bytes - Transfer data from/to the ATAPI device.
3152 * @qc: Command on going
3154 * Transfer Transfer data from/to the ATAPI device.
3157 * Inherited from caller.
3160 static void atapi_pio_bytes(struct ata_queued_cmd *qc)
3162 struct ata_port *ap = qc->ap;
3163 struct ata_device *dev = qc->dev;
3164 unsigned int ireason, bc_lo, bc_hi, bytes;
3165 int i_write, do_write = (qc->tf.flags & ATA_TFLAG_WRITE) ? 1 : 0;
3167 ap->ops->tf_read(ap, &qc->tf);
3168 ireason = qc->tf.nsect;
3169 bc_lo = qc->tf.lbam;
3170 bc_hi = qc->tf.lbah;
3171 bytes = (bc_hi << 8) | bc_lo;
3173 /* shall be cleared to zero, indicating xfer of data */
3174 if (ireason & (1 << 0))
3177 /* make sure transfer direction matches expected */
3178 i_write = ((ireason & (1 << 1)) == 0) ? 1 : 0;
3179 if (do_write != i_write)
3182 __atapi_pio_bytes(qc, bytes);
3187 printk(KERN_INFO "ata%u: dev %u: ATAPI check failed\n",
3188 ap->id, dev->devno);
3189 ap->hsm_task_state = HSM_ST_ERR;
3193 * ata_pio_block - start PIO on a block
3194 * @ap: the target ata_port
3197 * None. (executing in kernel thread context)
3200 static void ata_pio_block(struct ata_port *ap)
3202 struct ata_queued_cmd *qc;
3206 * This is purely heuristic. This is a fast path.
3207 * Sometimes when we enter, BSY will be cleared in
3208 * a chk-status or two. If not, the drive is probably seeking
3209 * or something. Snooze for a couple msecs, then
3210 * chk-status again. If still busy, fall back to
3211 * HSM_ST_POLL state.
3213 status = ata_busy_wait(ap, ATA_BUSY, 5);
3214 if (status & ATA_BUSY) {
3216 status = ata_busy_wait(ap, ATA_BUSY, 10);
3217 if (status & ATA_BUSY) {
3218 ap->hsm_task_state = HSM_ST_POLL;
3219 ap->pio_task_timeout = jiffies + ATA_TMOUT_PIO;
3224 qc = ata_qc_from_tag(ap, ap->active_tag);
3227 if (is_atapi_taskfile(&qc->tf)) {
3228 /* no more data to transfer or unsupported ATAPI command */
3229 if ((status & ATA_DRQ) == 0) {
3230 ap->hsm_task_state = HSM_ST_LAST;
3234 atapi_pio_bytes(qc);
3236 /* handle BSY=0, DRQ=0 as error */
3237 if ((status & ATA_DRQ) == 0) {
3238 ap->hsm_task_state = HSM_ST_ERR;
3246 static void ata_pio_error(struct ata_port *ap)
3248 struct ata_queued_cmd *qc;
3251 qc = ata_qc_from_tag(ap, ap->active_tag);
3254 drv_stat = ata_chk_status(ap);
3255 printk(KERN_WARNING "ata%u: PIO error, drv_stat 0x%x\n",
3258 ap->hsm_task_state = HSM_ST_IDLE;
3260 ata_poll_qc_complete(qc, drv_stat | ATA_ERR);
3263 static void ata_pio_task(void *_data)
3265 struct ata_port *ap = _data;
3266 unsigned long timeout;
3273 switch (ap->hsm_task_state) {
3282 qc_completed = ata_pio_complete(ap);
3286 case HSM_ST_LAST_POLL:
3287 timeout = ata_pio_poll(ap);
3297 queue_delayed_work(ata_wq, &ap->pio_task, timeout);
3298 else if (!qc_completed)
3303 * ata_qc_timeout - Handle timeout of queued command
3304 * @qc: Command that timed out
3306 * Some part of the kernel (currently, only the SCSI layer)
3307 * has noticed that the active command on port @ap has not
3308 * completed after a specified length of time. Handle this
3309 * condition by disabling DMA (if necessary) and completing
3310 * transactions, with error if necessary.
3312 * This also handles the case of the "lost interrupt", where
3313 * for some reason (possibly hardware bug, possibly driver bug)
3314 * an interrupt was not delivered to the driver, even though the
3315 * transaction completed successfully.
3318 * Inherited from SCSI layer (none, can sleep)
3321 static void ata_qc_timeout(struct ata_queued_cmd *qc)
3323 struct ata_port *ap = qc->ap;
3324 struct ata_host_set *host_set = ap->host_set;
3325 struct ata_device *dev = qc->dev;
3326 u8 host_stat = 0, drv_stat;
3327 unsigned long flags;
3331 /* FIXME: doesn't this conflict with timeout handling? */
3332 if (qc->dev->class == ATA_DEV_ATAPI && qc->scsicmd) {
3333 struct scsi_cmnd *cmd = qc->scsicmd;
3335 if (!(cmd->eh_eflags & SCSI_EH_CANCEL_CMD)) {
3337 /* finish completing original command */
3338 spin_lock_irqsave(&host_set->lock, flags);
3339 __ata_qc_complete(qc);
3340 spin_unlock_irqrestore(&host_set->lock, flags);
3342 atapi_request_sense(ap, dev, cmd);
3344 cmd->result = (CHECK_CONDITION << 1) | (DID_OK << 16);
3345 scsi_finish_command(cmd);
3351 spin_lock_irqsave(&host_set->lock, flags);
3353 /* hack alert! We cannot use the supplied completion
3354 * function from inside the ->eh_strategy_handler() thread.
3355 * libata is the only user of ->eh_strategy_handler() in
3356 * any kernel, so the default scsi_done() assumes it is
3357 * not being called from the SCSI EH.
3359 qc->scsidone = scsi_finish_command;
3361 switch (qc->tf.protocol) {
3364 case ATA_PROT_ATAPI_DMA:
3365 host_stat = ap->ops->bmdma_status(ap);
3367 /* before we do anything else, clear DMA-Start bit */
3368 ap->ops->bmdma_stop(qc);
3374 drv_stat = ata_chk_status(ap);
3376 /* ack bmdma irq events */
3377 ap->ops->irq_clear(ap);
3379 printk(KERN_ERR "ata%u: command 0x%x timeout, stat 0x%x host_stat 0x%x\n",
3380 ap->id, qc->tf.command, drv_stat, host_stat);
3382 /* complete taskfile transaction */
3383 ata_qc_complete(qc, drv_stat);
3387 spin_unlock_irqrestore(&host_set->lock, flags);
3394 * ata_eng_timeout - Handle timeout of queued command
3395 * @ap: Port on which timed-out command is active
3397 * Some part of the kernel (currently, only the SCSI layer)
3398 * has noticed that the active command on port @ap has not
3399 * completed after a specified length of time. Handle this
3400 * condition by disabling DMA (if necessary) and completing
3401 * transactions, with error if necessary.
3403 * This also handles the case of the "lost interrupt", where
3404 * for some reason (possibly hardware bug, possibly driver bug)
3405 * an interrupt was not delivered to the driver, even though the
3406 * transaction completed successfully.
3409 * Inherited from SCSI layer (none, can sleep)
3412 void ata_eng_timeout(struct ata_port *ap)
3414 struct ata_queued_cmd *qc;
3418 qc = ata_qc_from_tag(ap, ap->active_tag);
3422 printk(KERN_ERR "ata%u: BUG: timeout without command\n",
3432 * ata_qc_new - Request an available ATA command, for queueing
3433 * @ap: Port associated with device @dev
3434 * @dev: Device from whom we request an available command structure
3440 static struct ata_queued_cmd *ata_qc_new(struct ata_port *ap)
3442 struct ata_queued_cmd *qc = NULL;
3445 for (i = 0; i < ATA_MAX_QUEUE; i++)
3446 if (!test_and_set_bit(i, &ap->qactive)) {
3447 qc = ata_qc_from_tag(ap, i);
3458 * ata_qc_new_init - Request an available ATA command, and initialize it
3459 * @ap: Port associated with device @dev
3460 * @dev: Device from whom we request an available command structure
3466 struct ata_queued_cmd *ata_qc_new_init(struct ata_port *ap,
3467 struct ata_device *dev)
3469 struct ata_queued_cmd *qc;
3471 qc = ata_qc_new(ap);
3478 qc->cursect = qc->cursg = qc->cursg_ofs = 0;
3480 qc->nbytes = qc->curbytes = 0;
3482 ata_tf_init(ap, &qc->tf, dev->devno);
3488 int ata_qc_complete_noop(struct ata_queued_cmd *qc, u8 drv_stat)
3493 static void __ata_qc_complete(struct ata_queued_cmd *qc)
3495 struct ata_port *ap = qc->ap;
3496 unsigned int tag, do_clear = 0;
3500 if (likely(ata_tag_valid(tag))) {
3501 if (tag == ap->active_tag)
3502 ap->active_tag = ATA_TAG_POISON;
3503 qc->tag = ATA_TAG_POISON;
3508 struct completion *waiting = qc->waiting;
3513 if (likely(do_clear))
3514 clear_bit(tag, &ap->qactive);
3518 * ata_qc_free - free unused ata_queued_cmd
3519 * @qc: Command to complete
3521 * Designed to free unused ata_queued_cmd object
3522 * in case something prevents using it.
3525 * spin_lock_irqsave(host_set lock)
3527 void ata_qc_free(struct ata_queued_cmd *qc)
3529 assert(qc != NULL); /* ata_qc_from_tag _might_ return NULL */
3530 assert(qc->waiting == NULL); /* nothing should be waiting */
3532 __ata_qc_complete(qc);
3536 * ata_qc_complete - Complete an active ATA command
3537 * @qc: Command to complete
3538 * @drv_stat: ATA Status register contents
3540 * Indicate to the mid and upper layers that an ATA
3541 * command has completed, with either an ok or not-ok status.
3544 * spin_lock_irqsave(host_set lock)
3547 void ata_qc_complete(struct ata_queued_cmd *qc, u8 drv_stat)
3551 assert(qc != NULL); /* ata_qc_from_tag _might_ return NULL */
3552 assert(qc->flags & ATA_QCFLAG_ACTIVE);
3554 if (likely(qc->flags & ATA_QCFLAG_DMAMAP))
3557 /* atapi: mark qc as inactive to prevent the interrupt handler
3558 * from completing the command twice later, before the error handler
3559 * is called. (when rc != 0 and atapi request sense is needed)
3561 qc->flags &= ~ATA_QCFLAG_ACTIVE;
3563 /* call completion callback */
3564 rc = qc->complete_fn(qc, drv_stat);
3566 /* if callback indicates not to complete command (non-zero),
3567 * return immediately
3572 __ata_qc_complete(qc);
3577 static inline int ata_should_dma_map(struct ata_queued_cmd *qc)
3579 struct ata_port *ap = qc->ap;
3581 switch (qc->tf.protocol) {
3583 case ATA_PROT_ATAPI_DMA:
3586 case ATA_PROT_ATAPI:
3588 case ATA_PROT_PIO_MULT:
3589 if (ap->flags & ATA_FLAG_PIO_DMA)
3602 * ata_qc_issue - issue taskfile to device
3603 * @qc: command to issue to device
3605 * Prepare an ATA command to submission to device.
3606 * This includes mapping the data into a DMA-able
3607 * area, filling in the S/G table, and finally
3608 * writing the taskfile to hardware, starting the command.
3611 * spin_lock_irqsave(host_set lock)
3614 * Zero on success, negative on error.
3617 int ata_qc_issue(struct ata_queued_cmd *qc)
3619 struct ata_port *ap = qc->ap;
3621 if (ata_should_dma_map(qc)) {
3622 if (qc->flags & ATA_QCFLAG_SG) {
3623 if (ata_sg_setup(qc))
3625 } else if (qc->flags & ATA_QCFLAG_SINGLE) {
3626 if (ata_sg_setup_one(qc))
3630 qc->flags &= ~ATA_QCFLAG_DMAMAP;
3633 ap->ops->qc_prep(qc);
3635 qc->ap->active_tag = qc->tag;
3636 qc->flags |= ATA_QCFLAG_ACTIVE;
3638 return ap->ops->qc_issue(qc);
3646 * ata_qc_issue_prot - issue taskfile to device in proto-dependent manner
3647 * @qc: command to issue to device
3649 * Using various libata functions and hooks, this function
3650 * starts an ATA command. ATA commands are grouped into
3651 * classes called "protocols", and issuing each type of protocol
3652 * is slightly different.
3654 * May be used as the qc_issue() entry in ata_port_operations.
3657 * spin_lock_irqsave(host_set lock)
3660 * Zero on success, negative on error.
3663 int ata_qc_issue_prot(struct ata_queued_cmd *qc)
3665 struct ata_port *ap = qc->ap;
3667 ata_dev_select(ap, qc->dev->devno, 1, 0);
3669 switch (qc->tf.protocol) {
3670 case ATA_PROT_NODATA:
3671 ata_tf_to_host_nolock(ap, &qc->tf);
3675 ap->ops->tf_load(ap, &qc->tf); /* load tf registers */
3676 ap->ops->bmdma_setup(qc); /* set up bmdma */
3677 ap->ops->bmdma_start(qc); /* initiate bmdma */
3680 case ATA_PROT_PIO: /* load tf registers, initiate polling pio */
3681 ata_qc_set_polling(qc);
3682 ata_tf_to_host_nolock(ap, &qc->tf);
3683 ap->hsm_task_state = HSM_ST;
3684 queue_work(ata_wq, &ap->pio_task);
3687 case ATA_PROT_ATAPI:
3688 ata_qc_set_polling(qc);
3689 ata_tf_to_host_nolock(ap, &qc->tf);
3690 queue_work(ata_wq, &ap->packet_task);
3693 case ATA_PROT_ATAPI_NODATA:
3694 ap->flags |= ATA_FLAG_NOINTR;
3695 ata_tf_to_host_nolock(ap, &qc->tf);
3696 queue_work(ata_wq, &ap->packet_task);
3699 case ATA_PROT_ATAPI_DMA:
3700 ap->flags |= ATA_FLAG_NOINTR;
3701 ap->ops->tf_load(ap, &qc->tf); /* load tf registers */
3702 ap->ops->bmdma_setup(qc); /* set up bmdma */
3703 queue_work(ata_wq, &ap->packet_task);
3715 * ata_bmdma_setup_mmio - Set up PCI IDE BMDMA transaction
3716 * @qc: Info associated with this ATA transaction.
3719 * spin_lock_irqsave(host_set lock)
3722 static void ata_bmdma_setup_mmio (struct ata_queued_cmd *qc)
3724 struct ata_port *ap = qc->ap;
3725 unsigned int rw = (qc->tf.flags & ATA_TFLAG_WRITE);
3727 void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr;
3729 /* load PRD table addr. */
3730 mb(); /* make sure PRD table writes are visible to controller */
3731 writel(ap->prd_dma, mmio + ATA_DMA_TABLE_OFS);
3733 /* specify data direction, triple-check start bit is clear */
3734 dmactl = readb(mmio + ATA_DMA_CMD);
3735 dmactl &= ~(ATA_DMA_WR | ATA_DMA_START);
3737 dmactl |= ATA_DMA_WR;
3738 writeb(dmactl, mmio + ATA_DMA_CMD);
3740 /* issue r/w command */
3741 ap->ops->exec_command(ap, &qc->tf);
3745 * ata_bmdma_start_mmio - Start a PCI IDE BMDMA transaction
3746 * @qc: Info associated with this ATA transaction.
3749 * spin_lock_irqsave(host_set lock)
3752 static void ata_bmdma_start_mmio (struct ata_queued_cmd *qc)
3754 struct ata_port *ap = qc->ap;
3755 void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr;
3758 /* start host DMA transaction */
3759 dmactl = readb(mmio + ATA_DMA_CMD);
3760 writeb(dmactl | ATA_DMA_START, mmio + ATA_DMA_CMD);
3762 /* Strictly, one may wish to issue a readb() here, to
3763 * flush the mmio write. However, control also passes
3764 * to the hardware at this point, and it will interrupt
3765 * us when we are to resume control. So, in effect,
3766 * we don't care when the mmio write flushes.
3767 * Further, a read of the DMA status register _immediately_
3768 * following the write may not be what certain flaky hardware
3769 * is expected, so I think it is best to not add a readb()
3770 * without first all the MMIO ATA cards/mobos.
3771 * Or maybe I'm just being paranoid.
3776 * ata_bmdma_setup_pio - Set up PCI IDE BMDMA transaction (PIO)
3777 * @qc: Info associated with this ATA transaction.
3780 * spin_lock_irqsave(host_set lock)
3783 static void ata_bmdma_setup_pio (struct ata_queued_cmd *qc)
3785 struct ata_port *ap = qc->ap;
3786 unsigned int rw = (qc->tf.flags & ATA_TFLAG_WRITE);
3789 /* load PRD table addr. */
3790 outl(ap->prd_dma, ap->ioaddr.bmdma_addr + ATA_DMA_TABLE_OFS);
3792 /* specify data direction, triple-check start bit is clear */
3793 dmactl = inb(ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
3794 dmactl &= ~(ATA_DMA_WR | ATA_DMA_START);
3796 dmactl |= ATA_DMA_WR;
3797 outb(dmactl, ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
3799 /* issue r/w command */
3800 ap->ops->exec_command(ap, &qc->tf);
3804 * ata_bmdma_start_pio - Start a PCI IDE BMDMA transaction (PIO)
3805 * @qc: Info associated with this ATA transaction.
3808 * spin_lock_irqsave(host_set lock)
3811 static void ata_bmdma_start_pio (struct ata_queued_cmd *qc)
3813 struct ata_port *ap = qc->ap;
3816 /* start host DMA transaction */
3817 dmactl = inb(ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
3818 outb(dmactl | ATA_DMA_START,
3819 ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
3824 * ata_bmdma_start - Start a PCI IDE BMDMA transaction
3825 * @qc: Info associated with this ATA transaction.
3827 * Writes the ATA_DMA_START flag to the DMA command register.
3829 * May be used as the bmdma_start() entry in ata_port_operations.
3832 * spin_lock_irqsave(host_set lock)
3834 void ata_bmdma_start(struct ata_queued_cmd *qc)
3836 if (qc->ap->flags & ATA_FLAG_MMIO)
3837 ata_bmdma_start_mmio(qc);
3839 ata_bmdma_start_pio(qc);
3844 * ata_bmdma_setup - Set up PCI IDE BMDMA transaction
3845 * @qc: Info associated with this ATA transaction.
3847 * Writes address of PRD table to device's PRD Table Address
3848 * register, sets the DMA control register, and calls
3849 * ops->exec_command() to start the transfer.
3851 * May be used as the bmdma_setup() entry in ata_port_operations.
3854 * spin_lock_irqsave(host_set lock)
3856 void ata_bmdma_setup(struct ata_queued_cmd *qc)
3858 if (qc->ap->flags & ATA_FLAG_MMIO)
3859 ata_bmdma_setup_mmio(qc);
3861 ata_bmdma_setup_pio(qc);
3866 * ata_bmdma_irq_clear - Clear PCI IDE BMDMA interrupt.
3867 * @ap: Port associated with this ATA transaction.
3869 * Clear interrupt and error flags in DMA status register.
3871 * May be used as the irq_clear() entry in ata_port_operations.
3874 * spin_lock_irqsave(host_set lock)
3877 void ata_bmdma_irq_clear(struct ata_port *ap)
3879 if (ap->flags & ATA_FLAG_MMIO) {
3880 void __iomem *mmio = ((void __iomem *) ap->ioaddr.bmdma_addr) + ATA_DMA_STATUS;
3881 writeb(readb(mmio), mmio);
3883 unsigned long addr = ap->ioaddr.bmdma_addr + ATA_DMA_STATUS;
3884 outb(inb(addr), addr);
3891 * ata_bmdma_status - Read PCI IDE BMDMA status
3892 * @ap: Port associated with this ATA transaction.
3894 * Read and return BMDMA status register.
3896 * May be used as the bmdma_status() entry in ata_port_operations.
3899 * spin_lock_irqsave(host_set lock)
3902 u8 ata_bmdma_status(struct ata_port *ap)
3905 if (ap->flags & ATA_FLAG_MMIO) {
3906 void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr;
3907 host_stat = readb(mmio + ATA_DMA_STATUS);
3909 host_stat = inb(ap->ioaddr.bmdma_addr + ATA_DMA_STATUS);
3915 * ata_bmdma_stop - Stop PCI IDE BMDMA transfer
3916 * @qc: Command we are ending DMA for
3918 * Clears the ATA_DMA_START flag in the dma control register
3920 * May be used as the bmdma_stop() entry in ata_port_operations.
3923 * spin_lock_irqsave(host_set lock)
3926 void ata_bmdma_stop(struct ata_queued_cmd *qc)
3928 struct ata_port *ap = qc->ap;
3929 if (ap->flags & ATA_FLAG_MMIO) {
3930 void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr;
3932 /* clear start/stop bit */
3933 writeb(readb(mmio + ATA_DMA_CMD) & ~ATA_DMA_START,
3934 mmio + ATA_DMA_CMD);
3936 /* clear start/stop bit */
3937 outb(inb(ap->ioaddr.bmdma_addr + ATA_DMA_CMD) & ~ATA_DMA_START,
3938 ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
3941 /* one-PIO-cycle guaranteed wait, per spec, for HDMA1:0 transition */
3942 ata_altstatus(ap); /* dummy read */
3946 * ata_host_intr - Handle host interrupt for given (port, task)
3947 * @ap: Port on which interrupt arrived (possibly...)
3948 * @qc: Taskfile currently active in engine
3950 * Handle host interrupt for given queued command. Currently,
3951 * only DMA interrupts are handled. All other commands are
3952 * handled via polling with interrupts disabled (nIEN bit).
3955 * spin_lock_irqsave(host_set lock)
3958 * One if interrupt was handled, zero if not (shared irq).
3961 inline unsigned int ata_host_intr (struct ata_port *ap,
3962 struct ata_queued_cmd *qc)
3964 u8 status, host_stat;
3966 switch (qc->tf.protocol) {
3969 case ATA_PROT_ATAPI_DMA:
3970 case ATA_PROT_ATAPI:
3971 /* check status of DMA engine */
3972 host_stat = ap->ops->bmdma_status(ap);
3973 VPRINTK("ata%u: host_stat 0x%X\n", ap->id, host_stat);
3975 /* if it's not our irq... */
3976 if (!(host_stat & ATA_DMA_INTR))
3979 /* before we do anything else, clear DMA-Start bit */
3980 ap->ops->bmdma_stop(qc);
3984 case ATA_PROT_ATAPI_NODATA:
3985 case ATA_PROT_NODATA:
3986 /* check altstatus */
3987 status = ata_altstatus(ap);
3988 if (status & ATA_BUSY)
3991 /* check main status, clearing INTRQ */
3992 status = ata_chk_status(ap);
3993 if (unlikely(status & ATA_BUSY))
3995 DPRINTK("ata%u: protocol %d (dev_stat 0x%X)\n",
3996 ap->id, qc->tf.protocol, status);
3998 /* ack bmdma irq events */
3999 ap->ops->irq_clear(ap);
4001 /* complete taskfile transaction */
4002 ata_qc_complete(qc, status);
4009 return 1; /* irq handled */
4012 ap->stats.idle_irq++;
4015 if ((ap->stats.idle_irq % 1000) == 0) {
4017 ata_irq_ack(ap, 0); /* debug trap */
4018 printk(KERN_WARNING "ata%d: irq trap\n", ap->id);
4021 return 0; /* irq not handled */
4025 * ata_interrupt - Default ATA host interrupt handler
4026 * @irq: irq line (unused)
4027 * @dev_instance: pointer to our ata_host_set information structure
4030 * Default interrupt handler for PCI IDE devices. Calls
4031 * ata_host_intr() for each port that is not disabled.
4034 * Obtains host_set lock during operation.
4037 * IRQ_NONE or IRQ_HANDLED.
4040 irqreturn_t ata_interrupt (int irq, void *dev_instance, struct pt_regs *regs)
4042 struct ata_host_set *host_set = dev_instance;
4044 unsigned int handled = 0;
4045 unsigned long flags;
4047 /* TODO: make _irqsave conditional on x86 PCI IDE legacy mode */
4048 spin_lock_irqsave(&host_set->lock, flags);
4050 for (i = 0; i < host_set->n_ports; i++) {
4051 struct ata_port *ap;
4053 ap = host_set->ports[i];
4055 !(ap->flags & (ATA_FLAG_PORT_DISABLED | ATA_FLAG_NOINTR))) {
4056 struct ata_queued_cmd *qc;
4058 qc = ata_qc_from_tag(ap, ap->active_tag);
4059 if (qc && (!(qc->tf.ctl & ATA_NIEN)) &&
4060 (qc->flags & ATA_QCFLAG_ACTIVE))
4061 handled |= ata_host_intr(ap, qc);
4065 spin_unlock_irqrestore(&host_set->lock, flags);
4067 return IRQ_RETVAL(handled);
4071 * atapi_packet_task - Write CDB bytes to hardware
4072 * @_data: Port to which ATAPI device is attached.
4074 * When device has indicated its readiness to accept
4075 * a CDB, this function is called. Send the CDB.
4076 * If DMA is to be performed, exit immediately.
4077 * Otherwise, we are in polling mode, so poll
4078 * status under operation succeeds or fails.
4081 * Kernel thread context (may sleep)
4084 static void atapi_packet_task(void *_data)
4086 struct ata_port *ap = _data;
4087 struct ata_queued_cmd *qc;
4090 qc = ata_qc_from_tag(ap, ap->active_tag);
4092 assert(qc->flags & ATA_QCFLAG_ACTIVE);
4094 /* sleep-wait for BSY to clear */
4095 DPRINTK("busy wait\n");
4096 if (ata_busy_sleep(ap, ATA_TMOUT_CDB_QUICK, ATA_TMOUT_CDB))
4099 /* make sure DRQ is set */
4100 status = ata_chk_status(ap);
4101 if ((status & (ATA_BUSY | ATA_DRQ)) != ATA_DRQ)
4105 DPRINTK("send cdb\n");
4106 assert(ap->cdb_len >= 12);
4108 if (qc->tf.protocol == ATA_PROT_ATAPI_DMA ||
4109 qc->tf.protocol == ATA_PROT_ATAPI_NODATA) {
4110 unsigned long flags;
4112 /* Once we're done issuing command and kicking bmdma,
4113 * irq handler takes over. To not lose irq, we need
4114 * to clear NOINTR flag before sending cdb, but
4115 * interrupt handler shouldn't be invoked before we're
4116 * finished. Hence, the following locking.
4118 spin_lock_irqsave(&ap->host_set->lock, flags);
4119 ap->flags &= ~ATA_FLAG_NOINTR;
4120 ata_data_xfer(ap, qc->cdb, ap->cdb_len, 1);
4121 if (qc->tf.protocol == ATA_PROT_ATAPI_DMA)
4122 ap->ops->bmdma_start(qc); /* initiate bmdma */
4123 spin_unlock_irqrestore(&ap->host_set->lock, flags);
4125 ata_data_xfer(ap, qc->cdb, ap->cdb_len, 1);
4127 /* PIO commands are handled by polling */
4128 ap->hsm_task_state = HSM_ST;
4129 queue_work(ata_wq, &ap->pio_task);
4135 ata_poll_qc_complete(qc, ATA_ERR);
4140 * ata_port_start - Set port up for dma.
4141 * @ap: Port to initialize
4143 * Called just after data structures for each port are
4144 * initialized. Allocates space for PRD table.
4146 * May be used as the port_start() entry in ata_port_operations.
4149 * Inherited from caller.
4152 int ata_port_start (struct ata_port *ap)
4154 struct device *dev = ap->host_set->dev;
4156 ap->prd = dma_alloc_coherent(dev, ATA_PRD_TBL_SZ, &ap->prd_dma, GFP_KERNEL);
4160 ap->pad = dma_alloc_coherent(dev, ATA_DMA_PAD_BUF_SZ, &ap->pad_dma, GFP_KERNEL);
4162 dma_free_coherent(dev, ATA_PRD_TBL_SZ, ap->prd, ap->prd_dma);
4166 DPRINTK("prd alloc, virt %p, dma %llx\n", ap->prd, (unsigned long long) ap->prd_dma);
4173 * ata_port_stop - Undo ata_port_start()
4174 * @ap: Port to shut down
4176 * Frees the PRD table.
4178 * May be used as the port_stop() entry in ata_port_operations.
4181 * Inherited from caller.
4184 void ata_port_stop (struct ata_port *ap)
4186 struct device *dev = ap->host_set->dev;
4188 dma_free_coherent(dev, ATA_PRD_TBL_SZ, ap->prd, ap->prd_dma);
4189 dma_free_coherent(dev, ATA_DMA_PAD_BUF_SZ, ap->pad, ap->pad_dma);
4192 void ata_host_stop (struct ata_host_set *host_set)
4194 if (host_set->mmio_base)
4195 iounmap(host_set->mmio_base);
4200 * ata_host_remove - Unregister SCSI host structure with upper layers
4201 * @ap: Port to unregister
4202 * @do_unregister: 1 if we fully unregister, 0 to just stop the port
4205 * Inherited from caller.
4208 static void ata_host_remove(struct ata_port *ap, unsigned int do_unregister)
4210 struct Scsi_Host *sh = ap->host;
4215 scsi_remove_host(sh);
4217 ap->ops->port_stop(ap);
4221 * ata_host_init - Initialize an ata_port structure
4222 * @ap: Structure to initialize
4223 * @host: associated SCSI mid-layer structure
4224 * @host_set: Collection of hosts to which @ap belongs
4225 * @ent: Probe information provided by low-level driver
4226 * @port_no: Port number associated with this ata_port
4228 * Initialize a new ata_port structure, and its associated
4232 * Inherited from caller.
4235 static void ata_host_init(struct ata_port *ap, struct Scsi_Host *host,
4236 struct ata_host_set *host_set,
4237 const struct ata_probe_ent *ent, unsigned int port_no)
4243 host->max_channel = 1;
4244 host->unique_id = ata_unique_id++;
4245 host->max_cmd_len = 12;
4247 scsi_assign_lock(host, &host_set->lock);
4249 ap->flags = ATA_FLAG_PORT_DISABLED;
4250 ap->id = host->unique_id;
4252 ap->ctl = ATA_DEVCTL_OBS;
4253 ap->host_set = host_set;
4254 ap->port_no = port_no;
4256 ent->legacy_mode ? ent->hard_port_no : port_no;
4257 ap->pio_mask = ent->pio_mask;
4258 ap->mwdma_mask = ent->mwdma_mask;
4259 ap->udma_mask = ent->udma_mask;
4260 ap->flags |= ent->host_flags;
4261 ap->ops = ent->port_ops;
4262 ap->cbl = ATA_CBL_NONE;
4263 ap->active_tag = ATA_TAG_POISON;
4264 ap->last_ctl = 0xFF;
4266 INIT_WORK(&ap->packet_task, atapi_packet_task, ap);
4267 INIT_WORK(&ap->pio_task, ata_pio_task, ap);
4269 for (i = 0; i < ATA_MAX_DEVICES; i++)
4270 ap->device[i].devno = i;
4273 ap->stats.unhandled_irq = 1;
4274 ap->stats.idle_irq = 1;
4277 memcpy(&ap->ioaddr, &ent->port[port_no], sizeof(struct ata_ioports));
4281 * ata_host_add - Attach low-level ATA driver to system
4282 * @ent: Information provided by low-level driver
4283 * @host_set: Collections of ports to which we add
4284 * @port_no: Port number associated with this host
4286 * Attach low-level ATA driver to system.
4289 * PCI/etc. bus probe sem.
4292 * New ata_port on success, for NULL on error.
4295 static struct ata_port * ata_host_add(const struct ata_probe_ent *ent,
4296 struct ata_host_set *host_set,
4297 unsigned int port_no)
4299 struct Scsi_Host *host;
4300 struct ata_port *ap;
4304 host = scsi_host_alloc(ent->sht, sizeof(struct ata_port));
4308 ap = (struct ata_port *) &host->hostdata[0];
4310 ata_host_init(ap, host, host_set, ent, port_no);
4312 rc = ap->ops->port_start(ap);
4319 scsi_host_put(host);
4324 * ata_device_add - Register hardware device with ATA and SCSI layers
4325 * @ent: Probe information describing hardware device to be registered
4327 * This function processes the information provided in the probe
4328 * information struct @ent, allocates the necessary ATA and SCSI
4329 * host information structures, initializes them, and registers
4330 * everything with requisite kernel subsystems.
4332 * This function requests irqs, probes the ATA bus, and probes
4336 * PCI/etc. bus probe sem.
4339 * Number of ports registered. Zero on error (no ports registered).
4342 int ata_device_add(const struct ata_probe_ent *ent)
4344 unsigned int count = 0, i;
4345 struct device *dev = ent->dev;
4346 struct ata_host_set *host_set;
4349 /* alloc a container for our list of ATA ports (buses) */
4350 host_set = kzalloc(sizeof(struct ata_host_set) +
4351 (ent->n_ports * sizeof(void *)), GFP_KERNEL);
4354 spin_lock_init(&host_set->lock);
4356 host_set->dev = dev;
4357 host_set->n_ports = ent->n_ports;
4358 host_set->irq = ent->irq;
4359 host_set->mmio_base = ent->mmio_base;
4360 host_set->private_data = ent->private_data;
4361 host_set->ops = ent->port_ops;
4363 /* register each port bound to this device */
4364 for (i = 0; i < ent->n_ports; i++) {
4365 struct ata_port *ap;
4366 unsigned long xfer_mode_mask;
4368 ap = ata_host_add(ent, host_set, i);
4372 host_set->ports[i] = ap;
4373 xfer_mode_mask =(ap->udma_mask << ATA_SHIFT_UDMA) |
4374 (ap->mwdma_mask << ATA_SHIFT_MWDMA) |
4375 (ap->pio_mask << ATA_SHIFT_PIO);
4377 /* print per-port info to dmesg */
4378 printk(KERN_INFO "ata%u: %cATA max %s cmd 0x%lX ctl 0x%lX "
4379 "bmdma 0x%lX irq %lu\n",
4381 ap->flags & ATA_FLAG_SATA ? 'S' : 'P',
4382 ata_mode_string(xfer_mode_mask),
4383 ap->ioaddr.cmd_addr,
4384 ap->ioaddr.ctl_addr,
4385 ap->ioaddr.bmdma_addr,
4389 host_set->ops->irq_clear(ap);
4396 /* obtain irq, that is shared between channels */
4397 if (request_irq(ent->irq, ent->port_ops->irq_handler, ent->irq_flags,
4398 DRV_NAME, host_set))
4401 /* perform each probe synchronously */
4402 DPRINTK("probe begin\n");
4403 for (i = 0; i < count; i++) {
4404 struct ata_port *ap;
4407 ap = host_set->ports[i];
4409 DPRINTK("ata%u: probe begin\n", ap->id);
4410 rc = ata_bus_probe(ap);
4411 DPRINTK("ata%u: probe end\n", ap->id);
4414 /* FIXME: do something useful here?
4415 * Current libata behavior will
4416 * tear down everything when
4417 * the module is removed
4418 * or the h/w is unplugged.
4422 rc = scsi_add_host(ap->host, dev);
4424 printk(KERN_ERR "ata%u: scsi_add_host failed\n",
4426 /* FIXME: do something useful here */
4427 /* FIXME: handle unconditional calls to
4428 * scsi_scan_host and ata_host_remove, below,
4434 /* probes are done, now scan each port's disk(s) */
4435 DPRINTK("probe begin\n");
4436 for (i = 0; i < count; i++) {
4437 struct ata_port *ap = host_set->ports[i];
4439 ata_scsi_scan_host(ap);
4442 dev_set_drvdata(dev, host_set);
4444 VPRINTK("EXIT, returning %u\n", ent->n_ports);
4445 return ent->n_ports; /* success */
4448 for (i = 0; i < count; i++) {
4449 ata_host_remove(host_set->ports[i], 1);
4450 scsi_host_put(host_set->ports[i]->host);
4454 VPRINTK("EXIT, returning 0\n");
4459 * ata_host_set_remove - PCI layer callback for device removal
4460 * @host_set: ATA host set that was removed
4462 * Unregister all objects associated with this host set. Free those
4466 * Inherited from calling layer (may sleep).
4469 void ata_host_set_remove(struct ata_host_set *host_set)
4471 struct ata_port *ap;
4474 for (i = 0; i < host_set->n_ports; i++) {
4475 ap = host_set->ports[i];
4476 scsi_remove_host(ap->host);
4479 free_irq(host_set->irq, host_set);
4481 for (i = 0; i < host_set->n_ports; i++) {
4482 ap = host_set->ports[i];
4484 ata_scsi_release(ap->host);
4486 if ((ap->flags & ATA_FLAG_NO_LEGACY) == 0) {
4487 struct ata_ioports *ioaddr = &ap->ioaddr;
4489 if (ioaddr->cmd_addr == 0x1f0)
4490 release_region(0x1f0, 8);
4491 else if (ioaddr->cmd_addr == 0x170)
4492 release_region(0x170, 8);
4495 scsi_host_put(ap->host);
4498 if (host_set->ops->host_stop)
4499 host_set->ops->host_stop(host_set);
4505 * ata_scsi_release - SCSI layer callback hook for host unload
4506 * @host: libata host to be unloaded
4508 * Performs all duties necessary to shut down a libata port...
4509 * Kill port kthread, disable port, and release resources.
4512 * Inherited from SCSI layer.
4518 int ata_scsi_release(struct Scsi_Host *host)
4520 struct ata_port *ap = (struct ata_port *) &host->hostdata[0];
4524 ap->ops->port_disable(ap);
4525 ata_host_remove(ap, 0);
4532 * ata_std_ports - initialize ioaddr with standard port offsets.
4533 * @ioaddr: IO address structure to be initialized
4535 * Utility function which initializes data_addr, error_addr,
4536 * feature_addr, nsect_addr, lbal_addr, lbam_addr, lbah_addr,
4537 * device_addr, status_addr, and command_addr to standard offsets
4538 * relative to cmd_addr.
4540 * Does not set ctl_addr, altstatus_addr, bmdma_addr, or scr_addr.
4543 void ata_std_ports(struct ata_ioports *ioaddr)
4545 ioaddr->data_addr = ioaddr->cmd_addr + ATA_REG_DATA;
4546 ioaddr->error_addr = ioaddr->cmd_addr + ATA_REG_ERR;
4547 ioaddr->feature_addr = ioaddr->cmd_addr + ATA_REG_FEATURE;
4548 ioaddr->nsect_addr = ioaddr->cmd_addr + ATA_REG_NSECT;
4549 ioaddr->lbal_addr = ioaddr->cmd_addr + ATA_REG_LBAL;
4550 ioaddr->lbam_addr = ioaddr->cmd_addr + ATA_REG_LBAM;
4551 ioaddr->lbah_addr = ioaddr->cmd_addr + ATA_REG_LBAH;
4552 ioaddr->device_addr = ioaddr->cmd_addr + ATA_REG_DEVICE;
4553 ioaddr->status_addr = ioaddr->cmd_addr + ATA_REG_STATUS;
4554 ioaddr->command_addr = ioaddr->cmd_addr + ATA_REG_CMD;
4557 static struct ata_probe_ent *
4558 ata_probe_ent_alloc(struct device *dev, const struct ata_port_info *port)
4560 struct ata_probe_ent *probe_ent;
4562 probe_ent = kzalloc(sizeof(*probe_ent), GFP_KERNEL);
4564 printk(KERN_ERR DRV_NAME "(%s): out of memory\n",
4565 kobject_name(&(dev->kobj)));
4569 INIT_LIST_HEAD(&probe_ent->node);
4570 probe_ent->dev = dev;
4572 probe_ent->sht = port->sht;
4573 probe_ent->host_flags = port->host_flags;
4574 probe_ent->pio_mask = port->pio_mask;
4575 probe_ent->mwdma_mask = port->mwdma_mask;
4576 probe_ent->udma_mask = port->udma_mask;
4577 probe_ent->port_ops = port->port_ops;
4586 void ata_pci_host_stop (struct ata_host_set *host_set)
4588 struct pci_dev *pdev = to_pci_dev(host_set->dev);
4590 pci_iounmap(pdev, host_set->mmio_base);
4594 * ata_pci_init_native_mode - Initialize native-mode driver
4595 * @pdev: pci device to be initialized
4596 * @port: array[2] of pointers to port info structures.
4597 * @ports: bitmap of ports present
4599 * Utility function which allocates and initializes an
4600 * ata_probe_ent structure for a standard dual-port
4601 * PIO-based IDE controller. The returned ata_probe_ent
4602 * structure can be passed to ata_device_add(). The returned
4603 * ata_probe_ent structure should then be freed with kfree().
4605 * The caller need only pass the address of the primary port, the
4606 * secondary will be deduced automatically. If the device has non
4607 * standard secondary port mappings this function can be called twice,
4608 * once for each interface.
4611 struct ata_probe_ent *
4612 ata_pci_init_native_mode(struct pci_dev *pdev, struct ata_port_info **port, int ports)
4614 struct ata_probe_ent *probe_ent =
4615 ata_probe_ent_alloc(pci_dev_to_dev(pdev), port[0]);
4621 probe_ent->irq = pdev->irq;
4622 probe_ent->irq_flags = SA_SHIRQ;
4624 if (ports & ATA_PORT_PRIMARY) {
4625 probe_ent->port[p].cmd_addr = pci_resource_start(pdev, 0);
4626 probe_ent->port[p].altstatus_addr =
4627 probe_ent->port[p].ctl_addr =
4628 pci_resource_start(pdev, 1) | ATA_PCI_CTL_OFS;
4629 probe_ent->port[p].bmdma_addr = pci_resource_start(pdev, 4);
4630 ata_std_ports(&probe_ent->port[p]);
4634 if (ports & ATA_PORT_SECONDARY) {
4635 probe_ent->port[p].cmd_addr = pci_resource_start(pdev, 2);
4636 probe_ent->port[p].altstatus_addr =
4637 probe_ent->port[p].ctl_addr =
4638 pci_resource_start(pdev, 3) | ATA_PCI_CTL_OFS;
4639 probe_ent->port[p].bmdma_addr = pci_resource_start(pdev, 4) + 8;
4640 ata_std_ports(&probe_ent->port[p]);
4644 probe_ent->n_ports = p;
4648 static struct ata_probe_ent *ata_pci_init_legacy_port(struct pci_dev *pdev, struct ata_port_info **port, int port_num)
4650 struct ata_probe_ent *probe_ent;
4652 probe_ent = ata_probe_ent_alloc(pci_dev_to_dev(pdev), port[0]);
4656 probe_ent->legacy_mode = 1;
4657 probe_ent->n_ports = 1;
4658 probe_ent->hard_port_no = port_num;
4663 probe_ent->irq = 14;
4664 probe_ent->port[0].cmd_addr = 0x1f0;
4665 probe_ent->port[0].altstatus_addr =
4666 probe_ent->port[0].ctl_addr = 0x3f6;
4669 probe_ent->irq = 15;
4670 probe_ent->port[0].cmd_addr = 0x170;
4671 probe_ent->port[0].altstatus_addr =
4672 probe_ent->port[0].ctl_addr = 0x376;
4675 probe_ent->port[0].bmdma_addr = pci_resource_start(pdev, 4) + 8 * port_num;
4676 ata_std_ports(&probe_ent->port[0]);
4681 * ata_pci_init_one - Initialize/register PCI IDE host controller
4682 * @pdev: Controller to be initialized
4683 * @port_info: Information from low-level host driver
4684 * @n_ports: Number of ports attached to host controller
4686 * This is a helper function which can be called from a driver's
4687 * xxx_init_one() probe function if the hardware uses traditional
4688 * IDE taskfile registers.
4690 * This function calls pci_enable_device(), reserves its register
4691 * regions, sets the dma mask, enables bus master mode, and calls
4695 * Inherited from PCI layer (may sleep).
4698 * Zero on success, negative on errno-based value on error.
4701 int ata_pci_init_one (struct pci_dev *pdev, struct ata_port_info **port_info,
4702 unsigned int n_ports)
4704 struct ata_probe_ent *probe_ent = NULL, *probe_ent2 = NULL;
4705 struct ata_port_info *port[2];
4707 unsigned int legacy_mode = 0;
4708 int disable_dev_on_err = 1;
4713 port[0] = port_info[0];
4715 port[1] = port_info[1];
4719 if ((port[0]->host_flags & ATA_FLAG_NO_LEGACY) == 0
4720 && (pdev->class >> 8) == PCI_CLASS_STORAGE_IDE) {
4721 /* TODO: What if one channel is in native mode ... */
4722 pci_read_config_byte(pdev, PCI_CLASS_PROG, &tmp8);
4723 mask = (1 << 2) | (1 << 0);
4724 if ((tmp8 & mask) != mask)
4725 legacy_mode = (1 << 3);
4729 if ((!legacy_mode) && (n_ports > 2)) {
4730 printk(KERN_ERR "ata: BUG: native mode, n_ports > 2\n");
4735 /* FIXME: Really for ATA it isn't safe because the device may be
4736 multi-purpose and we want to leave it alone if it was already
4737 enabled. Secondly for shared use as Arjan says we want refcounting
4739 Checking dev->is_enabled is insufficient as this is not set at
4740 boot for the primary video which is BIOS enabled
4743 rc = pci_enable_device(pdev);
4747 rc = pci_request_regions(pdev, DRV_NAME);
4749 disable_dev_on_err = 0;
4753 /* FIXME: Should use platform specific mappers for legacy port ranges */
4755 if (!request_region(0x1f0, 8, "libata")) {
4756 struct resource *conflict, res;
4758 res.end = 0x1f0 + 8 - 1;
4759 conflict = ____request_resource(&ioport_resource, &res);
4760 if (!strcmp(conflict->name, "libata"))
4761 legacy_mode |= (1 << 0);
4763 disable_dev_on_err = 0;
4764 printk(KERN_WARNING "ata: 0x1f0 IDE port busy\n");
4767 legacy_mode |= (1 << 0);
4769 if (!request_region(0x170, 8, "libata")) {
4770 struct resource *conflict, res;
4772 res.end = 0x170 + 8 - 1;
4773 conflict = ____request_resource(&ioport_resource, &res);
4774 if (!strcmp(conflict->name, "libata"))
4775 legacy_mode |= (1 << 1);
4777 disable_dev_on_err = 0;
4778 printk(KERN_WARNING "ata: 0x170 IDE port busy\n");
4781 legacy_mode |= (1 << 1);
4784 /* we have legacy mode, but all ports are unavailable */
4785 if (legacy_mode == (1 << 3)) {
4787 goto err_out_regions;
4790 rc = pci_set_dma_mask(pdev, ATA_DMA_MASK);
4792 goto err_out_regions;
4793 rc = pci_set_consistent_dma_mask(pdev, ATA_DMA_MASK);
4795 goto err_out_regions;
4798 if (legacy_mode & (1 << 0))
4799 probe_ent = ata_pci_init_legacy_port(pdev, port, 0);
4800 if (legacy_mode & (1 << 1))
4801 probe_ent2 = ata_pci_init_legacy_port(pdev, port, 1);
4804 probe_ent = ata_pci_init_native_mode(pdev, port, ATA_PORT_PRIMARY | ATA_PORT_SECONDARY);
4806 probe_ent = ata_pci_init_native_mode(pdev, port, ATA_PORT_PRIMARY);
4808 if (!probe_ent && !probe_ent2) {
4810 goto err_out_regions;
4813 pci_set_master(pdev);
4815 /* FIXME: check ata_device_add return */
4817 if (legacy_mode & (1 << 0))
4818 ata_device_add(probe_ent);
4819 if (legacy_mode & (1 << 1))
4820 ata_device_add(probe_ent2);
4822 ata_device_add(probe_ent);
4830 if (legacy_mode & (1 << 0))
4831 release_region(0x1f0, 8);
4832 if (legacy_mode & (1 << 1))
4833 release_region(0x170, 8);
4834 pci_release_regions(pdev);
4836 if (disable_dev_on_err)
4837 pci_disable_device(pdev);
4842 * ata_pci_remove_one - PCI layer callback for device removal
4843 * @pdev: PCI device that was removed
4845 * PCI layer indicates to libata via this hook that
4846 * hot-unplug or module unload event has occurred.
4847 * Handle this by unregistering all objects associated
4848 * with this PCI device. Free those objects. Then finally
4849 * release PCI resources and disable device.
4852 * Inherited from PCI layer (may sleep).
4855 void ata_pci_remove_one (struct pci_dev *pdev)
4857 struct device *dev = pci_dev_to_dev(pdev);
4858 struct ata_host_set *host_set = dev_get_drvdata(dev);
4860 ata_host_set_remove(host_set);
4861 pci_release_regions(pdev);
4862 pci_disable_device(pdev);
4863 dev_set_drvdata(dev, NULL);
4866 /* move to PCI subsystem */
4867 int pci_test_config_bits(struct pci_dev *pdev, const struct pci_bits *bits)
4869 unsigned long tmp = 0;
4871 switch (bits->width) {
4874 pci_read_config_byte(pdev, bits->reg, &tmp8);
4880 pci_read_config_word(pdev, bits->reg, &tmp16);
4886 pci_read_config_dword(pdev, bits->reg, &tmp32);
4897 return (tmp == bits->val) ? 1 : 0;
4899 #endif /* CONFIG_PCI */
4902 static int __init ata_init(void)
4904 ata_wq = create_workqueue("ata");
4908 printk(KERN_DEBUG "libata version " DRV_VERSION " loaded.\n");
4912 static void __exit ata_exit(void)
4914 destroy_workqueue(ata_wq);
4917 module_init(ata_init);
4918 module_exit(ata_exit);
4920 static unsigned long ratelimit_time;
4921 static spinlock_t ata_ratelimit_lock = SPIN_LOCK_UNLOCKED;
4923 int ata_ratelimit(void)
4926 unsigned long flags;
4928 spin_lock_irqsave(&ata_ratelimit_lock, flags);
4930 if (time_after(jiffies, ratelimit_time)) {
4932 ratelimit_time = jiffies + (HZ/5);
4936 spin_unlock_irqrestore(&ata_ratelimit_lock, flags);
4942 * libata is essentially a library of internal helper functions for
4943 * low-level ATA host controller drivers. As such, the API/ABI is
4944 * likely to change as new drivers are added and updated.
4945 * Do not depend on ABI/API stability.
4948 EXPORT_SYMBOL_GPL(ata_std_bios_param);
4949 EXPORT_SYMBOL_GPL(ata_std_ports);
4950 EXPORT_SYMBOL_GPL(ata_device_add);
4951 EXPORT_SYMBOL_GPL(ata_host_set_remove);
4952 EXPORT_SYMBOL_GPL(ata_sg_init);
4953 EXPORT_SYMBOL_GPL(ata_sg_init_one);
4954 EXPORT_SYMBOL_GPL(ata_qc_complete);
4955 EXPORT_SYMBOL_GPL(ata_qc_issue_prot);
4956 EXPORT_SYMBOL_GPL(ata_eng_timeout);
4957 EXPORT_SYMBOL_GPL(ata_tf_load);
4958 EXPORT_SYMBOL_GPL(ata_tf_read);
4959 EXPORT_SYMBOL_GPL(ata_noop_dev_select);
4960 EXPORT_SYMBOL_GPL(ata_std_dev_select);
4961 EXPORT_SYMBOL_GPL(ata_tf_to_fis);
4962 EXPORT_SYMBOL_GPL(ata_tf_from_fis);
4963 EXPORT_SYMBOL_GPL(ata_check_status);
4964 EXPORT_SYMBOL_GPL(ata_altstatus);
4965 EXPORT_SYMBOL_GPL(ata_chk_err);
4966 EXPORT_SYMBOL_GPL(ata_exec_command);
4967 EXPORT_SYMBOL_GPL(ata_port_start);
4968 EXPORT_SYMBOL_GPL(ata_port_stop);
4969 EXPORT_SYMBOL_GPL(ata_host_stop);
4970 EXPORT_SYMBOL_GPL(ata_interrupt);
4971 EXPORT_SYMBOL_GPL(ata_qc_prep);
4972 EXPORT_SYMBOL_GPL(ata_bmdma_setup);
4973 EXPORT_SYMBOL_GPL(ata_bmdma_start);
4974 EXPORT_SYMBOL_GPL(ata_bmdma_irq_clear);
4975 EXPORT_SYMBOL_GPL(ata_bmdma_status);
4976 EXPORT_SYMBOL_GPL(ata_bmdma_stop);
4977 EXPORT_SYMBOL_GPL(ata_port_probe);
4978 EXPORT_SYMBOL_GPL(sata_phy_reset);
4979 EXPORT_SYMBOL_GPL(__sata_phy_reset);
4980 EXPORT_SYMBOL_GPL(ata_bus_reset);
4981 EXPORT_SYMBOL_GPL(ata_port_disable);
4982 EXPORT_SYMBOL_GPL(ata_ratelimit);
4983 EXPORT_SYMBOL_GPL(ata_scsi_ioctl);
4984 EXPORT_SYMBOL_GPL(ata_scsi_queuecmd);
4985 EXPORT_SYMBOL_GPL(ata_scsi_error);
4986 EXPORT_SYMBOL_GPL(ata_scsi_slave_config);
4987 EXPORT_SYMBOL_GPL(ata_scsi_release);
4988 EXPORT_SYMBOL_GPL(ata_host_intr);
4989 EXPORT_SYMBOL_GPL(ata_dev_classify);
4990 EXPORT_SYMBOL_GPL(ata_dev_id_string);
4991 EXPORT_SYMBOL_GPL(ata_dev_config);
4992 EXPORT_SYMBOL_GPL(ata_scsi_simulate);
4994 EXPORT_SYMBOL_GPL(ata_timing_compute);
4995 EXPORT_SYMBOL_GPL(ata_timing_merge);
4998 EXPORT_SYMBOL_GPL(pci_test_config_bits);
4999 EXPORT_SYMBOL_GPL(ata_pci_host_stop);
5000 EXPORT_SYMBOL_GPL(ata_pci_init_native_mode);
5001 EXPORT_SYMBOL_GPL(ata_pci_init_one);
5002 EXPORT_SYMBOL_GPL(ata_pci_remove_one);
5003 #endif /* CONFIG_PCI */