2 * libata-core.c - helper library for ATA
4 * Maintained by: Jeff Garzik <jgarzik@pobox.com>
5 * Please ALWAYS copy linux-ide@vger.kernel.org
8 * Copyright 2003-2004 Red Hat, Inc. All rights reserved.
9 * Copyright 2003-2004 Jeff Garzik
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2, or (at your option)
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
22 * You should have received a copy of the GNU General Public License
23 * along with this program; see the file COPYING. If not, write to
24 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
27 * libata documentation is available via 'make {ps|pdf}docs',
28 * as Documentation/DocBook/libata.*
30 * Hardware documentation available from http://www.t13.org/ and
31 * http://www.sata-io.org/
35 #include <linux/config.h>
36 #include <linux/kernel.h>
37 #include <linux/module.h>
38 #include <linux/pci.h>
39 #include <linux/init.h>
40 #include <linux/list.h>
42 #include <linux/highmem.h>
43 #include <linux/spinlock.h>
44 #include <linux/blkdev.h>
45 #include <linux/delay.h>
46 #include <linux/timer.h>
47 #include <linux/interrupt.h>
48 #include <linux/completion.h>
49 #include <linux/suspend.h>
50 #include <linux/workqueue.h>
51 #include <linux/jiffies.h>
52 #include <linux/scatterlist.h>
53 #include <scsi/scsi.h>
54 #include "scsi_priv.h"
55 #include <scsi/scsi_cmnd.h>
56 #include <scsi/scsi_host.h>
57 #include <linux/libata.h>
59 #include <asm/semaphore.h>
60 #include <asm/byteorder.h>
64 static unsigned int ata_dev_init_params(struct ata_device *dev,
65 u16 heads, u16 sectors);
66 static unsigned int ata_dev_set_xfermode(struct ata_device *dev);
67 static void ata_dev_xfermask(struct ata_device *dev);
69 static unsigned int ata_unique_id = 1;
70 static struct workqueue_struct *ata_wq;
72 int atapi_enabled = 1;
73 module_param(atapi_enabled, int, 0444);
74 MODULE_PARM_DESC(atapi_enabled, "Enable discovery of ATAPI devices (0=off, 1=on)");
77 module_param(atapi_dmadir, int, 0444);
78 MODULE_PARM_DESC(atapi_dmadir, "Enable ATAPI DMADIR bridge support (0=off, 1=on)");
81 module_param_named(fua, libata_fua, int, 0444);
82 MODULE_PARM_DESC(fua, "FUA support (0=off, 1=on)");
84 MODULE_AUTHOR("Jeff Garzik");
85 MODULE_DESCRIPTION("Library module for ATA devices");
86 MODULE_LICENSE("GPL");
87 MODULE_VERSION(DRV_VERSION);
91 * ata_tf_to_fis - Convert ATA taskfile to SATA FIS structure
92 * @tf: Taskfile to convert
93 * @fis: Buffer into which data will output
94 * @pmp: Port multiplier port
96 * Converts a standard ATA taskfile to a Serial ATA
97 * FIS structure (Register - Host to Device).
100 * Inherited from caller.
103 void ata_tf_to_fis(const struct ata_taskfile *tf, u8 *fis, u8 pmp)
105 fis[0] = 0x27; /* Register - Host to Device FIS */
106 fis[1] = (pmp & 0xf) | (1 << 7); /* Port multiplier number,
107 bit 7 indicates Command FIS */
108 fis[2] = tf->command;
109 fis[3] = tf->feature;
116 fis[8] = tf->hob_lbal;
117 fis[9] = tf->hob_lbam;
118 fis[10] = tf->hob_lbah;
119 fis[11] = tf->hob_feature;
122 fis[13] = tf->hob_nsect;
133 * ata_tf_from_fis - Convert SATA FIS to ATA taskfile
134 * @fis: Buffer from which data will be input
135 * @tf: Taskfile to output
137 * Converts a serial ATA FIS structure to a standard ATA taskfile.
140 * Inherited from caller.
143 void ata_tf_from_fis(const u8 *fis, struct ata_taskfile *tf)
145 tf->command = fis[2]; /* status */
146 tf->feature = fis[3]; /* error */
153 tf->hob_lbal = fis[8];
154 tf->hob_lbam = fis[9];
155 tf->hob_lbah = fis[10];
158 tf->hob_nsect = fis[13];
161 static const u8 ata_rw_cmds[] = {
165 ATA_CMD_READ_MULTI_EXT,
166 ATA_CMD_WRITE_MULTI_EXT,
170 ATA_CMD_WRITE_MULTI_FUA_EXT,
174 ATA_CMD_PIO_READ_EXT,
175 ATA_CMD_PIO_WRITE_EXT,
188 ATA_CMD_WRITE_FUA_EXT
192 * ata_rwcmd_protocol - set taskfile r/w commands and protocol
193 * @qc: command to examine and configure
195 * Examine the device configuration and tf->flags to calculate
196 * the proper read/write commands and protocol to use.
201 int ata_rwcmd_protocol(struct ata_queued_cmd *qc)
203 struct ata_taskfile *tf = &qc->tf;
204 struct ata_device *dev = qc->dev;
207 int index, fua, lba48, write;
209 fua = (tf->flags & ATA_TFLAG_FUA) ? 4 : 0;
210 lba48 = (tf->flags & ATA_TFLAG_LBA48) ? 2 : 0;
211 write = (tf->flags & ATA_TFLAG_WRITE) ? 1 : 0;
213 if (dev->flags & ATA_DFLAG_PIO) {
214 tf->protocol = ATA_PROT_PIO;
215 index = dev->multi_count ? 0 : 8;
216 } else if (lba48 && (qc->ap->flags & ATA_FLAG_PIO_LBA48)) {
217 /* Unable to use DMA due to host limitation */
218 tf->protocol = ATA_PROT_PIO;
219 index = dev->multi_count ? 0 : 8;
221 tf->protocol = ATA_PROT_DMA;
225 cmd = ata_rw_cmds[index + fua + lba48 + write];
234 * ata_pack_xfermask - Pack pio, mwdma and udma masks into xfer_mask
235 * @pio_mask: pio_mask
236 * @mwdma_mask: mwdma_mask
237 * @udma_mask: udma_mask
239 * Pack @pio_mask, @mwdma_mask and @udma_mask into a single
240 * unsigned int xfer_mask.
248 static unsigned int ata_pack_xfermask(unsigned int pio_mask,
249 unsigned int mwdma_mask,
250 unsigned int udma_mask)
252 return ((pio_mask << ATA_SHIFT_PIO) & ATA_MASK_PIO) |
253 ((mwdma_mask << ATA_SHIFT_MWDMA) & ATA_MASK_MWDMA) |
254 ((udma_mask << ATA_SHIFT_UDMA) & ATA_MASK_UDMA);
258 * ata_unpack_xfermask - Unpack xfer_mask into pio, mwdma and udma masks
259 * @xfer_mask: xfer_mask to unpack
260 * @pio_mask: resulting pio_mask
261 * @mwdma_mask: resulting mwdma_mask
262 * @udma_mask: resulting udma_mask
264 * Unpack @xfer_mask into @pio_mask, @mwdma_mask and @udma_mask.
265 * Any NULL distination masks will be ignored.
267 static void ata_unpack_xfermask(unsigned int xfer_mask,
268 unsigned int *pio_mask,
269 unsigned int *mwdma_mask,
270 unsigned int *udma_mask)
273 *pio_mask = (xfer_mask & ATA_MASK_PIO) >> ATA_SHIFT_PIO;
275 *mwdma_mask = (xfer_mask & ATA_MASK_MWDMA) >> ATA_SHIFT_MWDMA;
277 *udma_mask = (xfer_mask & ATA_MASK_UDMA) >> ATA_SHIFT_UDMA;
280 static const struct ata_xfer_ent {
284 { ATA_SHIFT_PIO, ATA_BITS_PIO, XFER_PIO_0 },
285 { ATA_SHIFT_MWDMA, ATA_BITS_MWDMA, XFER_MW_DMA_0 },
286 { ATA_SHIFT_UDMA, ATA_BITS_UDMA, XFER_UDMA_0 },
291 * ata_xfer_mask2mode - Find matching XFER_* for the given xfer_mask
292 * @xfer_mask: xfer_mask of interest
294 * Return matching XFER_* value for @xfer_mask. Only the highest
295 * bit of @xfer_mask is considered.
301 * Matching XFER_* value, 0 if no match found.
303 static u8 ata_xfer_mask2mode(unsigned int xfer_mask)
305 int highbit = fls(xfer_mask) - 1;
306 const struct ata_xfer_ent *ent;
308 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
309 if (highbit >= ent->shift && highbit < ent->shift + ent->bits)
310 return ent->base + highbit - ent->shift;
315 * ata_xfer_mode2mask - Find matching xfer_mask for XFER_*
316 * @xfer_mode: XFER_* of interest
318 * Return matching xfer_mask for @xfer_mode.
324 * Matching xfer_mask, 0 if no match found.
326 static unsigned int ata_xfer_mode2mask(u8 xfer_mode)
328 const struct ata_xfer_ent *ent;
330 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
331 if (xfer_mode >= ent->base && xfer_mode < ent->base + ent->bits)
332 return 1 << (ent->shift + xfer_mode - ent->base);
337 * ata_xfer_mode2shift - Find matching xfer_shift for XFER_*
338 * @xfer_mode: XFER_* of interest
340 * Return matching xfer_shift for @xfer_mode.
346 * Matching xfer_shift, -1 if no match found.
348 static int ata_xfer_mode2shift(unsigned int xfer_mode)
350 const struct ata_xfer_ent *ent;
352 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
353 if (xfer_mode >= ent->base && xfer_mode < ent->base + ent->bits)
359 * ata_mode_string - convert xfer_mask to string
360 * @xfer_mask: mask of bits supported; only highest bit counts.
362 * Determine string which represents the highest speed
363 * (highest bit in @modemask).
369 * Constant C string representing highest speed listed in
370 * @mode_mask, or the constant C string "<n/a>".
372 static const char *ata_mode_string(unsigned int xfer_mask)
374 static const char * const xfer_mode_str[] = {
394 highbit = fls(xfer_mask) - 1;
395 if (highbit >= 0 && highbit < ARRAY_SIZE(xfer_mode_str))
396 return xfer_mode_str[highbit];
400 static const char *sata_spd_string(unsigned int spd)
402 static const char * const spd_str[] = {
407 if (spd == 0 || (spd - 1) >= ARRAY_SIZE(spd_str))
409 return spd_str[spd - 1];
412 void ata_dev_disable(struct ata_device *dev)
414 if (ata_dev_enabled(dev)) {
415 ata_dev_printk(dev, KERN_WARNING, "disabled\n");
421 * ata_pio_devchk - PATA device presence detection
422 * @ap: ATA channel to examine
423 * @device: Device to examine (starting at zero)
425 * This technique was originally described in
426 * Hale Landis's ATADRVR (www.ata-atapi.com), and
427 * later found its way into the ATA/ATAPI spec.
429 * Write a pattern to the ATA shadow registers,
430 * and if a device is present, it will respond by
431 * correctly storing and echoing back the
432 * ATA shadow register contents.
438 static unsigned int ata_pio_devchk(struct ata_port *ap,
441 struct ata_ioports *ioaddr = &ap->ioaddr;
444 ap->ops->dev_select(ap, device);
446 outb(0x55, ioaddr->nsect_addr);
447 outb(0xaa, ioaddr->lbal_addr);
449 outb(0xaa, ioaddr->nsect_addr);
450 outb(0x55, ioaddr->lbal_addr);
452 outb(0x55, ioaddr->nsect_addr);
453 outb(0xaa, ioaddr->lbal_addr);
455 nsect = inb(ioaddr->nsect_addr);
456 lbal = inb(ioaddr->lbal_addr);
458 if ((nsect == 0x55) && (lbal == 0xaa))
459 return 1; /* we found a device */
461 return 0; /* nothing found */
465 * ata_mmio_devchk - PATA device presence detection
466 * @ap: ATA channel to examine
467 * @device: Device to examine (starting at zero)
469 * This technique was originally described in
470 * Hale Landis's ATADRVR (www.ata-atapi.com), and
471 * later found its way into the ATA/ATAPI spec.
473 * Write a pattern to the ATA shadow registers,
474 * and if a device is present, it will respond by
475 * correctly storing and echoing back the
476 * ATA shadow register contents.
482 static unsigned int ata_mmio_devchk(struct ata_port *ap,
485 struct ata_ioports *ioaddr = &ap->ioaddr;
488 ap->ops->dev_select(ap, device);
490 writeb(0x55, (void __iomem *) ioaddr->nsect_addr);
491 writeb(0xaa, (void __iomem *) ioaddr->lbal_addr);
493 writeb(0xaa, (void __iomem *) ioaddr->nsect_addr);
494 writeb(0x55, (void __iomem *) ioaddr->lbal_addr);
496 writeb(0x55, (void __iomem *) ioaddr->nsect_addr);
497 writeb(0xaa, (void __iomem *) ioaddr->lbal_addr);
499 nsect = readb((void __iomem *) ioaddr->nsect_addr);
500 lbal = readb((void __iomem *) ioaddr->lbal_addr);
502 if ((nsect == 0x55) && (lbal == 0xaa))
503 return 1; /* we found a device */
505 return 0; /* nothing found */
509 * ata_devchk - PATA device presence detection
510 * @ap: ATA channel to examine
511 * @device: Device to examine (starting at zero)
513 * Dispatch ATA device presence detection, depending
514 * on whether we are using PIO or MMIO to talk to the
515 * ATA shadow registers.
521 static unsigned int ata_devchk(struct ata_port *ap,
524 if (ap->flags & ATA_FLAG_MMIO)
525 return ata_mmio_devchk(ap, device);
526 return ata_pio_devchk(ap, device);
530 * ata_dev_classify - determine device type based on ATA-spec signature
531 * @tf: ATA taskfile register set for device to be identified
533 * Determine from taskfile register contents whether a device is
534 * ATA or ATAPI, as per "Signature and persistence" section
535 * of ATA/PI spec (volume 1, sect 5.14).
541 * Device type, %ATA_DEV_ATA, %ATA_DEV_ATAPI, or %ATA_DEV_UNKNOWN
542 * the event of failure.
545 unsigned int ata_dev_classify(const struct ata_taskfile *tf)
547 /* Apple's open source Darwin code hints that some devices only
548 * put a proper signature into the LBA mid/high registers,
549 * So, we only check those. It's sufficient for uniqueness.
552 if (((tf->lbam == 0) && (tf->lbah == 0)) ||
553 ((tf->lbam == 0x3c) && (tf->lbah == 0xc3))) {
554 DPRINTK("found ATA device by sig\n");
558 if (((tf->lbam == 0x14) && (tf->lbah == 0xeb)) ||
559 ((tf->lbam == 0x69) && (tf->lbah == 0x96))) {
560 DPRINTK("found ATAPI device by sig\n");
561 return ATA_DEV_ATAPI;
564 DPRINTK("unknown device\n");
565 return ATA_DEV_UNKNOWN;
569 * ata_dev_try_classify - Parse returned ATA device signature
570 * @ap: ATA channel to examine
571 * @device: Device to examine (starting at zero)
572 * @r_err: Value of error register on completion
574 * After an event -- SRST, E.D.D., or SATA COMRESET -- occurs,
575 * an ATA/ATAPI-defined set of values is placed in the ATA
576 * shadow registers, indicating the results of device detection
579 * Select the ATA device, and read the values from the ATA shadow
580 * registers. Then parse according to the Error register value,
581 * and the spec-defined values examined by ata_dev_classify().
587 * Device type - %ATA_DEV_ATA, %ATA_DEV_ATAPI or %ATA_DEV_NONE.
591 ata_dev_try_classify(struct ata_port *ap, unsigned int device, u8 *r_err)
593 struct ata_taskfile tf;
597 ap->ops->dev_select(ap, device);
599 memset(&tf, 0, sizeof(tf));
601 ap->ops->tf_read(ap, &tf);
606 /* see if device passed diags */
609 else if ((device == 0) && (err == 0x81))
614 /* determine if device is ATA or ATAPI */
615 class = ata_dev_classify(&tf);
617 if (class == ATA_DEV_UNKNOWN)
619 if ((class == ATA_DEV_ATA) && (ata_chk_status(ap) == 0))
625 * ata_id_string - Convert IDENTIFY DEVICE page into string
626 * @id: IDENTIFY DEVICE results we will examine
627 * @s: string into which data is output
628 * @ofs: offset into identify device page
629 * @len: length of string to return. must be an even number.
631 * The strings in the IDENTIFY DEVICE page are broken up into
632 * 16-bit chunks. Run through the string, and output each
633 * 8-bit chunk linearly, regardless of platform.
639 void ata_id_string(const u16 *id, unsigned char *s,
640 unsigned int ofs, unsigned int len)
659 * ata_id_c_string - Convert IDENTIFY DEVICE page into C string
660 * @id: IDENTIFY DEVICE results we will examine
661 * @s: string into which data is output
662 * @ofs: offset into identify device page
663 * @len: length of string to return. must be an odd number.
665 * This function is identical to ata_id_string except that it
666 * trims trailing spaces and terminates the resulting string with
667 * null. @len must be actual maximum length (even number) + 1.
672 void ata_id_c_string(const u16 *id, unsigned char *s,
673 unsigned int ofs, unsigned int len)
679 ata_id_string(id, s, ofs, len - 1);
681 p = s + strnlen(s, len - 1);
682 while (p > s && p[-1] == ' ')
687 static u64 ata_id_n_sectors(const u16 *id)
689 if (ata_id_has_lba(id)) {
690 if (ata_id_has_lba48(id))
691 return ata_id_u64(id, 100);
693 return ata_id_u32(id, 60);
695 if (ata_id_current_chs_valid(id))
696 return ata_id_u32(id, 57);
698 return id[1] * id[3] * id[6];
703 * ata_noop_dev_select - Select device 0/1 on ATA bus
704 * @ap: ATA channel to manipulate
705 * @device: ATA device (numbered from zero) to select
707 * This function performs no actual function.
709 * May be used as the dev_select() entry in ata_port_operations.
714 void ata_noop_dev_select (struct ata_port *ap, unsigned int device)
720 * ata_std_dev_select - Select device 0/1 on ATA bus
721 * @ap: ATA channel to manipulate
722 * @device: ATA device (numbered from zero) to select
724 * Use the method defined in the ATA specification to
725 * make either device 0, or device 1, active on the
726 * ATA channel. Works with both PIO and MMIO.
728 * May be used as the dev_select() entry in ata_port_operations.
734 void ata_std_dev_select (struct ata_port *ap, unsigned int device)
739 tmp = ATA_DEVICE_OBS;
741 tmp = ATA_DEVICE_OBS | ATA_DEV1;
743 if (ap->flags & ATA_FLAG_MMIO) {
744 writeb(tmp, (void __iomem *) ap->ioaddr.device_addr);
746 outb(tmp, ap->ioaddr.device_addr);
748 ata_pause(ap); /* needed; also flushes, for mmio */
752 * ata_dev_select - Select device 0/1 on ATA bus
753 * @ap: ATA channel to manipulate
754 * @device: ATA device (numbered from zero) to select
755 * @wait: non-zero to wait for Status register BSY bit to clear
756 * @can_sleep: non-zero if context allows sleeping
758 * Use the method defined in the ATA specification to
759 * make either device 0, or device 1, active on the
762 * This is a high-level version of ata_std_dev_select(),
763 * which additionally provides the services of inserting
764 * the proper pauses and status polling, where needed.
770 void ata_dev_select(struct ata_port *ap, unsigned int device,
771 unsigned int wait, unsigned int can_sleep)
773 VPRINTK("ENTER, ata%u: device %u, wait %u\n",
774 ap->id, device, wait);
779 ap->ops->dev_select(ap, device);
782 if (can_sleep && ap->device[device].class == ATA_DEV_ATAPI)
789 * ata_dump_id - IDENTIFY DEVICE info debugging output
790 * @id: IDENTIFY DEVICE page to dump
792 * Dump selected 16-bit words from the given IDENTIFY DEVICE
799 static inline void ata_dump_id(const u16 *id)
801 DPRINTK("49==0x%04x "
811 DPRINTK("80==0x%04x "
821 DPRINTK("88==0x%04x "
828 * ata_id_xfermask - Compute xfermask from the given IDENTIFY data
829 * @id: IDENTIFY data to compute xfer mask from
831 * Compute the xfermask for this device. This is not as trivial
832 * as it seems if we must consider early devices correctly.
834 * FIXME: pre IDE drive timing (do we care ?).
842 static unsigned int ata_id_xfermask(const u16 *id)
844 unsigned int pio_mask, mwdma_mask, udma_mask;
846 /* Usual case. Word 53 indicates word 64 is valid */
847 if (id[ATA_ID_FIELD_VALID] & (1 << 1)) {
848 pio_mask = id[ATA_ID_PIO_MODES] & 0x03;
852 /* If word 64 isn't valid then Word 51 high byte holds
853 * the PIO timing number for the maximum. Turn it into
856 pio_mask = (2 << (id[ATA_ID_OLD_PIO_MODES] & 0xFF)) - 1 ;
858 /* But wait.. there's more. Design your standards by
859 * committee and you too can get a free iordy field to
860 * process. However its the speeds not the modes that
861 * are supported... Note drivers using the timing API
862 * will get this right anyway
866 mwdma_mask = id[ATA_ID_MWDMA_MODES] & 0x07;
869 if (id[ATA_ID_FIELD_VALID] & (1 << 2))
870 udma_mask = id[ATA_ID_UDMA_MODES] & 0xff;
872 return ata_pack_xfermask(pio_mask, mwdma_mask, udma_mask);
876 * ata_port_queue_task - Queue port_task
877 * @ap: The ata_port to queue port_task for
878 * @fn: workqueue function to be scheduled
879 * @data: data value to pass to workqueue function
880 * @delay: delay time for workqueue function
882 * Schedule @fn(@data) for execution after @delay jiffies using
883 * port_task. There is one port_task per port and it's the
884 * user(low level driver)'s responsibility to make sure that only
885 * one task is active at any given time.
887 * libata core layer takes care of synchronization between
888 * port_task and EH. ata_port_queue_task() may be ignored for EH
892 * Inherited from caller.
894 void ata_port_queue_task(struct ata_port *ap, void (*fn)(void *), void *data,
899 if (ap->flags & ATA_FLAG_FLUSH_PORT_TASK)
902 PREPARE_WORK(&ap->port_task, fn, data);
905 rc = queue_work(ata_wq, &ap->port_task);
907 rc = queue_delayed_work(ata_wq, &ap->port_task, delay);
909 /* rc == 0 means that another user is using port task */
914 * ata_port_flush_task - Flush port_task
915 * @ap: The ata_port to flush port_task for
917 * After this function completes, port_task is guranteed not to
918 * be running or scheduled.
921 * Kernel thread context (may sleep)
923 void ata_port_flush_task(struct ata_port *ap)
929 spin_lock_irqsave(&ap->host_set->lock, flags);
930 ap->flags |= ATA_FLAG_FLUSH_PORT_TASK;
931 spin_unlock_irqrestore(&ap->host_set->lock, flags);
933 DPRINTK("flush #1\n");
934 flush_workqueue(ata_wq);
937 * At this point, if a task is running, it's guaranteed to see
938 * the FLUSH flag; thus, it will never queue pio tasks again.
941 if (!cancel_delayed_work(&ap->port_task)) {
942 DPRINTK("flush #2\n");
943 flush_workqueue(ata_wq);
946 spin_lock_irqsave(&ap->host_set->lock, flags);
947 ap->flags &= ~ATA_FLAG_FLUSH_PORT_TASK;
948 spin_unlock_irqrestore(&ap->host_set->lock, flags);
953 void ata_qc_complete_internal(struct ata_queued_cmd *qc)
955 struct completion *waiting = qc->private_data;
961 * ata_exec_internal - execute libata internal command
962 * @dev: Device to which the command is sent
963 * @tf: Taskfile registers for the command and the result
964 * @cdb: CDB for packet command
965 * @dma_dir: Data tranfer direction of the command
966 * @buf: Data buffer of the command
967 * @buflen: Length of data buffer
969 * Executes libata internal command with timeout. @tf contains
970 * command on entry and result on return. Timeout and error
971 * conditions are reported via return value. No recovery action
972 * is taken after a command times out. It's caller's duty to
973 * clean up after timeout.
976 * None. Should be called with kernel context, might sleep.
979 unsigned ata_exec_internal(struct ata_device *dev,
980 struct ata_taskfile *tf, const u8 *cdb,
981 int dma_dir, void *buf, unsigned int buflen)
983 struct ata_port *ap = dev->ap;
984 u8 command = tf->command;
985 struct ata_queued_cmd *qc;
986 unsigned int tag, preempted_tag;
987 u32 preempted_sactive, preempted_qc_active;
988 DECLARE_COMPLETION(wait);
990 unsigned int err_mask;
993 spin_lock_irqsave(&ap->host_set->lock, flags);
995 /* no internal command while frozen */
996 if (ap->flags & ATA_FLAG_FROZEN) {
997 spin_unlock_irqrestore(&ap->host_set->lock, flags);
998 return AC_ERR_SYSTEM;
1001 /* initialize internal qc */
1003 /* XXX: Tag 0 is used for drivers with legacy EH as some
1004 * drivers choke if any other tag is given. This breaks
1005 * ata_tag_internal() test for those drivers. Don't use new
1006 * EH stuff without converting to it.
1008 if (ap->ops->error_handler)
1009 tag = ATA_TAG_INTERNAL;
1013 if (test_and_set_bit(tag, &ap->qc_allocated))
1015 qc = __ata_qc_from_tag(ap, tag);
1023 preempted_tag = ap->active_tag;
1024 preempted_sactive = ap->sactive;
1025 preempted_qc_active = ap->qc_active;
1026 ap->active_tag = ATA_TAG_POISON;
1030 /* prepare & issue qc */
1033 memcpy(qc->cdb, cdb, ATAPI_CDB_LEN);
1034 qc->flags |= ATA_QCFLAG_RESULT_TF;
1035 qc->dma_dir = dma_dir;
1036 if (dma_dir != DMA_NONE) {
1037 ata_sg_init_one(qc, buf, buflen);
1038 qc->nsect = buflen / ATA_SECT_SIZE;
1041 qc->private_data = &wait;
1042 qc->complete_fn = ata_qc_complete_internal;
1046 spin_unlock_irqrestore(&ap->host_set->lock, flags);
1048 rc = wait_for_completion_timeout(&wait, ATA_TMOUT_INTERNAL);
1050 ata_port_flush_task(ap);
1053 spin_lock_irqsave(&ap->host_set->lock, flags);
1055 /* We're racing with irq here. If we lose, the
1056 * following test prevents us from completing the qc
1057 * twice. If we win, the port is frozen and will be
1058 * cleaned up by ->post_internal_cmd().
1060 if (qc->flags & ATA_QCFLAG_ACTIVE) {
1061 qc->err_mask |= AC_ERR_TIMEOUT;
1063 if (ap->ops->error_handler)
1064 ata_port_freeze(ap);
1066 ata_qc_complete(qc);
1068 ata_dev_printk(dev, KERN_WARNING,
1069 "qc timeout (cmd 0x%x)\n", command);
1072 spin_unlock_irqrestore(&ap->host_set->lock, flags);
1075 /* do post_internal_cmd */
1076 if (ap->ops->post_internal_cmd)
1077 ap->ops->post_internal_cmd(qc);
1079 if (qc->flags & ATA_QCFLAG_FAILED && !qc->err_mask) {
1080 ata_dev_printk(dev, KERN_WARNING, "zero err_mask for failed "
1081 "internal command, assuming AC_ERR_OTHER\n");
1082 qc->err_mask |= AC_ERR_OTHER;
1086 spin_lock_irqsave(&ap->host_set->lock, flags);
1088 *tf = qc->result_tf;
1089 err_mask = qc->err_mask;
1092 ap->active_tag = preempted_tag;
1093 ap->sactive = preempted_sactive;
1094 ap->qc_active = preempted_qc_active;
1096 /* XXX - Some LLDDs (sata_mv) disable port on command failure.
1097 * Until those drivers are fixed, we detect the condition
1098 * here, fail the command with AC_ERR_SYSTEM and reenable the
1101 * Note that this doesn't change any behavior as internal
1102 * command failure results in disabling the device in the
1103 * higher layer for LLDDs without new reset/EH callbacks.
1105 * Kill the following code as soon as those drivers are fixed.
1107 if (ap->flags & ATA_FLAG_DISABLED) {
1108 err_mask |= AC_ERR_SYSTEM;
1112 spin_unlock_irqrestore(&ap->host_set->lock, flags);
1118 * ata_pio_need_iordy - check if iordy needed
1121 * Check if the current speed of the device requires IORDY. Used
1122 * by various controllers for chip configuration.
1125 unsigned int ata_pio_need_iordy(const struct ata_device *adev)
1128 int speed = adev->pio_mode - XFER_PIO_0;
1135 /* If we have no drive specific rule, then PIO 2 is non IORDY */
1137 if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE */
1138 pio = adev->id[ATA_ID_EIDE_PIO];
1139 /* Is the speed faster than the drive allows non IORDY ? */
1141 /* This is cycle times not frequency - watch the logic! */
1142 if (pio > 240) /* PIO2 is 240nS per cycle */
1151 * ata_dev_read_id - Read ID data from the specified device
1152 * @dev: target device
1153 * @p_class: pointer to class of the target device (may be changed)
1154 * @post_reset: is this read ID post-reset?
1155 * @id: buffer to read IDENTIFY data into
1157 * Read ID data from the specified device. ATA_CMD_ID_ATA is
1158 * performed on ATA devices and ATA_CMD_ID_ATAPI on ATAPI
1159 * devices. This function also issues ATA_CMD_INIT_DEV_PARAMS
1160 * for pre-ATA4 drives.
1163 * Kernel thread context (may sleep)
1166 * 0 on success, -errno otherwise.
1168 static int ata_dev_read_id(struct ata_device *dev, unsigned int *p_class,
1169 int post_reset, u16 *id)
1171 struct ata_port *ap = dev->ap;
1172 unsigned int class = *p_class;
1173 struct ata_taskfile tf;
1174 unsigned int err_mask = 0;
1178 DPRINTK("ENTER, host %u, dev %u\n", ap->id, dev->devno);
1180 ata_dev_select(ap, dev->devno, 1, 1); /* select device 0/1 */
1183 ata_tf_init(dev, &tf);
1187 tf.command = ATA_CMD_ID_ATA;
1190 tf.command = ATA_CMD_ID_ATAPI;
1194 reason = "unsupported class";
1198 tf.protocol = ATA_PROT_PIO;
1200 err_mask = ata_exec_internal(dev, &tf, NULL, DMA_FROM_DEVICE,
1201 id, sizeof(id[0]) * ATA_ID_WORDS);
1204 reason = "I/O error";
1208 swap_buf_le16(id, ATA_ID_WORDS);
1211 if ((class == ATA_DEV_ATA) != (ata_id_is_ata(id) | ata_id_is_cfa(id))) {
1213 reason = "device reports illegal type";
1217 if (post_reset && class == ATA_DEV_ATA) {
1219 * The exact sequence expected by certain pre-ATA4 drives is:
1222 * INITIALIZE DEVICE PARAMETERS
1224 * Some drives were very specific about that exact sequence.
1226 if (ata_id_major_version(id) < 4 || !ata_id_has_lba(id)) {
1227 err_mask = ata_dev_init_params(dev, id[3], id[6]);
1230 reason = "INIT_DEV_PARAMS failed";
1234 /* current CHS translation info (id[53-58]) might be
1235 * changed. reread the identify device info.
1247 ata_dev_printk(dev, KERN_WARNING, "failed to IDENTIFY "
1248 "(%s, err_mask=0x%x)\n", reason, err_mask);
1252 static inline u8 ata_dev_knobble(struct ata_device *dev)
1254 return ((dev->ap->cbl == ATA_CBL_SATA) && (!ata_id_is_sata(dev->id)));
1257 static void ata_dev_config_ncq(struct ata_device *dev,
1258 char *desc, size_t desc_sz)
1260 struct ata_port *ap = dev->ap;
1261 int hdepth = 0, ddepth = ata_id_queue_depth(dev->id);
1263 if (!ata_id_has_ncq(dev->id)) {
1268 if (ap->flags & ATA_FLAG_NCQ) {
1269 hdepth = min(ap->host->can_queue, ATA_MAX_QUEUE - 1);
1270 dev->flags |= ATA_DFLAG_NCQ;
1273 if (hdepth >= ddepth)
1274 snprintf(desc, desc_sz, "NCQ (depth %d)", ddepth);
1276 snprintf(desc, desc_sz, "NCQ (depth %d/%d)", hdepth, ddepth);
1280 * ata_dev_configure - Configure the specified ATA/ATAPI device
1281 * @dev: Target device to configure
1282 * @print_info: Enable device info printout
1284 * Configure @dev according to @dev->id. Generic and low-level
1285 * driver specific fixups are also applied.
1288 * Kernel thread context (may sleep)
1291 * 0 on success, -errno otherwise
1293 static int ata_dev_configure(struct ata_device *dev, int print_info)
1295 struct ata_port *ap = dev->ap;
1296 const u16 *id = dev->id;
1297 unsigned int xfer_mask;
1300 if (!ata_dev_enabled(dev)) {
1301 DPRINTK("ENTER/EXIT (host %u, dev %u) -- nodev\n",
1302 ap->id, dev->devno);
1306 DPRINTK("ENTER, host %u, dev %u\n", ap->id, dev->devno);
1308 /* print device capabilities */
1310 ata_dev_printk(dev, KERN_DEBUG, "cfg 49:%04x 82:%04x 83:%04x "
1311 "84:%04x 85:%04x 86:%04x 87:%04x 88:%04x\n",
1312 id[49], id[82], id[83], id[84],
1313 id[85], id[86], id[87], id[88]);
1315 /* initialize to-be-configured parameters */
1316 dev->flags &= ~ATA_DFLAG_CFG_MASK;
1317 dev->max_sectors = 0;
1325 * common ATA, ATAPI feature tests
1328 /* find max transfer mode; for printk only */
1329 xfer_mask = ata_id_xfermask(id);
1333 /* ATA-specific feature tests */
1334 if (dev->class == ATA_DEV_ATA) {
1335 dev->n_sectors = ata_id_n_sectors(id);
1337 if (ata_id_has_lba(id)) {
1338 const char *lba_desc;
1342 dev->flags |= ATA_DFLAG_LBA;
1343 if (ata_id_has_lba48(id)) {
1344 dev->flags |= ATA_DFLAG_LBA48;
1349 ata_dev_config_ncq(dev, ncq_desc, sizeof(ncq_desc));
1351 /* print device info to dmesg */
1353 ata_dev_printk(dev, KERN_INFO, "ATA-%d, "
1354 "max %s, %Lu sectors: %s %s\n",
1355 ata_id_major_version(id),
1356 ata_mode_string(xfer_mask),
1357 (unsigned long long)dev->n_sectors,
1358 lba_desc, ncq_desc);
1362 /* Default translation */
1363 dev->cylinders = id[1];
1365 dev->sectors = id[6];
1367 if (ata_id_current_chs_valid(id)) {
1368 /* Current CHS translation is valid. */
1369 dev->cylinders = id[54];
1370 dev->heads = id[55];
1371 dev->sectors = id[56];
1374 /* print device info to dmesg */
1376 ata_dev_printk(dev, KERN_INFO, "ATA-%d, "
1377 "max %s, %Lu sectors: CHS %u/%u/%u\n",
1378 ata_id_major_version(id),
1379 ata_mode_string(xfer_mask),
1380 (unsigned long long)dev->n_sectors,
1381 dev->cylinders, dev->heads, dev->sectors);
1384 if (dev->id[59] & 0x100) {
1385 dev->multi_count = dev->id[59] & 0xff;
1386 DPRINTK("ata%u: dev %u multi count %u\n",
1387 ap->id, dev->devno, dev->multi_count);
1393 /* ATAPI-specific feature tests */
1394 else if (dev->class == ATA_DEV_ATAPI) {
1395 char *cdb_intr_string = "";
1397 rc = atapi_cdb_len(id);
1398 if ((rc < 12) || (rc > ATAPI_CDB_LEN)) {
1399 ata_dev_printk(dev, KERN_WARNING,
1400 "unsupported CDB len\n");
1404 dev->cdb_len = (unsigned int) rc;
1406 if (ata_id_cdb_intr(dev->id)) {
1407 dev->flags |= ATA_DFLAG_CDB_INTR;
1408 cdb_intr_string = ", CDB intr";
1411 /* print device info to dmesg */
1413 ata_dev_printk(dev, KERN_INFO, "ATAPI, max %s%s\n",
1414 ata_mode_string(xfer_mask),
1418 ap->host->max_cmd_len = 0;
1419 for (i = 0; i < ATA_MAX_DEVICES; i++)
1420 ap->host->max_cmd_len = max_t(unsigned int,
1421 ap->host->max_cmd_len,
1422 ap->device[i].cdb_len);
1424 /* limit bridge transfers to udma5, 200 sectors */
1425 if (ata_dev_knobble(dev)) {
1427 ata_dev_printk(dev, KERN_INFO,
1428 "applying bridge limits\n");
1429 dev->udma_mask &= ATA_UDMA5;
1430 dev->max_sectors = ATA_MAX_SECTORS;
1433 if (ap->ops->dev_config)
1434 ap->ops->dev_config(ap, dev);
1436 DPRINTK("EXIT, drv_stat = 0x%x\n", ata_chk_status(ap));
1440 DPRINTK("EXIT, err\n");
1445 * ata_bus_probe - Reset and probe ATA bus
1448 * Master ATA bus probing function. Initiates a hardware-dependent
1449 * bus reset, then attempts to identify any devices found on
1453 * PCI/etc. bus probe sem.
1456 * Zero on success, negative errno otherwise.
1459 static int ata_bus_probe(struct ata_port *ap)
1461 unsigned int classes[ATA_MAX_DEVICES];
1462 int tries[ATA_MAX_DEVICES];
1463 int i, rc, down_xfermask;
1464 struct ata_device *dev;
1468 for (i = 0; i < ATA_MAX_DEVICES; i++)
1469 tries[i] = ATA_PROBE_MAX_TRIES;
1474 /* reset and determine device classes */
1475 for (i = 0; i < ATA_MAX_DEVICES; i++)
1476 classes[i] = ATA_DEV_UNKNOWN;
1478 if (ap->ops->probe_reset) {
1479 rc = ap->ops->probe_reset(ap, classes);
1481 ata_port_printk(ap, KERN_ERR,
1482 "reset failed (errno=%d)\n", rc);
1486 ap->ops->phy_reset(ap);
1488 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1489 if (!(ap->flags & ATA_FLAG_DISABLED))
1490 classes[i] = ap->device[i].class;
1491 ap->device[i].class = ATA_DEV_UNKNOWN;
1497 for (i = 0; i < ATA_MAX_DEVICES; i++)
1498 if (classes[i] == ATA_DEV_UNKNOWN)
1499 classes[i] = ATA_DEV_NONE;
1501 /* after the reset the device state is PIO 0 and the controller
1502 state is undefined. Record the mode */
1504 for (i = 0; i < ATA_MAX_DEVICES; i++)
1505 ap->device[i].pio_mode = XFER_PIO_0;
1507 /* read IDENTIFY page and configure devices */
1508 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1509 dev = &ap->device[i];
1512 dev->class = classes[i];
1514 if (!ata_dev_enabled(dev))
1517 rc = ata_dev_read_id(dev, &dev->class, 1, dev->id);
1521 rc = ata_dev_configure(dev, 1);
1526 /* configure transfer mode */
1527 rc = ata_set_mode(ap, &dev);
1533 for (i = 0; i < ATA_MAX_DEVICES; i++)
1534 if (ata_dev_enabled(&ap->device[i]))
1537 /* no device present, disable port */
1538 ata_port_disable(ap);
1539 ap->ops->port_disable(ap);
1546 tries[dev->devno] = 0;
1549 sata_down_spd_limit(ap);
1552 tries[dev->devno]--;
1553 if (down_xfermask &&
1554 ata_down_xfermask_limit(dev, tries[dev->devno] == 1))
1555 tries[dev->devno] = 0;
1558 if (!tries[dev->devno]) {
1559 ata_down_xfermask_limit(dev, 1);
1560 ata_dev_disable(dev);
1567 * ata_port_probe - Mark port as enabled
1568 * @ap: Port for which we indicate enablement
1570 * Modify @ap data structure such that the system
1571 * thinks that the entire port is enabled.
1573 * LOCKING: host_set lock, or some other form of
1577 void ata_port_probe(struct ata_port *ap)
1579 ap->flags &= ~ATA_FLAG_DISABLED;
1583 * sata_print_link_status - Print SATA link status
1584 * @ap: SATA port to printk link status about
1586 * This function prints link speed and status of a SATA link.
1591 static void sata_print_link_status(struct ata_port *ap)
1593 u32 sstatus, scontrol, tmp;
1595 if (sata_scr_read(ap, SCR_STATUS, &sstatus))
1597 sata_scr_read(ap, SCR_CONTROL, &scontrol);
1599 if (ata_port_online(ap)) {
1600 tmp = (sstatus >> 4) & 0xf;
1601 ata_port_printk(ap, KERN_INFO,
1602 "SATA link up %s (SStatus %X SControl %X)\n",
1603 sata_spd_string(tmp), sstatus, scontrol);
1605 ata_port_printk(ap, KERN_INFO,
1606 "SATA link down (SStatus %X SControl %X)\n",
1612 * __sata_phy_reset - Wake/reset a low-level SATA PHY
1613 * @ap: SATA port associated with target SATA PHY.
1615 * This function issues commands to standard SATA Sxxx
1616 * PHY registers, to wake up the phy (and device), and
1617 * clear any reset condition.
1620 * PCI/etc. bus probe sem.
1623 void __sata_phy_reset(struct ata_port *ap)
1626 unsigned long timeout = jiffies + (HZ * 5);
1628 if (ap->flags & ATA_FLAG_SATA_RESET) {
1629 /* issue phy wake/reset */
1630 sata_scr_write_flush(ap, SCR_CONTROL, 0x301);
1631 /* Couldn't find anything in SATA I/II specs, but
1632 * AHCI-1.1 10.4.2 says at least 1 ms. */
1635 /* phy wake/clear reset */
1636 sata_scr_write_flush(ap, SCR_CONTROL, 0x300);
1638 /* wait for phy to become ready, if necessary */
1641 sata_scr_read(ap, SCR_STATUS, &sstatus);
1642 if ((sstatus & 0xf) != 1)
1644 } while (time_before(jiffies, timeout));
1646 /* print link status */
1647 sata_print_link_status(ap);
1649 /* TODO: phy layer with polling, timeouts, etc. */
1650 if (!ata_port_offline(ap))
1653 ata_port_disable(ap);
1655 if (ap->flags & ATA_FLAG_DISABLED)
1658 if (ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT)) {
1659 ata_port_disable(ap);
1663 ap->cbl = ATA_CBL_SATA;
1667 * sata_phy_reset - Reset SATA bus.
1668 * @ap: SATA port associated with target SATA PHY.
1670 * This function resets the SATA bus, and then probes
1671 * the bus for devices.
1674 * PCI/etc. bus probe sem.
1677 void sata_phy_reset(struct ata_port *ap)
1679 __sata_phy_reset(ap);
1680 if (ap->flags & ATA_FLAG_DISABLED)
1686 * ata_dev_pair - return other device on cable
1689 * Obtain the other device on the same cable, or if none is
1690 * present NULL is returned
1693 struct ata_device *ata_dev_pair(struct ata_device *adev)
1695 struct ata_port *ap = adev->ap;
1696 struct ata_device *pair = &ap->device[1 - adev->devno];
1697 if (!ata_dev_enabled(pair))
1703 * ata_port_disable - Disable port.
1704 * @ap: Port to be disabled.
1706 * Modify @ap data structure such that the system
1707 * thinks that the entire port is disabled, and should
1708 * never attempt to probe or communicate with devices
1711 * LOCKING: host_set lock, or some other form of
1715 void ata_port_disable(struct ata_port *ap)
1717 ap->device[0].class = ATA_DEV_NONE;
1718 ap->device[1].class = ATA_DEV_NONE;
1719 ap->flags |= ATA_FLAG_DISABLED;
1723 * sata_down_spd_limit - adjust SATA spd limit downward
1724 * @ap: Port to adjust SATA spd limit for
1726 * Adjust SATA spd limit of @ap downward. Note that this
1727 * function only adjusts the limit. The change must be applied
1728 * using sata_set_spd().
1731 * Inherited from caller.
1734 * 0 on success, negative errno on failure
1736 int sata_down_spd_limit(struct ata_port *ap)
1738 u32 sstatus, spd, mask;
1741 rc = sata_scr_read(ap, SCR_STATUS, &sstatus);
1745 mask = ap->sata_spd_limit;
1748 highbit = fls(mask) - 1;
1749 mask &= ~(1 << highbit);
1751 spd = (sstatus >> 4) & 0xf;
1755 mask &= (1 << spd) - 1;
1759 ap->sata_spd_limit = mask;
1761 ata_port_printk(ap, KERN_WARNING, "limiting SATA link speed to %s\n",
1762 sata_spd_string(fls(mask)));
1767 static int __sata_set_spd_needed(struct ata_port *ap, u32 *scontrol)
1771 if (ap->sata_spd_limit == UINT_MAX)
1774 limit = fls(ap->sata_spd_limit);
1776 spd = (*scontrol >> 4) & 0xf;
1777 *scontrol = (*scontrol & ~0xf0) | ((limit & 0xf) << 4);
1779 return spd != limit;
1783 * sata_set_spd_needed - is SATA spd configuration needed
1784 * @ap: Port in question
1786 * Test whether the spd limit in SControl matches
1787 * @ap->sata_spd_limit. This function is used to determine
1788 * whether hardreset is necessary to apply SATA spd
1792 * Inherited from caller.
1795 * 1 if SATA spd configuration is needed, 0 otherwise.
1797 int sata_set_spd_needed(struct ata_port *ap)
1801 if (sata_scr_read(ap, SCR_CONTROL, &scontrol))
1804 return __sata_set_spd_needed(ap, &scontrol);
1808 * sata_set_spd - set SATA spd according to spd limit
1809 * @ap: Port to set SATA spd for
1811 * Set SATA spd of @ap according to sata_spd_limit.
1814 * Inherited from caller.
1817 * 0 if spd doesn't need to be changed, 1 if spd has been
1818 * changed. Negative errno if SCR registers are inaccessible.
1820 int sata_set_spd(struct ata_port *ap)
1825 if ((rc = sata_scr_read(ap, SCR_CONTROL, &scontrol)))
1828 if (!__sata_set_spd_needed(ap, &scontrol))
1831 if ((rc = sata_scr_write(ap, SCR_CONTROL, scontrol)))
1838 * This mode timing computation functionality is ported over from
1839 * drivers/ide/ide-timing.h and was originally written by Vojtech Pavlik
1842 * PIO 0-5, MWDMA 0-2 and UDMA 0-6 timings (in nanoseconds).
1843 * These were taken from ATA/ATAPI-6 standard, rev 0a, except
1844 * for PIO 5, which is a nonstandard extension and UDMA6, which
1845 * is currently supported only by Maxtor drives.
1848 static const struct ata_timing ata_timing[] = {
1850 { XFER_UDMA_6, 0, 0, 0, 0, 0, 0, 0, 15 },
1851 { XFER_UDMA_5, 0, 0, 0, 0, 0, 0, 0, 20 },
1852 { XFER_UDMA_4, 0, 0, 0, 0, 0, 0, 0, 30 },
1853 { XFER_UDMA_3, 0, 0, 0, 0, 0, 0, 0, 45 },
1855 { XFER_UDMA_2, 0, 0, 0, 0, 0, 0, 0, 60 },
1856 { XFER_UDMA_1, 0, 0, 0, 0, 0, 0, 0, 80 },
1857 { XFER_UDMA_0, 0, 0, 0, 0, 0, 0, 0, 120 },
1859 /* { XFER_UDMA_SLOW, 0, 0, 0, 0, 0, 0, 0, 150 }, */
1861 { XFER_MW_DMA_2, 25, 0, 0, 0, 70, 25, 120, 0 },
1862 { XFER_MW_DMA_1, 45, 0, 0, 0, 80, 50, 150, 0 },
1863 { XFER_MW_DMA_0, 60, 0, 0, 0, 215, 215, 480, 0 },
1865 { XFER_SW_DMA_2, 60, 0, 0, 0, 120, 120, 240, 0 },
1866 { XFER_SW_DMA_1, 90, 0, 0, 0, 240, 240, 480, 0 },
1867 { XFER_SW_DMA_0, 120, 0, 0, 0, 480, 480, 960, 0 },
1869 /* { XFER_PIO_5, 20, 50, 30, 100, 50, 30, 100, 0 }, */
1870 { XFER_PIO_4, 25, 70, 25, 120, 70, 25, 120, 0 },
1871 { XFER_PIO_3, 30, 80, 70, 180, 80, 70, 180, 0 },
1873 { XFER_PIO_2, 30, 290, 40, 330, 100, 90, 240, 0 },
1874 { XFER_PIO_1, 50, 290, 93, 383, 125, 100, 383, 0 },
1875 { XFER_PIO_0, 70, 290, 240, 600, 165, 150, 600, 0 },
1877 /* { XFER_PIO_SLOW, 120, 290, 240, 960, 290, 240, 960, 0 }, */
1882 #define ENOUGH(v,unit) (((v)-1)/(unit)+1)
1883 #define EZ(v,unit) ((v)?ENOUGH(v,unit):0)
1885 static void ata_timing_quantize(const struct ata_timing *t, struct ata_timing *q, int T, int UT)
1887 q->setup = EZ(t->setup * 1000, T);
1888 q->act8b = EZ(t->act8b * 1000, T);
1889 q->rec8b = EZ(t->rec8b * 1000, T);
1890 q->cyc8b = EZ(t->cyc8b * 1000, T);
1891 q->active = EZ(t->active * 1000, T);
1892 q->recover = EZ(t->recover * 1000, T);
1893 q->cycle = EZ(t->cycle * 1000, T);
1894 q->udma = EZ(t->udma * 1000, UT);
1897 void ata_timing_merge(const struct ata_timing *a, const struct ata_timing *b,
1898 struct ata_timing *m, unsigned int what)
1900 if (what & ATA_TIMING_SETUP ) m->setup = max(a->setup, b->setup);
1901 if (what & ATA_TIMING_ACT8B ) m->act8b = max(a->act8b, b->act8b);
1902 if (what & ATA_TIMING_REC8B ) m->rec8b = max(a->rec8b, b->rec8b);
1903 if (what & ATA_TIMING_CYC8B ) m->cyc8b = max(a->cyc8b, b->cyc8b);
1904 if (what & ATA_TIMING_ACTIVE ) m->active = max(a->active, b->active);
1905 if (what & ATA_TIMING_RECOVER) m->recover = max(a->recover, b->recover);
1906 if (what & ATA_TIMING_CYCLE ) m->cycle = max(a->cycle, b->cycle);
1907 if (what & ATA_TIMING_UDMA ) m->udma = max(a->udma, b->udma);
1910 static const struct ata_timing* ata_timing_find_mode(unsigned short speed)
1912 const struct ata_timing *t;
1914 for (t = ata_timing; t->mode != speed; t++)
1915 if (t->mode == 0xFF)
1920 int ata_timing_compute(struct ata_device *adev, unsigned short speed,
1921 struct ata_timing *t, int T, int UT)
1923 const struct ata_timing *s;
1924 struct ata_timing p;
1930 if (!(s = ata_timing_find_mode(speed)))
1933 memcpy(t, s, sizeof(*s));
1936 * If the drive is an EIDE drive, it can tell us it needs extended
1937 * PIO/MW_DMA cycle timing.
1940 if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE drive */
1941 memset(&p, 0, sizeof(p));
1942 if(speed >= XFER_PIO_0 && speed <= XFER_SW_DMA_0) {
1943 if (speed <= XFER_PIO_2) p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO];
1944 else p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO_IORDY];
1945 } else if(speed >= XFER_MW_DMA_0 && speed <= XFER_MW_DMA_2) {
1946 p.cycle = adev->id[ATA_ID_EIDE_DMA_MIN];
1948 ata_timing_merge(&p, t, t, ATA_TIMING_CYCLE | ATA_TIMING_CYC8B);
1952 * Convert the timing to bus clock counts.
1955 ata_timing_quantize(t, t, T, UT);
1958 * Even in DMA/UDMA modes we still use PIO access for IDENTIFY,
1959 * S.M.A.R.T * and some other commands. We have to ensure that the
1960 * DMA cycle timing is slower/equal than the fastest PIO timing.
1963 if (speed > XFER_PIO_4) {
1964 ata_timing_compute(adev, adev->pio_mode, &p, T, UT);
1965 ata_timing_merge(&p, t, t, ATA_TIMING_ALL);
1969 * Lengthen active & recovery time so that cycle time is correct.
1972 if (t->act8b + t->rec8b < t->cyc8b) {
1973 t->act8b += (t->cyc8b - (t->act8b + t->rec8b)) / 2;
1974 t->rec8b = t->cyc8b - t->act8b;
1977 if (t->active + t->recover < t->cycle) {
1978 t->active += (t->cycle - (t->active + t->recover)) / 2;
1979 t->recover = t->cycle - t->active;
1986 * ata_down_xfermask_limit - adjust dev xfer masks downward
1987 * @dev: Device to adjust xfer masks
1988 * @force_pio0: Force PIO0
1990 * Adjust xfer masks of @dev downward. Note that this function
1991 * does not apply the change. Invoking ata_set_mode() afterwards
1992 * will apply the limit.
1995 * Inherited from caller.
1998 * 0 on success, negative errno on failure
2000 int ata_down_xfermask_limit(struct ata_device *dev, int force_pio0)
2002 unsigned long xfer_mask;
2005 xfer_mask = ata_pack_xfermask(dev->pio_mask, dev->mwdma_mask,
2010 /* don't gear down to MWDMA from UDMA, go directly to PIO */
2011 if (xfer_mask & ATA_MASK_UDMA)
2012 xfer_mask &= ~ATA_MASK_MWDMA;
2014 highbit = fls(xfer_mask) - 1;
2015 xfer_mask &= ~(1 << highbit);
2017 xfer_mask &= 1 << ATA_SHIFT_PIO;
2021 ata_unpack_xfermask(xfer_mask, &dev->pio_mask, &dev->mwdma_mask,
2024 ata_dev_printk(dev, KERN_WARNING, "limiting speed to %s\n",
2025 ata_mode_string(xfer_mask));
2033 static int ata_dev_set_mode(struct ata_device *dev)
2035 unsigned int err_mask;
2038 dev->flags &= ~ATA_DFLAG_PIO;
2039 if (dev->xfer_shift == ATA_SHIFT_PIO)
2040 dev->flags |= ATA_DFLAG_PIO;
2042 err_mask = ata_dev_set_xfermode(dev);
2044 ata_dev_printk(dev, KERN_ERR, "failed to set xfermode "
2045 "(err_mask=0x%x)\n", err_mask);
2049 rc = ata_dev_revalidate(dev, 0);
2053 DPRINTK("xfer_shift=%u, xfer_mode=0x%x\n",
2054 dev->xfer_shift, (int)dev->xfer_mode);
2056 ata_dev_printk(dev, KERN_INFO, "configured for %s\n",
2057 ata_mode_string(ata_xfer_mode2mask(dev->xfer_mode)));
2062 * ata_set_mode - Program timings and issue SET FEATURES - XFER
2063 * @ap: port on which timings will be programmed
2064 * @r_failed_dev: out paramter for failed device
2066 * Set ATA device disk transfer mode (PIO3, UDMA6, etc.). If
2067 * ata_set_mode() fails, pointer to the failing device is
2068 * returned in @r_failed_dev.
2071 * PCI/etc. bus probe sem.
2074 * 0 on success, negative errno otherwise
2076 int ata_set_mode(struct ata_port *ap, struct ata_device **r_failed_dev)
2078 struct ata_device *dev;
2079 int i, rc = 0, used_dma = 0, found = 0;
2081 /* has private set_mode? */
2082 if (ap->ops->set_mode) {
2083 /* FIXME: make ->set_mode handle no device case and
2084 * return error code and failing device on failure.
2086 for (i = 0; i < ATA_MAX_DEVICES; i++) {
2087 if (ata_dev_enabled(&ap->device[i])) {
2088 ap->ops->set_mode(ap);
2095 /* step 1: calculate xfer_mask */
2096 for (i = 0; i < ATA_MAX_DEVICES; i++) {
2097 unsigned int pio_mask, dma_mask;
2099 dev = &ap->device[i];
2101 if (!ata_dev_enabled(dev))
2104 ata_dev_xfermask(dev);
2106 pio_mask = ata_pack_xfermask(dev->pio_mask, 0, 0);
2107 dma_mask = ata_pack_xfermask(0, dev->mwdma_mask, dev->udma_mask);
2108 dev->pio_mode = ata_xfer_mask2mode(pio_mask);
2109 dev->dma_mode = ata_xfer_mask2mode(dma_mask);
2118 /* step 2: always set host PIO timings */
2119 for (i = 0; i < ATA_MAX_DEVICES; i++) {
2120 dev = &ap->device[i];
2121 if (!ata_dev_enabled(dev))
2124 if (!dev->pio_mode) {
2125 ata_dev_printk(dev, KERN_WARNING, "no PIO support\n");
2130 dev->xfer_mode = dev->pio_mode;
2131 dev->xfer_shift = ATA_SHIFT_PIO;
2132 if (ap->ops->set_piomode)
2133 ap->ops->set_piomode(ap, dev);
2136 /* step 3: set host DMA timings */
2137 for (i = 0; i < ATA_MAX_DEVICES; i++) {
2138 dev = &ap->device[i];
2140 if (!ata_dev_enabled(dev) || !dev->dma_mode)
2143 dev->xfer_mode = dev->dma_mode;
2144 dev->xfer_shift = ata_xfer_mode2shift(dev->dma_mode);
2145 if (ap->ops->set_dmamode)
2146 ap->ops->set_dmamode(ap, dev);
2149 /* step 4: update devices' xfer mode */
2150 for (i = 0; i < ATA_MAX_DEVICES; i++) {
2151 dev = &ap->device[i];
2153 if (!ata_dev_enabled(dev))
2156 rc = ata_dev_set_mode(dev);
2161 /* Record simplex status. If we selected DMA then the other
2162 * host channels are not permitted to do so.
2164 if (used_dma && (ap->host_set->flags & ATA_HOST_SIMPLEX))
2165 ap->host_set->simplex_claimed = 1;
2167 /* step5: chip specific finalisation */
2168 if (ap->ops->post_set_mode)
2169 ap->ops->post_set_mode(ap);
2173 *r_failed_dev = dev;
2178 * ata_tf_to_host - issue ATA taskfile to host controller
2179 * @ap: port to which command is being issued
2180 * @tf: ATA taskfile register set
2182 * Issues ATA taskfile register set to ATA host controller,
2183 * with proper synchronization with interrupt handler and
2187 * spin_lock_irqsave(host_set lock)
2190 static inline void ata_tf_to_host(struct ata_port *ap,
2191 const struct ata_taskfile *tf)
2193 ap->ops->tf_load(ap, tf);
2194 ap->ops->exec_command(ap, tf);
2198 * ata_busy_sleep - sleep until BSY clears, or timeout
2199 * @ap: port containing status register to be polled
2200 * @tmout_pat: impatience timeout
2201 * @tmout: overall timeout
2203 * Sleep until ATA Status register bit BSY clears,
2204 * or a timeout occurs.
2209 unsigned int ata_busy_sleep (struct ata_port *ap,
2210 unsigned long tmout_pat, unsigned long tmout)
2212 unsigned long timer_start, timeout;
2215 status = ata_busy_wait(ap, ATA_BUSY, 300);
2216 timer_start = jiffies;
2217 timeout = timer_start + tmout_pat;
2218 while ((status & ATA_BUSY) && (time_before(jiffies, timeout))) {
2220 status = ata_busy_wait(ap, ATA_BUSY, 3);
2223 if (status & ATA_BUSY)
2224 ata_port_printk(ap, KERN_WARNING,
2225 "port is slow to respond, please be patient\n");
2227 timeout = timer_start + tmout;
2228 while ((status & ATA_BUSY) && (time_before(jiffies, timeout))) {
2230 status = ata_chk_status(ap);
2233 if (status & ATA_BUSY) {
2234 ata_port_printk(ap, KERN_ERR, "port failed to respond "
2235 "(%lu secs)\n", tmout / HZ);
2242 static void ata_bus_post_reset(struct ata_port *ap, unsigned int devmask)
2244 struct ata_ioports *ioaddr = &ap->ioaddr;
2245 unsigned int dev0 = devmask & (1 << 0);
2246 unsigned int dev1 = devmask & (1 << 1);
2247 unsigned long timeout;
2249 /* if device 0 was found in ata_devchk, wait for its
2253 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
2255 /* if device 1 was found in ata_devchk, wait for
2256 * register access, then wait for BSY to clear
2258 timeout = jiffies + ATA_TMOUT_BOOT;
2262 ap->ops->dev_select(ap, 1);
2263 if (ap->flags & ATA_FLAG_MMIO) {
2264 nsect = readb((void __iomem *) ioaddr->nsect_addr);
2265 lbal = readb((void __iomem *) ioaddr->lbal_addr);
2267 nsect = inb(ioaddr->nsect_addr);
2268 lbal = inb(ioaddr->lbal_addr);
2270 if ((nsect == 1) && (lbal == 1))
2272 if (time_after(jiffies, timeout)) {
2276 msleep(50); /* give drive a breather */
2279 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
2281 /* is all this really necessary? */
2282 ap->ops->dev_select(ap, 0);
2284 ap->ops->dev_select(ap, 1);
2286 ap->ops->dev_select(ap, 0);
2289 static unsigned int ata_bus_softreset(struct ata_port *ap,
2290 unsigned int devmask)
2292 struct ata_ioports *ioaddr = &ap->ioaddr;
2294 DPRINTK("ata%u: bus reset via SRST\n", ap->id);
2296 /* software reset. causes dev0 to be selected */
2297 if (ap->flags & ATA_FLAG_MMIO) {
2298 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
2299 udelay(20); /* FIXME: flush */
2300 writeb(ap->ctl | ATA_SRST, (void __iomem *) ioaddr->ctl_addr);
2301 udelay(20); /* FIXME: flush */
2302 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
2304 outb(ap->ctl, ioaddr->ctl_addr);
2306 outb(ap->ctl | ATA_SRST, ioaddr->ctl_addr);
2308 outb(ap->ctl, ioaddr->ctl_addr);
2311 /* spec mandates ">= 2ms" before checking status.
2312 * We wait 150ms, because that was the magic delay used for
2313 * ATAPI devices in Hale Landis's ATADRVR, for the period of time
2314 * between when the ATA command register is written, and then
2315 * status is checked. Because waiting for "a while" before
2316 * checking status is fine, post SRST, we perform this magic
2317 * delay here as well.
2319 * Old drivers/ide uses the 2mS rule and then waits for ready
2323 /* Before we perform post reset processing we want to see if
2324 * the bus shows 0xFF because the odd clown forgets the D7
2325 * pulldown resistor.
2327 if (ata_check_status(ap) == 0xFF) {
2328 ata_port_printk(ap, KERN_ERR, "SRST failed (status 0xFF)\n");
2329 return AC_ERR_OTHER;
2332 ata_bus_post_reset(ap, devmask);
2338 * ata_bus_reset - reset host port and associated ATA channel
2339 * @ap: port to reset
2341 * This is typically the first time we actually start issuing
2342 * commands to the ATA channel. We wait for BSY to clear, then
2343 * issue EXECUTE DEVICE DIAGNOSTIC command, polling for its
2344 * result. Determine what devices, if any, are on the channel
2345 * by looking at the device 0/1 error register. Look at the signature
2346 * stored in each device's taskfile registers, to determine if
2347 * the device is ATA or ATAPI.
2350 * PCI/etc. bus probe sem.
2351 * Obtains host_set lock.
2354 * Sets ATA_FLAG_DISABLED if bus reset fails.
2357 void ata_bus_reset(struct ata_port *ap)
2359 struct ata_ioports *ioaddr = &ap->ioaddr;
2360 unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS;
2362 unsigned int dev0, dev1 = 0, devmask = 0;
2364 DPRINTK("ENTER, host %u, port %u\n", ap->id, ap->port_no);
2366 /* determine if device 0/1 are present */
2367 if (ap->flags & ATA_FLAG_SATA_RESET)
2370 dev0 = ata_devchk(ap, 0);
2372 dev1 = ata_devchk(ap, 1);
2376 devmask |= (1 << 0);
2378 devmask |= (1 << 1);
2380 /* select device 0 again */
2381 ap->ops->dev_select(ap, 0);
2383 /* issue bus reset */
2384 if (ap->flags & ATA_FLAG_SRST)
2385 if (ata_bus_softreset(ap, devmask))
2389 * determine by signature whether we have ATA or ATAPI devices
2391 ap->device[0].class = ata_dev_try_classify(ap, 0, &err);
2392 if ((slave_possible) && (err != 0x81))
2393 ap->device[1].class = ata_dev_try_classify(ap, 1, &err);
2395 /* re-enable interrupts */
2396 if (ap->ioaddr.ctl_addr) /* FIXME: hack. create a hook instead */
2399 /* is double-select really necessary? */
2400 if (ap->device[1].class != ATA_DEV_NONE)
2401 ap->ops->dev_select(ap, 1);
2402 if (ap->device[0].class != ATA_DEV_NONE)
2403 ap->ops->dev_select(ap, 0);
2405 /* if no devices were detected, disable this port */
2406 if ((ap->device[0].class == ATA_DEV_NONE) &&
2407 (ap->device[1].class == ATA_DEV_NONE))
2410 if (ap->flags & (ATA_FLAG_SATA_RESET | ATA_FLAG_SRST)) {
2411 /* set up device control for ATA_FLAG_SATA_RESET */
2412 if (ap->flags & ATA_FLAG_MMIO)
2413 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
2415 outb(ap->ctl, ioaddr->ctl_addr);
2422 ata_port_printk(ap, KERN_ERR, "disabling port\n");
2423 ap->ops->port_disable(ap);
2428 static int sata_phy_resume(struct ata_port *ap)
2430 unsigned long timeout = jiffies + (HZ * 5);
2431 u32 scontrol, sstatus;
2434 if ((rc = sata_scr_read(ap, SCR_CONTROL, &scontrol)))
2437 scontrol = (scontrol & 0x0f0) | 0x300;
2439 if ((rc = sata_scr_write(ap, SCR_CONTROL, scontrol)))
2442 /* Wait for phy to become ready, if necessary. */
2445 if ((rc = sata_scr_read(ap, SCR_STATUS, &sstatus)))
2447 if ((sstatus & 0xf) != 1)
2449 } while (time_before(jiffies, timeout));
2455 * ata_std_probeinit - initialize probing
2456 * @ap: port to be probed
2458 * @ap is about to be probed. Initialize it. This function is
2459 * to be used as standard callback for ata_drive_probe_reset().
2461 * NOTE!!! Do not use this function as probeinit if a low level
2462 * driver implements only hardreset. Just pass NULL as probeinit
2463 * in that case. Using this function is probably okay but doing
2464 * so makes reset sequence different from the original
2465 * ->phy_reset implementation and Jeff nervous. :-P
2467 void ata_std_probeinit(struct ata_port *ap)
2472 sata_phy_resume(ap);
2474 /* init sata_spd_limit to the current value */
2475 if (sata_scr_read(ap, SCR_CONTROL, &scontrol) == 0) {
2476 int spd = (scontrol >> 4) & 0xf;
2477 ap->sata_spd_limit &= (1 << spd) - 1;
2480 /* wait for device */
2481 if (ata_port_online(ap))
2482 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
2486 * ata_std_softreset - reset host port via ATA SRST
2487 * @ap: port to reset
2488 * @classes: resulting classes of attached devices
2490 * Reset host port using ATA SRST. This function is to be used
2491 * as standard callback for ata_drive_*_reset() functions.
2494 * Kernel thread context (may sleep)
2497 * 0 on success, -errno otherwise.
2499 int ata_std_softreset(struct ata_port *ap, unsigned int *classes)
2501 unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS;
2502 unsigned int devmask = 0, err_mask;
2507 if (ata_port_offline(ap)) {
2508 classes[0] = ATA_DEV_NONE;
2512 /* determine if device 0/1 are present */
2513 if (ata_devchk(ap, 0))
2514 devmask |= (1 << 0);
2515 if (slave_possible && ata_devchk(ap, 1))
2516 devmask |= (1 << 1);
2518 /* select device 0 again */
2519 ap->ops->dev_select(ap, 0);
2521 /* issue bus reset */
2522 DPRINTK("about to softreset, devmask=%x\n", devmask);
2523 err_mask = ata_bus_softreset(ap, devmask);
2525 ata_port_printk(ap, KERN_ERR, "SRST failed (err_mask=0x%x)\n",
2530 /* determine by signature whether we have ATA or ATAPI devices */
2531 classes[0] = ata_dev_try_classify(ap, 0, &err);
2532 if (slave_possible && err != 0x81)
2533 classes[1] = ata_dev_try_classify(ap, 1, &err);
2536 DPRINTK("EXIT, classes[0]=%u [1]=%u\n", classes[0], classes[1]);
2541 * sata_std_hardreset - reset host port via SATA phy reset
2542 * @ap: port to reset
2543 * @class: resulting class of attached device
2545 * SATA phy-reset host port using DET bits of SControl register.
2546 * This function is to be used as standard callback for
2547 * ata_drive_*_reset().
2550 * Kernel thread context (may sleep)
2553 * 0 on success, -errno otherwise.
2555 int sata_std_hardreset(struct ata_port *ap, unsigned int *class)
2562 if (sata_set_spd_needed(ap)) {
2563 /* SATA spec says nothing about how to reconfigure
2564 * spd. To be on the safe side, turn off phy during
2565 * reconfiguration. This works for at least ICH7 AHCI
2568 if ((rc = sata_scr_read(ap, SCR_CONTROL, &scontrol)))
2571 scontrol = (scontrol & 0x0f0) | 0x302;
2573 if ((rc = sata_scr_write(ap, SCR_CONTROL, scontrol)))
2579 /* issue phy wake/reset */
2580 if ((rc = sata_scr_read(ap, SCR_CONTROL, &scontrol)))
2583 scontrol = (scontrol & 0x0f0) | 0x301;
2585 if ((rc = sata_scr_write_flush(ap, SCR_CONTROL, scontrol)))
2588 /* Couldn't find anything in SATA I/II specs, but AHCI-1.1
2589 * 10.4.2 says at least 1 ms.
2593 /* bring phy back */
2594 sata_phy_resume(ap);
2596 /* TODO: phy layer with polling, timeouts, etc. */
2597 if (ata_port_offline(ap)) {
2598 *class = ATA_DEV_NONE;
2599 DPRINTK("EXIT, link offline\n");
2603 if (ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT)) {
2604 ata_port_printk(ap, KERN_ERR,
2605 "COMRESET failed (device not ready)\n");
2609 ap->ops->dev_select(ap, 0); /* probably unnecessary */
2611 *class = ata_dev_try_classify(ap, 0, NULL);
2613 DPRINTK("EXIT, class=%u\n", *class);
2618 * ata_std_postreset - standard postreset callback
2619 * @ap: the target ata_port
2620 * @classes: classes of attached devices
2622 * This function is invoked after a successful reset. Note that
2623 * the device might have been reset more than once using
2624 * different reset methods before postreset is invoked.
2626 * This function is to be used as standard callback for
2627 * ata_drive_*_reset().
2630 * Kernel thread context (may sleep)
2632 void ata_std_postreset(struct ata_port *ap, unsigned int *classes)
2638 /* print link status */
2639 sata_print_link_status(ap);
2642 if (sata_scr_read(ap, SCR_ERROR, &serror) == 0)
2643 sata_scr_write(ap, SCR_ERROR, serror);
2645 /* re-enable interrupts */
2646 if (!ap->ops->error_handler) {
2647 /* FIXME: hack. create a hook instead */
2648 if (ap->ioaddr.ctl_addr)
2652 /* is double-select really necessary? */
2653 if (classes[0] != ATA_DEV_NONE)
2654 ap->ops->dev_select(ap, 1);
2655 if (classes[1] != ATA_DEV_NONE)
2656 ap->ops->dev_select(ap, 0);
2658 /* bail out if no device is present */
2659 if (classes[0] == ATA_DEV_NONE && classes[1] == ATA_DEV_NONE) {
2660 DPRINTK("EXIT, no device\n");
2664 /* set up device control */
2665 if (ap->ioaddr.ctl_addr) {
2666 if (ap->flags & ATA_FLAG_MMIO)
2667 writeb(ap->ctl, (void __iomem *) ap->ioaddr.ctl_addr);
2669 outb(ap->ctl, ap->ioaddr.ctl_addr);
2676 * ata_std_probe_reset - standard probe reset method
2677 * @ap: prot to perform probe-reset
2678 * @classes: resulting classes of attached devices
2680 * The stock off-the-shelf ->probe_reset method.
2683 * Kernel thread context (may sleep)
2686 * 0 on success, -errno otherwise.
2688 int ata_std_probe_reset(struct ata_port *ap, unsigned int *classes)
2690 ata_reset_fn_t hardreset;
2693 if (sata_scr_valid(ap))
2694 hardreset = sata_std_hardreset;
2696 return ata_drive_probe_reset(ap, ata_std_probeinit,
2697 ata_std_softreset, hardreset,
2698 ata_std_postreset, classes);
2701 int ata_do_reset(struct ata_port *ap, ata_reset_fn_t reset,
2702 unsigned int *classes)
2706 for (i = 0; i < ATA_MAX_DEVICES; i++)
2707 classes[i] = ATA_DEV_UNKNOWN;
2709 rc = reset(ap, classes);
2713 /* If any class isn't ATA_DEV_UNKNOWN, consider classification
2714 * is complete and convert all ATA_DEV_UNKNOWN to
2717 for (i = 0; i < ATA_MAX_DEVICES; i++)
2718 if (classes[i] != ATA_DEV_UNKNOWN)
2721 if (i < ATA_MAX_DEVICES)
2722 for (i = 0; i < ATA_MAX_DEVICES; i++)
2723 if (classes[i] == ATA_DEV_UNKNOWN)
2724 classes[i] = ATA_DEV_NONE;
2730 * ata_drive_probe_reset - Perform probe reset with given methods
2731 * @ap: port to reset
2732 * @probeinit: probeinit method (can be NULL)
2733 * @softreset: softreset method (can be NULL)
2734 * @hardreset: hardreset method (can be NULL)
2735 * @postreset: postreset method (can be NULL)
2736 * @classes: resulting classes of attached devices
2738 * Reset the specified port and classify attached devices using
2739 * given methods. This function prefers softreset but tries all
2740 * possible reset sequences to reset and classify devices. This
2741 * function is intended to be used for constructing ->probe_reset
2742 * callback by low level drivers.
2744 * Reset methods should follow the following rules.
2746 * - Return 0 on sucess, -errno on failure.
2747 * - If classification is supported, fill classes[] with
2748 * recognized class codes.
2749 * - If classification is not supported, leave classes[] alone.
2752 * Kernel thread context (may sleep)
2755 * 0 on success, -EINVAL if no reset method is avaliable, -ENODEV
2756 * if classification fails, and any error code from reset
2759 int ata_drive_probe_reset(struct ata_port *ap, ata_probeinit_fn_t probeinit,
2760 ata_reset_fn_t softreset, ata_reset_fn_t hardreset,
2761 ata_postreset_fn_t postreset, unsigned int *classes)
2765 ata_eh_freeze_port(ap);
2770 if (softreset && !sata_set_spd_needed(ap)) {
2771 rc = ata_do_reset(ap, softreset, classes);
2772 if (rc == 0 && classes[0] != ATA_DEV_UNKNOWN)
2774 ata_port_printk(ap, KERN_INFO, "softreset failed, "
2775 "will try hardreset in 5 secs\n");
2783 rc = ata_do_reset(ap, hardreset, classes);
2785 if (classes[0] != ATA_DEV_UNKNOWN)
2790 if (sata_down_spd_limit(ap))
2793 ata_port_printk(ap, KERN_INFO, "hardreset failed, "
2794 "will retry in 5 secs\n");
2799 ata_port_printk(ap, KERN_INFO,
2800 "hardreset succeeded without classification, "
2801 "will retry softreset in 5 secs\n");
2804 rc = ata_do_reset(ap, softreset, classes);
2810 postreset(ap, classes);
2812 ata_eh_thaw_port(ap);
2814 if (classes[0] == ATA_DEV_UNKNOWN)
2821 * ata_dev_same_device - Determine whether new ID matches configured device
2822 * @dev: device to compare against
2823 * @new_class: class of the new device
2824 * @new_id: IDENTIFY page of the new device
2826 * Compare @new_class and @new_id against @dev and determine
2827 * whether @dev is the device indicated by @new_class and
2834 * 1 if @dev matches @new_class and @new_id, 0 otherwise.
2836 static int ata_dev_same_device(struct ata_device *dev, unsigned int new_class,
2839 const u16 *old_id = dev->id;
2840 unsigned char model[2][41], serial[2][21];
2843 if (dev->class != new_class) {
2844 ata_dev_printk(dev, KERN_INFO, "class mismatch %d != %d\n",
2845 dev->class, new_class);
2849 ata_id_c_string(old_id, model[0], ATA_ID_PROD_OFS, sizeof(model[0]));
2850 ata_id_c_string(new_id, model[1], ATA_ID_PROD_OFS, sizeof(model[1]));
2851 ata_id_c_string(old_id, serial[0], ATA_ID_SERNO_OFS, sizeof(serial[0]));
2852 ata_id_c_string(new_id, serial[1], ATA_ID_SERNO_OFS, sizeof(serial[1]));
2853 new_n_sectors = ata_id_n_sectors(new_id);
2855 if (strcmp(model[0], model[1])) {
2856 ata_dev_printk(dev, KERN_INFO, "model number mismatch "
2857 "'%s' != '%s'\n", model[0], model[1]);
2861 if (strcmp(serial[0], serial[1])) {
2862 ata_dev_printk(dev, KERN_INFO, "serial number mismatch "
2863 "'%s' != '%s'\n", serial[0], serial[1]);
2867 if (dev->class == ATA_DEV_ATA && dev->n_sectors != new_n_sectors) {
2868 ata_dev_printk(dev, KERN_INFO, "n_sectors mismatch "
2870 (unsigned long long)dev->n_sectors,
2871 (unsigned long long)new_n_sectors);
2879 * ata_dev_revalidate - Revalidate ATA device
2880 * @dev: device to revalidate
2881 * @post_reset: is this revalidation after reset?
2883 * Re-read IDENTIFY page and make sure @dev is still attached to
2887 * Kernel thread context (may sleep)
2890 * 0 on success, negative errno otherwise
2892 int ata_dev_revalidate(struct ata_device *dev, int post_reset)
2894 unsigned int class = dev->class;
2895 u16 *id = (void *)dev->ap->sector_buf;
2898 if (!ata_dev_enabled(dev)) {
2904 rc = ata_dev_read_id(dev, &class, post_reset, id);
2908 /* is the device still there? */
2909 if (!ata_dev_same_device(dev, class, id)) {
2914 memcpy(dev->id, id, sizeof(id[0]) * ATA_ID_WORDS);
2916 /* configure device according to the new ID */
2917 rc = ata_dev_configure(dev, 0);
2922 ata_dev_printk(dev, KERN_ERR, "revalidation failed (errno=%d)\n", rc);
2926 static const char * const ata_dma_blacklist [] = {
2927 "WDC AC11000H", NULL,
2928 "WDC AC22100H", NULL,
2929 "WDC AC32500H", NULL,
2930 "WDC AC33100H", NULL,
2931 "WDC AC31600H", NULL,
2932 "WDC AC32100H", "24.09P07",
2933 "WDC AC23200L", "21.10N21",
2934 "Compaq CRD-8241B", NULL,
2939 "SanDisk SDP3B", NULL,
2940 "SanDisk SDP3B-64", NULL,
2941 "SANYO CD-ROM CRD", NULL,
2942 "HITACHI CDR-8", NULL,
2943 "HITACHI CDR-8335", NULL,
2944 "HITACHI CDR-8435", NULL,
2945 "Toshiba CD-ROM XM-6202B", NULL,
2946 "TOSHIBA CD-ROM XM-1702BC", NULL,
2948 "E-IDE CD-ROM CR-840", NULL,
2949 "CD-ROM Drive/F5A", NULL,
2950 "WPI CDD-820", NULL,
2951 "SAMSUNG CD-ROM SC-148C", NULL,
2952 "SAMSUNG CD-ROM SC", NULL,
2953 "SanDisk SDP3B-64", NULL,
2954 "ATAPI CD-ROM DRIVE 40X MAXIMUM",NULL,
2955 "_NEC DV5800A", NULL,
2956 "SAMSUNG CD-ROM SN-124", "N001"
2959 static int ata_strim(char *s, size_t len)
2961 len = strnlen(s, len);
2963 /* ATAPI specifies that empty space is blank-filled; remove blanks */
2964 while ((len > 0) && (s[len - 1] == ' ')) {
2971 static int ata_dma_blacklisted(const struct ata_device *dev)
2973 unsigned char model_num[40];
2974 unsigned char model_rev[16];
2975 unsigned int nlen, rlen;
2978 ata_id_string(dev->id, model_num, ATA_ID_PROD_OFS,
2980 ata_id_string(dev->id, model_rev, ATA_ID_FW_REV_OFS,
2982 nlen = ata_strim(model_num, sizeof(model_num));
2983 rlen = ata_strim(model_rev, sizeof(model_rev));
2985 for (i = 0; i < ARRAY_SIZE(ata_dma_blacklist); i += 2) {
2986 if (!strncmp(ata_dma_blacklist[i], model_num, nlen)) {
2987 if (ata_dma_blacklist[i+1] == NULL)
2989 if (!strncmp(ata_dma_blacklist[i], model_rev, rlen))
2997 * ata_dev_xfermask - Compute supported xfermask of the given device
2998 * @dev: Device to compute xfermask for
3000 * Compute supported xfermask of @dev and store it in
3001 * dev->*_mask. This function is responsible for applying all
3002 * known limits including host controller limits, device
3005 * FIXME: The current implementation limits all transfer modes to
3006 * the fastest of the lowested device on the port. This is not
3007 * required on most controllers.
3012 static void ata_dev_xfermask(struct ata_device *dev)
3014 struct ata_port *ap = dev->ap;
3015 struct ata_host_set *hs = ap->host_set;
3016 unsigned long xfer_mask;
3019 xfer_mask = ata_pack_xfermask(ap->pio_mask,
3020 ap->mwdma_mask, ap->udma_mask);
3022 /* Apply cable rule here. Don't apply it early because when
3023 * we handle hot plug the cable type can itself change.
3025 if (ap->cbl == ATA_CBL_PATA40)
3026 xfer_mask &= ~(0xF8 << ATA_SHIFT_UDMA);
3028 /* FIXME: Use port-wide xfermask for now */
3029 for (i = 0; i < ATA_MAX_DEVICES; i++) {
3030 struct ata_device *d = &ap->device[i];
3032 if (ata_dev_absent(d))
3035 if (ata_dev_disabled(d)) {
3036 /* to avoid violating device selection timing */
3037 xfer_mask &= ata_pack_xfermask(d->pio_mask,
3038 UINT_MAX, UINT_MAX);
3042 xfer_mask &= ata_pack_xfermask(d->pio_mask,
3043 d->mwdma_mask, d->udma_mask);
3044 xfer_mask &= ata_id_xfermask(d->id);
3045 if (ata_dma_blacklisted(d))
3046 xfer_mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA);
3049 if (ata_dma_blacklisted(dev))
3050 ata_dev_printk(dev, KERN_WARNING,
3051 "device is on DMA blacklist, disabling DMA\n");
3053 if (hs->flags & ATA_HOST_SIMPLEX) {
3054 if (hs->simplex_claimed)
3055 xfer_mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA);
3058 if (ap->ops->mode_filter)
3059 xfer_mask = ap->ops->mode_filter(ap, dev, xfer_mask);
3061 ata_unpack_xfermask(xfer_mask, &dev->pio_mask,
3062 &dev->mwdma_mask, &dev->udma_mask);
3066 * ata_dev_set_xfermode - Issue SET FEATURES - XFER MODE command
3067 * @dev: Device to which command will be sent
3069 * Issue SET FEATURES - XFER MODE command to device @dev
3073 * PCI/etc. bus probe sem.
3076 * 0 on success, AC_ERR_* mask otherwise.
3079 static unsigned int ata_dev_set_xfermode(struct ata_device *dev)
3081 struct ata_taskfile tf;
3082 unsigned int err_mask;
3084 /* set up set-features taskfile */
3085 DPRINTK("set features - xfer mode\n");
3087 ata_tf_init(dev, &tf);
3088 tf.command = ATA_CMD_SET_FEATURES;
3089 tf.feature = SETFEATURES_XFER;
3090 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
3091 tf.protocol = ATA_PROT_NODATA;
3092 tf.nsect = dev->xfer_mode;
3094 err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0);
3096 DPRINTK("EXIT, err_mask=%x\n", err_mask);
3101 * ata_dev_init_params - Issue INIT DEV PARAMS command
3102 * @dev: Device to which command will be sent
3103 * @heads: Number of heads (taskfile parameter)
3104 * @sectors: Number of sectors (taskfile parameter)
3107 * Kernel thread context (may sleep)
3110 * 0 on success, AC_ERR_* mask otherwise.
3112 static unsigned int ata_dev_init_params(struct ata_device *dev,
3113 u16 heads, u16 sectors)
3115 struct ata_taskfile tf;
3116 unsigned int err_mask;
3118 /* Number of sectors per track 1-255. Number of heads 1-16 */
3119 if (sectors < 1 || sectors > 255 || heads < 1 || heads > 16)
3120 return AC_ERR_INVALID;
3122 /* set up init dev params taskfile */
3123 DPRINTK("init dev params \n");
3125 ata_tf_init(dev, &tf);
3126 tf.command = ATA_CMD_INIT_DEV_PARAMS;
3127 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
3128 tf.protocol = ATA_PROT_NODATA;
3130 tf.device |= (heads - 1) & 0x0f; /* max head = num. of heads - 1 */
3132 err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0);
3134 DPRINTK("EXIT, err_mask=%x\n", err_mask);
3139 * ata_sg_clean - Unmap DMA memory associated with command
3140 * @qc: Command containing DMA memory to be released
3142 * Unmap all mapped DMA memory associated with this command.
3145 * spin_lock_irqsave(host_set lock)
3148 static void ata_sg_clean(struct ata_queued_cmd *qc)
3150 struct ata_port *ap = qc->ap;
3151 struct scatterlist *sg = qc->__sg;
3152 int dir = qc->dma_dir;
3153 void *pad_buf = NULL;
3155 WARN_ON(!(qc->flags & ATA_QCFLAG_DMAMAP));
3156 WARN_ON(sg == NULL);
3158 if (qc->flags & ATA_QCFLAG_SINGLE)
3159 WARN_ON(qc->n_elem > 1);
3161 VPRINTK("unmapping %u sg elements\n", qc->n_elem);
3163 /* if we padded the buffer out to 32-bit bound, and data
3164 * xfer direction is from-device, we must copy from the
3165 * pad buffer back into the supplied buffer
3167 if (qc->pad_len && !(qc->tf.flags & ATA_TFLAG_WRITE))
3168 pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
3170 if (qc->flags & ATA_QCFLAG_SG) {
3172 dma_unmap_sg(ap->dev, sg, qc->n_elem, dir);
3173 /* restore last sg */
3174 sg[qc->orig_n_elem - 1].length += qc->pad_len;
3176 struct scatterlist *psg = &qc->pad_sgent;
3177 void *addr = kmap_atomic(psg->page, KM_IRQ0);
3178 memcpy(addr + psg->offset, pad_buf, qc->pad_len);
3179 kunmap_atomic(addr, KM_IRQ0);
3183 dma_unmap_single(ap->dev,
3184 sg_dma_address(&sg[0]), sg_dma_len(&sg[0]),
3187 sg->length += qc->pad_len;
3189 memcpy(qc->buf_virt + sg->length - qc->pad_len,
3190 pad_buf, qc->pad_len);
3193 qc->flags &= ~ATA_QCFLAG_DMAMAP;
3198 * ata_fill_sg - Fill PCI IDE PRD table
3199 * @qc: Metadata associated with taskfile to be transferred
3201 * Fill PCI IDE PRD (scatter-gather) table with segments
3202 * associated with the current disk command.
3205 * spin_lock_irqsave(host_set lock)
3208 static void ata_fill_sg(struct ata_queued_cmd *qc)
3210 struct ata_port *ap = qc->ap;
3211 struct scatterlist *sg;
3214 WARN_ON(qc->__sg == NULL);
3215 WARN_ON(qc->n_elem == 0 && qc->pad_len == 0);
3218 ata_for_each_sg(sg, qc) {
3222 /* determine if physical DMA addr spans 64K boundary.
3223 * Note h/w doesn't support 64-bit, so we unconditionally
3224 * truncate dma_addr_t to u32.
3226 addr = (u32) sg_dma_address(sg);
3227 sg_len = sg_dma_len(sg);
3230 offset = addr & 0xffff;
3232 if ((offset + sg_len) > 0x10000)
3233 len = 0x10000 - offset;
3235 ap->prd[idx].addr = cpu_to_le32(addr);
3236 ap->prd[idx].flags_len = cpu_to_le32(len & 0xffff);
3237 VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", idx, addr, len);
3246 ap->prd[idx - 1].flags_len |= cpu_to_le32(ATA_PRD_EOT);
3249 * ata_check_atapi_dma - Check whether ATAPI DMA can be supported
3250 * @qc: Metadata associated with taskfile to check
3252 * Allow low-level driver to filter ATA PACKET commands, returning
3253 * a status indicating whether or not it is OK to use DMA for the
3254 * supplied PACKET command.
3257 * spin_lock_irqsave(host_set lock)
3259 * RETURNS: 0 when ATAPI DMA can be used
3262 int ata_check_atapi_dma(struct ata_queued_cmd *qc)
3264 struct ata_port *ap = qc->ap;
3265 int rc = 0; /* Assume ATAPI DMA is OK by default */
3267 if (ap->ops->check_atapi_dma)
3268 rc = ap->ops->check_atapi_dma(qc);
3270 /* We don't support polling DMA.
3271 * Use PIO if the LLDD handles only interrupts in
3272 * the HSM_ST_LAST state and the ATAPI device
3273 * generates CDB interrupts.
3275 if ((ap->flags & ATA_FLAG_PIO_POLLING) &&
3276 (qc->dev->flags & ATA_DFLAG_CDB_INTR))
3282 * ata_qc_prep - Prepare taskfile for submission
3283 * @qc: Metadata associated with taskfile to be prepared
3285 * Prepare ATA taskfile for submission.
3288 * spin_lock_irqsave(host_set lock)
3290 void ata_qc_prep(struct ata_queued_cmd *qc)
3292 if (!(qc->flags & ATA_QCFLAG_DMAMAP))
3298 void ata_noop_qc_prep(struct ata_queued_cmd *qc) { }
3301 * ata_sg_init_one - Associate command with memory buffer
3302 * @qc: Command to be associated
3303 * @buf: Memory buffer
3304 * @buflen: Length of memory buffer, in bytes.
3306 * Initialize the data-related elements of queued_cmd @qc
3307 * to point to a single memory buffer, @buf of byte length @buflen.
3310 * spin_lock_irqsave(host_set lock)
3313 void ata_sg_init_one(struct ata_queued_cmd *qc, void *buf, unsigned int buflen)
3315 struct scatterlist *sg;
3317 qc->flags |= ATA_QCFLAG_SINGLE;
3319 memset(&qc->sgent, 0, sizeof(qc->sgent));
3320 qc->__sg = &qc->sgent;
3322 qc->orig_n_elem = 1;
3326 sg_init_one(sg, buf, buflen);
3330 * ata_sg_init - Associate command with scatter-gather table.
3331 * @qc: Command to be associated
3332 * @sg: Scatter-gather table.
3333 * @n_elem: Number of elements in s/g table.
3335 * Initialize the data-related elements of queued_cmd @qc
3336 * to point to a scatter-gather table @sg, containing @n_elem
3340 * spin_lock_irqsave(host_set lock)
3343 void ata_sg_init(struct ata_queued_cmd *qc, struct scatterlist *sg,
3344 unsigned int n_elem)
3346 qc->flags |= ATA_QCFLAG_SG;
3348 qc->n_elem = n_elem;
3349 qc->orig_n_elem = n_elem;
3353 * ata_sg_setup_one - DMA-map the memory buffer associated with a command.
3354 * @qc: Command with memory buffer to be mapped.
3356 * DMA-map the memory buffer associated with queued_cmd @qc.
3359 * spin_lock_irqsave(host_set lock)
3362 * Zero on success, negative on error.
3365 static int ata_sg_setup_one(struct ata_queued_cmd *qc)
3367 struct ata_port *ap = qc->ap;
3368 int dir = qc->dma_dir;
3369 struct scatterlist *sg = qc->__sg;
3370 dma_addr_t dma_address;
3373 /* we must lengthen transfers to end on a 32-bit boundary */
3374 qc->pad_len = sg->length & 3;
3376 void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
3377 struct scatterlist *psg = &qc->pad_sgent;
3379 WARN_ON(qc->dev->class != ATA_DEV_ATAPI);
3381 memset(pad_buf, 0, ATA_DMA_PAD_SZ);
3383 if (qc->tf.flags & ATA_TFLAG_WRITE)
3384 memcpy(pad_buf, qc->buf_virt + sg->length - qc->pad_len,
3387 sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ);
3388 sg_dma_len(psg) = ATA_DMA_PAD_SZ;
3390 sg->length -= qc->pad_len;
3391 if (sg->length == 0)
3394 DPRINTK("padding done, sg->length=%u pad_len=%u\n",
3395 sg->length, qc->pad_len);
3403 dma_address = dma_map_single(ap->dev, qc->buf_virt,
3405 if (dma_mapping_error(dma_address)) {
3407 sg->length += qc->pad_len;
3411 sg_dma_address(sg) = dma_address;
3412 sg_dma_len(sg) = sg->length;
3415 DPRINTK("mapped buffer of %d bytes for %s\n", sg_dma_len(sg),
3416 qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
3422 * ata_sg_setup - DMA-map the scatter-gather table associated with a command.
3423 * @qc: Command with scatter-gather table to be mapped.
3425 * DMA-map the scatter-gather table associated with queued_cmd @qc.
3428 * spin_lock_irqsave(host_set lock)
3431 * Zero on success, negative on error.
3435 static int ata_sg_setup(struct ata_queued_cmd *qc)
3437 struct ata_port *ap = qc->ap;
3438 struct scatterlist *sg = qc->__sg;
3439 struct scatterlist *lsg = &sg[qc->n_elem - 1];
3440 int n_elem, pre_n_elem, dir, trim_sg = 0;
3442 VPRINTK("ENTER, ata%u\n", ap->id);
3443 WARN_ON(!(qc->flags & ATA_QCFLAG_SG));
3445 /* we must lengthen transfers to end on a 32-bit boundary */
3446 qc->pad_len = lsg->length & 3;
3448 void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
3449 struct scatterlist *psg = &qc->pad_sgent;
3450 unsigned int offset;
3452 WARN_ON(qc->dev->class != ATA_DEV_ATAPI);
3454 memset(pad_buf, 0, ATA_DMA_PAD_SZ);
3457 * psg->page/offset are used to copy to-be-written
3458 * data in this function or read data in ata_sg_clean.
3460 offset = lsg->offset + lsg->length - qc->pad_len;
3461 psg->page = nth_page(lsg->page, offset >> PAGE_SHIFT);
3462 psg->offset = offset_in_page(offset);
3464 if (qc->tf.flags & ATA_TFLAG_WRITE) {
3465 void *addr = kmap_atomic(psg->page, KM_IRQ0);
3466 memcpy(pad_buf, addr + psg->offset, qc->pad_len);
3467 kunmap_atomic(addr, KM_IRQ0);
3470 sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ);
3471 sg_dma_len(psg) = ATA_DMA_PAD_SZ;
3473 lsg->length -= qc->pad_len;
3474 if (lsg->length == 0)
3477 DPRINTK("padding done, sg[%d].length=%u pad_len=%u\n",
3478 qc->n_elem - 1, lsg->length, qc->pad_len);
3481 pre_n_elem = qc->n_elem;
3482 if (trim_sg && pre_n_elem)
3491 n_elem = dma_map_sg(ap->dev, sg, pre_n_elem, dir);
3493 /* restore last sg */
3494 lsg->length += qc->pad_len;
3498 DPRINTK("%d sg elements mapped\n", n_elem);
3501 qc->n_elem = n_elem;
3507 * swap_buf_le16 - swap halves of 16-bit words in place
3508 * @buf: Buffer to swap
3509 * @buf_words: Number of 16-bit words in buffer.
3511 * Swap halves of 16-bit words if needed to convert from
3512 * little-endian byte order to native cpu byte order, or
3516 * Inherited from caller.
3518 void swap_buf_le16(u16 *buf, unsigned int buf_words)
3523 for (i = 0; i < buf_words; i++)
3524 buf[i] = le16_to_cpu(buf[i]);
3525 #endif /* __BIG_ENDIAN */
3529 * ata_mmio_data_xfer - Transfer data by MMIO
3530 * @dev: device for this I/O
3532 * @buflen: buffer length
3533 * @write_data: read/write
3535 * Transfer data from/to the device data register by MMIO.
3538 * Inherited from caller.
3541 void ata_mmio_data_xfer(struct ata_device *adev, unsigned char *buf,
3542 unsigned int buflen, int write_data)
3544 struct ata_port *ap = adev->ap;
3546 unsigned int words = buflen >> 1;
3547 u16 *buf16 = (u16 *) buf;
3548 void __iomem *mmio = (void __iomem *)ap->ioaddr.data_addr;
3550 /* Transfer multiple of 2 bytes */
3552 for (i = 0; i < words; i++)
3553 writew(le16_to_cpu(buf16[i]), mmio);
3555 for (i = 0; i < words; i++)
3556 buf16[i] = cpu_to_le16(readw(mmio));
3559 /* Transfer trailing 1 byte, if any. */
3560 if (unlikely(buflen & 0x01)) {
3561 u16 align_buf[1] = { 0 };
3562 unsigned char *trailing_buf = buf + buflen - 1;
3565 memcpy(align_buf, trailing_buf, 1);
3566 writew(le16_to_cpu(align_buf[0]), mmio);
3568 align_buf[0] = cpu_to_le16(readw(mmio));
3569 memcpy(trailing_buf, align_buf, 1);
3575 * ata_pio_data_xfer - Transfer data by PIO
3576 * @adev: device to target
3578 * @buflen: buffer length
3579 * @write_data: read/write
3581 * Transfer data from/to the device data register by PIO.
3584 * Inherited from caller.
3587 void ata_pio_data_xfer(struct ata_device *adev, unsigned char *buf,
3588 unsigned int buflen, int write_data)
3590 struct ata_port *ap = adev->ap;
3591 unsigned int words = buflen >> 1;
3593 /* Transfer multiple of 2 bytes */
3595 outsw(ap->ioaddr.data_addr, buf, words);
3597 insw(ap->ioaddr.data_addr, buf, words);
3599 /* Transfer trailing 1 byte, if any. */
3600 if (unlikely(buflen & 0x01)) {
3601 u16 align_buf[1] = { 0 };
3602 unsigned char *trailing_buf = buf + buflen - 1;
3605 memcpy(align_buf, trailing_buf, 1);
3606 outw(le16_to_cpu(align_buf[0]), ap->ioaddr.data_addr);
3608 align_buf[0] = cpu_to_le16(inw(ap->ioaddr.data_addr));
3609 memcpy(trailing_buf, align_buf, 1);
3615 * ata_pio_sector - Transfer ATA_SECT_SIZE (512 bytes) of data.
3616 * @qc: Command on going
3618 * Transfer ATA_SECT_SIZE of data from/to the ATA device.
3621 * Inherited from caller.
3624 static void ata_pio_sector(struct ata_queued_cmd *qc)
3626 int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
3627 struct scatterlist *sg = qc->__sg;
3628 struct ata_port *ap = qc->ap;
3630 unsigned int offset;
3633 if (qc->cursect == (qc->nsect - 1))
3634 ap->hsm_task_state = HSM_ST_LAST;
3636 page = sg[qc->cursg].page;
3637 offset = sg[qc->cursg].offset + qc->cursg_ofs * ATA_SECT_SIZE;
3639 /* get the current page and offset */
3640 page = nth_page(page, (offset >> PAGE_SHIFT));
3641 offset %= PAGE_SIZE;
3643 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
3645 if (PageHighMem(page)) {
3646 unsigned long flags;
3648 /* FIXME: use a bounce buffer */
3649 local_irq_save(flags);
3650 buf = kmap_atomic(page, KM_IRQ0);
3652 /* do the actual data transfer */
3653 ap->ops->data_xfer(qc->dev, buf + offset, ATA_SECT_SIZE, do_write);
3655 kunmap_atomic(buf, KM_IRQ0);
3656 local_irq_restore(flags);
3658 buf = page_address(page);
3659 ap->ops->data_xfer(qc->dev, buf + offset, ATA_SECT_SIZE, do_write);
3665 if ((qc->cursg_ofs * ATA_SECT_SIZE) == (&sg[qc->cursg])->length) {
3672 * ata_pio_sectors - Transfer one or many 512-byte sectors.
3673 * @qc: Command on going
3675 * Transfer one or many ATA_SECT_SIZE of data from/to the
3676 * ATA device for the DRQ request.
3679 * Inherited from caller.
3682 static void ata_pio_sectors(struct ata_queued_cmd *qc)
3684 if (is_multi_taskfile(&qc->tf)) {
3685 /* READ/WRITE MULTIPLE */
3688 WARN_ON(qc->dev->multi_count == 0);
3690 nsect = min(qc->nsect - qc->cursect, qc->dev->multi_count);
3698 * atapi_send_cdb - Write CDB bytes to hardware
3699 * @ap: Port to which ATAPI device is attached.
3700 * @qc: Taskfile currently active
3702 * When device has indicated its readiness to accept
3703 * a CDB, this function is called. Send the CDB.
3709 static void atapi_send_cdb(struct ata_port *ap, struct ata_queued_cmd *qc)
3712 DPRINTK("send cdb\n");
3713 WARN_ON(qc->dev->cdb_len < 12);
3715 ap->ops->data_xfer(qc->dev, qc->cdb, qc->dev->cdb_len, 1);
3716 ata_altstatus(ap); /* flush */
3718 switch (qc->tf.protocol) {
3719 case ATA_PROT_ATAPI:
3720 ap->hsm_task_state = HSM_ST;
3722 case ATA_PROT_ATAPI_NODATA:
3723 ap->hsm_task_state = HSM_ST_LAST;
3725 case ATA_PROT_ATAPI_DMA:
3726 ap->hsm_task_state = HSM_ST_LAST;
3727 /* initiate bmdma */
3728 ap->ops->bmdma_start(qc);
3734 * __atapi_pio_bytes - Transfer data from/to the ATAPI device.
3735 * @qc: Command on going
3736 * @bytes: number of bytes
3738 * Transfer Transfer data from/to the ATAPI device.
3741 * Inherited from caller.
3745 static void __atapi_pio_bytes(struct ata_queued_cmd *qc, unsigned int bytes)
3747 int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
3748 struct scatterlist *sg = qc->__sg;
3749 struct ata_port *ap = qc->ap;
3752 unsigned int offset, count;
3754 if (qc->curbytes + bytes >= qc->nbytes)
3755 ap->hsm_task_state = HSM_ST_LAST;
3758 if (unlikely(qc->cursg >= qc->n_elem)) {
3760 * The end of qc->sg is reached and the device expects
3761 * more data to transfer. In order not to overrun qc->sg
3762 * and fulfill length specified in the byte count register,
3763 * - for read case, discard trailing data from the device
3764 * - for write case, padding zero data to the device
3766 u16 pad_buf[1] = { 0 };
3767 unsigned int words = bytes >> 1;
3770 if (words) /* warning if bytes > 1 */
3771 ata_dev_printk(qc->dev, KERN_WARNING,
3772 "%u bytes trailing data\n", bytes);
3774 for (i = 0; i < words; i++)
3775 ap->ops->data_xfer(qc->dev, (unsigned char*)pad_buf, 2, do_write);
3777 ap->hsm_task_state = HSM_ST_LAST;
3781 sg = &qc->__sg[qc->cursg];
3784 offset = sg->offset + qc->cursg_ofs;
3786 /* get the current page and offset */
3787 page = nth_page(page, (offset >> PAGE_SHIFT));
3788 offset %= PAGE_SIZE;
3790 /* don't overrun current sg */
3791 count = min(sg->length - qc->cursg_ofs, bytes);
3793 /* don't cross page boundaries */
3794 count = min(count, (unsigned int)PAGE_SIZE - offset);
3796 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
3798 if (PageHighMem(page)) {
3799 unsigned long flags;
3801 /* FIXME: use bounce buffer */
3802 local_irq_save(flags);
3803 buf = kmap_atomic(page, KM_IRQ0);
3805 /* do the actual data transfer */
3806 ap->ops->data_xfer(qc->dev, buf + offset, count, do_write);
3808 kunmap_atomic(buf, KM_IRQ0);
3809 local_irq_restore(flags);
3811 buf = page_address(page);
3812 ap->ops->data_xfer(qc->dev, buf + offset, count, do_write);
3816 qc->curbytes += count;
3817 qc->cursg_ofs += count;
3819 if (qc->cursg_ofs == sg->length) {
3829 * atapi_pio_bytes - Transfer data from/to the ATAPI device.
3830 * @qc: Command on going
3832 * Transfer Transfer data from/to the ATAPI device.
3835 * Inherited from caller.
3838 static void atapi_pio_bytes(struct ata_queued_cmd *qc)
3840 struct ata_port *ap = qc->ap;
3841 struct ata_device *dev = qc->dev;
3842 unsigned int ireason, bc_lo, bc_hi, bytes;
3843 int i_write, do_write = (qc->tf.flags & ATA_TFLAG_WRITE) ? 1 : 0;
3845 /* Abuse qc->result_tf for temp storage of intermediate TF
3846 * here to save some kernel stack usage.
3847 * For normal completion, qc->result_tf is not relevant. For
3848 * error, qc->result_tf is later overwritten by ata_qc_complete().
3849 * So, the correctness of qc->result_tf is not affected.
3851 ap->ops->tf_read(ap, &qc->result_tf);
3852 ireason = qc->result_tf.nsect;
3853 bc_lo = qc->result_tf.lbam;
3854 bc_hi = qc->result_tf.lbah;
3855 bytes = (bc_hi << 8) | bc_lo;
3857 /* shall be cleared to zero, indicating xfer of data */
3858 if (ireason & (1 << 0))
3861 /* make sure transfer direction matches expected */
3862 i_write = ((ireason & (1 << 1)) == 0) ? 1 : 0;
3863 if (do_write != i_write)
3866 VPRINTK("ata%u: xfering %d bytes\n", ap->id, bytes);
3868 __atapi_pio_bytes(qc, bytes);
3873 ata_dev_printk(dev, KERN_INFO, "ATAPI check failed\n");
3874 qc->err_mask |= AC_ERR_HSM;
3875 ap->hsm_task_state = HSM_ST_ERR;
3879 * ata_hsm_ok_in_wq - Check if the qc can be handled in the workqueue.
3880 * @ap: the target ata_port
3884 * 1 if ok in workqueue, 0 otherwise.
3887 static inline int ata_hsm_ok_in_wq(struct ata_port *ap, struct ata_queued_cmd *qc)
3889 if (qc->tf.flags & ATA_TFLAG_POLLING)
3892 if (ap->hsm_task_state == HSM_ST_FIRST) {
3893 if (qc->tf.protocol == ATA_PROT_PIO &&
3894 (qc->tf.flags & ATA_TFLAG_WRITE))
3897 if (is_atapi_taskfile(&qc->tf) &&
3898 !(qc->dev->flags & ATA_DFLAG_CDB_INTR))
3906 * ata_hsm_qc_complete - finish a qc running on standard HSM
3907 * @qc: Command to complete
3908 * @in_wq: 1 if called from workqueue, 0 otherwise
3910 * Finish @qc which is running on standard HSM.
3913 * If @in_wq is zero, spin_lock_irqsave(host_set lock).
3914 * Otherwise, none on entry and grabs host lock.
3916 static void ata_hsm_qc_complete(struct ata_queued_cmd *qc, int in_wq)
3918 struct ata_port *ap = qc->ap;
3919 unsigned long flags;
3921 if (ap->ops->error_handler) {
3923 spin_lock_irqsave(&ap->host_set->lock, flags);
3925 /* EH might have kicked in while host_set lock
3928 qc = ata_qc_from_tag(ap, qc->tag);
3930 if (likely(!(qc->err_mask & AC_ERR_HSM))) {
3932 ata_qc_complete(qc);
3934 ata_port_freeze(ap);
3937 spin_unlock_irqrestore(&ap->host_set->lock, flags);
3939 if (likely(!(qc->err_mask & AC_ERR_HSM)))
3940 ata_qc_complete(qc);
3942 ata_port_freeze(ap);
3946 spin_lock_irqsave(&ap->host_set->lock, flags);
3948 ata_qc_complete(qc);
3949 spin_unlock_irqrestore(&ap->host_set->lock, flags);
3951 ata_qc_complete(qc);
3954 ata_altstatus(ap); /* flush */
3958 * ata_hsm_move - move the HSM to the next state.
3959 * @ap: the target ata_port
3961 * @status: current device status
3962 * @in_wq: 1 if called from workqueue, 0 otherwise
3965 * 1 when poll next status needed, 0 otherwise.
3968 static int ata_hsm_move(struct ata_port *ap, struct ata_queued_cmd *qc,
3969 u8 status, int in_wq)
3971 unsigned long flags = 0;
3974 WARN_ON((qc->flags & ATA_QCFLAG_ACTIVE) == 0);
3976 /* Make sure ata_qc_issue_prot() does not throw things
3977 * like DMA polling into the workqueue. Notice that
3978 * in_wq is not equivalent to (qc->tf.flags & ATA_TFLAG_POLLING).
3980 WARN_ON(in_wq != ata_hsm_ok_in_wq(ap, qc));
3983 DPRINTK("ata%u: protocol %d task_state %d (dev_stat 0x%X)\n",
3984 ap->id, qc->tf.protocol, ap->hsm_task_state, status);
3986 switch (ap->hsm_task_state) {
3988 /* Send first data block or PACKET CDB */
3990 /* If polling, we will stay in the work queue after
3991 * sending the data. Otherwise, interrupt handler
3992 * takes over after sending the data.
3994 poll_next = (qc->tf.flags & ATA_TFLAG_POLLING);
3996 /* check device status */
3997 if (unlikely((status & ATA_DRQ) == 0)) {
3998 /* handle BSY=0, DRQ=0 as error */
3999 if (likely(status & (ATA_ERR | ATA_DF)))
4000 /* device stops HSM for abort/error */
4001 qc->err_mask |= AC_ERR_DEV;
4003 /* HSM violation. Let EH handle this */
4004 qc->err_mask |= AC_ERR_HSM;
4006 ap->hsm_task_state = HSM_ST_ERR;
4010 /* Device should not ask for data transfer (DRQ=1)
4011 * when it finds something wrong.
4012 * We ignore DRQ here and stop the HSM by
4013 * changing hsm_task_state to HSM_ST_ERR and
4014 * let the EH abort the command or reset the device.
4016 if (unlikely(status & (ATA_ERR | ATA_DF))) {
4017 printk(KERN_WARNING "ata%d: DRQ=1 with device error, dev_stat 0x%X\n",
4019 qc->err_mask |= AC_ERR_HSM;
4020 ap->hsm_task_state = HSM_ST_ERR;
4024 /* Send the CDB (atapi) or the first data block (ata pio out).
4025 * During the state transition, interrupt handler shouldn't
4026 * be invoked before the data transfer is complete and
4027 * hsm_task_state is changed. Hence, the following locking.
4030 spin_lock_irqsave(&ap->host_set->lock, flags);
4032 if (qc->tf.protocol == ATA_PROT_PIO) {
4033 /* PIO data out protocol.
4034 * send first data block.
4037 /* ata_pio_sectors() might change the state
4038 * to HSM_ST_LAST. so, the state is changed here
4039 * before ata_pio_sectors().
4041 ap->hsm_task_state = HSM_ST;
4042 ata_pio_sectors(qc);
4043 ata_altstatus(ap); /* flush */
4046 atapi_send_cdb(ap, qc);
4049 spin_unlock_irqrestore(&ap->host_set->lock, flags);
4051 /* if polling, ata_pio_task() handles the rest.
4052 * otherwise, interrupt handler takes over from here.
4057 /* complete command or read/write the data register */
4058 if (qc->tf.protocol == ATA_PROT_ATAPI) {
4059 /* ATAPI PIO protocol */
4060 if ((status & ATA_DRQ) == 0) {
4061 /* No more data to transfer or device error.
4062 * Device error will be tagged in HSM_ST_LAST.
4064 ap->hsm_task_state = HSM_ST_LAST;
4068 /* Device should not ask for data transfer (DRQ=1)
4069 * when it finds something wrong.
4070 * We ignore DRQ here and stop the HSM by
4071 * changing hsm_task_state to HSM_ST_ERR and
4072 * let the EH abort the command or reset the device.
4074 if (unlikely(status & (ATA_ERR | ATA_DF))) {
4075 printk(KERN_WARNING "ata%d: DRQ=1 with device error, dev_stat 0x%X\n",
4077 qc->err_mask |= AC_ERR_HSM;
4078 ap->hsm_task_state = HSM_ST_ERR;
4082 atapi_pio_bytes(qc);
4084 if (unlikely(ap->hsm_task_state == HSM_ST_ERR))
4085 /* bad ireason reported by device */
4089 /* ATA PIO protocol */
4090 if (unlikely((status & ATA_DRQ) == 0)) {
4091 /* handle BSY=0, DRQ=0 as error */
4092 if (likely(status & (ATA_ERR | ATA_DF)))
4093 /* device stops HSM for abort/error */
4094 qc->err_mask |= AC_ERR_DEV;
4096 /* HSM violation. Let EH handle this */
4097 qc->err_mask |= AC_ERR_HSM;
4099 ap->hsm_task_state = HSM_ST_ERR;
4103 /* For PIO reads, some devices may ask for
4104 * data transfer (DRQ=1) alone with ERR=1.
4105 * We respect DRQ here and transfer one
4106 * block of junk data before changing the
4107 * hsm_task_state to HSM_ST_ERR.
4109 * For PIO writes, ERR=1 DRQ=1 doesn't make
4110 * sense since the data block has been
4111 * transferred to the device.
4113 if (unlikely(status & (ATA_ERR | ATA_DF))) {
4114 /* data might be corrputed */
4115 qc->err_mask |= AC_ERR_DEV;
4117 if (!(qc->tf.flags & ATA_TFLAG_WRITE)) {
4118 ata_pio_sectors(qc);
4120 status = ata_wait_idle(ap);
4123 if (status & (ATA_BUSY | ATA_DRQ))
4124 qc->err_mask |= AC_ERR_HSM;
4126 /* ata_pio_sectors() might change the
4127 * state to HSM_ST_LAST. so, the state
4128 * is changed after ata_pio_sectors().
4130 ap->hsm_task_state = HSM_ST_ERR;
4134 ata_pio_sectors(qc);
4136 if (ap->hsm_task_state == HSM_ST_LAST &&
4137 (!(qc->tf.flags & ATA_TFLAG_WRITE))) {
4140 status = ata_wait_idle(ap);
4145 ata_altstatus(ap); /* flush */
4150 if (unlikely(!ata_ok(status))) {
4151 qc->err_mask |= __ac_err_mask(status);
4152 ap->hsm_task_state = HSM_ST_ERR;
4156 /* no more data to transfer */
4157 DPRINTK("ata%u: dev %u command complete, drv_stat 0x%x\n",
4158 ap->id, qc->dev->devno, status);
4160 WARN_ON(qc->err_mask);
4162 ap->hsm_task_state = HSM_ST_IDLE;
4164 /* complete taskfile transaction */
4165 ata_hsm_qc_complete(qc, in_wq);
4171 /* make sure qc->err_mask is available to
4172 * know what's wrong and recover
4174 WARN_ON(qc->err_mask == 0);
4176 ap->hsm_task_state = HSM_ST_IDLE;
4178 /* complete taskfile transaction */
4179 ata_hsm_qc_complete(qc, in_wq);
4191 static void ata_pio_task(void *_data)
4193 struct ata_queued_cmd *qc = _data;
4194 struct ata_port *ap = qc->ap;
4199 WARN_ON(ap->hsm_task_state == HSM_ST_IDLE);
4202 * This is purely heuristic. This is a fast path.
4203 * Sometimes when we enter, BSY will be cleared in
4204 * a chk-status or two. If not, the drive is probably seeking
4205 * or something. Snooze for a couple msecs, then
4206 * chk-status again. If still busy, queue delayed work.
4208 status = ata_busy_wait(ap, ATA_BUSY, 5);
4209 if (status & ATA_BUSY) {
4211 status = ata_busy_wait(ap, ATA_BUSY, 10);
4212 if (status & ATA_BUSY) {
4213 ata_port_queue_task(ap, ata_pio_task, qc, ATA_SHORT_PAUSE);
4219 poll_next = ata_hsm_move(ap, qc, status, 1);
4221 /* another command or interrupt handler
4222 * may be running at this point.
4229 * ata_qc_new - Request an available ATA command, for queueing
4230 * @ap: Port associated with device @dev
4231 * @dev: Device from whom we request an available command structure
4237 static struct ata_queued_cmd *ata_qc_new(struct ata_port *ap)
4239 struct ata_queued_cmd *qc = NULL;
4242 /* no command while frozen */
4243 if (unlikely(ap->flags & ATA_FLAG_FROZEN))
4246 /* the last tag is reserved for internal command. */
4247 for (i = 0; i < ATA_MAX_QUEUE - 1; i++)
4248 if (!test_and_set_bit(i, &ap->qc_allocated)) {
4249 qc = __ata_qc_from_tag(ap, i);
4260 * ata_qc_new_init - Request an available ATA command, and initialize it
4261 * @dev: Device from whom we request an available command structure
4267 struct ata_queued_cmd *ata_qc_new_init(struct ata_device *dev)
4269 struct ata_port *ap = dev->ap;
4270 struct ata_queued_cmd *qc;
4272 qc = ata_qc_new(ap);
4285 * ata_qc_free - free unused ata_queued_cmd
4286 * @qc: Command to complete
4288 * Designed to free unused ata_queued_cmd object
4289 * in case something prevents using it.
4292 * spin_lock_irqsave(host_set lock)
4294 void ata_qc_free(struct ata_queued_cmd *qc)
4296 struct ata_port *ap = qc->ap;
4299 WARN_ON(qc == NULL); /* ata_qc_from_tag _might_ return NULL */
4303 if (likely(ata_tag_valid(tag))) {
4304 qc->tag = ATA_TAG_POISON;
4305 clear_bit(tag, &ap->qc_allocated);
4309 void __ata_qc_complete(struct ata_queued_cmd *qc)
4311 struct ata_port *ap = qc->ap;
4313 WARN_ON(qc == NULL); /* ata_qc_from_tag _might_ return NULL */
4314 WARN_ON(!(qc->flags & ATA_QCFLAG_ACTIVE));
4316 if (likely(qc->flags & ATA_QCFLAG_DMAMAP))
4319 /* command should be marked inactive atomically with qc completion */
4320 if (qc->tf.protocol == ATA_PROT_NCQ)
4321 ap->sactive &= ~(1 << qc->tag);
4323 ap->active_tag = ATA_TAG_POISON;
4325 /* atapi: mark qc as inactive to prevent the interrupt handler
4326 * from completing the command twice later, before the error handler
4327 * is called. (when rc != 0 and atapi request sense is needed)
4329 qc->flags &= ~ATA_QCFLAG_ACTIVE;
4330 ap->qc_active &= ~(1 << qc->tag);
4332 /* call completion callback */
4333 qc->complete_fn(qc);
4337 * ata_qc_complete - Complete an active ATA command
4338 * @qc: Command to complete
4339 * @err_mask: ATA Status register contents
4341 * Indicate to the mid and upper layers that an ATA
4342 * command has completed, with either an ok or not-ok status.
4345 * spin_lock_irqsave(host_set lock)
4347 void ata_qc_complete(struct ata_queued_cmd *qc)
4349 struct ata_port *ap = qc->ap;
4351 /* XXX: New EH and old EH use different mechanisms to
4352 * synchronize EH with regular execution path.
4354 * In new EH, a failed qc is marked with ATA_QCFLAG_FAILED.
4355 * Normal execution path is responsible for not accessing a
4356 * failed qc. libata core enforces the rule by returning NULL
4357 * from ata_qc_from_tag() for failed qcs.
4359 * Old EH depends on ata_qc_complete() nullifying completion
4360 * requests if ATA_QCFLAG_EH_SCHEDULED is set. Old EH does
4361 * not synchronize with interrupt handler. Only PIO task is
4364 if (ap->ops->error_handler) {
4365 WARN_ON(ap->flags & ATA_FLAG_FROZEN);
4367 if (unlikely(qc->err_mask))
4368 qc->flags |= ATA_QCFLAG_FAILED;
4370 if (unlikely(qc->flags & ATA_QCFLAG_FAILED)) {
4371 if (!ata_tag_internal(qc->tag)) {
4372 /* always fill result TF for failed qc */
4373 ap->ops->tf_read(ap, &qc->result_tf);
4374 ata_qc_schedule_eh(qc);
4379 /* read result TF if requested */
4380 if (qc->flags & ATA_QCFLAG_RESULT_TF)
4381 ap->ops->tf_read(ap, &qc->result_tf);
4383 __ata_qc_complete(qc);
4385 if (qc->flags & ATA_QCFLAG_EH_SCHEDULED)
4388 /* read result TF if failed or requested */
4389 if (qc->err_mask || qc->flags & ATA_QCFLAG_RESULT_TF)
4390 ap->ops->tf_read(ap, &qc->result_tf);
4392 __ata_qc_complete(qc);
4397 * ata_qc_complete_multiple - Complete multiple qcs successfully
4398 * @ap: port in question
4399 * @qc_active: new qc_active mask
4400 * @finish_qc: LLDD callback invoked before completing a qc
4402 * Complete in-flight commands. This functions is meant to be
4403 * called from low-level driver's interrupt routine to complete
4404 * requests normally. ap->qc_active and @qc_active is compared
4405 * and commands are completed accordingly.
4408 * spin_lock_irqsave(host_set lock)
4411 * Number of completed commands on success, -errno otherwise.
4413 int ata_qc_complete_multiple(struct ata_port *ap, u32 qc_active,
4414 void (*finish_qc)(struct ata_queued_cmd *))
4420 done_mask = ap->qc_active ^ qc_active;
4422 if (unlikely(done_mask & qc_active)) {
4423 ata_port_printk(ap, KERN_ERR, "illegal qc_active transition "
4424 "(%08x->%08x)\n", ap->qc_active, qc_active);
4428 for (i = 0; i < ATA_MAX_QUEUE; i++) {
4429 struct ata_queued_cmd *qc;
4431 if (!(done_mask & (1 << i)))
4434 if ((qc = ata_qc_from_tag(ap, i))) {
4437 ata_qc_complete(qc);
4445 static inline int ata_should_dma_map(struct ata_queued_cmd *qc)
4447 struct ata_port *ap = qc->ap;
4449 switch (qc->tf.protocol) {
4452 case ATA_PROT_ATAPI_DMA:
4455 case ATA_PROT_ATAPI:
4457 if (ap->flags & ATA_FLAG_PIO_DMA)
4470 * ata_qc_issue - issue taskfile to device
4471 * @qc: command to issue to device
4473 * Prepare an ATA command to submission to device.
4474 * This includes mapping the data into a DMA-able
4475 * area, filling in the S/G table, and finally
4476 * writing the taskfile to hardware, starting the command.
4479 * spin_lock_irqsave(host_set lock)
4481 void ata_qc_issue(struct ata_queued_cmd *qc)
4483 struct ata_port *ap = qc->ap;
4485 /* Make sure only one non-NCQ command is outstanding. The
4486 * check is skipped for old EH because it reuses active qc to
4487 * request ATAPI sense.
4489 WARN_ON(ap->ops->error_handler && ata_tag_valid(ap->active_tag));
4491 if (qc->tf.protocol == ATA_PROT_NCQ) {
4492 WARN_ON(ap->sactive & (1 << qc->tag));
4493 ap->sactive |= 1 << qc->tag;
4495 WARN_ON(ap->sactive);
4496 ap->active_tag = qc->tag;
4499 qc->flags |= ATA_QCFLAG_ACTIVE;
4500 ap->qc_active |= 1 << qc->tag;
4502 if (ata_should_dma_map(qc)) {
4503 if (qc->flags & ATA_QCFLAG_SG) {
4504 if (ata_sg_setup(qc))
4506 } else if (qc->flags & ATA_QCFLAG_SINGLE) {
4507 if (ata_sg_setup_one(qc))
4511 qc->flags &= ~ATA_QCFLAG_DMAMAP;
4514 ap->ops->qc_prep(qc);
4516 qc->err_mask |= ap->ops->qc_issue(qc);
4517 if (unlikely(qc->err_mask))
4522 qc->flags &= ~ATA_QCFLAG_DMAMAP;
4523 qc->err_mask |= AC_ERR_SYSTEM;
4525 ata_qc_complete(qc);
4529 * ata_qc_issue_prot - issue taskfile to device in proto-dependent manner
4530 * @qc: command to issue to device
4532 * Using various libata functions and hooks, this function
4533 * starts an ATA command. ATA commands are grouped into
4534 * classes called "protocols", and issuing each type of protocol
4535 * is slightly different.
4537 * May be used as the qc_issue() entry in ata_port_operations.
4540 * spin_lock_irqsave(host_set lock)
4543 * Zero on success, AC_ERR_* mask on failure
4546 unsigned int ata_qc_issue_prot(struct ata_queued_cmd *qc)
4548 struct ata_port *ap = qc->ap;
4550 /* Use polling pio if the LLD doesn't handle
4551 * interrupt driven pio and atapi CDB interrupt.
4553 if (ap->flags & ATA_FLAG_PIO_POLLING) {
4554 switch (qc->tf.protocol) {
4556 case ATA_PROT_ATAPI:
4557 case ATA_PROT_ATAPI_NODATA:
4558 qc->tf.flags |= ATA_TFLAG_POLLING;
4560 case ATA_PROT_ATAPI_DMA:
4561 if (qc->dev->flags & ATA_DFLAG_CDB_INTR)
4562 /* see ata_check_atapi_dma() */
4570 /* select the device */
4571 ata_dev_select(ap, qc->dev->devno, 1, 0);
4573 /* start the command */
4574 switch (qc->tf.protocol) {
4575 case ATA_PROT_NODATA:
4576 if (qc->tf.flags & ATA_TFLAG_POLLING)
4577 ata_qc_set_polling(qc);
4579 ata_tf_to_host(ap, &qc->tf);
4580 ap->hsm_task_state = HSM_ST_LAST;
4582 if (qc->tf.flags & ATA_TFLAG_POLLING)
4583 ata_port_queue_task(ap, ata_pio_task, qc, 0);
4588 WARN_ON(qc->tf.flags & ATA_TFLAG_POLLING);
4590 ap->ops->tf_load(ap, &qc->tf); /* load tf registers */
4591 ap->ops->bmdma_setup(qc); /* set up bmdma */
4592 ap->ops->bmdma_start(qc); /* initiate bmdma */
4593 ap->hsm_task_state = HSM_ST_LAST;
4597 if (qc->tf.flags & ATA_TFLAG_POLLING)
4598 ata_qc_set_polling(qc);
4600 ata_tf_to_host(ap, &qc->tf);
4602 if (qc->tf.flags & ATA_TFLAG_WRITE) {
4603 /* PIO data out protocol */
4604 ap->hsm_task_state = HSM_ST_FIRST;
4605 ata_port_queue_task(ap, ata_pio_task, qc, 0);
4607 /* always send first data block using
4608 * the ata_pio_task() codepath.
4611 /* PIO data in protocol */
4612 ap->hsm_task_state = HSM_ST;
4614 if (qc->tf.flags & ATA_TFLAG_POLLING)
4615 ata_port_queue_task(ap, ata_pio_task, qc, 0);
4617 /* if polling, ata_pio_task() handles the rest.
4618 * otherwise, interrupt handler takes over from here.
4624 case ATA_PROT_ATAPI:
4625 case ATA_PROT_ATAPI_NODATA:
4626 if (qc->tf.flags & ATA_TFLAG_POLLING)
4627 ata_qc_set_polling(qc);
4629 ata_tf_to_host(ap, &qc->tf);
4631 ap->hsm_task_state = HSM_ST_FIRST;
4633 /* send cdb by polling if no cdb interrupt */
4634 if ((!(qc->dev->flags & ATA_DFLAG_CDB_INTR)) ||
4635 (qc->tf.flags & ATA_TFLAG_POLLING))
4636 ata_port_queue_task(ap, ata_pio_task, qc, 0);
4639 case ATA_PROT_ATAPI_DMA:
4640 WARN_ON(qc->tf.flags & ATA_TFLAG_POLLING);
4642 ap->ops->tf_load(ap, &qc->tf); /* load tf registers */
4643 ap->ops->bmdma_setup(qc); /* set up bmdma */
4644 ap->hsm_task_state = HSM_ST_FIRST;
4646 /* send cdb by polling if no cdb interrupt */
4647 if (!(qc->dev->flags & ATA_DFLAG_CDB_INTR))
4648 ata_port_queue_task(ap, ata_pio_task, qc, 0);
4653 return AC_ERR_SYSTEM;
4660 * ata_host_intr - Handle host interrupt for given (port, task)
4661 * @ap: Port on which interrupt arrived (possibly...)
4662 * @qc: Taskfile currently active in engine
4664 * Handle host interrupt for given queued command. Currently,
4665 * only DMA interrupts are handled. All other commands are
4666 * handled via polling with interrupts disabled (nIEN bit).
4669 * spin_lock_irqsave(host_set lock)
4672 * One if interrupt was handled, zero if not (shared irq).
4675 inline unsigned int ata_host_intr (struct ata_port *ap,
4676 struct ata_queued_cmd *qc)
4678 u8 status, host_stat = 0;
4680 VPRINTK("ata%u: protocol %d task_state %d\n",
4681 ap->id, qc->tf.protocol, ap->hsm_task_state);
4683 /* Check whether we are expecting interrupt in this state */
4684 switch (ap->hsm_task_state) {
4686 /* Some pre-ATAPI-4 devices assert INTRQ
4687 * at this state when ready to receive CDB.
4690 /* Check the ATA_DFLAG_CDB_INTR flag is enough here.
4691 * The flag was turned on only for atapi devices.
4692 * No need to check is_atapi_taskfile(&qc->tf) again.
4694 if (!(qc->dev->flags & ATA_DFLAG_CDB_INTR))
4698 if (qc->tf.protocol == ATA_PROT_DMA ||
4699 qc->tf.protocol == ATA_PROT_ATAPI_DMA) {
4700 /* check status of DMA engine */
4701 host_stat = ap->ops->bmdma_status(ap);
4702 VPRINTK("ata%u: host_stat 0x%X\n", ap->id, host_stat);
4704 /* if it's not our irq... */
4705 if (!(host_stat & ATA_DMA_INTR))
4708 /* before we do anything else, clear DMA-Start bit */
4709 ap->ops->bmdma_stop(qc);
4711 if (unlikely(host_stat & ATA_DMA_ERR)) {
4712 /* error when transfering data to/from memory */
4713 qc->err_mask |= AC_ERR_HOST_BUS;
4714 ap->hsm_task_state = HSM_ST_ERR;
4724 /* check altstatus */
4725 status = ata_altstatus(ap);
4726 if (status & ATA_BUSY)
4729 /* check main status, clearing INTRQ */
4730 status = ata_chk_status(ap);
4731 if (unlikely(status & ATA_BUSY))
4734 /* ack bmdma irq events */
4735 ap->ops->irq_clear(ap);
4737 ata_hsm_move(ap, qc, status, 0);
4738 return 1; /* irq handled */
4741 ap->stats.idle_irq++;
4744 if ((ap->stats.idle_irq % 1000) == 0) {
4745 ata_irq_ack(ap, 0); /* debug trap */
4746 ata_port_printk(ap, KERN_WARNING, "irq trap\n");
4750 return 0; /* irq not handled */
4754 * ata_interrupt - Default ATA host interrupt handler
4755 * @irq: irq line (unused)
4756 * @dev_instance: pointer to our ata_host_set information structure
4759 * Default interrupt handler for PCI IDE devices. Calls
4760 * ata_host_intr() for each port that is not disabled.
4763 * Obtains host_set lock during operation.
4766 * IRQ_NONE or IRQ_HANDLED.
4769 irqreturn_t ata_interrupt (int irq, void *dev_instance, struct pt_regs *regs)
4771 struct ata_host_set *host_set = dev_instance;
4773 unsigned int handled = 0;
4774 unsigned long flags;
4776 /* TODO: make _irqsave conditional on x86 PCI IDE legacy mode */
4777 spin_lock_irqsave(&host_set->lock, flags);
4779 for (i = 0; i < host_set->n_ports; i++) {
4780 struct ata_port *ap;
4782 ap = host_set->ports[i];
4784 !(ap->flags & ATA_FLAG_DISABLED)) {
4785 struct ata_queued_cmd *qc;
4787 qc = ata_qc_from_tag(ap, ap->active_tag);
4788 if (qc && (!(qc->tf.flags & ATA_TFLAG_POLLING)) &&
4789 (qc->flags & ATA_QCFLAG_ACTIVE))
4790 handled |= ata_host_intr(ap, qc);
4794 spin_unlock_irqrestore(&host_set->lock, flags);
4796 return IRQ_RETVAL(handled);
4800 * sata_scr_valid - test whether SCRs are accessible
4801 * @ap: ATA port to test SCR accessibility for
4803 * Test whether SCRs are accessible for @ap.
4809 * 1 if SCRs are accessible, 0 otherwise.
4811 int sata_scr_valid(struct ata_port *ap)
4813 return ap->cbl == ATA_CBL_SATA && ap->ops->scr_read;
4817 * sata_scr_read - read SCR register of the specified port
4818 * @ap: ATA port to read SCR for
4820 * @val: Place to store read value
4822 * Read SCR register @reg of @ap into *@val. This function is
4823 * guaranteed to succeed if the cable type of the port is SATA
4824 * and the port implements ->scr_read.
4830 * 0 on success, negative errno on failure.
4832 int sata_scr_read(struct ata_port *ap, int reg, u32 *val)
4834 if (sata_scr_valid(ap)) {
4835 *val = ap->ops->scr_read(ap, reg);
4842 * sata_scr_write - write SCR register of the specified port
4843 * @ap: ATA port to write SCR for
4844 * @reg: SCR to write
4845 * @val: value to write
4847 * Write @val to SCR register @reg of @ap. This function is
4848 * guaranteed to succeed if the cable type of the port is SATA
4849 * and the port implements ->scr_read.
4855 * 0 on success, negative errno on failure.
4857 int sata_scr_write(struct ata_port *ap, int reg, u32 val)
4859 if (sata_scr_valid(ap)) {
4860 ap->ops->scr_write(ap, reg, val);
4867 * sata_scr_write_flush - write SCR register of the specified port and flush
4868 * @ap: ATA port to write SCR for
4869 * @reg: SCR to write
4870 * @val: value to write
4872 * This function is identical to sata_scr_write() except that this
4873 * function performs flush after writing to the register.
4879 * 0 on success, negative errno on failure.
4881 int sata_scr_write_flush(struct ata_port *ap, int reg, u32 val)
4883 if (sata_scr_valid(ap)) {
4884 ap->ops->scr_write(ap, reg, val);
4885 ap->ops->scr_read(ap, reg);
4892 * ata_port_online - test whether the given port is online
4893 * @ap: ATA port to test
4895 * Test whether @ap is online. Note that this function returns 0
4896 * if online status of @ap cannot be obtained, so
4897 * ata_port_online(ap) != !ata_port_offline(ap).
4903 * 1 if the port online status is available and online.
4905 int ata_port_online(struct ata_port *ap)
4909 if (!sata_scr_read(ap, SCR_STATUS, &sstatus) && (sstatus & 0xf) == 0x3)
4915 * ata_port_offline - test whether the given port is offline
4916 * @ap: ATA port to test
4918 * Test whether @ap is offline. Note that this function returns
4919 * 0 if offline status of @ap cannot be obtained, so
4920 * ata_port_online(ap) != !ata_port_offline(ap).
4926 * 1 if the port offline status is available and offline.
4928 int ata_port_offline(struct ata_port *ap)
4932 if (!sata_scr_read(ap, SCR_STATUS, &sstatus) && (sstatus & 0xf) != 0x3)
4938 * Execute a 'simple' command, that only consists of the opcode 'cmd' itself,
4939 * without filling any other registers
4941 static int ata_do_simple_cmd(struct ata_device *dev, u8 cmd)
4943 struct ata_taskfile tf;
4946 ata_tf_init(dev, &tf);
4949 tf.flags |= ATA_TFLAG_DEVICE;
4950 tf.protocol = ATA_PROT_NODATA;
4952 err = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0);
4954 ata_dev_printk(dev, KERN_ERR, "%s: ata command failed: %d\n",
4960 static int ata_flush_cache(struct ata_device *dev)
4964 if (!ata_try_flush_cache(dev))
4967 if (ata_id_has_flush_ext(dev->id))
4968 cmd = ATA_CMD_FLUSH_EXT;
4970 cmd = ATA_CMD_FLUSH;
4972 return ata_do_simple_cmd(dev, cmd);
4975 static int ata_standby_drive(struct ata_device *dev)
4977 return ata_do_simple_cmd(dev, ATA_CMD_STANDBYNOW1);
4980 static int ata_start_drive(struct ata_device *dev)
4982 return ata_do_simple_cmd(dev, ATA_CMD_IDLEIMMEDIATE);
4986 * ata_device_resume - wakeup a previously suspended devices
4987 * @dev: the device to resume
4989 * Kick the drive back into action, by sending it an idle immediate
4990 * command and making sure its transfer mode matches between drive
4994 int ata_device_resume(struct ata_device *dev)
4996 struct ata_port *ap = dev->ap;
4998 if (ap->flags & ATA_FLAG_SUSPENDED) {
4999 struct ata_device *failed_dev;
5000 ap->flags &= ~ATA_FLAG_SUSPENDED;
5001 while (ata_set_mode(ap, &failed_dev))
5002 ata_dev_disable(failed_dev);
5004 if (!ata_dev_enabled(dev))
5006 if (dev->class == ATA_DEV_ATA)
5007 ata_start_drive(dev);
5013 * ata_device_suspend - prepare a device for suspend
5014 * @dev: the device to suspend
5015 * @state: target power management state
5017 * Flush the cache on the drive, if appropriate, then issue a
5018 * standbynow command.
5020 int ata_device_suspend(struct ata_device *dev, pm_message_t state)
5022 struct ata_port *ap = dev->ap;
5024 if (!ata_dev_enabled(dev))
5026 if (dev->class == ATA_DEV_ATA)
5027 ata_flush_cache(dev);
5029 if (state.event != PM_EVENT_FREEZE)
5030 ata_standby_drive(dev);
5031 ap->flags |= ATA_FLAG_SUSPENDED;
5036 * ata_port_start - Set port up for dma.
5037 * @ap: Port to initialize
5039 * Called just after data structures for each port are
5040 * initialized. Allocates space for PRD table.
5042 * May be used as the port_start() entry in ata_port_operations.
5045 * Inherited from caller.
5048 int ata_port_start (struct ata_port *ap)
5050 struct device *dev = ap->dev;
5053 ap->prd = dma_alloc_coherent(dev, ATA_PRD_TBL_SZ, &ap->prd_dma, GFP_KERNEL);
5057 rc = ata_pad_alloc(ap, dev);
5059 dma_free_coherent(dev, ATA_PRD_TBL_SZ, ap->prd, ap->prd_dma);
5063 DPRINTK("prd alloc, virt %p, dma %llx\n", ap->prd, (unsigned long long) ap->prd_dma);
5070 * ata_port_stop - Undo ata_port_start()
5071 * @ap: Port to shut down
5073 * Frees the PRD table.
5075 * May be used as the port_stop() entry in ata_port_operations.
5078 * Inherited from caller.
5081 void ata_port_stop (struct ata_port *ap)
5083 struct device *dev = ap->dev;
5085 dma_free_coherent(dev, ATA_PRD_TBL_SZ, ap->prd, ap->prd_dma);
5086 ata_pad_free(ap, dev);
5089 void ata_host_stop (struct ata_host_set *host_set)
5091 if (host_set->mmio_base)
5092 iounmap(host_set->mmio_base);
5097 * ata_host_remove - Unregister SCSI host structure with upper layers
5098 * @ap: Port to unregister
5099 * @do_unregister: 1 if we fully unregister, 0 to just stop the port
5102 * Inherited from caller.
5105 static void ata_host_remove(struct ata_port *ap, unsigned int do_unregister)
5107 struct Scsi_Host *sh = ap->host;
5112 scsi_remove_host(sh);
5114 ap->ops->port_stop(ap);
5118 * ata_host_init - Initialize an ata_port structure
5119 * @ap: Structure to initialize
5120 * @host: associated SCSI mid-layer structure
5121 * @host_set: Collection of hosts to which @ap belongs
5122 * @ent: Probe information provided by low-level driver
5123 * @port_no: Port number associated with this ata_port
5125 * Initialize a new ata_port structure, and its associated
5129 * Inherited from caller.
5132 static void ata_host_init(struct ata_port *ap, struct Scsi_Host *host,
5133 struct ata_host_set *host_set,
5134 const struct ata_probe_ent *ent, unsigned int port_no)
5140 host->max_channel = 1;
5141 host->unique_id = ata_unique_id++;
5142 host->max_cmd_len = 12;
5144 ap->flags = ATA_FLAG_DISABLED;
5145 ap->id = host->unique_id;
5147 ap->ctl = ATA_DEVCTL_OBS;
5148 ap->host_set = host_set;
5150 ap->port_no = port_no;
5152 ent->legacy_mode ? ent->hard_port_no : port_no;
5153 ap->pio_mask = ent->pio_mask;
5154 ap->mwdma_mask = ent->mwdma_mask;
5155 ap->udma_mask = ent->udma_mask;
5156 ap->flags |= ent->host_flags;
5157 ap->ops = ent->port_ops;
5158 ap->sata_spd_limit = UINT_MAX;
5159 ap->active_tag = ATA_TAG_POISON;
5160 ap->last_ctl = 0xFF;
5162 INIT_WORK(&ap->port_task, NULL, NULL);
5163 INIT_LIST_HEAD(&ap->eh_done_q);
5165 /* set cable type */
5166 ap->cbl = ATA_CBL_NONE;
5167 if (ap->flags & ATA_FLAG_SATA)
5168 ap->cbl = ATA_CBL_SATA;
5170 for (i = 0; i < ATA_MAX_DEVICES; i++) {
5171 struct ata_device *dev = &ap->device[i];
5174 dev->pio_mask = UINT_MAX;
5175 dev->mwdma_mask = UINT_MAX;
5176 dev->udma_mask = UINT_MAX;
5180 ap->stats.unhandled_irq = 1;
5181 ap->stats.idle_irq = 1;
5184 memcpy(&ap->ioaddr, &ent->port[port_no], sizeof(struct ata_ioports));
5188 * ata_host_add - Attach low-level ATA driver to system
5189 * @ent: Information provided by low-level driver
5190 * @host_set: Collections of ports to which we add
5191 * @port_no: Port number associated with this host
5193 * Attach low-level ATA driver to system.
5196 * PCI/etc. bus probe sem.
5199 * New ata_port on success, for NULL on error.
5202 static struct ata_port * ata_host_add(const struct ata_probe_ent *ent,
5203 struct ata_host_set *host_set,
5204 unsigned int port_no)
5206 struct Scsi_Host *host;
5207 struct ata_port *ap;
5212 if (!ent->port_ops->probe_reset &&
5213 !(ent->host_flags & (ATA_FLAG_SATA_RESET | ATA_FLAG_SRST))) {
5214 printk(KERN_ERR "ata%u: no reset mechanism available\n",
5219 host = scsi_host_alloc(ent->sht, sizeof(struct ata_port));
5223 host->transportt = &ata_scsi_transport_template;
5225 ap = ata_shost_to_port(host);
5227 ata_host_init(ap, host, host_set, ent, port_no);
5229 rc = ap->ops->port_start(ap);
5236 scsi_host_put(host);
5241 * ata_device_add - Register hardware device with ATA and SCSI layers
5242 * @ent: Probe information describing hardware device to be registered
5244 * This function processes the information provided in the probe
5245 * information struct @ent, allocates the necessary ATA and SCSI
5246 * host information structures, initializes them, and registers
5247 * everything with requisite kernel subsystems.
5249 * This function requests irqs, probes the ATA bus, and probes
5253 * PCI/etc. bus probe sem.
5256 * Number of ports registered. Zero on error (no ports registered).
5259 int ata_device_add(const struct ata_probe_ent *ent)
5261 unsigned int count = 0, i;
5262 struct device *dev = ent->dev;
5263 struct ata_host_set *host_set;
5266 /* alloc a container for our list of ATA ports (buses) */
5267 host_set = kzalloc(sizeof(struct ata_host_set) +
5268 (ent->n_ports * sizeof(void *)), GFP_KERNEL);
5271 spin_lock_init(&host_set->lock);
5273 host_set->dev = dev;
5274 host_set->n_ports = ent->n_ports;
5275 host_set->irq = ent->irq;
5276 host_set->mmio_base = ent->mmio_base;
5277 host_set->private_data = ent->private_data;
5278 host_set->ops = ent->port_ops;
5279 host_set->flags = ent->host_set_flags;
5281 /* register each port bound to this device */
5282 for (i = 0; i < ent->n_ports; i++) {
5283 struct ata_port *ap;
5284 unsigned long xfer_mode_mask;
5286 ap = ata_host_add(ent, host_set, i);
5290 host_set->ports[i] = ap;
5291 xfer_mode_mask =(ap->udma_mask << ATA_SHIFT_UDMA) |
5292 (ap->mwdma_mask << ATA_SHIFT_MWDMA) |
5293 (ap->pio_mask << ATA_SHIFT_PIO);
5295 /* print per-port info to dmesg */
5296 ata_port_printk(ap, KERN_INFO, "%cATA max %s cmd 0x%lX "
5297 "ctl 0x%lX bmdma 0x%lX irq %lu\n",
5298 ap->flags & ATA_FLAG_SATA ? 'S' : 'P',
5299 ata_mode_string(xfer_mode_mask),
5300 ap->ioaddr.cmd_addr,
5301 ap->ioaddr.ctl_addr,
5302 ap->ioaddr.bmdma_addr,
5306 host_set->ops->irq_clear(ap);
5307 ata_eh_freeze_port(ap); /* freeze port before requesting IRQ */
5314 /* obtain irq, that is shared between channels */
5315 if (request_irq(ent->irq, ent->port_ops->irq_handler, ent->irq_flags,
5316 DRV_NAME, host_set))
5319 /* perform each probe synchronously */
5320 DPRINTK("probe begin\n");
5321 for (i = 0; i < count; i++) {
5322 struct ata_port *ap;
5325 ap = host_set->ports[i];
5327 DPRINTK("ata%u: bus probe begin\n", ap->id);
5328 rc = ata_bus_probe(ap);
5329 DPRINTK("ata%u: bus probe end\n", ap->id);
5332 /* FIXME: do something useful here?
5333 * Current libata behavior will
5334 * tear down everything when
5335 * the module is removed
5336 * or the h/w is unplugged.
5340 rc = scsi_add_host(ap->host, dev);
5342 ata_port_printk(ap, KERN_ERR, "scsi_add_host failed\n");
5343 /* FIXME: do something useful here */
5344 /* FIXME: handle unconditional calls to
5345 * scsi_scan_host and ata_host_remove, below,
5351 /* probes are done, now scan each port's disk(s) */
5352 DPRINTK("host probe begin\n");
5353 for (i = 0; i < count; i++) {
5354 struct ata_port *ap = host_set->ports[i];
5356 ata_scsi_scan_host(ap);
5359 dev_set_drvdata(dev, host_set);
5361 VPRINTK("EXIT, returning %u\n", ent->n_ports);
5362 return ent->n_ports; /* success */
5365 for (i = 0; i < count; i++) {
5366 ata_host_remove(host_set->ports[i], 1);
5367 scsi_host_put(host_set->ports[i]->host);
5371 VPRINTK("EXIT, returning 0\n");
5376 * ata_host_set_remove - PCI layer callback for device removal
5377 * @host_set: ATA host set that was removed
5379 * Unregister all objects associated with this host set. Free those
5383 * Inherited from calling layer (may sleep).
5386 void ata_host_set_remove(struct ata_host_set *host_set)
5388 struct ata_port *ap;
5391 for (i = 0; i < host_set->n_ports; i++) {
5392 ap = host_set->ports[i];
5393 scsi_remove_host(ap->host);
5396 free_irq(host_set->irq, host_set);
5398 for (i = 0; i < host_set->n_ports; i++) {
5399 ap = host_set->ports[i];
5401 ata_scsi_release(ap->host);
5403 if ((ap->flags & ATA_FLAG_NO_LEGACY) == 0) {
5404 struct ata_ioports *ioaddr = &ap->ioaddr;
5406 if (ioaddr->cmd_addr == 0x1f0)
5407 release_region(0x1f0, 8);
5408 else if (ioaddr->cmd_addr == 0x170)
5409 release_region(0x170, 8);
5412 scsi_host_put(ap->host);
5415 if (host_set->ops->host_stop)
5416 host_set->ops->host_stop(host_set);
5422 * ata_scsi_release - SCSI layer callback hook for host unload
5423 * @host: libata host to be unloaded
5425 * Performs all duties necessary to shut down a libata port...
5426 * Kill port kthread, disable port, and release resources.
5429 * Inherited from SCSI layer.
5435 int ata_scsi_release(struct Scsi_Host *host)
5437 struct ata_port *ap = ata_shost_to_port(host);
5441 ap->ops->port_disable(ap);
5442 ata_host_remove(ap, 0);
5449 * ata_std_ports - initialize ioaddr with standard port offsets.
5450 * @ioaddr: IO address structure to be initialized
5452 * Utility function which initializes data_addr, error_addr,
5453 * feature_addr, nsect_addr, lbal_addr, lbam_addr, lbah_addr,
5454 * device_addr, status_addr, and command_addr to standard offsets
5455 * relative to cmd_addr.
5457 * Does not set ctl_addr, altstatus_addr, bmdma_addr, or scr_addr.
5460 void ata_std_ports(struct ata_ioports *ioaddr)
5462 ioaddr->data_addr = ioaddr->cmd_addr + ATA_REG_DATA;
5463 ioaddr->error_addr = ioaddr->cmd_addr + ATA_REG_ERR;
5464 ioaddr->feature_addr = ioaddr->cmd_addr + ATA_REG_FEATURE;
5465 ioaddr->nsect_addr = ioaddr->cmd_addr + ATA_REG_NSECT;
5466 ioaddr->lbal_addr = ioaddr->cmd_addr + ATA_REG_LBAL;
5467 ioaddr->lbam_addr = ioaddr->cmd_addr + ATA_REG_LBAM;
5468 ioaddr->lbah_addr = ioaddr->cmd_addr + ATA_REG_LBAH;
5469 ioaddr->device_addr = ioaddr->cmd_addr + ATA_REG_DEVICE;
5470 ioaddr->status_addr = ioaddr->cmd_addr + ATA_REG_STATUS;
5471 ioaddr->command_addr = ioaddr->cmd_addr + ATA_REG_CMD;
5477 void ata_pci_host_stop (struct ata_host_set *host_set)
5479 struct pci_dev *pdev = to_pci_dev(host_set->dev);
5481 pci_iounmap(pdev, host_set->mmio_base);
5485 * ata_pci_remove_one - PCI layer callback for device removal
5486 * @pdev: PCI device that was removed
5488 * PCI layer indicates to libata via this hook that
5489 * hot-unplug or module unload event has occurred.
5490 * Handle this by unregistering all objects associated
5491 * with this PCI device. Free those objects. Then finally
5492 * release PCI resources and disable device.
5495 * Inherited from PCI layer (may sleep).
5498 void ata_pci_remove_one (struct pci_dev *pdev)
5500 struct device *dev = pci_dev_to_dev(pdev);
5501 struct ata_host_set *host_set = dev_get_drvdata(dev);
5503 ata_host_set_remove(host_set);
5504 pci_release_regions(pdev);
5505 pci_disable_device(pdev);
5506 dev_set_drvdata(dev, NULL);
5509 /* move to PCI subsystem */
5510 int pci_test_config_bits(struct pci_dev *pdev, const struct pci_bits *bits)
5512 unsigned long tmp = 0;
5514 switch (bits->width) {
5517 pci_read_config_byte(pdev, bits->reg, &tmp8);
5523 pci_read_config_word(pdev, bits->reg, &tmp16);
5529 pci_read_config_dword(pdev, bits->reg, &tmp32);
5540 return (tmp == bits->val) ? 1 : 0;
5543 int ata_pci_device_suspend(struct pci_dev *pdev, pm_message_t state)
5545 pci_save_state(pdev);
5546 pci_disable_device(pdev);
5547 pci_set_power_state(pdev, PCI_D3hot);
5551 int ata_pci_device_resume(struct pci_dev *pdev)
5553 pci_set_power_state(pdev, PCI_D0);
5554 pci_restore_state(pdev);
5555 pci_enable_device(pdev);
5556 pci_set_master(pdev);
5559 #endif /* CONFIG_PCI */
5562 static int __init ata_init(void)
5564 ata_wq = create_workqueue("ata");
5568 printk(KERN_DEBUG "libata version " DRV_VERSION " loaded.\n");
5572 static void __exit ata_exit(void)
5574 destroy_workqueue(ata_wq);
5577 module_init(ata_init);
5578 module_exit(ata_exit);
5580 static unsigned long ratelimit_time;
5581 static spinlock_t ata_ratelimit_lock = SPIN_LOCK_UNLOCKED;
5583 int ata_ratelimit(void)
5586 unsigned long flags;
5588 spin_lock_irqsave(&ata_ratelimit_lock, flags);
5590 if (time_after(jiffies, ratelimit_time)) {
5592 ratelimit_time = jiffies + (HZ/5);
5596 spin_unlock_irqrestore(&ata_ratelimit_lock, flags);
5602 * ata_wait_register - wait until register value changes
5603 * @reg: IO-mapped register
5604 * @mask: Mask to apply to read register value
5605 * @val: Wait condition
5606 * @interval_msec: polling interval in milliseconds
5607 * @timeout_msec: timeout in milliseconds
5609 * Waiting for some bits of register to change is a common
5610 * operation for ATA controllers. This function reads 32bit LE
5611 * IO-mapped register @reg and tests for the following condition.
5613 * (*@reg & mask) != val
5615 * If the condition is met, it returns; otherwise, the process is
5616 * repeated after @interval_msec until timeout.
5619 * Kernel thread context (may sleep)
5622 * The final register value.
5624 u32 ata_wait_register(void __iomem *reg, u32 mask, u32 val,
5625 unsigned long interval_msec,
5626 unsigned long timeout_msec)
5628 unsigned long timeout;
5631 tmp = ioread32(reg);
5633 /* Calculate timeout _after_ the first read to make sure
5634 * preceding writes reach the controller before starting to
5635 * eat away the timeout.
5637 timeout = jiffies + (timeout_msec * HZ) / 1000;
5639 while ((tmp & mask) == val && time_before(jiffies, timeout)) {
5640 msleep(interval_msec);
5641 tmp = ioread32(reg);
5648 * libata is essentially a library of internal helper functions for
5649 * low-level ATA host controller drivers. As such, the API/ABI is
5650 * likely to change as new drivers are added and updated.
5651 * Do not depend on ABI/API stability.
5654 EXPORT_SYMBOL_GPL(ata_std_bios_param);
5655 EXPORT_SYMBOL_GPL(ata_std_ports);
5656 EXPORT_SYMBOL_GPL(ata_device_add);
5657 EXPORT_SYMBOL_GPL(ata_host_set_remove);
5658 EXPORT_SYMBOL_GPL(ata_sg_init);
5659 EXPORT_SYMBOL_GPL(ata_sg_init_one);
5660 EXPORT_SYMBOL_GPL(ata_qc_complete);
5661 EXPORT_SYMBOL_GPL(ata_qc_complete_multiple);
5662 EXPORT_SYMBOL_GPL(ata_qc_issue_prot);
5663 EXPORT_SYMBOL_GPL(ata_tf_load);
5664 EXPORT_SYMBOL_GPL(ata_tf_read);
5665 EXPORT_SYMBOL_GPL(ata_noop_dev_select);
5666 EXPORT_SYMBOL_GPL(ata_std_dev_select);
5667 EXPORT_SYMBOL_GPL(ata_tf_to_fis);
5668 EXPORT_SYMBOL_GPL(ata_tf_from_fis);
5669 EXPORT_SYMBOL_GPL(ata_check_status);
5670 EXPORT_SYMBOL_GPL(ata_altstatus);
5671 EXPORT_SYMBOL_GPL(ata_exec_command);
5672 EXPORT_SYMBOL_GPL(ata_port_start);
5673 EXPORT_SYMBOL_GPL(ata_port_stop);
5674 EXPORT_SYMBOL_GPL(ata_host_stop);
5675 EXPORT_SYMBOL_GPL(ata_interrupt);
5676 EXPORT_SYMBOL_GPL(ata_mmio_data_xfer);
5677 EXPORT_SYMBOL_GPL(ata_pio_data_xfer);
5678 EXPORT_SYMBOL_GPL(ata_qc_prep);
5679 EXPORT_SYMBOL_GPL(ata_noop_qc_prep);
5680 EXPORT_SYMBOL_GPL(ata_bmdma_setup);
5681 EXPORT_SYMBOL_GPL(ata_bmdma_start);
5682 EXPORT_SYMBOL_GPL(ata_bmdma_irq_clear);
5683 EXPORT_SYMBOL_GPL(ata_bmdma_status);
5684 EXPORT_SYMBOL_GPL(ata_bmdma_stop);
5685 EXPORT_SYMBOL_GPL(ata_bmdma_freeze);
5686 EXPORT_SYMBOL_GPL(ata_bmdma_thaw);
5687 EXPORT_SYMBOL_GPL(ata_bmdma_drive_eh);
5688 EXPORT_SYMBOL_GPL(ata_bmdma_error_handler);
5689 EXPORT_SYMBOL_GPL(ata_bmdma_post_internal_cmd);
5690 EXPORT_SYMBOL_GPL(ata_port_probe);
5691 EXPORT_SYMBOL_GPL(sata_set_spd);
5692 EXPORT_SYMBOL_GPL(sata_phy_reset);
5693 EXPORT_SYMBOL_GPL(__sata_phy_reset);
5694 EXPORT_SYMBOL_GPL(ata_bus_reset);
5695 EXPORT_SYMBOL_GPL(ata_std_probeinit);
5696 EXPORT_SYMBOL_GPL(ata_std_softreset);
5697 EXPORT_SYMBOL_GPL(sata_std_hardreset);
5698 EXPORT_SYMBOL_GPL(ata_std_postreset);
5699 EXPORT_SYMBOL_GPL(ata_std_probe_reset);
5700 EXPORT_SYMBOL_GPL(ata_drive_probe_reset);
5701 EXPORT_SYMBOL_GPL(ata_dev_revalidate);
5702 EXPORT_SYMBOL_GPL(ata_dev_classify);
5703 EXPORT_SYMBOL_GPL(ata_dev_pair);
5704 EXPORT_SYMBOL_GPL(ata_port_disable);
5705 EXPORT_SYMBOL_GPL(ata_ratelimit);
5706 EXPORT_SYMBOL_GPL(ata_wait_register);
5707 EXPORT_SYMBOL_GPL(ata_busy_sleep);
5708 EXPORT_SYMBOL_GPL(ata_port_queue_task);
5709 EXPORT_SYMBOL_GPL(ata_scsi_ioctl);
5710 EXPORT_SYMBOL_GPL(ata_scsi_queuecmd);
5711 EXPORT_SYMBOL_GPL(ata_scsi_slave_config);
5712 EXPORT_SYMBOL_GPL(ata_scsi_change_queue_depth);
5713 EXPORT_SYMBOL_GPL(ata_scsi_release);
5714 EXPORT_SYMBOL_GPL(ata_host_intr);
5715 EXPORT_SYMBOL_GPL(sata_scr_valid);
5716 EXPORT_SYMBOL_GPL(sata_scr_read);
5717 EXPORT_SYMBOL_GPL(sata_scr_write);
5718 EXPORT_SYMBOL_GPL(sata_scr_write_flush);
5719 EXPORT_SYMBOL_GPL(ata_port_online);
5720 EXPORT_SYMBOL_GPL(ata_port_offline);
5721 EXPORT_SYMBOL_GPL(ata_id_string);
5722 EXPORT_SYMBOL_GPL(ata_id_c_string);
5723 EXPORT_SYMBOL_GPL(ata_scsi_simulate);
5725 EXPORT_SYMBOL_GPL(ata_pio_need_iordy);
5726 EXPORT_SYMBOL_GPL(ata_timing_compute);
5727 EXPORT_SYMBOL_GPL(ata_timing_merge);
5730 EXPORT_SYMBOL_GPL(pci_test_config_bits);
5731 EXPORT_SYMBOL_GPL(ata_pci_host_stop);
5732 EXPORT_SYMBOL_GPL(ata_pci_init_native_mode);
5733 EXPORT_SYMBOL_GPL(ata_pci_init_one);
5734 EXPORT_SYMBOL_GPL(ata_pci_remove_one);
5735 EXPORT_SYMBOL_GPL(ata_pci_device_suspend);
5736 EXPORT_SYMBOL_GPL(ata_pci_device_resume);
5737 EXPORT_SYMBOL_GPL(ata_pci_default_filter);
5738 EXPORT_SYMBOL_GPL(ata_pci_clear_simplex);
5739 #endif /* CONFIG_PCI */
5741 EXPORT_SYMBOL_GPL(ata_device_suspend);
5742 EXPORT_SYMBOL_GPL(ata_device_resume);
5743 EXPORT_SYMBOL_GPL(ata_scsi_device_suspend);
5744 EXPORT_SYMBOL_GPL(ata_scsi_device_resume);
5746 EXPORT_SYMBOL_GPL(ata_eng_timeout);
5747 EXPORT_SYMBOL_GPL(ata_port_schedule_eh);
5748 EXPORT_SYMBOL_GPL(ata_port_abort);
5749 EXPORT_SYMBOL_GPL(ata_port_freeze);
5750 EXPORT_SYMBOL_GPL(ata_eh_freeze_port);
5751 EXPORT_SYMBOL_GPL(ata_eh_thaw_port);
5752 EXPORT_SYMBOL_GPL(ata_eh_qc_complete);
5753 EXPORT_SYMBOL_GPL(ata_eh_qc_retry);
5754 EXPORT_SYMBOL_GPL(ata_do_eh);