2 * libata-core.c - helper library for ATA
4 * Maintained by: Jeff Garzik <jgarzik@pobox.com>
5 * Please ALWAYS copy linux-ide@vger.kernel.org
8 * Copyright 2003-2004 Red Hat, Inc. All rights reserved.
9 * Copyright 2003-2004 Jeff Garzik
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2, or (at your option)
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
22 * You should have received a copy of the GNU General Public License
23 * along with this program; see the file COPYING. If not, write to
24 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
27 * libata documentation is available via 'make {ps|pdf}docs',
28 * as Documentation/DocBook/libata.*
30 * Hardware documentation available from http://www.t13.org/ and
31 * http://www.sata-io.org/
35 #include <linux/config.h>
36 #include <linux/kernel.h>
37 #include <linux/module.h>
38 #include <linux/pci.h>
39 #include <linux/init.h>
40 #include <linux/list.h>
42 #include <linux/highmem.h>
43 #include <linux/spinlock.h>
44 #include <linux/blkdev.h>
45 #include <linux/delay.h>
46 #include <linux/timer.h>
47 #include <linux/interrupt.h>
48 #include <linux/completion.h>
49 #include <linux/suspend.h>
50 #include <linux/workqueue.h>
51 #include <linux/jiffies.h>
52 #include <linux/scatterlist.h>
53 #include <scsi/scsi.h>
54 #include "scsi_priv.h"
55 #include <scsi/scsi_cmnd.h>
56 #include <scsi/scsi_host.h>
57 #include <linux/libata.h>
59 #include <asm/semaphore.h>
60 #include <asm/byteorder.h>
64 static unsigned int ata_busy_sleep (struct ata_port *ap,
65 unsigned long tmout_pat,
67 static void ata_dev_reread_id(struct ata_port *ap, struct ata_device *dev);
68 static void ata_dev_init_params(struct ata_port *ap, struct ata_device *dev);
69 static void ata_set_mode(struct ata_port *ap);
70 static void ata_dev_set_xfermode(struct ata_port *ap, struct ata_device *dev);
71 static unsigned int ata_get_mode_mask(const struct ata_port *ap, int shift);
72 static int fgb(u32 bitmap);
73 static int ata_choose_xfer_mode(const struct ata_port *ap,
75 unsigned int *xfer_shift_out);
76 static void ata_pio_error(struct ata_port *ap);
78 static unsigned int ata_unique_id = 1;
79 static struct workqueue_struct *ata_wq;
81 int atapi_enabled = 0;
82 module_param(atapi_enabled, int, 0444);
83 MODULE_PARM_DESC(atapi_enabled, "Enable discovery of ATAPI devices (0=off, 1=on)");
85 MODULE_AUTHOR("Jeff Garzik");
86 MODULE_DESCRIPTION("Library module for ATA devices");
87 MODULE_LICENSE("GPL");
88 MODULE_VERSION(DRV_VERSION);
91 * ata_tf_load_pio - send taskfile registers to host controller
92 * @ap: Port to which output is sent
93 * @tf: ATA taskfile register set
95 * Outputs ATA taskfile to standard ATA host controller.
98 * Inherited from caller.
101 static void ata_tf_load_pio(struct ata_port *ap, const struct ata_taskfile *tf)
103 struct ata_ioports *ioaddr = &ap->ioaddr;
104 unsigned int is_addr = tf->flags & ATA_TFLAG_ISADDR;
106 if (tf->ctl != ap->last_ctl) {
107 outb(tf->ctl, ioaddr->ctl_addr);
108 ap->last_ctl = tf->ctl;
112 if (is_addr && (tf->flags & ATA_TFLAG_LBA48)) {
113 outb(tf->hob_feature, ioaddr->feature_addr);
114 outb(tf->hob_nsect, ioaddr->nsect_addr);
115 outb(tf->hob_lbal, ioaddr->lbal_addr);
116 outb(tf->hob_lbam, ioaddr->lbam_addr);
117 outb(tf->hob_lbah, ioaddr->lbah_addr);
118 VPRINTK("hob: feat 0x%X nsect 0x%X, lba 0x%X 0x%X 0x%X\n",
127 outb(tf->feature, ioaddr->feature_addr);
128 outb(tf->nsect, ioaddr->nsect_addr);
129 outb(tf->lbal, ioaddr->lbal_addr);
130 outb(tf->lbam, ioaddr->lbam_addr);
131 outb(tf->lbah, ioaddr->lbah_addr);
132 VPRINTK("feat 0x%X nsect 0x%X lba 0x%X 0x%X 0x%X\n",
140 if (tf->flags & ATA_TFLAG_DEVICE) {
141 outb(tf->device, ioaddr->device_addr);
142 VPRINTK("device 0x%X\n", tf->device);
149 * ata_tf_load_mmio - send taskfile registers to host controller
150 * @ap: Port to which output is sent
151 * @tf: ATA taskfile register set
153 * Outputs ATA taskfile to standard ATA host controller using MMIO.
156 * Inherited from caller.
159 static void ata_tf_load_mmio(struct ata_port *ap, const struct ata_taskfile *tf)
161 struct ata_ioports *ioaddr = &ap->ioaddr;
162 unsigned int is_addr = tf->flags & ATA_TFLAG_ISADDR;
164 if (tf->ctl != ap->last_ctl) {
165 writeb(tf->ctl, (void __iomem *) ap->ioaddr.ctl_addr);
166 ap->last_ctl = tf->ctl;
170 if (is_addr && (tf->flags & ATA_TFLAG_LBA48)) {
171 writeb(tf->hob_feature, (void __iomem *) ioaddr->feature_addr);
172 writeb(tf->hob_nsect, (void __iomem *) ioaddr->nsect_addr);
173 writeb(tf->hob_lbal, (void __iomem *) ioaddr->lbal_addr);
174 writeb(tf->hob_lbam, (void __iomem *) ioaddr->lbam_addr);
175 writeb(tf->hob_lbah, (void __iomem *) ioaddr->lbah_addr);
176 VPRINTK("hob: feat 0x%X nsect 0x%X, lba 0x%X 0x%X 0x%X\n",
185 writeb(tf->feature, (void __iomem *) ioaddr->feature_addr);
186 writeb(tf->nsect, (void __iomem *) ioaddr->nsect_addr);
187 writeb(tf->lbal, (void __iomem *) ioaddr->lbal_addr);
188 writeb(tf->lbam, (void __iomem *) ioaddr->lbam_addr);
189 writeb(tf->lbah, (void __iomem *) ioaddr->lbah_addr);
190 VPRINTK("feat 0x%X nsect 0x%X lba 0x%X 0x%X 0x%X\n",
198 if (tf->flags & ATA_TFLAG_DEVICE) {
199 writeb(tf->device, (void __iomem *) ioaddr->device_addr);
200 VPRINTK("device 0x%X\n", tf->device);
208 * ata_tf_load - send taskfile registers to host controller
209 * @ap: Port to which output is sent
210 * @tf: ATA taskfile register set
212 * Outputs ATA taskfile to standard ATA host controller using MMIO
213 * or PIO as indicated by the ATA_FLAG_MMIO flag.
214 * Writes the control, feature, nsect, lbal, lbam, and lbah registers.
215 * Optionally (ATA_TFLAG_LBA48) writes hob_feature, hob_nsect,
216 * hob_lbal, hob_lbam, and hob_lbah.
218 * This function waits for idle (!BUSY and !DRQ) after writing
219 * registers. If the control register has a new value, this
220 * function also waits for idle after writing control and before
221 * writing the remaining registers.
223 * May be used as the tf_load() entry in ata_port_operations.
226 * Inherited from caller.
228 void ata_tf_load(struct ata_port *ap, const struct ata_taskfile *tf)
230 if (ap->flags & ATA_FLAG_MMIO)
231 ata_tf_load_mmio(ap, tf);
233 ata_tf_load_pio(ap, tf);
237 * ata_exec_command_pio - issue ATA command to host controller
238 * @ap: port to which command is being issued
239 * @tf: ATA taskfile register set
241 * Issues PIO write to ATA command register, with proper
242 * synchronization with interrupt handler / other threads.
245 * spin_lock_irqsave(host_set lock)
248 static void ata_exec_command_pio(struct ata_port *ap, const struct ata_taskfile *tf)
250 DPRINTK("ata%u: cmd 0x%X\n", ap->id, tf->command);
252 outb(tf->command, ap->ioaddr.command_addr);
258 * ata_exec_command_mmio - issue ATA command to host controller
259 * @ap: port to which command is being issued
260 * @tf: ATA taskfile register set
262 * Issues MMIO write to ATA command register, with proper
263 * synchronization with interrupt handler / other threads.
266 * spin_lock_irqsave(host_set lock)
269 static void ata_exec_command_mmio(struct ata_port *ap, const struct ata_taskfile *tf)
271 DPRINTK("ata%u: cmd 0x%X\n", ap->id, tf->command);
273 writeb(tf->command, (void __iomem *) ap->ioaddr.command_addr);
279 * ata_exec_command - issue ATA command to host controller
280 * @ap: port to which command is being issued
281 * @tf: ATA taskfile register set
283 * Issues PIO/MMIO write to ATA command register, with proper
284 * synchronization with interrupt handler / other threads.
287 * spin_lock_irqsave(host_set lock)
289 void ata_exec_command(struct ata_port *ap, const struct ata_taskfile *tf)
291 if (ap->flags & ATA_FLAG_MMIO)
292 ata_exec_command_mmio(ap, tf);
294 ata_exec_command_pio(ap, tf);
298 * ata_tf_to_host - issue ATA taskfile to host controller
299 * @ap: port to which command is being issued
300 * @tf: ATA taskfile register set
302 * Issues ATA taskfile register set to ATA host controller,
303 * with proper synchronization with interrupt handler and
307 * spin_lock_irqsave(host_set lock)
310 static inline void ata_tf_to_host(struct ata_port *ap,
311 const struct ata_taskfile *tf)
313 ap->ops->tf_load(ap, tf);
314 ap->ops->exec_command(ap, tf);
318 * ata_tf_read_pio - input device's ATA taskfile shadow registers
319 * @ap: Port from which input is read
320 * @tf: ATA taskfile register set for storing input
322 * Reads ATA taskfile registers for currently-selected device
326 * Inherited from caller.
329 static void ata_tf_read_pio(struct ata_port *ap, struct ata_taskfile *tf)
331 struct ata_ioports *ioaddr = &ap->ioaddr;
333 tf->command = ata_check_status(ap);
334 tf->feature = inb(ioaddr->error_addr);
335 tf->nsect = inb(ioaddr->nsect_addr);
336 tf->lbal = inb(ioaddr->lbal_addr);
337 tf->lbam = inb(ioaddr->lbam_addr);
338 tf->lbah = inb(ioaddr->lbah_addr);
339 tf->device = inb(ioaddr->device_addr);
341 if (tf->flags & ATA_TFLAG_LBA48) {
342 outb(tf->ctl | ATA_HOB, ioaddr->ctl_addr);
343 tf->hob_feature = inb(ioaddr->error_addr);
344 tf->hob_nsect = inb(ioaddr->nsect_addr);
345 tf->hob_lbal = inb(ioaddr->lbal_addr);
346 tf->hob_lbam = inb(ioaddr->lbam_addr);
347 tf->hob_lbah = inb(ioaddr->lbah_addr);
352 * ata_tf_read_mmio - input device's ATA taskfile shadow registers
353 * @ap: Port from which input is read
354 * @tf: ATA taskfile register set for storing input
356 * Reads ATA taskfile registers for currently-selected device
360 * Inherited from caller.
363 static void ata_tf_read_mmio(struct ata_port *ap, struct ata_taskfile *tf)
365 struct ata_ioports *ioaddr = &ap->ioaddr;
367 tf->command = ata_check_status(ap);
368 tf->feature = readb((void __iomem *)ioaddr->error_addr);
369 tf->nsect = readb((void __iomem *)ioaddr->nsect_addr);
370 tf->lbal = readb((void __iomem *)ioaddr->lbal_addr);
371 tf->lbam = readb((void __iomem *)ioaddr->lbam_addr);
372 tf->lbah = readb((void __iomem *)ioaddr->lbah_addr);
373 tf->device = readb((void __iomem *)ioaddr->device_addr);
375 if (tf->flags & ATA_TFLAG_LBA48) {
376 writeb(tf->ctl | ATA_HOB, (void __iomem *) ap->ioaddr.ctl_addr);
377 tf->hob_feature = readb((void __iomem *)ioaddr->error_addr);
378 tf->hob_nsect = readb((void __iomem *)ioaddr->nsect_addr);
379 tf->hob_lbal = readb((void __iomem *)ioaddr->lbal_addr);
380 tf->hob_lbam = readb((void __iomem *)ioaddr->lbam_addr);
381 tf->hob_lbah = readb((void __iomem *)ioaddr->lbah_addr);
387 * ata_tf_read - input device's ATA taskfile shadow registers
388 * @ap: Port from which input is read
389 * @tf: ATA taskfile register set for storing input
391 * Reads ATA taskfile registers for currently-selected device
394 * Reads nsect, lbal, lbam, lbah, and device. If ATA_TFLAG_LBA48
395 * is set, also reads the hob registers.
397 * May be used as the tf_read() entry in ata_port_operations.
400 * Inherited from caller.
402 void ata_tf_read(struct ata_port *ap, struct ata_taskfile *tf)
404 if (ap->flags & ATA_FLAG_MMIO)
405 ata_tf_read_mmio(ap, tf);
407 ata_tf_read_pio(ap, tf);
411 * ata_check_status_pio - Read device status reg & clear interrupt
412 * @ap: port where the device is
414 * Reads ATA taskfile status register for currently-selected device
415 * and return its value. This also clears pending interrupts
419 * Inherited from caller.
421 static u8 ata_check_status_pio(struct ata_port *ap)
423 return inb(ap->ioaddr.status_addr);
427 * ata_check_status_mmio - Read device status reg & clear interrupt
428 * @ap: port where the device is
430 * Reads ATA taskfile status register for currently-selected device
431 * via MMIO and return its value. This also clears pending interrupts
435 * Inherited from caller.
437 static u8 ata_check_status_mmio(struct ata_port *ap)
439 return readb((void __iomem *) ap->ioaddr.status_addr);
444 * ata_check_status - Read device status reg & clear interrupt
445 * @ap: port where the device is
447 * Reads ATA taskfile status register for currently-selected device
448 * and return its value. This also clears pending interrupts
451 * May be used as the check_status() entry in ata_port_operations.
454 * Inherited from caller.
456 u8 ata_check_status(struct ata_port *ap)
458 if (ap->flags & ATA_FLAG_MMIO)
459 return ata_check_status_mmio(ap);
460 return ata_check_status_pio(ap);
465 * ata_altstatus - Read device alternate status reg
466 * @ap: port where the device is
468 * Reads ATA taskfile alternate status register for
469 * currently-selected device and return its value.
471 * Note: may NOT be used as the check_altstatus() entry in
472 * ata_port_operations.
475 * Inherited from caller.
477 u8 ata_altstatus(struct ata_port *ap)
479 if (ap->ops->check_altstatus)
480 return ap->ops->check_altstatus(ap);
482 if (ap->flags & ATA_FLAG_MMIO)
483 return readb((void __iomem *)ap->ioaddr.altstatus_addr);
484 return inb(ap->ioaddr.altstatus_addr);
489 * ata_tf_to_fis - Convert ATA taskfile to SATA FIS structure
490 * @tf: Taskfile to convert
491 * @fis: Buffer into which data will output
492 * @pmp: Port multiplier port
494 * Converts a standard ATA taskfile to a Serial ATA
495 * FIS structure (Register - Host to Device).
498 * Inherited from caller.
501 void ata_tf_to_fis(const struct ata_taskfile *tf, u8 *fis, u8 pmp)
503 fis[0] = 0x27; /* Register - Host to Device FIS */
504 fis[1] = (pmp & 0xf) | (1 << 7); /* Port multiplier number,
505 bit 7 indicates Command FIS */
506 fis[2] = tf->command;
507 fis[3] = tf->feature;
514 fis[8] = tf->hob_lbal;
515 fis[9] = tf->hob_lbam;
516 fis[10] = tf->hob_lbah;
517 fis[11] = tf->hob_feature;
520 fis[13] = tf->hob_nsect;
531 * ata_tf_from_fis - Convert SATA FIS to ATA taskfile
532 * @fis: Buffer from which data will be input
533 * @tf: Taskfile to output
535 * Converts a serial ATA FIS structure to a standard ATA taskfile.
538 * Inherited from caller.
541 void ata_tf_from_fis(const u8 *fis, struct ata_taskfile *tf)
543 tf->command = fis[2]; /* status */
544 tf->feature = fis[3]; /* error */
551 tf->hob_lbal = fis[8];
552 tf->hob_lbam = fis[9];
553 tf->hob_lbah = fis[10];
556 tf->hob_nsect = fis[13];
559 static const u8 ata_rw_cmds[] = {
563 ATA_CMD_READ_MULTI_EXT,
564 ATA_CMD_WRITE_MULTI_EXT,
568 ATA_CMD_WRITE_MULTI_FUA_EXT,
572 ATA_CMD_PIO_READ_EXT,
573 ATA_CMD_PIO_WRITE_EXT,
586 ATA_CMD_WRITE_FUA_EXT
590 * ata_rwcmd_protocol - set taskfile r/w commands and protocol
591 * @qc: command to examine and configure
593 * Examine the device configuration and tf->flags to calculate
594 * the proper read/write commands and protocol to use.
599 int ata_rwcmd_protocol(struct ata_queued_cmd *qc)
601 struct ata_taskfile *tf = &qc->tf;
602 struct ata_device *dev = qc->dev;
605 int index, fua, lba48, write;
607 fua = (tf->flags & ATA_TFLAG_FUA) ? 4 : 0;
608 lba48 = (tf->flags & ATA_TFLAG_LBA48) ? 2 : 0;
609 write = (tf->flags & ATA_TFLAG_WRITE) ? 1 : 0;
611 if (dev->flags & ATA_DFLAG_PIO) {
612 tf->protocol = ATA_PROT_PIO;
613 index = dev->multi_count ? 0 : 8;
614 } else if (lba48 && (qc->ap->flags & ATA_FLAG_PIO_LBA48)) {
615 /* Unable to use DMA due to host limitation */
616 tf->protocol = ATA_PROT_PIO;
617 index = dev->multi_count ? 0 : 4;
619 tf->protocol = ATA_PROT_DMA;
623 cmd = ata_rw_cmds[index + fua + lba48 + write];
631 static const char * const xfer_mode_str[] = {
651 * ata_udma_string - convert UDMA bit offset to string
652 * @mask: mask of bits supported; only highest bit counts.
654 * Determine string which represents the highest speed
655 * (highest bit in @udma_mask).
661 * Constant C string representing highest speed listed in
662 * @udma_mask, or the constant C string "<n/a>".
665 static const char *ata_mode_string(unsigned int mask)
669 for (i = 7; i >= 0; i--)
672 for (i = ATA_SHIFT_MWDMA + 2; i >= ATA_SHIFT_MWDMA; i--)
675 for (i = ATA_SHIFT_PIO + 4; i >= ATA_SHIFT_PIO; i--)
682 return xfer_mode_str[i];
686 * ata_pio_devchk - PATA device presence detection
687 * @ap: ATA channel to examine
688 * @device: Device to examine (starting at zero)
690 * This technique was originally described in
691 * Hale Landis's ATADRVR (www.ata-atapi.com), and
692 * later found its way into the ATA/ATAPI spec.
694 * Write a pattern to the ATA shadow registers,
695 * and if a device is present, it will respond by
696 * correctly storing and echoing back the
697 * ATA shadow register contents.
703 static unsigned int ata_pio_devchk(struct ata_port *ap,
706 struct ata_ioports *ioaddr = &ap->ioaddr;
709 ap->ops->dev_select(ap, device);
711 outb(0x55, ioaddr->nsect_addr);
712 outb(0xaa, ioaddr->lbal_addr);
714 outb(0xaa, ioaddr->nsect_addr);
715 outb(0x55, ioaddr->lbal_addr);
717 outb(0x55, ioaddr->nsect_addr);
718 outb(0xaa, ioaddr->lbal_addr);
720 nsect = inb(ioaddr->nsect_addr);
721 lbal = inb(ioaddr->lbal_addr);
723 if ((nsect == 0x55) && (lbal == 0xaa))
724 return 1; /* we found a device */
726 return 0; /* nothing found */
730 * ata_mmio_devchk - PATA device presence detection
731 * @ap: ATA channel to examine
732 * @device: Device to examine (starting at zero)
734 * This technique was originally described in
735 * Hale Landis's ATADRVR (www.ata-atapi.com), and
736 * later found its way into the ATA/ATAPI spec.
738 * Write a pattern to the ATA shadow registers,
739 * and if a device is present, it will respond by
740 * correctly storing and echoing back the
741 * ATA shadow register contents.
747 static unsigned int ata_mmio_devchk(struct ata_port *ap,
750 struct ata_ioports *ioaddr = &ap->ioaddr;
753 ap->ops->dev_select(ap, device);
755 writeb(0x55, (void __iomem *) ioaddr->nsect_addr);
756 writeb(0xaa, (void __iomem *) ioaddr->lbal_addr);
758 writeb(0xaa, (void __iomem *) ioaddr->nsect_addr);
759 writeb(0x55, (void __iomem *) ioaddr->lbal_addr);
761 writeb(0x55, (void __iomem *) ioaddr->nsect_addr);
762 writeb(0xaa, (void __iomem *) ioaddr->lbal_addr);
764 nsect = readb((void __iomem *) ioaddr->nsect_addr);
765 lbal = readb((void __iomem *) ioaddr->lbal_addr);
767 if ((nsect == 0x55) && (lbal == 0xaa))
768 return 1; /* we found a device */
770 return 0; /* nothing found */
774 * ata_devchk - PATA device presence detection
775 * @ap: ATA channel to examine
776 * @device: Device to examine (starting at zero)
778 * Dispatch ATA device presence detection, depending
779 * on whether we are using PIO or MMIO to talk to the
780 * ATA shadow registers.
786 static unsigned int ata_devchk(struct ata_port *ap,
789 if (ap->flags & ATA_FLAG_MMIO)
790 return ata_mmio_devchk(ap, device);
791 return ata_pio_devchk(ap, device);
795 * ata_dev_classify - determine device type based on ATA-spec signature
796 * @tf: ATA taskfile register set for device to be identified
798 * Determine from taskfile register contents whether a device is
799 * ATA or ATAPI, as per "Signature and persistence" section
800 * of ATA/PI spec (volume 1, sect 5.14).
806 * Device type, %ATA_DEV_ATA, %ATA_DEV_ATAPI, or %ATA_DEV_UNKNOWN
807 * the event of failure.
810 unsigned int ata_dev_classify(const struct ata_taskfile *tf)
812 /* Apple's open source Darwin code hints that some devices only
813 * put a proper signature into the LBA mid/high registers,
814 * So, we only check those. It's sufficient for uniqueness.
817 if (((tf->lbam == 0) && (tf->lbah == 0)) ||
818 ((tf->lbam == 0x3c) && (tf->lbah == 0xc3))) {
819 DPRINTK("found ATA device by sig\n");
823 if (((tf->lbam == 0x14) && (tf->lbah == 0xeb)) ||
824 ((tf->lbam == 0x69) && (tf->lbah == 0x96))) {
825 DPRINTK("found ATAPI device by sig\n");
826 return ATA_DEV_ATAPI;
829 DPRINTK("unknown device\n");
830 return ATA_DEV_UNKNOWN;
834 * ata_dev_try_classify - Parse returned ATA device signature
835 * @ap: ATA channel to examine
836 * @device: Device to examine (starting at zero)
838 * After an event -- SRST, E.D.D., or SATA COMRESET -- occurs,
839 * an ATA/ATAPI-defined set of values is placed in the ATA
840 * shadow registers, indicating the results of device detection
843 * Select the ATA device, and read the values from the ATA shadow
844 * registers. Then parse according to the Error register value,
845 * and the spec-defined values examined by ata_dev_classify().
851 static u8 ata_dev_try_classify(struct ata_port *ap, unsigned int device)
853 struct ata_device *dev = &ap->device[device];
854 struct ata_taskfile tf;
858 ap->ops->dev_select(ap, device);
860 memset(&tf, 0, sizeof(tf));
862 ap->ops->tf_read(ap, &tf);
865 dev->class = ATA_DEV_NONE;
867 /* see if device passed diags */
870 else if ((device == 0) && (err == 0x81))
875 /* determine if device if ATA or ATAPI */
876 class = ata_dev_classify(&tf);
877 if (class == ATA_DEV_UNKNOWN)
879 if ((class == ATA_DEV_ATA) && (ata_chk_status(ap) == 0))
888 * ata_dev_id_string - Convert IDENTIFY DEVICE page into string
889 * @id: IDENTIFY DEVICE results we will examine
890 * @s: string into which data is output
891 * @ofs: offset into identify device page
892 * @len: length of string to return. must be an even number.
894 * The strings in the IDENTIFY DEVICE page are broken up into
895 * 16-bit chunks. Run through the string, and output each
896 * 8-bit chunk linearly, regardless of platform.
902 void ata_dev_id_string(const u16 *id, unsigned char *s,
903 unsigned int ofs, unsigned int len)
923 * ata_noop_dev_select - Select device 0/1 on ATA bus
924 * @ap: ATA channel to manipulate
925 * @device: ATA device (numbered from zero) to select
927 * This function performs no actual function.
929 * May be used as the dev_select() entry in ata_port_operations.
934 void ata_noop_dev_select (struct ata_port *ap, unsigned int device)
940 * ata_std_dev_select - Select device 0/1 on ATA bus
941 * @ap: ATA channel to manipulate
942 * @device: ATA device (numbered from zero) to select
944 * Use the method defined in the ATA specification to
945 * make either device 0, or device 1, active on the
946 * ATA channel. Works with both PIO and MMIO.
948 * May be used as the dev_select() entry in ata_port_operations.
954 void ata_std_dev_select (struct ata_port *ap, unsigned int device)
959 tmp = ATA_DEVICE_OBS;
961 tmp = ATA_DEVICE_OBS | ATA_DEV1;
963 if (ap->flags & ATA_FLAG_MMIO) {
964 writeb(tmp, (void __iomem *) ap->ioaddr.device_addr);
966 outb(tmp, ap->ioaddr.device_addr);
968 ata_pause(ap); /* needed; also flushes, for mmio */
972 * ata_dev_select - Select device 0/1 on ATA bus
973 * @ap: ATA channel to manipulate
974 * @device: ATA device (numbered from zero) to select
975 * @wait: non-zero to wait for Status register BSY bit to clear
976 * @can_sleep: non-zero if context allows sleeping
978 * Use the method defined in the ATA specification to
979 * make either device 0, or device 1, active on the
982 * This is a high-level version of ata_std_dev_select(),
983 * which additionally provides the services of inserting
984 * the proper pauses and status polling, where needed.
990 void ata_dev_select(struct ata_port *ap, unsigned int device,
991 unsigned int wait, unsigned int can_sleep)
993 VPRINTK("ENTER, ata%u: device %u, wait %u\n",
994 ap->id, device, wait);
999 ap->ops->dev_select(ap, device);
1002 if (can_sleep && ap->device[device].class == ATA_DEV_ATAPI)
1009 * ata_dump_id - IDENTIFY DEVICE info debugging output
1010 * @dev: Device whose IDENTIFY DEVICE page we will dump
1012 * Dump selected 16-bit words from a detected device's
1013 * IDENTIFY PAGE page.
1019 static inline void ata_dump_id(const struct ata_device *dev)
1021 DPRINTK("49==0x%04x "
1031 DPRINTK("80==0x%04x "
1041 DPRINTK("88==0x%04x "
1048 * Compute the PIO modes available for this device. This is not as
1049 * trivial as it seems if we must consider early devices correctly.
1051 * FIXME: pre IDE drive timing (do we care ?).
1054 static unsigned int ata_pio_modes(const struct ata_device *adev)
1058 /* Usual case. Word 53 indicates word 64 is valid */
1059 if (adev->id[ATA_ID_FIELD_VALID] & (1 << 1)) {
1060 modes = adev->id[ATA_ID_PIO_MODES] & 0x03;
1066 /* If word 64 isn't valid then Word 51 high byte holds the PIO timing
1067 number for the maximum. Turn it into a mask and return it */
1068 modes = (2 << ((adev->id[ATA_ID_OLD_PIO_MODES] >> 8) & 0xFF)) - 1 ;
1070 /* But wait.. there's more. Design your standards by committee and
1071 you too can get a free iordy field to process. However its the
1072 speeds not the modes that are supported... Note drivers using the
1073 timing API will get this right anyway */
1076 void ata_qc_complete_internal(struct ata_queued_cmd *qc)
1078 struct completion *waiting = qc->private_data;
1080 qc->ap->ops->tf_read(qc->ap, &qc->tf);
1085 * ata_exec_internal - execute libata internal command
1086 * @ap: Port to which the command is sent
1087 * @dev: Device to which the command is sent
1088 * @tf: Taskfile registers for the command and the result
1089 * @dma_dir: Data tranfer direction of the command
1090 * @buf: Data buffer of the command
1091 * @buflen: Length of data buffer
1093 * Executes libata internal command with timeout. @tf contains
1094 * command on entry and result on return. Timeout and error
1095 * conditions are reported via return value. No recovery action
1096 * is taken after a command times out. It's caller's duty to
1097 * clean up after timeout.
1100 * None. Should be called with kernel context, might sleep.
1104 ata_exec_internal(struct ata_port *ap, struct ata_device *dev,
1105 struct ata_taskfile *tf,
1106 int dma_dir, void *buf, unsigned int buflen)
1108 u8 command = tf->command;
1109 struct ata_queued_cmd *qc;
1110 DECLARE_COMPLETION(wait);
1111 unsigned long flags;
1112 unsigned int err_mask;
1114 spin_lock_irqsave(&ap->host_set->lock, flags);
1116 qc = ata_qc_new_init(ap, dev);
1120 qc->dma_dir = dma_dir;
1121 if (dma_dir != DMA_NONE) {
1122 ata_sg_init_one(qc, buf, buflen);
1123 qc->nsect = buflen / ATA_SECT_SIZE;
1126 qc->private_data = &wait;
1127 qc->complete_fn = ata_qc_complete_internal;
1129 if (ata_qc_issue(qc)) {
1130 qc->err_mask = AC_ERR_OTHER;
1131 ata_qc_complete(qc);
1134 spin_unlock_irqrestore(&ap->host_set->lock, flags);
1136 if (!wait_for_completion_timeout(&wait, ATA_TMOUT_INTERNAL)) {
1137 spin_lock_irqsave(&ap->host_set->lock, flags);
1139 /* We're racing with irq here. If we lose, the
1140 * following test prevents us from completing the qc
1141 * again. If completion irq occurs after here but
1142 * before the caller cleans up, it will result in a
1143 * spurious interrupt. We can live with that.
1145 if (qc->flags & ATA_QCFLAG_ACTIVE) {
1146 qc->err_mask = AC_ERR_TIMEOUT;
1147 ata_qc_complete(qc);
1148 printk(KERN_WARNING "ata%u: qc timeout (cmd 0x%x)\n",
1152 spin_unlock_irqrestore(&ap->host_set->lock, flags);
1156 err_mask = qc->err_mask;
1164 * ata_pio_need_iordy - check if iordy needed
1167 * Check if the current speed of the device requires IORDY. Used
1168 * by various controllers for chip configuration.
1171 unsigned int ata_pio_need_iordy(const struct ata_device *adev)
1174 int speed = adev->pio_mode - XFER_PIO_0;
1181 /* If we have no drive specific rule, then PIO 2 is non IORDY */
1183 if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE */
1184 pio = adev->id[ATA_ID_EIDE_PIO];
1185 /* Is the speed faster than the drive allows non IORDY ? */
1187 /* This is cycle times not frequency - watch the logic! */
1188 if (pio > 240) /* PIO2 is 240nS per cycle */
1197 * ata_dev_identify - obtain IDENTIFY x DEVICE page
1198 * @ap: port on which device we wish to probe resides
1199 * @device: device bus address, starting at zero
1201 * Following bus reset, we issue the IDENTIFY [PACKET] DEVICE
1202 * command, and read back the 512-byte device information page.
1203 * The device information page is fed to us via the standard
1204 * PIO-IN protocol, but we hand-code it here. (TODO: investigate
1205 * using standard PIO-IN paths)
1207 * After reading the device information page, we use several
1208 * bits of information from it to initialize data structures
1209 * that will be used during the lifetime of the ata_device.
1210 * Other data from the info page is used to disqualify certain
1211 * older ATA devices we do not wish to support.
1214 * Inherited from caller. Some functions called by this function
1215 * obtain the host_set lock.
1218 static void ata_dev_identify(struct ata_port *ap, unsigned int device)
1220 struct ata_device *dev = &ap->device[device];
1221 unsigned int major_version;
1223 unsigned long xfer_modes;
1224 unsigned int using_edd;
1225 struct ata_taskfile tf;
1226 unsigned int err_mask;
1229 if (!ata_dev_present(dev)) {
1230 DPRINTK("ENTER/EXIT (host %u, dev %u) -- nodev\n",
1235 if (ap->flags & (ATA_FLAG_SRST | ATA_FLAG_SATA_RESET))
1240 DPRINTK("ENTER, host %u, dev %u\n", ap->id, device);
1242 assert (dev->class == ATA_DEV_ATA || dev->class == ATA_DEV_ATAPI ||
1243 dev->class == ATA_DEV_NONE);
1245 ata_dev_select(ap, device, 1, 1); /* select device 0/1 */
1248 ata_tf_init(ap, &tf, device);
1250 if (dev->class == ATA_DEV_ATA) {
1251 tf.command = ATA_CMD_ID_ATA;
1252 DPRINTK("do ATA identify\n");
1254 tf.command = ATA_CMD_ID_ATAPI;
1255 DPRINTK("do ATAPI identify\n");
1258 tf.protocol = ATA_PROT_PIO;
1260 err_mask = ata_exec_internal(ap, dev, &tf, DMA_FROM_DEVICE,
1261 dev->id, sizeof(dev->id));
1264 if (err_mask & ~AC_ERR_DEV)
1268 * arg! EDD works for all test cases, but seems to return
1269 * the ATA signature for some ATAPI devices. Until the
1270 * reason for this is found and fixed, we fix up the mess
1271 * here. If IDENTIFY DEVICE returns command aborted
1272 * (as ATAPI devices do), then we issue an
1273 * IDENTIFY PACKET DEVICE.
1275 * ATA software reset (SRST, the default) does not appear
1276 * to have this problem.
1278 if ((using_edd) && (dev->class == ATA_DEV_ATA)) {
1279 u8 err = tf.feature;
1280 if (err & ATA_ABORTED) {
1281 dev->class = ATA_DEV_ATAPI;
1288 swap_buf_le16(dev->id, ATA_ID_WORDS);
1290 /* print device capabilities */
1291 printk(KERN_DEBUG "ata%u: dev %u cfg "
1292 "49:%04x 82:%04x 83:%04x 84:%04x 85:%04x 86:%04x 87:%04x 88:%04x\n",
1293 ap->id, device, dev->id[49],
1294 dev->id[82], dev->id[83], dev->id[84],
1295 dev->id[85], dev->id[86], dev->id[87],
1299 * common ATA, ATAPI feature tests
1302 /* we require DMA support (bits 8 of word 49) */
1303 if (!ata_id_has_dma(dev->id)) {
1304 printk(KERN_DEBUG "ata%u: no dma\n", ap->id);
1308 /* quick-n-dirty find max transfer mode; for printk only */
1309 xfer_modes = dev->id[ATA_ID_UDMA_MODES];
1311 xfer_modes = (dev->id[ATA_ID_MWDMA_MODES]) << ATA_SHIFT_MWDMA;
1313 xfer_modes = ata_pio_modes(dev);
1317 /* ATA-specific feature tests */
1318 if (dev->class == ATA_DEV_ATA) {
1319 if (!ata_id_is_ata(dev->id)) /* sanity check */
1322 /* get major version */
1323 tmp = dev->id[ATA_ID_MAJOR_VER];
1324 for (major_version = 14; major_version >= 1; major_version--)
1325 if (tmp & (1 << major_version))
1329 * The exact sequence expected by certain pre-ATA4 drives is:
1332 * INITIALIZE DEVICE PARAMETERS
1334 * Some drives were very specific about that exact sequence.
1336 if (major_version < 4 || (!ata_id_has_lba(dev->id))) {
1337 ata_dev_init_params(ap, dev);
1339 /* current CHS translation info (id[53-58]) might be
1340 * changed. reread the identify device info.
1342 ata_dev_reread_id(ap, dev);
1345 if (ata_id_has_lba(dev->id)) {
1346 dev->flags |= ATA_DFLAG_LBA;
1348 if (ata_id_has_lba48(dev->id)) {
1349 dev->flags |= ATA_DFLAG_LBA48;
1350 dev->n_sectors = ata_id_u64(dev->id, 100);
1352 dev->n_sectors = ata_id_u32(dev->id, 60);
1355 /* print device info to dmesg */
1356 printk(KERN_INFO "ata%u: dev %u ATA-%d, max %s, %Lu sectors:%s\n",
1359 ata_mode_string(xfer_modes),
1360 (unsigned long long)dev->n_sectors,
1361 dev->flags & ATA_DFLAG_LBA48 ? " LBA48" : " LBA");
1365 /* Default translation */
1366 dev->cylinders = dev->id[1];
1367 dev->heads = dev->id[3];
1368 dev->sectors = dev->id[6];
1369 dev->n_sectors = dev->cylinders * dev->heads * dev->sectors;
1371 if (ata_id_current_chs_valid(dev->id)) {
1372 /* Current CHS translation is valid. */
1373 dev->cylinders = dev->id[54];
1374 dev->heads = dev->id[55];
1375 dev->sectors = dev->id[56];
1377 dev->n_sectors = ata_id_u32(dev->id, 57);
1380 /* print device info to dmesg */
1381 printk(KERN_INFO "ata%u: dev %u ATA-%d, max %s, %Lu sectors: CHS %d/%d/%d\n",
1384 ata_mode_string(xfer_modes),
1385 (unsigned long long)dev->n_sectors,
1386 (int)dev->cylinders, (int)dev->heads, (int)dev->sectors);
1390 if (dev->id[59] & 0x100) {
1391 dev->multi_count = dev->id[59] & 0xff;
1392 DPRINTK("ata%u: dev %u multi count %u\n",
1393 ap->id, device, dev->multi_count);
1396 ap->host->max_cmd_len = 16;
1399 /* ATAPI-specific feature tests */
1400 else if (dev->class == ATA_DEV_ATAPI) {
1401 if (ata_id_is_ata(dev->id)) /* sanity check */
1404 rc = atapi_cdb_len(dev->id);
1405 if ((rc < 12) || (rc > ATAPI_CDB_LEN)) {
1406 printk(KERN_WARNING "ata%u: unsupported CDB len\n", ap->id);
1409 ap->cdb_len = (unsigned int) rc;
1410 ap->host->max_cmd_len = (unsigned char) ap->cdb_len;
1412 if (ata_id_cdb_intr(dev->id))
1413 dev->flags |= ATA_DFLAG_CDB_INTR;
1415 /* print device info to dmesg */
1416 printk(KERN_INFO "ata%u: dev %u ATAPI, max %s\n",
1418 ata_mode_string(xfer_modes));
1421 DPRINTK("EXIT, drv_stat = 0x%x\n", ata_chk_status(ap));
1425 printk(KERN_WARNING "ata%u: dev %u not supported, ignoring\n",
1428 dev->class++; /* converts ATA_DEV_xxx into ATA_DEV_xxx_UNSUP */
1429 DPRINTK("EXIT, err\n");
1433 static inline u8 ata_dev_knobble(const struct ata_port *ap)
1435 return ((ap->cbl == ATA_CBL_SATA) && (!ata_id_is_sata(ap->device->id)));
1439 * ata_dev_config - Run device specific handlers and check for
1440 * SATA->PATA bridges
1447 void ata_dev_config(struct ata_port *ap, unsigned int i)
1449 /* limit bridge transfers to udma5, 200 sectors */
1450 if (ata_dev_knobble(ap)) {
1451 printk(KERN_INFO "ata%u(%u): applying bridge limits\n",
1452 ap->id, ap->device->devno);
1453 ap->udma_mask &= ATA_UDMA5;
1454 ap->host->max_sectors = ATA_MAX_SECTORS;
1455 ap->host->hostt->max_sectors = ATA_MAX_SECTORS;
1456 ap->device[i].flags |= ATA_DFLAG_LOCK_SECTORS;
1459 if (ap->ops->dev_config)
1460 ap->ops->dev_config(ap, &ap->device[i]);
1464 * ata_bus_probe - Reset and probe ATA bus
1467 * Master ATA bus probing function. Initiates a hardware-dependent
1468 * bus reset, then attempts to identify any devices found on
1472 * PCI/etc. bus probe sem.
1475 * Zero on success, non-zero on error.
1478 static int ata_bus_probe(struct ata_port *ap)
1480 unsigned int i, found = 0;
1482 ap->ops->phy_reset(ap);
1483 if (ap->flags & ATA_FLAG_PORT_DISABLED)
1486 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1487 ata_dev_identify(ap, i);
1488 if (ata_dev_present(&ap->device[i])) {
1490 ata_dev_config(ap,i);
1494 if ((!found) || (ap->flags & ATA_FLAG_PORT_DISABLED))
1495 goto err_out_disable;
1498 if (ap->flags & ATA_FLAG_PORT_DISABLED)
1499 goto err_out_disable;
1504 ap->ops->port_disable(ap);
1510 * ata_port_probe - Mark port as enabled
1511 * @ap: Port for which we indicate enablement
1513 * Modify @ap data structure such that the system
1514 * thinks that the entire port is enabled.
1516 * LOCKING: host_set lock, or some other form of
1520 void ata_port_probe(struct ata_port *ap)
1522 ap->flags &= ~ATA_FLAG_PORT_DISABLED;
1526 * sata_print_link_status - Print SATA link status
1527 * @ap: SATA port to printk link status about
1529 * This function prints link speed and status of a SATA link.
1534 static void sata_print_link_status(struct ata_port *ap)
1539 if (!ap->ops->scr_read)
1542 sstatus = scr_read(ap, SCR_STATUS);
1544 if (sata_dev_present(ap)) {
1545 tmp = (sstatus >> 4) & 0xf;
1548 else if (tmp & (1 << 1))
1551 speed = "<unknown>";
1552 printk(KERN_INFO "ata%u: SATA link up %s Gbps (SStatus %X)\n",
1553 ap->id, speed, sstatus);
1555 printk(KERN_INFO "ata%u: SATA link down (SStatus %X)\n",
1561 * __sata_phy_reset - Wake/reset a low-level SATA PHY
1562 * @ap: SATA port associated with target SATA PHY.
1564 * This function issues commands to standard SATA Sxxx
1565 * PHY registers, to wake up the phy (and device), and
1566 * clear any reset condition.
1569 * PCI/etc. bus probe sem.
1572 void __sata_phy_reset(struct ata_port *ap)
1575 unsigned long timeout = jiffies + (HZ * 5);
1577 if (ap->flags & ATA_FLAG_SATA_RESET) {
1578 /* issue phy wake/reset */
1579 scr_write_flush(ap, SCR_CONTROL, 0x301);
1580 /* Couldn't find anything in SATA I/II specs, but
1581 * AHCI-1.1 10.4.2 says at least 1 ms. */
1584 scr_write_flush(ap, SCR_CONTROL, 0x300); /* phy wake/clear reset */
1586 /* wait for phy to become ready, if necessary */
1589 sstatus = scr_read(ap, SCR_STATUS);
1590 if ((sstatus & 0xf) != 1)
1592 } while (time_before(jiffies, timeout));
1594 /* print link status */
1595 sata_print_link_status(ap);
1597 /* TODO: phy layer with polling, timeouts, etc. */
1598 if (sata_dev_present(ap))
1601 ata_port_disable(ap);
1603 if (ap->flags & ATA_FLAG_PORT_DISABLED)
1606 if (ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT)) {
1607 ata_port_disable(ap);
1611 ap->cbl = ATA_CBL_SATA;
1615 * sata_phy_reset - Reset SATA bus.
1616 * @ap: SATA port associated with target SATA PHY.
1618 * This function resets the SATA bus, and then probes
1619 * the bus for devices.
1622 * PCI/etc. bus probe sem.
1625 void sata_phy_reset(struct ata_port *ap)
1627 __sata_phy_reset(ap);
1628 if (ap->flags & ATA_FLAG_PORT_DISABLED)
1634 * ata_port_disable - Disable port.
1635 * @ap: Port to be disabled.
1637 * Modify @ap data structure such that the system
1638 * thinks that the entire port is disabled, and should
1639 * never attempt to probe or communicate with devices
1642 * LOCKING: host_set lock, or some other form of
1646 void ata_port_disable(struct ata_port *ap)
1648 ap->device[0].class = ATA_DEV_NONE;
1649 ap->device[1].class = ATA_DEV_NONE;
1650 ap->flags |= ATA_FLAG_PORT_DISABLED;
1654 * This mode timing computation functionality is ported over from
1655 * drivers/ide/ide-timing.h and was originally written by Vojtech Pavlik
1658 * PIO 0-5, MWDMA 0-2 and UDMA 0-6 timings (in nanoseconds).
1659 * These were taken from ATA/ATAPI-6 standard, rev 0a, except
1660 * for PIO 5, which is a nonstandard extension and UDMA6, which
1661 * is currently supported only by Maxtor drives.
1664 static const struct ata_timing ata_timing[] = {
1666 { XFER_UDMA_6, 0, 0, 0, 0, 0, 0, 0, 15 },
1667 { XFER_UDMA_5, 0, 0, 0, 0, 0, 0, 0, 20 },
1668 { XFER_UDMA_4, 0, 0, 0, 0, 0, 0, 0, 30 },
1669 { XFER_UDMA_3, 0, 0, 0, 0, 0, 0, 0, 45 },
1671 { XFER_UDMA_2, 0, 0, 0, 0, 0, 0, 0, 60 },
1672 { XFER_UDMA_1, 0, 0, 0, 0, 0, 0, 0, 80 },
1673 { XFER_UDMA_0, 0, 0, 0, 0, 0, 0, 0, 120 },
1675 /* { XFER_UDMA_SLOW, 0, 0, 0, 0, 0, 0, 0, 150 }, */
1677 { XFER_MW_DMA_2, 25, 0, 0, 0, 70, 25, 120, 0 },
1678 { XFER_MW_DMA_1, 45, 0, 0, 0, 80, 50, 150, 0 },
1679 { XFER_MW_DMA_0, 60, 0, 0, 0, 215, 215, 480, 0 },
1681 { XFER_SW_DMA_2, 60, 0, 0, 0, 120, 120, 240, 0 },
1682 { XFER_SW_DMA_1, 90, 0, 0, 0, 240, 240, 480, 0 },
1683 { XFER_SW_DMA_0, 120, 0, 0, 0, 480, 480, 960, 0 },
1685 /* { XFER_PIO_5, 20, 50, 30, 100, 50, 30, 100, 0 }, */
1686 { XFER_PIO_4, 25, 70, 25, 120, 70, 25, 120, 0 },
1687 { XFER_PIO_3, 30, 80, 70, 180, 80, 70, 180, 0 },
1689 { XFER_PIO_2, 30, 290, 40, 330, 100, 90, 240, 0 },
1690 { XFER_PIO_1, 50, 290, 93, 383, 125, 100, 383, 0 },
1691 { XFER_PIO_0, 70, 290, 240, 600, 165, 150, 600, 0 },
1693 /* { XFER_PIO_SLOW, 120, 290, 240, 960, 290, 240, 960, 0 }, */
1698 #define ENOUGH(v,unit) (((v)-1)/(unit)+1)
1699 #define EZ(v,unit) ((v)?ENOUGH(v,unit):0)
1701 static void ata_timing_quantize(const struct ata_timing *t, struct ata_timing *q, int T, int UT)
1703 q->setup = EZ(t->setup * 1000, T);
1704 q->act8b = EZ(t->act8b * 1000, T);
1705 q->rec8b = EZ(t->rec8b * 1000, T);
1706 q->cyc8b = EZ(t->cyc8b * 1000, T);
1707 q->active = EZ(t->active * 1000, T);
1708 q->recover = EZ(t->recover * 1000, T);
1709 q->cycle = EZ(t->cycle * 1000, T);
1710 q->udma = EZ(t->udma * 1000, UT);
1713 void ata_timing_merge(const struct ata_timing *a, const struct ata_timing *b,
1714 struct ata_timing *m, unsigned int what)
1716 if (what & ATA_TIMING_SETUP ) m->setup = max(a->setup, b->setup);
1717 if (what & ATA_TIMING_ACT8B ) m->act8b = max(a->act8b, b->act8b);
1718 if (what & ATA_TIMING_REC8B ) m->rec8b = max(a->rec8b, b->rec8b);
1719 if (what & ATA_TIMING_CYC8B ) m->cyc8b = max(a->cyc8b, b->cyc8b);
1720 if (what & ATA_TIMING_ACTIVE ) m->active = max(a->active, b->active);
1721 if (what & ATA_TIMING_RECOVER) m->recover = max(a->recover, b->recover);
1722 if (what & ATA_TIMING_CYCLE ) m->cycle = max(a->cycle, b->cycle);
1723 if (what & ATA_TIMING_UDMA ) m->udma = max(a->udma, b->udma);
1726 static const struct ata_timing* ata_timing_find_mode(unsigned short speed)
1728 const struct ata_timing *t;
1730 for (t = ata_timing; t->mode != speed; t++)
1731 if (t->mode == 0xFF)
1736 int ata_timing_compute(struct ata_device *adev, unsigned short speed,
1737 struct ata_timing *t, int T, int UT)
1739 const struct ata_timing *s;
1740 struct ata_timing p;
1746 if (!(s = ata_timing_find_mode(speed)))
1749 memcpy(t, s, sizeof(*s));
1752 * If the drive is an EIDE drive, it can tell us it needs extended
1753 * PIO/MW_DMA cycle timing.
1756 if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE drive */
1757 memset(&p, 0, sizeof(p));
1758 if(speed >= XFER_PIO_0 && speed <= XFER_SW_DMA_0) {
1759 if (speed <= XFER_PIO_2) p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO];
1760 else p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO_IORDY];
1761 } else if(speed >= XFER_MW_DMA_0 && speed <= XFER_MW_DMA_2) {
1762 p.cycle = adev->id[ATA_ID_EIDE_DMA_MIN];
1764 ata_timing_merge(&p, t, t, ATA_TIMING_CYCLE | ATA_TIMING_CYC8B);
1768 * Convert the timing to bus clock counts.
1771 ata_timing_quantize(t, t, T, UT);
1774 * Even in DMA/UDMA modes we still use PIO access for IDENTIFY, S.M.A.R.T
1775 * and some other commands. We have to ensure that the DMA cycle timing is
1776 * slower/equal than the fastest PIO timing.
1779 if (speed > XFER_PIO_4) {
1780 ata_timing_compute(adev, adev->pio_mode, &p, T, UT);
1781 ata_timing_merge(&p, t, t, ATA_TIMING_ALL);
1785 * Lenghten active & recovery time so that cycle time is correct.
1788 if (t->act8b + t->rec8b < t->cyc8b) {
1789 t->act8b += (t->cyc8b - (t->act8b + t->rec8b)) / 2;
1790 t->rec8b = t->cyc8b - t->act8b;
1793 if (t->active + t->recover < t->cycle) {
1794 t->active += (t->cycle - (t->active + t->recover)) / 2;
1795 t->recover = t->cycle - t->active;
1801 static const struct {
1804 } xfer_mode_classes[] = {
1805 { ATA_SHIFT_UDMA, XFER_UDMA_0 },
1806 { ATA_SHIFT_MWDMA, XFER_MW_DMA_0 },
1807 { ATA_SHIFT_PIO, XFER_PIO_0 },
1810 static u8 base_from_shift(unsigned int shift)
1814 for (i = 0; i < ARRAY_SIZE(xfer_mode_classes); i++)
1815 if (xfer_mode_classes[i].shift == shift)
1816 return xfer_mode_classes[i].base;
1821 static void ata_dev_set_mode(struct ata_port *ap, struct ata_device *dev)
1826 if (!ata_dev_present(dev) || (ap->flags & ATA_FLAG_PORT_DISABLED))
1829 if (dev->xfer_shift == ATA_SHIFT_PIO)
1830 dev->flags |= ATA_DFLAG_PIO;
1832 ata_dev_set_xfermode(ap, dev);
1834 base = base_from_shift(dev->xfer_shift);
1835 ofs = dev->xfer_mode - base;
1836 idx = ofs + dev->xfer_shift;
1837 WARN_ON(idx >= ARRAY_SIZE(xfer_mode_str));
1839 DPRINTK("idx=%d xfer_shift=%u, xfer_mode=0x%x, base=0x%x, offset=%d\n",
1840 idx, dev->xfer_shift, (int)dev->xfer_mode, (int)base, ofs);
1842 printk(KERN_INFO "ata%u: dev %u configured for %s\n",
1843 ap->id, dev->devno, xfer_mode_str[idx]);
1846 static int ata_host_set_pio(struct ata_port *ap)
1852 mask = ata_get_mode_mask(ap, ATA_SHIFT_PIO);
1855 printk(KERN_WARNING "ata%u: no PIO support\n", ap->id);
1859 base = base_from_shift(ATA_SHIFT_PIO);
1860 xfer_mode = base + x;
1862 DPRINTK("base 0x%x xfer_mode 0x%x mask 0x%x x %d\n",
1863 (int)base, (int)xfer_mode, mask, x);
1865 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1866 struct ata_device *dev = &ap->device[i];
1867 if (ata_dev_present(dev)) {
1868 dev->pio_mode = xfer_mode;
1869 dev->xfer_mode = xfer_mode;
1870 dev->xfer_shift = ATA_SHIFT_PIO;
1871 if (ap->ops->set_piomode)
1872 ap->ops->set_piomode(ap, dev);
1879 static void ata_host_set_dma(struct ata_port *ap, u8 xfer_mode,
1880 unsigned int xfer_shift)
1884 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1885 struct ata_device *dev = &ap->device[i];
1886 if (ata_dev_present(dev)) {
1887 dev->dma_mode = xfer_mode;
1888 dev->xfer_mode = xfer_mode;
1889 dev->xfer_shift = xfer_shift;
1890 if (ap->ops->set_dmamode)
1891 ap->ops->set_dmamode(ap, dev);
1897 * ata_set_mode - Program timings and issue SET FEATURES - XFER
1898 * @ap: port on which timings will be programmed
1900 * Set ATA device disk transfer mode (PIO3, UDMA6, etc.).
1903 * PCI/etc. bus probe sem.
1906 static void ata_set_mode(struct ata_port *ap)
1908 unsigned int xfer_shift;
1912 /* step 1: always set host PIO timings */
1913 rc = ata_host_set_pio(ap);
1917 /* step 2: choose the best data xfer mode */
1918 xfer_mode = xfer_shift = 0;
1919 rc = ata_choose_xfer_mode(ap, &xfer_mode, &xfer_shift);
1923 /* step 3: if that xfer mode isn't PIO, set host DMA timings */
1924 if (xfer_shift != ATA_SHIFT_PIO)
1925 ata_host_set_dma(ap, xfer_mode, xfer_shift);
1927 /* step 4: update devices' xfer mode */
1928 ata_dev_set_mode(ap, &ap->device[0]);
1929 ata_dev_set_mode(ap, &ap->device[1]);
1931 if (ap->flags & ATA_FLAG_PORT_DISABLED)
1934 if (ap->ops->post_set_mode)
1935 ap->ops->post_set_mode(ap);
1940 ata_port_disable(ap);
1944 * ata_busy_sleep - sleep until BSY clears, or timeout
1945 * @ap: port containing status register to be polled
1946 * @tmout_pat: impatience timeout
1947 * @tmout: overall timeout
1949 * Sleep until ATA Status register bit BSY clears,
1950 * or a timeout occurs.
1956 static unsigned int ata_busy_sleep (struct ata_port *ap,
1957 unsigned long tmout_pat,
1958 unsigned long tmout)
1960 unsigned long timer_start, timeout;
1963 status = ata_busy_wait(ap, ATA_BUSY, 300);
1964 timer_start = jiffies;
1965 timeout = timer_start + tmout_pat;
1966 while ((status & ATA_BUSY) && (time_before(jiffies, timeout))) {
1968 status = ata_busy_wait(ap, ATA_BUSY, 3);
1971 if (status & ATA_BUSY)
1972 printk(KERN_WARNING "ata%u is slow to respond, "
1973 "please be patient\n", ap->id);
1975 timeout = timer_start + tmout;
1976 while ((status & ATA_BUSY) && (time_before(jiffies, timeout))) {
1978 status = ata_chk_status(ap);
1981 if (status & ATA_BUSY) {
1982 printk(KERN_ERR "ata%u failed to respond (%lu secs)\n",
1983 ap->id, tmout / HZ);
1990 static void ata_bus_post_reset(struct ata_port *ap, unsigned int devmask)
1992 struct ata_ioports *ioaddr = &ap->ioaddr;
1993 unsigned int dev0 = devmask & (1 << 0);
1994 unsigned int dev1 = devmask & (1 << 1);
1995 unsigned long timeout;
1997 /* if device 0 was found in ata_devchk, wait for its
2001 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
2003 /* if device 1 was found in ata_devchk, wait for
2004 * register access, then wait for BSY to clear
2006 timeout = jiffies + ATA_TMOUT_BOOT;
2010 ap->ops->dev_select(ap, 1);
2011 if (ap->flags & ATA_FLAG_MMIO) {
2012 nsect = readb((void __iomem *) ioaddr->nsect_addr);
2013 lbal = readb((void __iomem *) ioaddr->lbal_addr);
2015 nsect = inb(ioaddr->nsect_addr);
2016 lbal = inb(ioaddr->lbal_addr);
2018 if ((nsect == 1) && (lbal == 1))
2020 if (time_after(jiffies, timeout)) {
2024 msleep(50); /* give drive a breather */
2027 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
2029 /* is all this really necessary? */
2030 ap->ops->dev_select(ap, 0);
2032 ap->ops->dev_select(ap, 1);
2034 ap->ops->dev_select(ap, 0);
2038 * ata_bus_edd - Issue EXECUTE DEVICE DIAGNOSTIC command.
2039 * @ap: Port to reset and probe
2041 * Use the EXECUTE DEVICE DIAGNOSTIC command to reset and
2042 * probe the bus. Not often used these days.
2045 * PCI/etc. bus probe sem.
2046 * Obtains host_set lock.
2050 static unsigned int ata_bus_edd(struct ata_port *ap)
2052 struct ata_taskfile tf;
2053 unsigned long flags;
2055 /* set up execute-device-diag (bus reset) taskfile */
2056 /* also, take interrupts to a known state (disabled) */
2057 DPRINTK("execute-device-diag\n");
2058 ata_tf_init(ap, &tf, 0);
2060 tf.command = ATA_CMD_EDD;
2061 tf.protocol = ATA_PROT_NODATA;
2064 spin_lock_irqsave(&ap->host_set->lock, flags);
2065 ata_tf_to_host(ap, &tf);
2066 spin_unlock_irqrestore(&ap->host_set->lock, flags);
2068 /* spec says at least 2ms. but who knows with those
2069 * crazy ATAPI devices...
2073 return ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
2076 static unsigned int ata_bus_softreset(struct ata_port *ap,
2077 unsigned int devmask)
2079 struct ata_ioports *ioaddr = &ap->ioaddr;
2081 DPRINTK("ata%u: bus reset via SRST\n", ap->id);
2083 /* software reset. causes dev0 to be selected */
2084 if (ap->flags & ATA_FLAG_MMIO) {
2085 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
2086 udelay(20); /* FIXME: flush */
2087 writeb(ap->ctl | ATA_SRST, (void __iomem *) ioaddr->ctl_addr);
2088 udelay(20); /* FIXME: flush */
2089 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
2091 outb(ap->ctl, ioaddr->ctl_addr);
2093 outb(ap->ctl | ATA_SRST, ioaddr->ctl_addr);
2095 outb(ap->ctl, ioaddr->ctl_addr);
2098 /* spec mandates ">= 2ms" before checking status.
2099 * We wait 150ms, because that was the magic delay used for
2100 * ATAPI devices in Hale Landis's ATADRVR, for the period of time
2101 * between when the ATA command register is written, and then
2102 * status is checked. Because waiting for "a while" before
2103 * checking status is fine, post SRST, we perform this magic
2104 * delay here as well.
2108 ata_bus_post_reset(ap, devmask);
2114 * ata_bus_reset - reset host port and associated ATA channel
2115 * @ap: port to reset
2117 * This is typically the first time we actually start issuing
2118 * commands to the ATA channel. We wait for BSY to clear, then
2119 * issue EXECUTE DEVICE DIAGNOSTIC command, polling for its
2120 * result. Determine what devices, if any, are on the channel
2121 * by looking at the device 0/1 error register. Look at the signature
2122 * stored in each device's taskfile registers, to determine if
2123 * the device is ATA or ATAPI.
2126 * PCI/etc. bus probe sem.
2127 * Obtains host_set lock.
2130 * Sets ATA_FLAG_PORT_DISABLED if bus reset fails.
2133 void ata_bus_reset(struct ata_port *ap)
2135 struct ata_ioports *ioaddr = &ap->ioaddr;
2136 unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS;
2138 unsigned int dev0, dev1 = 0, rc = 0, devmask = 0;
2140 DPRINTK("ENTER, host %u, port %u\n", ap->id, ap->port_no);
2142 /* determine if device 0/1 are present */
2143 if (ap->flags & ATA_FLAG_SATA_RESET)
2146 dev0 = ata_devchk(ap, 0);
2148 dev1 = ata_devchk(ap, 1);
2152 devmask |= (1 << 0);
2154 devmask |= (1 << 1);
2156 /* select device 0 again */
2157 ap->ops->dev_select(ap, 0);
2159 /* issue bus reset */
2160 if (ap->flags & ATA_FLAG_SRST)
2161 rc = ata_bus_softreset(ap, devmask);
2162 else if ((ap->flags & ATA_FLAG_SATA_RESET) == 0) {
2163 /* set up device control */
2164 if (ap->flags & ATA_FLAG_MMIO)
2165 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
2167 outb(ap->ctl, ioaddr->ctl_addr);
2168 rc = ata_bus_edd(ap);
2175 * determine by signature whether we have ATA or ATAPI devices
2177 err = ata_dev_try_classify(ap, 0);
2178 if ((slave_possible) && (err != 0x81))
2179 ata_dev_try_classify(ap, 1);
2181 /* re-enable interrupts */
2182 if (ap->ioaddr.ctl_addr) /* FIXME: hack. create a hook instead */
2185 /* is double-select really necessary? */
2186 if (ap->device[1].class != ATA_DEV_NONE)
2187 ap->ops->dev_select(ap, 1);
2188 if (ap->device[0].class != ATA_DEV_NONE)
2189 ap->ops->dev_select(ap, 0);
2191 /* if no devices were detected, disable this port */
2192 if ((ap->device[0].class == ATA_DEV_NONE) &&
2193 (ap->device[1].class == ATA_DEV_NONE))
2196 if (ap->flags & (ATA_FLAG_SATA_RESET | ATA_FLAG_SRST)) {
2197 /* set up device control for ATA_FLAG_SATA_RESET */
2198 if (ap->flags & ATA_FLAG_MMIO)
2199 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
2201 outb(ap->ctl, ioaddr->ctl_addr);
2208 printk(KERN_ERR "ata%u: disabling port\n", ap->id);
2209 ap->ops->port_disable(ap);
2214 static void ata_pr_blacklisted(const struct ata_port *ap,
2215 const struct ata_device *dev)
2217 printk(KERN_WARNING "ata%u: dev %u is on DMA blacklist, disabling DMA\n",
2218 ap->id, dev->devno);
2221 static const char * const ata_dma_blacklist [] = {
2240 "Toshiba CD-ROM XM-6202B",
2241 "TOSHIBA CD-ROM XM-1702BC",
2243 "E-IDE CD-ROM CR-840",
2246 "SAMSUNG CD-ROM SC-148C",
2247 "SAMSUNG CD-ROM SC",
2249 "ATAPI CD-ROM DRIVE 40X MAXIMUM",
2253 static int ata_dma_blacklisted(const struct ata_device *dev)
2255 unsigned char model_num[40];
2260 ata_dev_id_string(dev->id, model_num, ATA_ID_PROD_OFS,
2263 len = strnlen(s, sizeof(model_num));
2265 /* ATAPI specifies that empty space is blank-filled; remove blanks */
2266 while ((len > 0) && (s[len - 1] == ' ')) {
2271 for (i = 0; i < ARRAY_SIZE(ata_dma_blacklist); i++)
2272 if (!strncmp(ata_dma_blacklist[i], s, len))
2278 static unsigned int ata_get_mode_mask(const struct ata_port *ap, int shift)
2280 const struct ata_device *master, *slave;
2283 master = &ap->device[0];
2284 slave = &ap->device[1];
2286 assert (ata_dev_present(master) || ata_dev_present(slave));
2288 if (shift == ATA_SHIFT_UDMA) {
2289 mask = ap->udma_mask;
2290 if (ata_dev_present(master)) {
2291 mask &= (master->id[ATA_ID_UDMA_MODES] & 0xff);
2292 if (ata_dma_blacklisted(master)) {
2294 ata_pr_blacklisted(ap, master);
2297 if (ata_dev_present(slave)) {
2298 mask &= (slave->id[ATA_ID_UDMA_MODES] & 0xff);
2299 if (ata_dma_blacklisted(slave)) {
2301 ata_pr_blacklisted(ap, slave);
2305 else if (shift == ATA_SHIFT_MWDMA) {
2306 mask = ap->mwdma_mask;
2307 if (ata_dev_present(master)) {
2308 mask &= (master->id[ATA_ID_MWDMA_MODES] & 0x07);
2309 if (ata_dma_blacklisted(master)) {
2311 ata_pr_blacklisted(ap, master);
2314 if (ata_dev_present(slave)) {
2315 mask &= (slave->id[ATA_ID_MWDMA_MODES] & 0x07);
2316 if (ata_dma_blacklisted(slave)) {
2318 ata_pr_blacklisted(ap, slave);
2322 else if (shift == ATA_SHIFT_PIO) {
2323 mask = ap->pio_mask;
2324 if (ata_dev_present(master)) {
2325 /* spec doesn't return explicit support for
2326 * PIO0-2, so we fake it
2328 u16 tmp_mode = master->id[ATA_ID_PIO_MODES] & 0x03;
2333 if (ata_dev_present(slave)) {
2334 /* spec doesn't return explicit support for
2335 * PIO0-2, so we fake it
2337 u16 tmp_mode = slave->id[ATA_ID_PIO_MODES] & 0x03;
2344 mask = 0xffffffff; /* shut up compiler warning */
2351 /* find greatest bit */
2352 static int fgb(u32 bitmap)
2357 for (i = 0; i < 32; i++)
2358 if (bitmap & (1 << i))
2365 * ata_choose_xfer_mode - attempt to find best transfer mode
2366 * @ap: Port for which an xfer mode will be selected
2367 * @xfer_mode_out: (output) SET FEATURES - XFER MODE code
2368 * @xfer_shift_out: (output) bit shift that selects this mode
2370 * Based on host and device capabilities, determine the
2371 * maximum transfer mode that is amenable to all.
2374 * PCI/etc. bus probe sem.
2377 * Zero on success, negative on error.
2380 static int ata_choose_xfer_mode(const struct ata_port *ap,
2382 unsigned int *xfer_shift_out)
2384 unsigned int mask, shift;
2387 for (i = 0; i < ARRAY_SIZE(xfer_mode_classes); i++) {
2388 shift = xfer_mode_classes[i].shift;
2389 mask = ata_get_mode_mask(ap, shift);
2393 *xfer_mode_out = xfer_mode_classes[i].base + x;
2394 *xfer_shift_out = shift;
2403 * ata_dev_set_xfermode - Issue SET FEATURES - XFER MODE command
2404 * @ap: Port associated with device @dev
2405 * @dev: Device to which command will be sent
2407 * Issue SET FEATURES - XFER MODE command to device @dev
2411 * PCI/etc. bus probe sem.
2414 static void ata_dev_set_xfermode(struct ata_port *ap, struct ata_device *dev)
2416 struct ata_taskfile tf;
2418 /* set up set-features taskfile */
2419 DPRINTK("set features - xfer mode\n");
2421 ata_tf_init(ap, &tf, dev->devno);
2422 tf.command = ATA_CMD_SET_FEATURES;
2423 tf.feature = SETFEATURES_XFER;
2424 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
2425 tf.protocol = ATA_PROT_NODATA;
2426 tf.nsect = dev->xfer_mode;
2428 if (ata_exec_internal(ap, dev, &tf, DMA_NONE, NULL, 0)) {
2429 printk(KERN_ERR "ata%u: failed to set xfermode, disabled\n",
2431 ata_port_disable(ap);
2438 * ata_dev_reread_id - Reread the device identify device info
2439 * @ap: port where the device is
2440 * @dev: device to reread the identify device info
2445 static void ata_dev_reread_id(struct ata_port *ap, struct ata_device *dev)
2447 struct ata_taskfile tf;
2449 ata_tf_init(ap, &tf, dev->devno);
2451 if (dev->class == ATA_DEV_ATA) {
2452 tf.command = ATA_CMD_ID_ATA;
2453 DPRINTK("do ATA identify\n");
2455 tf.command = ATA_CMD_ID_ATAPI;
2456 DPRINTK("do ATAPI identify\n");
2459 tf.flags |= ATA_TFLAG_DEVICE;
2460 tf.protocol = ATA_PROT_PIO;
2462 if (ata_exec_internal(ap, dev, &tf, DMA_FROM_DEVICE,
2463 dev->id, sizeof(dev->id)))
2466 swap_buf_le16(dev->id, ATA_ID_WORDS);
2474 printk(KERN_ERR "ata%u: failed to reread ID, disabled\n", ap->id);
2475 ata_port_disable(ap);
2479 * ata_dev_init_params - Issue INIT DEV PARAMS command
2480 * @ap: Port associated with device @dev
2481 * @dev: Device to which command will be sent
2486 static void ata_dev_init_params(struct ata_port *ap, struct ata_device *dev)
2488 struct ata_taskfile tf;
2489 u16 sectors = dev->id[6];
2490 u16 heads = dev->id[3];
2492 /* Number of sectors per track 1-255. Number of heads 1-16 */
2493 if (sectors < 1 || sectors > 255 || heads < 1 || heads > 16)
2496 /* set up init dev params taskfile */
2497 DPRINTK("init dev params \n");
2499 ata_tf_init(ap, &tf, dev->devno);
2500 tf.command = ATA_CMD_INIT_DEV_PARAMS;
2501 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
2502 tf.protocol = ATA_PROT_NODATA;
2504 tf.device |= (heads - 1) & 0x0f; /* max head = num. of heads - 1 */
2506 if (ata_exec_internal(ap, dev, &tf, DMA_NONE, NULL, 0)) {
2507 printk(KERN_ERR "ata%u: failed to init parameters, disabled\n",
2509 ata_port_disable(ap);
2516 * ata_sg_clean - Unmap DMA memory associated with command
2517 * @qc: Command containing DMA memory to be released
2519 * Unmap all mapped DMA memory associated with this command.
2522 * spin_lock_irqsave(host_set lock)
2525 static void ata_sg_clean(struct ata_queued_cmd *qc)
2527 struct ata_port *ap = qc->ap;
2528 struct scatterlist *sg = qc->__sg;
2529 int dir = qc->dma_dir;
2530 void *pad_buf = NULL;
2532 assert(qc->flags & ATA_QCFLAG_DMAMAP);
2535 if (qc->flags & ATA_QCFLAG_SINGLE)
2536 assert(qc->n_elem == 1);
2538 VPRINTK("unmapping %u sg elements\n", qc->n_elem);
2540 /* if we padded the buffer out to 32-bit bound, and data
2541 * xfer direction is from-device, we must copy from the
2542 * pad buffer back into the supplied buffer
2544 if (qc->pad_len && !(qc->tf.flags & ATA_TFLAG_WRITE))
2545 pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
2547 if (qc->flags & ATA_QCFLAG_SG) {
2549 dma_unmap_sg(ap->host_set->dev, sg, qc->n_elem, dir);
2550 /* restore last sg */
2551 sg[qc->orig_n_elem - 1].length += qc->pad_len;
2553 struct scatterlist *psg = &qc->pad_sgent;
2554 void *addr = kmap_atomic(psg->page, KM_IRQ0);
2555 memcpy(addr + psg->offset, pad_buf, qc->pad_len);
2556 kunmap_atomic(addr, KM_IRQ0);
2559 if (sg_dma_len(&sg[0]) > 0)
2560 dma_unmap_single(ap->host_set->dev,
2561 sg_dma_address(&sg[0]), sg_dma_len(&sg[0]),
2564 sg->length += qc->pad_len;
2566 memcpy(qc->buf_virt + sg->length - qc->pad_len,
2567 pad_buf, qc->pad_len);
2570 qc->flags &= ~ATA_QCFLAG_DMAMAP;
2575 * ata_fill_sg - Fill PCI IDE PRD table
2576 * @qc: Metadata associated with taskfile to be transferred
2578 * Fill PCI IDE PRD (scatter-gather) table with segments
2579 * associated with the current disk command.
2582 * spin_lock_irqsave(host_set lock)
2585 static void ata_fill_sg(struct ata_queued_cmd *qc)
2587 struct ata_port *ap = qc->ap;
2588 struct scatterlist *sg;
2591 assert(qc->__sg != NULL);
2592 assert(qc->n_elem > 0);
2595 ata_for_each_sg(sg, qc) {
2599 /* determine if physical DMA addr spans 64K boundary.
2600 * Note h/w doesn't support 64-bit, so we unconditionally
2601 * truncate dma_addr_t to u32.
2603 addr = (u32) sg_dma_address(sg);
2604 sg_len = sg_dma_len(sg);
2607 offset = addr & 0xffff;
2609 if ((offset + sg_len) > 0x10000)
2610 len = 0x10000 - offset;
2612 ap->prd[idx].addr = cpu_to_le32(addr);
2613 ap->prd[idx].flags_len = cpu_to_le32(len & 0xffff);
2614 VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", idx, addr, len);
2623 ap->prd[idx - 1].flags_len |= cpu_to_le32(ATA_PRD_EOT);
2626 * ata_check_atapi_dma - Check whether ATAPI DMA can be supported
2627 * @qc: Metadata associated with taskfile to check
2629 * Allow low-level driver to filter ATA PACKET commands, returning
2630 * a status indicating whether or not it is OK to use DMA for the
2631 * supplied PACKET command.
2634 * spin_lock_irqsave(host_set lock)
2636 * RETURNS: 0 when ATAPI DMA can be used
2639 int ata_check_atapi_dma(struct ata_queued_cmd *qc)
2641 struct ata_port *ap = qc->ap;
2642 int rc = 0; /* Assume ATAPI DMA is OK by default */
2644 if (ap->ops->check_atapi_dma)
2645 rc = ap->ops->check_atapi_dma(qc);
2650 * ata_qc_prep - Prepare taskfile for submission
2651 * @qc: Metadata associated with taskfile to be prepared
2653 * Prepare ATA taskfile for submission.
2656 * spin_lock_irqsave(host_set lock)
2658 void ata_qc_prep(struct ata_queued_cmd *qc)
2660 if (!(qc->flags & ATA_QCFLAG_DMAMAP))
2667 * ata_sg_init_one - Associate command with memory buffer
2668 * @qc: Command to be associated
2669 * @buf: Memory buffer
2670 * @buflen: Length of memory buffer, in bytes.
2672 * Initialize the data-related elements of queued_cmd @qc
2673 * to point to a single memory buffer, @buf of byte length @buflen.
2676 * spin_lock_irqsave(host_set lock)
2679 void ata_sg_init_one(struct ata_queued_cmd *qc, void *buf, unsigned int buflen)
2681 struct scatterlist *sg;
2683 qc->flags |= ATA_QCFLAG_SINGLE;
2685 memset(&qc->sgent, 0, sizeof(qc->sgent));
2686 qc->__sg = &qc->sgent;
2688 qc->orig_n_elem = 1;
2692 sg_init_one(sg, buf, buflen);
2696 * ata_sg_init - Associate command with scatter-gather table.
2697 * @qc: Command to be associated
2698 * @sg: Scatter-gather table.
2699 * @n_elem: Number of elements in s/g table.
2701 * Initialize the data-related elements of queued_cmd @qc
2702 * to point to a scatter-gather table @sg, containing @n_elem
2706 * spin_lock_irqsave(host_set lock)
2709 void ata_sg_init(struct ata_queued_cmd *qc, struct scatterlist *sg,
2710 unsigned int n_elem)
2712 qc->flags |= ATA_QCFLAG_SG;
2714 qc->n_elem = n_elem;
2715 qc->orig_n_elem = n_elem;
2719 * ata_sg_setup_one - DMA-map the memory buffer associated with a command.
2720 * @qc: Command with memory buffer to be mapped.
2722 * DMA-map the memory buffer associated with queued_cmd @qc.
2725 * spin_lock_irqsave(host_set lock)
2728 * Zero on success, negative on error.
2731 static int ata_sg_setup_one(struct ata_queued_cmd *qc)
2733 struct ata_port *ap = qc->ap;
2734 int dir = qc->dma_dir;
2735 struct scatterlist *sg = qc->__sg;
2736 dma_addr_t dma_address;
2738 /* we must lengthen transfers to end on a 32-bit boundary */
2739 qc->pad_len = sg->length & 3;
2741 void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
2742 struct scatterlist *psg = &qc->pad_sgent;
2744 assert(qc->dev->class == ATA_DEV_ATAPI);
2746 memset(pad_buf, 0, ATA_DMA_PAD_SZ);
2748 if (qc->tf.flags & ATA_TFLAG_WRITE)
2749 memcpy(pad_buf, qc->buf_virt + sg->length - qc->pad_len,
2752 sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ);
2753 sg_dma_len(psg) = ATA_DMA_PAD_SZ;
2755 sg->length -= qc->pad_len;
2757 DPRINTK("padding done, sg->length=%u pad_len=%u\n",
2758 sg->length, qc->pad_len);
2762 sg_dma_address(sg) = 0;
2766 dma_address = dma_map_single(ap->host_set->dev, qc->buf_virt,
2768 if (dma_mapping_error(dma_address)) {
2770 sg->length += qc->pad_len;
2774 sg_dma_address(sg) = dma_address;
2776 sg_dma_len(sg) = sg->length;
2778 DPRINTK("mapped buffer of %d bytes for %s\n", sg_dma_len(sg),
2779 qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
2785 * ata_sg_setup - DMA-map the scatter-gather table associated with a command.
2786 * @qc: Command with scatter-gather table to be mapped.
2788 * DMA-map the scatter-gather table associated with queued_cmd @qc.
2791 * spin_lock_irqsave(host_set lock)
2794 * Zero on success, negative on error.
2798 static int ata_sg_setup(struct ata_queued_cmd *qc)
2800 struct ata_port *ap = qc->ap;
2801 struct scatterlist *sg = qc->__sg;
2802 struct scatterlist *lsg = &sg[qc->n_elem - 1];
2803 int n_elem, pre_n_elem, dir, trim_sg = 0;
2805 VPRINTK("ENTER, ata%u\n", ap->id);
2806 assert(qc->flags & ATA_QCFLAG_SG);
2808 /* we must lengthen transfers to end on a 32-bit boundary */
2809 qc->pad_len = lsg->length & 3;
2811 void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
2812 struct scatterlist *psg = &qc->pad_sgent;
2813 unsigned int offset;
2815 assert(qc->dev->class == ATA_DEV_ATAPI);
2817 memset(pad_buf, 0, ATA_DMA_PAD_SZ);
2820 * psg->page/offset are used to copy to-be-written
2821 * data in this function or read data in ata_sg_clean.
2823 offset = lsg->offset + lsg->length - qc->pad_len;
2824 psg->page = nth_page(lsg->page, offset >> PAGE_SHIFT);
2825 psg->offset = offset_in_page(offset);
2827 if (qc->tf.flags & ATA_TFLAG_WRITE) {
2828 void *addr = kmap_atomic(psg->page, KM_IRQ0);
2829 memcpy(pad_buf, addr + psg->offset, qc->pad_len);
2830 kunmap_atomic(addr, KM_IRQ0);
2833 sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ);
2834 sg_dma_len(psg) = ATA_DMA_PAD_SZ;
2836 lsg->length -= qc->pad_len;
2837 if (lsg->length == 0)
2840 DPRINTK("padding done, sg[%d].length=%u pad_len=%u\n",
2841 qc->n_elem - 1, lsg->length, qc->pad_len);
2844 pre_n_elem = qc->n_elem;
2845 if (trim_sg && pre_n_elem)
2854 n_elem = dma_map_sg(ap->host_set->dev, sg, pre_n_elem, dir);
2856 /* restore last sg */
2857 lsg->length += qc->pad_len;
2861 DPRINTK("%d sg elements mapped\n", n_elem);
2864 qc->n_elem = n_elem;
2870 * ata_poll_qc_complete - turn irq back on and finish qc
2871 * @qc: Command to complete
2872 * @err_mask: ATA status register content
2875 * None. (grabs host lock)
2878 void ata_poll_qc_complete(struct ata_queued_cmd *qc)
2880 struct ata_port *ap = qc->ap;
2881 unsigned long flags;
2883 spin_lock_irqsave(&ap->host_set->lock, flags);
2885 ata_qc_complete(qc);
2886 spin_unlock_irqrestore(&ap->host_set->lock, flags);
2891 * @ap: the target ata_port
2894 * None. (executing in kernel thread context)
2897 * timeout value to use
2900 static unsigned long ata_pio_poll(struct ata_port *ap)
2902 struct ata_queued_cmd *qc;
2904 unsigned int poll_state = HSM_ST_UNKNOWN;
2905 unsigned int reg_state = HSM_ST_UNKNOWN;
2907 qc = ata_qc_from_tag(ap, ap->active_tag);
2910 switch (ap->hsm_task_state) {
2913 poll_state = HSM_ST_POLL;
2917 case HSM_ST_LAST_POLL:
2918 poll_state = HSM_ST_LAST_POLL;
2919 reg_state = HSM_ST_LAST;
2926 status = ata_chk_status(ap);
2927 if (status & ATA_BUSY) {
2928 if (time_after(jiffies, ap->pio_task_timeout)) {
2929 qc->err_mask |= AC_ERR_TIMEOUT;
2930 ap->hsm_task_state = HSM_ST_TMOUT;
2933 ap->hsm_task_state = poll_state;
2934 return ATA_SHORT_PAUSE;
2937 ap->hsm_task_state = reg_state;
2942 * ata_pio_complete - check if drive is busy or idle
2943 * @ap: the target ata_port
2946 * None. (executing in kernel thread context)
2949 * Zero if qc completed.
2950 * Non-zero if has next.
2953 static int ata_pio_complete (struct ata_port *ap)
2955 struct ata_queued_cmd *qc;
2959 * This is purely heuristic. This is a fast path. Sometimes when
2960 * we enter, BSY will be cleared in a chk-status or two. If not,
2961 * the drive is probably seeking or something. Snooze for a couple
2962 * msecs, then chk-status again. If still busy, fall back to
2963 * HSM_ST_LAST_POLL state.
2965 drv_stat = ata_busy_wait(ap, ATA_BUSY, 10);
2966 if (drv_stat & ATA_BUSY) {
2968 drv_stat = ata_busy_wait(ap, ATA_BUSY, 10);
2969 if (drv_stat & ATA_BUSY) {
2970 ap->hsm_task_state = HSM_ST_LAST_POLL;
2971 ap->pio_task_timeout = jiffies + ATA_TMOUT_PIO;
2976 qc = ata_qc_from_tag(ap, ap->active_tag);
2979 drv_stat = ata_wait_idle(ap);
2980 if (!ata_ok(drv_stat)) {
2981 qc->err_mask |= __ac_err_mask(drv_stat);
2982 ap->hsm_task_state = HSM_ST_ERR;
2986 ap->hsm_task_state = HSM_ST_IDLE;
2988 assert(qc->err_mask == 0);
2989 ata_poll_qc_complete(qc);
2991 /* another command may start at this point */
2998 * swap_buf_le16 - swap halves of 16-words in place
2999 * @buf: Buffer to swap
3000 * @buf_words: Number of 16-bit words in buffer.
3002 * Swap halves of 16-bit words if needed to convert from
3003 * little-endian byte order to native cpu byte order, or
3007 * Inherited from caller.
3009 void swap_buf_le16(u16 *buf, unsigned int buf_words)
3014 for (i = 0; i < buf_words; i++)
3015 buf[i] = le16_to_cpu(buf[i]);
3016 #endif /* __BIG_ENDIAN */
3020 * ata_mmio_data_xfer - Transfer data by MMIO
3021 * @ap: port to read/write
3023 * @buflen: buffer length
3024 * @write_data: read/write
3026 * Transfer data from/to the device data register by MMIO.
3029 * Inherited from caller.
3032 static void ata_mmio_data_xfer(struct ata_port *ap, unsigned char *buf,
3033 unsigned int buflen, int write_data)
3036 unsigned int words = buflen >> 1;
3037 u16 *buf16 = (u16 *) buf;
3038 void __iomem *mmio = (void __iomem *)ap->ioaddr.data_addr;
3040 /* Transfer multiple of 2 bytes */
3042 for (i = 0; i < words; i++)
3043 writew(le16_to_cpu(buf16[i]), mmio);
3045 for (i = 0; i < words; i++)
3046 buf16[i] = cpu_to_le16(readw(mmio));
3049 /* Transfer trailing 1 byte, if any. */
3050 if (unlikely(buflen & 0x01)) {
3051 u16 align_buf[1] = { 0 };
3052 unsigned char *trailing_buf = buf + buflen - 1;
3055 memcpy(align_buf, trailing_buf, 1);
3056 writew(le16_to_cpu(align_buf[0]), mmio);
3058 align_buf[0] = cpu_to_le16(readw(mmio));
3059 memcpy(trailing_buf, align_buf, 1);
3065 * ata_pio_data_xfer - Transfer data by PIO
3066 * @ap: port to read/write
3068 * @buflen: buffer length
3069 * @write_data: read/write
3071 * Transfer data from/to the device data register by PIO.
3074 * Inherited from caller.
3077 static void ata_pio_data_xfer(struct ata_port *ap, unsigned char *buf,
3078 unsigned int buflen, int write_data)
3080 unsigned int words = buflen >> 1;
3082 /* Transfer multiple of 2 bytes */
3084 outsw(ap->ioaddr.data_addr, buf, words);
3086 insw(ap->ioaddr.data_addr, buf, words);
3088 /* Transfer trailing 1 byte, if any. */
3089 if (unlikely(buflen & 0x01)) {
3090 u16 align_buf[1] = { 0 };
3091 unsigned char *trailing_buf = buf + buflen - 1;
3094 memcpy(align_buf, trailing_buf, 1);
3095 outw(le16_to_cpu(align_buf[0]), ap->ioaddr.data_addr);
3097 align_buf[0] = cpu_to_le16(inw(ap->ioaddr.data_addr));
3098 memcpy(trailing_buf, align_buf, 1);
3104 * ata_data_xfer - Transfer data from/to the data register.
3105 * @ap: port to read/write
3107 * @buflen: buffer length
3108 * @do_write: read/write
3110 * Transfer data from/to the device data register.
3113 * Inherited from caller.
3116 static void ata_data_xfer(struct ata_port *ap, unsigned char *buf,
3117 unsigned int buflen, int do_write)
3119 /* Make the crap hardware pay the costs not the good stuff */
3120 if (unlikely(ap->flags & ATA_FLAG_IRQ_MASK)) {
3121 unsigned long flags;
3122 local_irq_save(flags);
3123 if (ap->flags & ATA_FLAG_MMIO)
3124 ata_mmio_data_xfer(ap, buf, buflen, do_write);
3126 ata_pio_data_xfer(ap, buf, buflen, do_write);
3127 local_irq_restore(flags);
3129 if (ap->flags & ATA_FLAG_MMIO)
3130 ata_mmio_data_xfer(ap, buf, buflen, do_write);
3132 ata_pio_data_xfer(ap, buf, buflen, do_write);
3137 * ata_pio_sector - Transfer ATA_SECT_SIZE (512 bytes) of data.
3138 * @qc: Command on going
3140 * Transfer ATA_SECT_SIZE of data from/to the ATA device.
3143 * Inherited from caller.
3146 static void ata_pio_sector(struct ata_queued_cmd *qc)
3148 int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
3149 struct scatterlist *sg = qc->__sg;
3150 struct ata_port *ap = qc->ap;
3152 unsigned int offset;
3155 if (qc->cursect == (qc->nsect - 1))
3156 ap->hsm_task_state = HSM_ST_LAST;
3158 page = sg[qc->cursg].page;
3159 offset = sg[qc->cursg].offset + qc->cursg_ofs * ATA_SECT_SIZE;
3161 /* get the current page and offset */
3162 page = nth_page(page, (offset >> PAGE_SHIFT));
3163 offset %= PAGE_SIZE;
3165 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
3167 if (PageHighMem(page)) {
3168 unsigned long flags;
3170 local_irq_save(flags);
3171 buf = kmap_atomic(page, KM_IRQ0);
3173 /* do the actual data transfer */
3174 ata_data_xfer(ap, buf + offset, ATA_SECT_SIZE, do_write);
3176 kunmap_atomic(buf, KM_IRQ0);
3177 local_irq_restore(flags);
3179 buf = page_address(page);
3180 ata_data_xfer(ap, buf + offset, ATA_SECT_SIZE, do_write);
3186 if ((qc->cursg_ofs * ATA_SECT_SIZE) == (&sg[qc->cursg])->length) {
3193 * ata_pio_sectors - Transfer one or many 512-byte sectors.
3194 * @qc: Command on going
3196 * Transfer one or many ATA_SECT_SIZE of data from/to the
3197 * ATA device for the DRQ request.
3200 * Inherited from caller.
3203 static void ata_pio_sectors(struct ata_queued_cmd *qc)
3205 if (is_multi_taskfile(&qc->tf)) {
3206 /* READ/WRITE MULTIPLE */
3209 assert(qc->dev->multi_count);
3211 nsect = min(qc->nsect - qc->cursect, qc->dev->multi_count);
3219 * atapi_send_cdb - Write CDB bytes to hardware
3220 * @ap: Port to which ATAPI device is attached.
3221 * @qc: Taskfile currently active
3223 * When device has indicated its readiness to accept
3224 * a CDB, this function is called. Send the CDB.
3230 static void atapi_send_cdb(struct ata_port *ap, struct ata_queued_cmd *qc)
3233 DPRINTK("send cdb\n");
3234 assert(ap->cdb_len >= 12);
3236 ata_data_xfer(ap, qc->cdb, ap->cdb_len, 1);
3237 ata_altstatus(ap); /* flush */
3239 switch (qc->tf.protocol) {
3240 case ATA_PROT_ATAPI:
3241 ap->hsm_task_state = HSM_ST;
3243 case ATA_PROT_ATAPI_NODATA:
3244 ap->hsm_task_state = HSM_ST_LAST;
3246 case ATA_PROT_ATAPI_DMA:
3247 ap->hsm_task_state = HSM_ST_LAST;
3248 /* initiate bmdma */
3249 ap->ops->bmdma_start(qc);
3255 * ata_pio_first_block - Write first data block to hardware
3256 * @ap: Port to which ATA/ATAPI device is attached.
3258 * When device has indicated its readiness to accept
3259 * the data, this function sends out the CDB or
3260 * the first data block by PIO.
3262 * - If polling, ata_pio_task() handles the rest.
3263 * - Otherwise, interrupt handler takes over.
3266 * Kernel thread context (may sleep)
3269 * Zero if irq handler takes over
3270 * Non-zero if has next (polling).
3273 static int ata_pio_first_block(struct ata_port *ap)
3275 struct ata_queued_cmd *qc;
3277 unsigned long flags;
3280 qc = ata_qc_from_tag(ap, ap->active_tag);
3282 assert(qc->flags & ATA_QCFLAG_ACTIVE);
3284 /* if polling, we will stay in the work queue after sending the data.
3285 * otherwise, interrupt handler takes over after sending the data.
3287 has_next = (qc->tf.flags & ATA_TFLAG_POLLING);
3289 /* sleep-wait for BSY to clear */
3290 DPRINTK("busy wait\n");
3291 if (ata_busy_sleep(ap, ATA_TMOUT_DATAOUT_QUICK, ATA_TMOUT_DATAOUT)) {
3292 qc->err_mask |= AC_ERR_ATA_BUS;
3293 ap->hsm_task_state = HSM_ST_TMOUT;
3297 /* make sure DRQ is set */
3298 status = ata_chk_status(ap);
3299 if ((status & (ATA_BUSY | ATA_DRQ)) != ATA_DRQ) {
3300 /* device status error */
3301 qc->err_mask |= AC_ERR_ATA_BUS;
3302 ap->hsm_task_state = HSM_ST_ERR;
3306 /* Send the CDB (atapi) or the first data block (ata pio out).
3307 * During the state transition, interrupt handler shouldn't
3308 * be invoked before the data transfer is complete and
3309 * hsm_task_state is changed. Hence, the following locking.
3311 spin_lock_irqsave(&ap->host_set->lock, flags);
3313 if (qc->tf.protocol == ATA_PROT_PIO) {
3314 /* PIO data out protocol.
3315 * send first data block.
3318 /* ata_pio_sectors() might change the state to HSM_ST_LAST.
3319 * so, the state is changed here before ata_pio_sectors().
3321 ap->hsm_task_state = HSM_ST;
3322 ata_pio_sectors(qc);
3323 ata_altstatus(ap); /* flush */
3326 atapi_send_cdb(ap, qc);
3328 spin_unlock_irqrestore(&ap->host_set->lock, flags);
3330 /* if polling, ata_pio_task() handles the rest.
3331 * otherwise, interrupt handler takes over from here.
3336 return 1; /* has next */
3340 * __atapi_pio_bytes - Transfer data from/to the ATAPI device.
3341 * @qc: Command on going
3342 * @bytes: number of bytes
3344 * Transfer Transfer data from/to the ATAPI device.
3347 * Inherited from caller.
3351 static void __atapi_pio_bytes(struct ata_queued_cmd *qc, unsigned int bytes)
3353 int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
3354 struct scatterlist *sg = qc->__sg;
3355 struct ata_port *ap = qc->ap;
3358 unsigned int offset, count;
3360 if (qc->curbytes + bytes >= qc->nbytes)
3361 ap->hsm_task_state = HSM_ST_LAST;
3364 if (unlikely(qc->cursg >= qc->n_elem)) {
3366 * The end of qc->sg is reached and the device expects
3367 * more data to transfer. In order not to overrun qc->sg
3368 * and fulfill length specified in the byte count register,
3369 * - for read case, discard trailing data from the device
3370 * - for write case, padding zero data to the device
3372 u16 pad_buf[1] = { 0 };
3373 unsigned int words = bytes >> 1;
3376 if (words) /* warning if bytes > 1 */
3377 printk(KERN_WARNING "ata%u: %u bytes trailing data\n",
3380 for (i = 0; i < words; i++)
3381 ata_data_xfer(ap, (unsigned char*)pad_buf, 2, do_write);
3383 ap->hsm_task_state = HSM_ST_LAST;
3387 sg = &qc->__sg[qc->cursg];
3390 offset = sg->offset + qc->cursg_ofs;
3392 /* get the current page and offset */
3393 page = nth_page(page, (offset >> PAGE_SHIFT));
3394 offset %= PAGE_SIZE;
3396 /* don't overrun current sg */
3397 count = min(sg->length - qc->cursg_ofs, bytes);
3399 /* don't cross page boundaries */
3400 count = min(count, (unsigned int)PAGE_SIZE - offset);
3402 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
3404 if (PageHighMem(page)) {
3405 unsigned long flags;
3407 local_irq_save(flags);
3408 buf = kmap_atomic(page, KM_IRQ0);
3410 /* do the actual data transfer */
3411 ata_data_xfer(ap, buf + offset, count, do_write);
3413 kunmap_atomic(buf, KM_IRQ0);
3414 local_irq_restore(flags);
3416 buf = page_address(page);
3417 ata_data_xfer(ap, buf + offset, count, do_write);
3421 qc->curbytes += count;
3422 qc->cursg_ofs += count;
3424 if (qc->cursg_ofs == sg->length) {
3434 * atapi_pio_bytes - Transfer data from/to the ATAPI device.
3435 * @qc: Command on going
3437 * Transfer Transfer data from/to the ATAPI device.
3440 * Inherited from caller.
3443 static void atapi_pio_bytes(struct ata_queued_cmd *qc)
3445 struct ata_port *ap = qc->ap;
3446 struct ata_device *dev = qc->dev;
3447 unsigned int ireason, bc_lo, bc_hi, bytes;
3448 int i_write, do_write = (qc->tf.flags & ATA_TFLAG_WRITE) ? 1 : 0;
3450 ap->ops->tf_read(ap, &qc->tf);
3451 ireason = qc->tf.nsect;
3452 bc_lo = qc->tf.lbam;
3453 bc_hi = qc->tf.lbah;
3454 bytes = (bc_hi << 8) | bc_lo;
3456 /* shall be cleared to zero, indicating xfer of data */
3457 if (ireason & (1 << 0))
3460 /* make sure transfer direction matches expected */
3461 i_write = ((ireason & (1 << 1)) == 0) ? 1 : 0;
3462 if (do_write != i_write)
3465 VPRINTK("ata%u: xfering %d bytes\n", ap->id, bytes);
3467 __atapi_pio_bytes(qc, bytes);
3472 printk(KERN_INFO "ata%u: dev %u: ATAPI check failed\n",
3473 ap->id, dev->devno);
3474 qc->err_mask |= AC_ERR_HSM;
3475 ap->hsm_task_state = HSM_ST_ERR;
3479 * ata_pio_block - start PIO on a block
3480 * @ap: the target ata_port
3483 * None. (executing in kernel thread context)
3486 static void ata_pio_block(struct ata_port *ap)
3488 struct ata_queued_cmd *qc;
3492 * This is purely heuristic. This is a fast path.
3493 * Sometimes when we enter, BSY will be cleared in
3494 * a chk-status or two. If not, the drive is probably seeking
3495 * or something. Snooze for a couple msecs, then
3496 * chk-status again. If still busy, fall back to
3497 * HSM_ST_POLL state.
3499 status = ata_busy_wait(ap, ATA_BUSY, 5);
3500 if (status & ATA_BUSY) {
3502 status = ata_busy_wait(ap, ATA_BUSY, 10);
3503 if (status & ATA_BUSY) {
3504 ap->hsm_task_state = HSM_ST_POLL;
3505 ap->pio_task_timeout = jiffies + ATA_TMOUT_PIO;
3510 qc = ata_qc_from_tag(ap, ap->active_tag);
3514 if (status & (ATA_ERR | ATA_DF)) {
3515 qc->err_mask |= AC_ERR_DEV;
3516 ap->hsm_task_state = HSM_ST_ERR;
3520 /* transfer data if any */
3521 if (is_atapi_taskfile(&qc->tf)) {
3522 /* DRQ=0 means no more data to transfer */
3523 if ((status & ATA_DRQ) == 0) {
3524 ap->hsm_task_state = HSM_ST_LAST;
3528 atapi_pio_bytes(qc);
3530 /* handle BSY=0, DRQ=0 as error */
3531 if ((status & ATA_DRQ) == 0) {
3532 qc->err_mask |= AC_ERR_HSM;
3533 ap->hsm_task_state = HSM_ST_ERR;
3537 ata_pio_sectors(qc);
3540 ata_altstatus(ap); /* flush */
3543 static void ata_pio_error(struct ata_port *ap)
3545 struct ata_queued_cmd *qc;
3547 qc = ata_qc_from_tag(ap, ap->active_tag);
3550 if (qc->tf.command != ATA_CMD_PACKET)
3551 printk(KERN_WARNING "ata%u: PIO error\n", ap->id);
3553 /* make sure qc->err_mask is available to
3554 * know what's wrong and recover
3556 assert(qc->err_mask);
3558 ap->hsm_task_state = HSM_ST_IDLE;
3560 ata_poll_qc_complete(qc);
3563 static void ata_pio_task(void *_data)
3565 struct ata_port *ap = _data;
3566 unsigned long timeout;
3573 switch (ap->hsm_task_state) {
3575 has_next = ata_pio_first_block(ap);
3583 has_next = ata_pio_complete(ap);
3587 case HSM_ST_LAST_POLL:
3588 timeout = ata_pio_poll(ap);
3602 queue_delayed_work(ata_wq, &ap->pio_task, timeout);
3608 * ata_qc_timeout - Handle timeout of queued command
3609 * @qc: Command that timed out
3611 * Some part of the kernel (currently, only the SCSI layer)
3612 * has noticed that the active command on port @ap has not
3613 * completed after a specified length of time. Handle this
3614 * condition by disabling DMA (if necessary) and completing
3615 * transactions, with error if necessary.
3617 * This also handles the case of the "lost interrupt", where
3618 * for some reason (possibly hardware bug, possibly driver bug)
3619 * an interrupt was not delivered to the driver, even though the
3620 * transaction completed successfully.
3623 * Inherited from SCSI layer (none, can sleep)
3626 static void ata_qc_timeout(struct ata_queued_cmd *qc)
3628 struct ata_port *ap = qc->ap;
3629 struct ata_host_set *host_set = ap->host_set;
3630 u8 host_stat = 0, drv_stat;
3631 unsigned long flags;
3635 spin_lock_irqsave(&host_set->lock, flags);
3637 /* hack alert! We cannot use the supplied completion
3638 * function from inside the ->eh_strategy_handler() thread.
3639 * libata is the only user of ->eh_strategy_handler() in
3640 * any kernel, so the default scsi_done() assumes it is
3641 * not being called from the SCSI EH.
3643 qc->scsidone = scsi_finish_command;
3645 switch (qc->tf.protocol) {
3648 case ATA_PROT_ATAPI_DMA:
3649 host_stat = ap->ops->bmdma_status(ap);
3651 /* before we do anything else, clear DMA-Start bit */
3652 ap->ops->bmdma_stop(qc);
3658 drv_stat = ata_chk_status(ap);
3660 /* ack bmdma irq events */
3661 ap->ops->irq_clear(ap);
3663 printk(KERN_ERR "ata%u: command 0x%x timeout, stat 0x%x host_stat 0x%x\n",
3664 ap->id, qc->tf.command, drv_stat, host_stat);
3666 ap->hsm_task_state = HSM_ST_IDLE;
3668 /* complete taskfile transaction */
3669 qc->err_mask |= ac_err_mask(drv_stat);
3670 ata_qc_complete(qc);
3674 spin_unlock_irqrestore(&host_set->lock, flags);
3680 * ata_eng_timeout - Handle timeout of queued command
3681 * @ap: Port on which timed-out command is active
3683 * Some part of the kernel (currently, only the SCSI layer)
3684 * has noticed that the active command on port @ap has not
3685 * completed after a specified length of time. Handle this
3686 * condition by disabling DMA (if necessary) and completing
3687 * transactions, with error if necessary.
3689 * This also handles the case of the "lost interrupt", where
3690 * for some reason (possibly hardware bug, possibly driver bug)
3691 * an interrupt was not delivered to the driver, even though the
3692 * transaction completed successfully.
3695 * Inherited from SCSI layer (none, can sleep)
3698 void ata_eng_timeout(struct ata_port *ap)
3700 struct ata_queued_cmd *qc;
3704 qc = ata_qc_from_tag(ap, ap->active_tag);
3708 printk(KERN_ERR "ata%u: BUG: timeout without command\n",
3718 * ata_qc_new - Request an available ATA command, for queueing
3719 * @ap: Port associated with device @dev
3720 * @dev: Device from whom we request an available command structure
3726 static struct ata_queued_cmd *ata_qc_new(struct ata_port *ap)
3728 struct ata_queued_cmd *qc = NULL;
3731 for (i = 0; i < ATA_MAX_QUEUE; i++)
3732 if (!test_and_set_bit(i, &ap->qactive)) {
3733 qc = ata_qc_from_tag(ap, i);
3744 * ata_qc_new_init - Request an available ATA command, and initialize it
3745 * @ap: Port associated with device @dev
3746 * @dev: Device from whom we request an available command structure
3752 struct ata_queued_cmd *ata_qc_new_init(struct ata_port *ap,
3753 struct ata_device *dev)
3755 struct ata_queued_cmd *qc;
3757 qc = ata_qc_new(ap);
3770 * ata_qc_free - free unused ata_queued_cmd
3771 * @qc: Command to complete
3773 * Designed to free unused ata_queued_cmd object
3774 * in case something prevents using it.
3777 * spin_lock_irqsave(host_set lock)
3779 void ata_qc_free(struct ata_queued_cmd *qc)
3781 struct ata_port *ap = qc->ap;
3784 assert(qc != NULL); /* ata_qc_from_tag _might_ return NULL */
3788 if (likely(ata_tag_valid(tag))) {
3789 if (tag == ap->active_tag)
3790 ap->active_tag = ATA_TAG_POISON;
3791 qc->tag = ATA_TAG_POISON;
3792 clear_bit(tag, &ap->qactive);
3797 * ata_qc_complete - Complete an active ATA command
3798 * @qc: Command to complete
3799 * @err_mask: ATA Status register contents
3801 * Indicate to the mid and upper layers that an ATA
3802 * command has completed, with either an ok or not-ok status.
3805 * spin_lock_irqsave(host_set lock)
3808 void ata_qc_complete(struct ata_queued_cmd *qc)
3810 assert(qc != NULL); /* ata_qc_from_tag _might_ return NULL */
3811 assert(qc->flags & ATA_QCFLAG_ACTIVE);
3813 if (likely(qc->flags & ATA_QCFLAG_DMAMAP))
3816 /* atapi: mark qc as inactive to prevent the interrupt handler
3817 * from completing the command twice later, before the error handler
3818 * is called. (when rc != 0 and atapi request sense is needed)
3820 qc->flags &= ~ATA_QCFLAG_ACTIVE;
3822 /* call completion callback */
3823 qc->complete_fn(qc);
3826 static inline int ata_should_dma_map(struct ata_queued_cmd *qc)
3828 struct ata_port *ap = qc->ap;
3830 switch (qc->tf.protocol) {
3832 case ATA_PROT_ATAPI_DMA:
3835 case ATA_PROT_ATAPI:
3837 case ATA_PROT_PIO_MULT:
3838 if (ap->flags & ATA_FLAG_PIO_DMA)
3851 * ata_qc_issue - issue taskfile to device
3852 * @qc: command to issue to device
3854 * Prepare an ATA command to submission to device.
3855 * This includes mapping the data into a DMA-able
3856 * area, filling in the S/G table, and finally
3857 * writing the taskfile to hardware, starting the command.
3860 * spin_lock_irqsave(host_set lock)
3863 * Zero on success, negative on error.
3866 int ata_qc_issue(struct ata_queued_cmd *qc)
3868 struct ata_port *ap = qc->ap;
3870 if (ata_should_dma_map(qc)) {
3871 if (qc->flags & ATA_QCFLAG_SG) {
3872 if (ata_sg_setup(qc))
3874 } else if (qc->flags & ATA_QCFLAG_SINGLE) {
3875 if (ata_sg_setup_one(qc))
3879 qc->flags &= ~ATA_QCFLAG_DMAMAP;
3882 ap->ops->qc_prep(qc);
3884 qc->ap->active_tag = qc->tag;
3885 qc->flags |= ATA_QCFLAG_ACTIVE;
3887 return ap->ops->qc_issue(qc);
3890 qc->flags &= ~ATA_QCFLAG_DMAMAP;
3896 * ata_qc_issue_prot - issue taskfile to device in proto-dependent manner
3897 * @qc: command to issue to device
3899 * Using various libata functions and hooks, this function
3900 * starts an ATA command. ATA commands are grouped into
3901 * classes called "protocols", and issuing each type of protocol
3902 * is slightly different.
3904 * May be used as the qc_issue() entry in ata_port_operations.
3907 * spin_lock_irqsave(host_set lock)
3910 * Zero on success, negative on error.
3913 int ata_qc_issue_prot(struct ata_queued_cmd *qc)
3915 struct ata_port *ap = qc->ap;
3917 /* Use polling pio if the LLD doesn't handle
3918 * interrupt driven pio and atapi CDB interrupt.
3920 if (ap->flags & ATA_FLAG_PIO_POLLING) {
3921 switch (qc->tf.protocol) {
3923 case ATA_PROT_ATAPI:
3924 case ATA_PROT_ATAPI_NODATA:
3925 qc->tf.flags |= ATA_TFLAG_POLLING;
3927 case ATA_PROT_ATAPI_DMA:
3928 if (qc->dev->flags & ATA_DFLAG_CDB_INTR)
3936 /* select the device */
3937 ata_dev_select(ap, qc->dev->devno, 1, 0);
3939 /* start the command */
3940 switch (qc->tf.protocol) {
3941 case ATA_PROT_NODATA:
3942 if (qc->tf.flags & ATA_TFLAG_POLLING)
3943 ata_qc_set_polling(qc);
3945 ata_tf_to_host(ap, &qc->tf);
3946 ap->hsm_task_state = HSM_ST_LAST;
3948 if (qc->tf.flags & ATA_TFLAG_POLLING)
3949 queue_work(ata_wq, &ap->pio_task);
3954 assert(!(qc->tf.flags & ATA_TFLAG_POLLING));
3956 ap->ops->tf_load(ap, &qc->tf); /* load tf registers */
3957 ap->ops->bmdma_setup(qc); /* set up bmdma */
3958 ap->ops->bmdma_start(qc); /* initiate bmdma */
3959 ap->hsm_task_state = HSM_ST_LAST;
3963 if (qc->tf.flags & ATA_TFLAG_POLLING)
3964 ata_qc_set_polling(qc);
3966 ata_tf_to_host(ap, &qc->tf);
3968 if (qc->tf.flags & ATA_TFLAG_WRITE) {
3969 /* PIO data out protocol */
3970 ap->hsm_task_state = HSM_ST_FIRST;
3971 queue_work(ata_wq, &ap->pio_task);
3973 /* always send first data block using
3974 * the ata_pio_task() codepath.
3977 /* PIO data in protocol */
3978 ap->hsm_task_state = HSM_ST;
3980 if (qc->tf.flags & ATA_TFLAG_POLLING)
3981 queue_work(ata_wq, &ap->pio_task);
3983 /* if polling, ata_pio_task() handles the rest.
3984 * otherwise, interrupt handler takes over from here.
3990 case ATA_PROT_ATAPI:
3991 case ATA_PROT_ATAPI_NODATA:
3992 if (qc->tf.flags & ATA_TFLAG_POLLING)
3993 ata_qc_set_polling(qc);
3995 ata_tf_to_host(ap, &qc->tf);
3996 ap->hsm_task_state = HSM_ST_FIRST;
3998 /* send cdb by polling if no cdb interrupt */
3999 if ((!(qc->dev->flags & ATA_DFLAG_CDB_INTR)) ||
4000 (qc->tf.flags & ATA_TFLAG_POLLING))
4001 queue_work(ata_wq, &ap->pio_task);
4004 case ATA_PROT_ATAPI_DMA:
4005 assert(!(qc->tf.flags & ATA_TFLAG_POLLING));
4007 ap->ops->tf_load(ap, &qc->tf); /* load tf registers */
4008 ap->ops->bmdma_setup(qc); /* set up bmdma */
4009 ap->hsm_task_state = HSM_ST_FIRST;
4011 /* send cdb by polling if no cdb interrupt */
4012 if (!(qc->dev->flags & ATA_DFLAG_CDB_INTR))
4013 queue_work(ata_wq, &ap->pio_task);
4025 * ata_bmdma_setup_mmio - Set up PCI IDE BMDMA transaction
4026 * @qc: Info associated with this ATA transaction.
4029 * spin_lock_irqsave(host_set lock)
4032 static void ata_bmdma_setup_mmio (struct ata_queued_cmd *qc)
4034 struct ata_port *ap = qc->ap;
4035 unsigned int rw = (qc->tf.flags & ATA_TFLAG_WRITE);
4037 void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr;
4039 /* load PRD table addr. */
4040 mb(); /* make sure PRD table writes are visible to controller */
4041 writel(ap->prd_dma, mmio + ATA_DMA_TABLE_OFS);
4043 /* specify data direction, triple-check start bit is clear */
4044 dmactl = readb(mmio + ATA_DMA_CMD);
4045 dmactl &= ~(ATA_DMA_WR | ATA_DMA_START);
4047 dmactl |= ATA_DMA_WR;
4048 writeb(dmactl, mmio + ATA_DMA_CMD);
4050 /* issue r/w command */
4051 ap->ops->exec_command(ap, &qc->tf);
4055 * ata_bmdma_start_mmio - Start a PCI IDE BMDMA transaction
4056 * @qc: Info associated with this ATA transaction.
4059 * spin_lock_irqsave(host_set lock)
4062 static void ata_bmdma_start_mmio (struct ata_queued_cmd *qc)
4064 struct ata_port *ap = qc->ap;
4065 void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr;
4068 /* start host DMA transaction */
4069 dmactl = readb(mmio + ATA_DMA_CMD);
4070 writeb(dmactl | ATA_DMA_START, mmio + ATA_DMA_CMD);
4072 /* Strictly, one may wish to issue a readb() here, to
4073 * flush the mmio write. However, control also passes
4074 * to the hardware at this point, and it will interrupt
4075 * us when we are to resume control. So, in effect,
4076 * we don't care when the mmio write flushes.
4077 * Further, a read of the DMA status register _immediately_
4078 * following the write may not be what certain flaky hardware
4079 * is expected, so I think it is best to not add a readb()
4080 * without first all the MMIO ATA cards/mobos.
4081 * Or maybe I'm just being paranoid.
4086 * ata_bmdma_setup_pio - Set up PCI IDE BMDMA transaction (PIO)
4087 * @qc: Info associated with this ATA transaction.
4090 * spin_lock_irqsave(host_set lock)
4093 static void ata_bmdma_setup_pio (struct ata_queued_cmd *qc)
4095 struct ata_port *ap = qc->ap;
4096 unsigned int rw = (qc->tf.flags & ATA_TFLAG_WRITE);
4099 /* load PRD table addr. */
4100 outl(ap->prd_dma, ap->ioaddr.bmdma_addr + ATA_DMA_TABLE_OFS);
4102 /* specify data direction, triple-check start bit is clear */
4103 dmactl = inb(ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
4104 dmactl &= ~(ATA_DMA_WR | ATA_DMA_START);
4106 dmactl |= ATA_DMA_WR;
4107 outb(dmactl, ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
4109 /* issue r/w command */
4110 ap->ops->exec_command(ap, &qc->tf);
4114 * ata_bmdma_start_pio - Start a PCI IDE BMDMA transaction (PIO)
4115 * @qc: Info associated with this ATA transaction.
4118 * spin_lock_irqsave(host_set lock)
4121 static void ata_bmdma_start_pio (struct ata_queued_cmd *qc)
4123 struct ata_port *ap = qc->ap;
4126 /* start host DMA transaction */
4127 dmactl = inb(ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
4128 outb(dmactl | ATA_DMA_START,
4129 ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
4134 * ata_bmdma_start - Start a PCI IDE BMDMA transaction
4135 * @qc: Info associated with this ATA transaction.
4137 * Writes the ATA_DMA_START flag to the DMA command register.
4139 * May be used as the bmdma_start() entry in ata_port_operations.
4142 * spin_lock_irqsave(host_set lock)
4144 void ata_bmdma_start(struct ata_queued_cmd *qc)
4146 if (qc->ap->flags & ATA_FLAG_MMIO)
4147 ata_bmdma_start_mmio(qc);
4149 ata_bmdma_start_pio(qc);
4154 * ata_bmdma_setup - Set up PCI IDE BMDMA transaction
4155 * @qc: Info associated with this ATA transaction.
4157 * Writes address of PRD table to device's PRD Table Address
4158 * register, sets the DMA control register, and calls
4159 * ops->exec_command() to start the transfer.
4161 * May be used as the bmdma_setup() entry in ata_port_operations.
4164 * spin_lock_irqsave(host_set lock)
4166 void ata_bmdma_setup(struct ata_queued_cmd *qc)
4168 if (qc->ap->flags & ATA_FLAG_MMIO)
4169 ata_bmdma_setup_mmio(qc);
4171 ata_bmdma_setup_pio(qc);
4176 * ata_bmdma_irq_clear - Clear PCI IDE BMDMA interrupt.
4177 * @ap: Port associated with this ATA transaction.
4179 * Clear interrupt and error flags in DMA status register.
4181 * May be used as the irq_clear() entry in ata_port_operations.
4184 * spin_lock_irqsave(host_set lock)
4187 void ata_bmdma_irq_clear(struct ata_port *ap)
4189 if (ap->flags & ATA_FLAG_MMIO) {
4190 void __iomem *mmio = ((void __iomem *) ap->ioaddr.bmdma_addr) + ATA_DMA_STATUS;
4191 writeb(readb(mmio), mmio);
4193 unsigned long addr = ap->ioaddr.bmdma_addr + ATA_DMA_STATUS;
4194 outb(inb(addr), addr);
4201 * ata_bmdma_status - Read PCI IDE BMDMA status
4202 * @ap: Port associated with this ATA transaction.
4204 * Read and return BMDMA status register.
4206 * May be used as the bmdma_status() entry in ata_port_operations.
4209 * spin_lock_irqsave(host_set lock)
4212 u8 ata_bmdma_status(struct ata_port *ap)
4215 if (ap->flags & ATA_FLAG_MMIO) {
4216 void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr;
4217 host_stat = readb(mmio + ATA_DMA_STATUS);
4219 host_stat = inb(ap->ioaddr.bmdma_addr + ATA_DMA_STATUS);
4225 * ata_bmdma_stop - Stop PCI IDE BMDMA transfer
4226 * @qc: Command we are ending DMA for
4228 * Clears the ATA_DMA_START flag in the dma control register
4230 * May be used as the bmdma_stop() entry in ata_port_operations.
4233 * spin_lock_irqsave(host_set lock)
4236 void ata_bmdma_stop(struct ata_queued_cmd *qc)
4238 struct ata_port *ap = qc->ap;
4239 if (ap->flags & ATA_FLAG_MMIO) {
4240 void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr;
4242 /* clear start/stop bit */
4243 writeb(readb(mmio + ATA_DMA_CMD) & ~ATA_DMA_START,
4244 mmio + ATA_DMA_CMD);
4246 /* clear start/stop bit */
4247 outb(inb(ap->ioaddr.bmdma_addr + ATA_DMA_CMD) & ~ATA_DMA_START,
4248 ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
4251 /* one-PIO-cycle guaranteed wait, per spec, for HDMA1:0 transition */
4252 ata_altstatus(ap); /* dummy read */
4256 * ata_host_intr - Handle host interrupt for given (port, task)
4257 * @ap: Port on which interrupt arrived (possibly...)
4258 * @qc: Taskfile currently active in engine
4260 * Handle host interrupt for given queued command. Currently,
4261 * only DMA interrupts are handled. All other commands are
4262 * handled via polling with interrupts disabled (nIEN bit).
4265 * spin_lock_irqsave(host_set lock)
4268 * One if interrupt was handled, zero if not (shared irq).
4271 inline unsigned int ata_host_intr (struct ata_port *ap,
4272 struct ata_queued_cmd *qc)
4274 u8 status, host_stat = 0;
4276 VPRINTK("ata%u: protocol %d task_state %d\n",
4277 ap->id, qc->tf.protocol, ap->hsm_task_state);
4279 /* Check whether we are expecting interrupt in this state */
4280 switch (ap->hsm_task_state) {
4282 /* Check the ATA_DFLAG_CDB_INTR flag is enough here.
4283 * The flag was turned on only for atapi devices.
4284 * No need to check is_atapi_taskfile(&qc->tf) again.
4286 if (!(qc->dev->flags & ATA_DFLAG_CDB_INTR))
4290 if (qc->tf.protocol == ATA_PROT_DMA ||
4291 qc->tf.protocol == ATA_PROT_ATAPI_DMA) {
4292 /* check status of DMA engine */
4293 host_stat = ap->ops->bmdma_status(ap);
4294 VPRINTK("ata%u: host_stat 0x%X\n", ap->id, host_stat);
4296 /* if it's not our irq... */
4297 if (!(host_stat & ATA_DMA_INTR))
4300 /* before we do anything else, clear DMA-Start bit */
4301 ap->ops->bmdma_stop(qc);
4303 if (unlikely(host_stat & ATA_DMA_ERR)) {
4304 /* error when transfering data to/from memory */
4305 qc->err_mask |= AC_ERR_HOST_BUS;
4306 ap->hsm_task_state = HSM_ST_ERR;
4316 /* check altstatus */
4317 status = ata_altstatus(ap);
4318 if (status & ATA_BUSY)
4321 /* check main status, clearing INTRQ */
4322 status = ata_chk_status(ap);
4323 if (unlikely(status & ATA_BUSY))
4326 DPRINTK("ata%u: protocol %d task_state %d (dev_stat 0x%X)\n",
4327 ap->id, qc->tf.protocol, ap->hsm_task_state, status);
4329 /* ack bmdma irq events */
4330 ap->ops->irq_clear(ap);
4333 if (unlikely(status & (ATA_ERR | ATA_DF))) {
4334 qc->err_mask |= AC_ERR_DEV;
4335 ap->hsm_task_state = HSM_ST_ERR;
4339 switch (ap->hsm_task_state) {
4341 /* Some pre-ATAPI-4 devices assert INTRQ
4342 * at this state when ready to receive CDB.
4345 /* check device status */
4346 if (unlikely((status & (ATA_BUSY | ATA_DRQ)) != ATA_DRQ)) {
4347 /* Wrong status. Let EH handle this */
4348 qc->err_mask |= AC_ERR_ATA_BUS;
4349 ap->hsm_task_state = HSM_ST_ERR;
4353 atapi_send_cdb(ap, qc);
4358 /* complete command or read/write the data register */
4359 if (qc->tf.protocol == ATA_PROT_ATAPI) {
4360 /* ATAPI PIO protocol */
4361 if ((status & ATA_DRQ) == 0) {
4362 /* no more data to transfer */
4363 ap->hsm_task_state = HSM_ST_LAST;
4367 atapi_pio_bytes(qc);
4369 if (unlikely(ap->hsm_task_state == HSM_ST_ERR))
4370 /* bad ireason reported by device */
4374 /* ATA PIO protocol */
4375 if (unlikely((status & ATA_DRQ) == 0)) {
4376 /* handle BSY=0, DRQ=0 as error */
4377 qc->err_mask |= AC_ERR_ATA_BUS;
4378 ap->hsm_task_state = HSM_ST_ERR;
4382 ata_pio_sectors(qc);
4384 if (ap->hsm_task_state == HSM_ST_LAST &&
4385 (!(qc->tf.flags & ATA_TFLAG_WRITE))) {
4388 status = ata_chk_status(ap);
4393 ata_altstatus(ap); /* flush */
4397 if (unlikely(status & ATA_DRQ)) {
4398 /* handle DRQ=1 as error */
4399 qc->err_mask |= AC_ERR_ATA_BUS;
4400 ap->hsm_task_state = HSM_ST_ERR;
4404 /* no more data to transfer */
4405 DPRINTK("ata%u: command complete, drv_stat 0x%x\n",
4408 ap->hsm_task_state = HSM_ST_IDLE;
4410 /* complete taskfile transaction */
4411 qc->err_mask |= ac_err_mask(status);
4412 ata_qc_complete(qc);
4416 if (qc->tf.command != ATA_CMD_PACKET)
4417 printk(KERN_ERR "ata%u: command error, drv_stat 0x%x host_stat 0x%x\n",
4418 ap->id, status, host_stat);
4420 /* make sure qc->err_mask is available to
4421 * know what's wrong and recover
4423 assert(qc->err_mask);
4425 ap->hsm_task_state = HSM_ST_IDLE;
4426 ata_qc_complete(qc);
4432 return 1; /* irq handled */
4435 ap->stats.idle_irq++;
4438 if ((ap->stats.idle_irq % 1000) == 0) {
4440 ata_irq_ack(ap, 0); /* debug trap */
4441 printk(KERN_WARNING "ata%d: irq trap\n", ap->id);
4444 return 0; /* irq not handled */
4448 * ata_interrupt - Default ATA host interrupt handler
4449 * @irq: irq line (unused)
4450 * @dev_instance: pointer to our ata_host_set information structure
4453 * Default interrupt handler for PCI IDE devices. Calls
4454 * ata_host_intr() for each port that is not disabled.
4457 * Obtains host_set lock during operation.
4460 * IRQ_NONE or IRQ_HANDLED.
4463 irqreturn_t ata_interrupt (int irq, void *dev_instance, struct pt_regs *regs)
4465 struct ata_host_set *host_set = dev_instance;
4467 unsigned int handled = 0;
4468 unsigned long flags;
4470 /* TODO: make _irqsave conditional on x86 PCI IDE legacy mode */
4471 spin_lock_irqsave(&host_set->lock, flags);
4473 for (i = 0; i < host_set->n_ports; i++) {
4474 struct ata_port *ap;
4476 ap = host_set->ports[i];
4478 !(ap->flags & ATA_FLAG_PORT_DISABLED)) {
4479 struct ata_queued_cmd *qc;
4481 qc = ata_qc_from_tag(ap, ap->active_tag);
4482 if (qc && (!(qc->tf.flags & ATA_TFLAG_POLLING)) &&
4483 (qc->flags & ATA_QCFLAG_ACTIVE))
4484 handled |= ata_host_intr(ap, qc);
4488 spin_unlock_irqrestore(&host_set->lock, flags);
4490 return IRQ_RETVAL(handled);
4494 * ata_port_start - Set port up for dma.
4495 * @ap: Port to initialize
4497 * Called just after data structures for each port are
4498 * initialized. Allocates space for PRD table.
4500 * May be used as the port_start() entry in ata_port_operations.
4503 * Inherited from caller.
4507 * Execute a 'simple' command, that only consists of the opcode 'cmd' itself,
4508 * without filling any other registers
4510 static int ata_do_simple_cmd(struct ata_port *ap, struct ata_device *dev,
4513 struct ata_taskfile tf;
4516 ata_tf_init(ap, &tf, dev->devno);
4519 tf.flags |= ATA_TFLAG_DEVICE;
4520 tf.protocol = ATA_PROT_NODATA;
4522 err = ata_exec_internal(ap, dev, &tf, DMA_NONE, NULL, 0);
4524 printk(KERN_ERR "%s: ata command failed: %d\n",
4530 static int ata_flush_cache(struct ata_port *ap, struct ata_device *dev)
4534 if (!ata_try_flush_cache(dev))
4537 if (ata_id_has_flush_ext(dev->id))
4538 cmd = ATA_CMD_FLUSH_EXT;
4540 cmd = ATA_CMD_FLUSH;
4542 return ata_do_simple_cmd(ap, dev, cmd);
4545 static int ata_standby_drive(struct ata_port *ap, struct ata_device *dev)
4547 return ata_do_simple_cmd(ap, dev, ATA_CMD_STANDBYNOW1);
4550 static int ata_start_drive(struct ata_port *ap, struct ata_device *dev)
4552 return ata_do_simple_cmd(ap, dev, ATA_CMD_IDLEIMMEDIATE);
4556 * ata_device_resume - wakeup a previously suspended devices
4558 * Kick the drive back into action, by sending it an idle immediate
4559 * command and making sure its transfer mode matches between drive
4563 int ata_device_resume(struct ata_port *ap, struct ata_device *dev)
4565 if (ap->flags & ATA_FLAG_SUSPENDED) {
4566 ap->flags &= ~ATA_FLAG_SUSPENDED;
4569 if (!ata_dev_present(dev))
4571 if (dev->class == ATA_DEV_ATA)
4572 ata_start_drive(ap, dev);
4578 * ata_device_suspend - prepare a device for suspend
4580 * Flush the cache on the drive, if appropriate, then issue a
4581 * standbynow command.
4584 int ata_device_suspend(struct ata_port *ap, struct ata_device *dev)
4586 if (!ata_dev_present(dev))
4588 if (dev->class == ATA_DEV_ATA)
4589 ata_flush_cache(ap, dev);
4591 ata_standby_drive(ap, dev);
4592 ap->flags |= ATA_FLAG_SUSPENDED;
4596 int ata_port_start (struct ata_port *ap)
4598 struct device *dev = ap->host_set->dev;
4601 ap->prd = dma_alloc_coherent(dev, ATA_PRD_TBL_SZ, &ap->prd_dma, GFP_KERNEL);
4605 rc = ata_pad_alloc(ap, dev);
4607 dma_free_coherent(dev, ATA_PRD_TBL_SZ, ap->prd, ap->prd_dma);
4611 DPRINTK("prd alloc, virt %p, dma %llx\n", ap->prd, (unsigned long long) ap->prd_dma);
4618 * ata_port_stop - Undo ata_port_start()
4619 * @ap: Port to shut down
4621 * Frees the PRD table.
4623 * May be used as the port_stop() entry in ata_port_operations.
4626 * Inherited from caller.
4629 void ata_port_stop (struct ata_port *ap)
4631 struct device *dev = ap->host_set->dev;
4633 dma_free_coherent(dev, ATA_PRD_TBL_SZ, ap->prd, ap->prd_dma);
4634 ata_pad_free(ap, dev);
4637 void ata_host_stop (struct ata_host_set *host_set)
4639 if (host_set->mmio_base)
4640 iounmap(host_set->mmio_base);
4645 * ata_host_remove - Unregister SCSI host structure with upper layers
4646 * @ap: Port to unregister
4647 * @do_unregister: 1 if we fully unregister, 0 to just stop the port
4650 * Inherited from caller.
4653 static void ata_host_remove(struct ata_port *ap, unsigned int do_unregister)
4655 struct Scsi_Host *sh = ap->host;
4660 scsi_remove_host(sh);
4662 ap->ops->port_stop(ap);
4666 * ata_host_init - Initialize an ata_port structure
4667 * @ap: Structure to initialize
4668 * @host: associated SCSI mid-layer structure
4669 * @host_set: Collection of hosts to which @ap belongs
4670 * @ent: Probe information provided by low-level driver
4671 * @port_no: Port number associated with this ata_port
4673 * Initialize a new ata_port structure, and its associated
4677 * Inherited from caller.
4680 static void ata_host_init(struct ata_port *ap, struct Scsi_Host *host,
4681 struct ata_host_set *host_set,
4682 const struct ata_probe_ent *ent, unsigned int port_no)
4688 host->max_channel = 1;
4689 host->unique_id = ata_unique_id++;
4690 host->max_cmd_len = 12;
4692 ap->flags = ATA_FLAG_PORT_DISABLED;
4693 ap->id = host->unique_id;
4695 ap->ctl = ATA_DEVCTL_OBS;
4696 ap->host_set = host_set;
4697 ap->port_no = port_no;
4699 ent->legacy_mode ? ent->hard_port_no : port_no;
4700 ap->pio_mask = ent->pio_mask;
4701 ap->mwdma_mask = ent->mwdma_mask;
4702 ap->udma_mask = ent->udma_mask;
4703 ap->flags |= ent->host_flags;
4704 ap->ops = ent->port_ops;
4705 ap->cbl = ATA_CBL_NONE;
4706 ap->active_tag = ATA_TAG_POISON;
4707 ap->last_ctl = 0xFF;
4709 INIT_WORK(&ap->pio_task, ata_pio_task, ap);
4711 for (i = 0; i < ATA_MAX_DEVICES; i++)
4712 ap->device[i].devno = i;
4715 ap->stats.unhandled_irq = 1;
4716 ap->stats.idle_irq = 1;
4719 memcpy(&ap->ioaddr, &ent->port[port_no], sizeof(struct ata_ioports));
4723 * ata_host_add - Attach low-level ATA driver to system
4724 * @ent: Information provided by low-level driver
4725 * @host_set: Collections of ports to which we add
4726 * @port_no: Port number associated with this host
4728 * Attach low-level ATA driver to system.
4731 * PCI/etc. bus probe sem.
4734 * New ata_port on success, for NULL on error.
4737 static struct ata_port * ata_host_add(const struct ata_probe_ent *ent,
4738 struct ata_host_set *host_set,
4739 unsigned int port_no)
4741 struct Scsi_Host *host;
4742 struct ata_port *ap;
4746 host = scsi_host_alloc(ent->sht, sizeof(struct ata_port));
4750 ap = (struct ata_port *) &host->hostdata[0];
4752 ata_host_init(ap, host, host_set, ent, port_no);
4754 rc = ap->ops->port_start(ap);
4761 scsi_host_put(host);
4766 * ata_device_add - Register hardware device with ATA and SCSI layers
4767 * @ent: Probe information describing hardware device to be registered
4769 * This function processes the information provided in the probe
4770 * information struct @ent, allocates the necessary ATA and SCSI
4771 * host information structures, initializes them, and registers
4772 * everything with requisite kernel subsystems.
4774 * This function requests irqs, probes the ATA bus, and probes
4778 * PCI/etc. bus probe sem.
4781 * Number of ports registered. Zero on error (no ports registered).
4784 int ata_device_add(const struct ata_probe_ent *ent)
4786 unsigned int count = 0, i;
4787 struct device *dev = ent->dev;
4788 struct ata_host_set *host_set;
4791 /* alloc a container for our list of ATA ports (buses) */
4792 host_set = kzalloc(sizeof(struct ata_host_set) +
4793 (ent->n_ports * sizeof(void *)), GFP_KERNEL);
4796 spin_lock_init(&host_set->lock);
4798 host_set->dev = dev;
4799 host_set->n_ports = ent->n_ports;
4800 host_set->irq = ent->irq;
4801 host_set->mmio_base = ent->mmio_base;
4802 host_set->private_data = ent->private_data;
4803 host_set->ops = ent->port_ops;
4805 /* register each port bound to this device */
4806 for (i = 0; i < ent->n_ports; i++) {
4807 struct ata_port *ap;
4808 unsigned long xfer_mode_mask;
4810 ap = ata_host_add(ent, host_set, i);
4814 host_set->ports[i] = ap;
4815 xfer_mode_mask =(ap->udma_mask << ATA_SHIFT_UDMA) |
4816 (ap->mwdma_mask << ATA_SHIFT_MWDMA) |
4817 (ap->pio_mask << ATA_SHIFT_PIO);
4819 /* print per-port info to dmesg */
4820 printk(KERN_INFO "ata%u: %cATA max %s cmd 0x%lX ctl 0x%lX "
4821 "bmdma 0x%lX irq %lu\n",
4823 ap->flags & ATA_FLAG_SATA ? 'S' : 'P',
4824 ata_mode_string(xfer_mode_mask),
4825 ap->ioaddr.cmd_addr,
4826 ap->ioaddr.ctl_addr,
4827 ap->ioaddr.bmdma_addr,
4831 host_set->ops->irq_clear(ap);
4838 /* obtain irq, that is shared between channels */
4839 if (request_irq(ent->irq, ent->port_ops->irq_handler, ent->irq_flags,
4840 DRV_NAME, host_set))
4843 /* perform each probe synchronously */
4844 DPRINTK("probe begin\n");
4845 for (i = 0; i < count; i++) {
4846 struct ata_port *ap;
4849 ap = host_set->ports[i];
4851 DPRINTK("ata%u: probe begin\n", ap->id);
4852 rc = ata_bus_probe(ap);
4853 DPRINTK("ata%u: probe end\n", ap->id);
4856 /* FIXME: do something useful here?
4857 * Current libata behavior will
4858 * tear down everything when
4859 * the module is removed
4860 * or the h/w is unplugged.
4864 rc = scsi_add_host(ap->host, dev);
4866 printk(KERN_ERR "ata%u: scsi_add_host failed\n",
4868 /* FIXME: do something useful here */
4869 /* FIXME: handle unconditional calls to
4870 * scsi_scan_host and ata_host_remove, below,
4876 /* probes are done, now scan each port's disk(s) */
4877 DPRINTK("probe begin\n");
4878 for (i = 0; i < count; i++) {
4879 struct ata_port *ap = host_set->ports[i];
4881 ata_scsi_scan_host(ap);
4884 dev_set_drvdata(dev, host_set);
4886 VPRINTK("EXIT, returning %u\n", ent->n_ports);
4887 return ent->n_ports; /* success */
4890 for (i = 0; i < count; i++) {
4891 ata_host_remove(host_set->ports[i], 1);
4892 scsi_host_put(host_set->ports[i]->host);
4896 VPRINTK("EXIT, returning 0\n");
4901 * ata_host_set_remove - PCI layer callback for device removal
4902 * @host_set: ATA host set that was removed
4904 * Unregister all objects associated with this host set. Free those
4908 * Inherited from calling layer (may sleep).
4911 void ata_host_set_remove(struct ata_host_set *host_set)
4913 struct ata_port *ap;
4916 for (i = 0; i < host_set->n_ports; i++) {
4917 ap = host_set->ports[i];
4918 scsi_remove_host(ap->host);
4921 free_irq(host_set->irq, host_set);
4923 for (i = 0; i < host_set->n_ports; i++) {
4924 ap = host_set->ports[i];
4926 ata_scsi_release(ap->host);
4928 if ((ap->flags & ATA_FLAG_NO_LEGACY) == 0) {
4929 struct ata_ioports *ioaddr = &ap->ioaddr;
4931 if (ioaddr->cmd_addr == 0x1f0)
4932 release_region(0x1f0, 8);
4933 else if (ioaddr->cmd_addr == 0x170)
4934 release_region(0x170, 8);
4937 scsi_host_put(ap->host);
4940 if (host_set->ops->host_stop)
4941 host_set->ops->host_stop(host_set);
4947 * ata_scsi_release - SCSI layer callback hook for host unload
4948 * @host: libata host to be unloaded
4950 * Performs all duties necessary to shut down a libata port...
4951 * Kill port kthread, disable port, and release resources.
4954 * Inherited from SCSI layer.
4960 int ata_scsi_release(struct Scsi_Host *host)
4962 struct ata_port *ap = (struct ata_port *) &host->hostdata[0];
4966 ap->ops->port_disable(ap);
4967 ata_host_remove(ap, 0);
4974 * ata_std_ports - initialize ioaddr with standard port offsets.
4975 * @ioaddr: IO address structure to be initialized
4977 * Utility function which initializes data_addr, error_addr,
4978 * feature_addr, nsect_addr, lbal_addr, lbam_addr, lbah_addr,
4979 * device_addr, status_addr, and command_addr to standard offsets
4980 * relative to cmd_addr.
4982 * Does not set ctl_addr, altstatus_addr, bmdma_addr, or scr_addr.
4985 void ata_std_ports(struct ata_ioports *ioaddr)
4987 ioaddr->data_addr = ioaddr->cmd_addr + ATA_REG_DATA;
4988 ioaddr->error_addr = ioaddr->cmd_addr + ATA_REG_ERR;
4989 ioaddr->feature_addr = ioaddr->cmd_addr + ATA_REG_FEATURE;
4990 ioaddr->nsect_addr = ioaddr->cmd_addr + ATA_REG_NSECT;
4991 ioaddr->lbal_addr = ioaddr->cmd_addr + ATA_REG_LBAL;
4992 ioaddr->lbam_addr = ioaddr->cmd_addr + ATA_REG_LBAM;
4993 ioaddr->lbah_addr = ioaddr->cmd_addr + ATA_REG_LBAH;
4994 ioaddr->device_addr = ioaddr->cmd_addr + ATA_REG_DEVICE;
4995 ioaddr->status_addr = ioaddr->cmd_addr + ATA_REG_STATUS;
4996 ioaddr->command_addr = ioaddr->cmd_addr + ATA_REG_CMD;
4999 static struct ata_probe_ent *
5000 ata_probe_ent_alloc(struct device *dev, const struct ata_port_info *port)
5002 struct ata_probe_ent *probe_ent;
5004 probe_ent = kzalloc(sizeof(*probe_ent), GFP_KERNEL);
5006 printk(KERN_ERR DRV_NAME "(%s): out of memory\n",
5007 kobject_name(&(dev->kobj)));
5011 INIT_LIST_HEAD(&probe_ent->node);
5012 probe_ent->dev = dev;
5014 probe_ent->sht = port->sht;
5015 probe_ent->host_flags = port->host_flags;
5016 probe_ent->pio_mask = port->pio_mask;
5017 probe_ent->mwdma_mask = port->mwdma_mask;
5018 probe_ent->udma_mask = port->udma_mask;
5019 probe_ent->port_ops = port->port_ops;
5028 void ata_pci_host_stop (struct ata_host_set *host_set)
5030 struct pci_dev *pdev = to_pci_dev(host_set->dev);
5032 pci_iounmap(pdev, host_set->mmio_base);
5036 * ata_pci_init_native_mode - Initialize native-mode driver
5037 * @pdev: pci device to be initialized
5038 * @port: array[2] of pointers to port info structures.
5039 * @ports: bitmap of ports present
5041 * Utility function which allocates and initializes an
5042 * ata_probe_ent structure for a standard dual-port
5043 * PIO-based IDE controller. The returned ata_probe_ent
5044 * structure can be passed to ata_device_add(). The returned
5045 * ata_probe_ent structure should then be freed with kfree().
5047 * The caller need only pass the address of the primary port, the
5048 * secondary will be deduced automatically. If the device has non
5049 * standard secondary port mappings this function can be called twice,
5050 * once for each interface.
5053 struct ata_probe_ent *
5054 ata_pci_init_native_mode(struct pci_dev *pdev, struct ata_port_info **port, int ports)
5056 struct ata_probe_ent *probe_ent =
5057 ata_probe_ent_alloc(pci_dev_to_dev(pdev), port[0]);
5063 probe_ent->irq = pdev->irq;
5064 probe_ent->irq_flags = SA_SHIRQ;
5065 probe_ent->private_data = port[0]->private_data;
5067 if (ports & ATA_PORT_PRIMARY) {
5068 probe_ent->port[p].cmd_addr = pci_resource_start(pdev, 0);
5069 probe_ent->port[p].altstatus_addr =
5070 probe_ent->port[p].ctl_addr =
5071 pci_resource_start(pdev, 1) | ATA_PCI_CTL_OFS;
5072 probe_ent->port[p].bmdma_addr = pci_resource_start(pdev, 4);
5073 ata_std_ports(&probe_ent->port[p]);
5077 if (ports & ATA_PORT_SECONDARY) {
5078 probe_ent->port[p].cmd_addr = pci_resource_start(pdev, 2);
5079 probe_ent->port[p].altstatus_addr =
5080 probe_ent->port[p].ctl_addr =
5081 pci_resource_start(pdev, 3) | ATA_PCI_CTL_OFS;
5082 probe_ent->port[p].bmdma_addr = pci_resource_start(pdev, 4) + 8;
5083 ata_std_ports(&probe_ent->port[p]);
5087 probe_ent->n_ports = p;
5091 static struct ata_probe_ent *ata_pci_init_legacy_port(struct pci_dev *pdev, struct ata_port_info *port, int port_num)
5093 struct ata_probe_ent *probe_ent;
5095 probe_ent = ata_probe_ent_alloc(pci_dev_to_dev(pdev), port);
5099 probe_ent->legacy_mode = 1;
5100 probe_ent->n_ports = 1;
5101 probe_ent->hard_port_no = port_num;
5102 probe_ent->private_data = port->private_data;
5107 probe_ent->irq = 14;
5108 probe_ent->port[0].cmd_addr = 0x1f0;
5109 probe_ent->port[0].altstatus_addr =
5110 probe_ent->port[0].ctl_addr = 0x3f6;
5113 probe_ent->irq = 15;
5114 probe_ent->port[0].cmd_addr = 0x170;
5115 probe_ent->port[0].altstatus_addr =
5116 probe_ent->port[0].ctl_addr = 0x376;
5119 probe_ent->port[0].bmdma_addr = pci_resource_start(pdev, 4) + 8 * port_num;
5120 ata_std_ports(&probe_ent->port[0]);
5125 * ata_pci_init_one - Initialize/register PCI IDE host controller
5126 * @pdev: Controller to be initialized
5127 * @port_info: Information from low-level host driver
5128 * @n_ports: Number of ports attached to host controller
5130 * This is a helper function which can be called from a driver's
5131 * xxx_init_one() probe function if the hardware uses traditional
5132 * IDE taskfile registers.
5134 * This function calls pci_enable_device(), reserves its register
5135 * regions, sets the dma mask, enables bus master mode, and calls
5139 * Inherited from PCI layer (may sleep).
5142 * Zero on success, negative on errno-based value on error.
5145 int ata_pci_init_one (struct pci_dev *pdev, struct ata_port_info **port_info,
5146 unsigned int n_ports)
5148 struct ata_probe_ent *probe_ent = NULL, *probe_ent2 = NULL;
5149 struct ata_port_info *port[2];
5151 unsigned int legacy_mode = 0;
5152 int disable_dev_on_err = 1;
5157 port[0] = port_info[0];
5159 port[1] = port_info[1];
5163 if ((port[0]->host_flags & ATA_FLAG_NO_LEGACY) == 0
5164 && (pdev->class >> 8) == PCI_CLASS_STORAGE_IDE) {
5165 /* TODO: What if one channel is in native mode ... */
5166 pci_read_config_byte(pdev, PCI_CLASS_PROG, &tmp8);
5167 mask = (1 << 2) | (1 << 0);
5168 if ((tmp8 & mask) != mask)
5169 legacy_mode = (1 << 3);
5173 if ((!legacy_mode) && (n_ports > 2)) {
5174 printk(KERN_ERR "ata: BUG: native mode, n_ports > 2\n");
5179 /* FIXME: Really for ATA it isn't safe because the device may be
5180 multi-purpose and we want to leave it alone if it was already
5181 enabled. Secondly for shared use as Arjan says we want refcounting
5183 Checking dev->is_enabled is insufficient as this is not set at
5184 boot for the primary video which is BIOS enabled
5187 rc = pci_enable_device(pdev);
5191 rc = pci_request_regions(pdev, DRV_NAME);
5193 disable_dev_on_err = 0;
5197 /* FIXME: Should use platform specific mappers for legacy port ranges */
5199 if (!request_region(0x1f0, 8, "libata")) {
5200 struct resource *conflict, res;
5202 res.end = 0x1f0 + 8 - 1;
5203 conflict = ____request_resource(&ioport_resource, &res);
5204 if (!strcmp(conflict->name, "libata"))
5205 legacy_mode |= (1 << 0);
5207 disable_dev_on_err = 0;
5208 printk(KERN_WARNING "ata: 0x1f0 IDE port busy\n");
5211 legacy_mode |= (1 << 0);
5213 if (!request_region(0x170, 8, "libata")) {
5214 struct resource *conflict, res;
5216 res.end = 0x170 + 8 - 1;
5217 conflict = ____request_resource(&ioport_resource, &res);
5218 if (!strcmp(conflict->name, "libata"))
5219 legacy_mode |= (1 << 1);
5221 disable_dev_on_err = 0;
5222 printk(KERN_WARNING "ata: 0x170 IDE port busy\n");
5225 legacy_mode |= (1 << 1);
5228 /* we have legacy mode, but all ports are unavailable */
5229 if (legacy_mode == (1 << 3)) {
5231 goto err_out_regions;
5234 rc = pci_set_dma_mask(pdev, ATA_DMA_MASK);
5236 goto err_out_regions;
5237 rc = pci_set_consistent_dma_mask(pdev, ATA_DMA_MASK);
5239 goto err_out_regions;
5242 if (legacy_mode & (1 << 0))
5243 probe_ent = ata_pci_init_legacy_port(pdev, port[0], 0);
5244 if (legacy_mode & (1 << 1))
5245 probe_ent2 = ata_pci_init_legacy_port(pdev, port[1], 1);
5248 probe_ent = ata_pci_init_native_mode(pdev, port, ATA_PORT_PRIMARY | ATA_PORT_SECONDARY);
5250 probe_ent = ata_pci_init_native_mode(pdev, port, ATA_PORT_PRIMARY);
5252 if (!probe_ent && !probe_ent2) {
5254 goto err_out_regions;
5257 pci_set_master(pdev);
5259 /* FIXME: check ata_device_add return */
5261 if (legacy_mode & (1 << 0))
5262 ata_device_add(probe_ent);
5263 if (legacy_mode & (1 << 1))
5264 ata_device_add(probe_ent2);
5266 ata_device_add(probe_ent);
5274 if (legacy_mode & (1 << 0))
5275 release_region(0x1f0, 8);
5276 if (legacy_mode & (1 << 1))
5277 release_region(0x170, 8);
5278 pci_release_regions(pdev);
5280 if (disable_dev_on_err)
5281 pci_disable_device(pdev);
5286 * ata_pci_remove_one - PCI layer callback for device removal
5287 * @pdev: PCI device that was removed
5289 * PCI layer indicates to libata via this hook that
5290 * hot-unplug or module unload event has occurred.
5291 * Handle this by unregistering all objects associated
5292 * with this PCI device. Free those objects. Then finally
5293 * release PCI resources and disable device.
5296 * Inherited from PCI layer (may sleep).
5299 void ata_pci_remove_one (struct pci_dev *pdev)
5301 struct device *dev = pci_dev_to_dev(pdev);
5302 struct ata_host_set *host_set = dev_get_drvdata(dev);
5304 ata_host_set_remove(host_set);
5305 pci_release_regions(pdev);
5306 pci_disable_device(pdev);
5307 dev_set_drvdata(dev, NULL);
5310 /* move to PCI subsystem */
5311 int pci_test_config_bits(struct pci_dev *pdev, const struct pci_bits *bits)
5313 unsigned long tmp = 0;
5315 switch (bits->width) {
5318 pci_read_config_byte(pdev, bits->reg, &tmp8);
5324 pci_read_config_word(pdev, bits->reg, &tmp16);
5330 pci_read_config_dword(pdev, bits->reg, &tmp32);
5341 return (tmp == bits->val) ? 1 : 0;
5344 int ata_pci_device_suspend(struct pci_dev *pdev, pm_message_t state)
5346 pci_save_state(pdev);
5347 pci_disable_device(pdev);
5348 pci_set_power_state(pdev, PCI_D3hot);
5352 int ata_pci_device_resume(struct pci_dev *pdev)
5354 pci_set_power_state(pdev, PCI_D0);
5355 pci_restore_state(pdev);
5356 pci_enable_device(pdev);
5357 pci_set_master(pdev);
5360 #endif /* CONFIG_PCI */
5363 static int __init ata_init(void)
5365 ata_wq = create_workqueue("ata");
5369 printk(KERN_DEBUG "libata version " DRV_VERSION " loaded.\n");
5373 static void __exit ata_exit(void)
5375 destroy_workqueue(ata_wq);
5378 module_init(ata_init);
5379 module_exit(ata_exit);
5381 static unsigned long ratelimit_time;
5382 static spinlock_t ata_ratelimit_lock = SPIN_LOCK_UNLOCKED;
5384 int ata_ratelimit(void)
5387 unsigned long flags;
5389 spin_lock_irqsave(&ata_ratelimit_lock, flags);
5391 if (time_after(jiffies, ratelimit_time)) {
5393 ratelimit_time = jiffies + (HZ/5);
5397 spin_unlock_irqrestore(&ata_ratelimit_lock, flags);
5403 * libata is essentially a library of internal helper functions for
5404 * low-level ATA host controller drivers. As such, the API/ABI is
5405 * likely to change as new drivers are added and updated.
5406 * Do not depend on ABI/API stability.
5409 EXPORT_SYMBOL_GPL(ata_std_bios_param);
5410 EXPORT_SYMBOL_GPL(ata_std_ports);
5411 EXPORT_SYMBOL_GPL(ata_device_add);
5412 EXPORT_SYMBOL_GPL(ata_host_set_remove);
5413 EXPORT_SYMBOL_GPL(ata_sg_init);
5414 EXPORT_SYMBOL_GPL(ata_sg_init_one);
5415 EXPORT_SYMBOL_GPL(ata_qc_complete);
5416 EXPORT_SYMBOL_GPL(ata_qc_issue_prot);
5417 EXPORT_SYMBOL_GPL(ata_eng_timeout);
5418 EXPORT_SYMBOL_GPL(ata_tf_load);
5419 EXPORT_SYMBOL_GPL(ata_tf_read);
5420 EXPORT_SYMBOL_GPL(ata_noop_dev_select);
5421 EXPORT_SYMBOL_GPL(ata_std_dev_select);
5422 EXPORT_SYMBOL_GPL(ata_tf_to_fis);
5423 EXPORT_SYMBOL_GPL(ata_tf_from_fis);
5424 EXPORT_SYMBOL_GPL(ata_check_status);
5425 EXPORT_SYMBOL_GPL(ata_altstatus);
5426 EXPORT_SYMBOL_GPL(ata_exec_command);
5427 EXPORT_SYMBOL_GPL(ata_port_start);
5428 EXPORT_SYMBOL_GPL(ata_port_stop);
5429 EXPORT_SYMBOL_GPL(ata_host_stop);
5430 EXPORT_SYMBOL_GPL(ata_interrupt);
5431 EXPORT_SYMBOL_GPL(ata_qc_prep);
5432 EXPORT_SYMBOL_GPL(ata_bmdma_setup);
5433 EXPORT_SYMBOL_GPL(ata_bmdma_start);
5434 EXPORT_SYMBOL_GPL(ata_bmdma_irq_clear);
5435 EXPORT_SYMBOL_GPL(ata_bmdma_status);
5436 EXPORT_SYMBOL_GPL(ata_bmdma_stop);
5437 EXPORT_SYMBOL_GPL(ata_port_probe);
5438 EXPORT_SYMBOL_GPL(sata_phy_reset);
5439 EXPORT_SYMBOL_GPL(__sata_phy_reset);
5440 EXPORT_SYMBOL_GPL(ata_bus_reset);
5441 EXPORT_SYMBOL_GPL(ata_port_disable);
5442 EXPORT_SYMBOL_GPL(ata_ratelimit);
5443 EXPORT_SYMBOL_GPL(ata_scsi_ioctl);
5444 EXPORT_SYMBOL_GPL(ata_scsi_queuecmd);
5445 EXPORT_SYMBOL_GPL(ata_scsi_error);
5446 EXPORT_SYMBOL_GPL(ata_scsi_slave_config);
5447 EXPORT_SYMBOL_GPL(ata_scsi_release);
5448 EXPORT_SYMBOL_GPL(ata_host_intr);
5449 EXPORT_SYMBOL_GPL(ata_dev_classify);
5450 EXPORT_SYMBOL_GPL(ata_dev_id_string);
5451 EXPORT_SYMBOL_GPL(ata_dev_config);
5452 EXPORT_SYMBOL_GPL(ata_scsi_simulate);
5454 EXPORT_SYMBOL_GPL(ata_pio_need_iordy);
5455 EXPORT_SYMBOL_GPL(ata_timing_compute);
5456 EXPORT_SYMBOL_GPL(ata_timing_merge);
5459 EXPORT_SYMBOL_GPL(pci_test_config_bits);
5460 EXPORT_SYMBOL_GPL(ata_pci_host_stop);
5461 EXPORT_SYMBOL_GPL(ata_pci_init_native_mode);
5462 EXPORT_SYMBOL_GPL(ata_pci_init_one);
5463 EXPORT_SYMBOL_GPL(ata_pci_remove_one);
5464 EXPORT_SYMBOL_GPL(ata_pci_device_suspend);
5465 EXPORT_SYMBOL_GPL(ata_pci_device_resume);
5466 #endif /* CONFIG_PCI */
5468 EXPORT_SYMBOL_GPL(ata_device_suspend);
5469 EXPORT_SYMBOL_GPL(ata_device_resume);
5470 EXPORT_SYMBOL_GPL(ata_scsi_device_suspend);
5471 EXPORT_SYMBOL_GPL(ata_scsi_device_resume);